ARM GAS /tmp/cc3JIfda.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32g4xx_hal_adc_ex.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c" 20 .section .text.LL_ADC_SetCalibrationFactor,"ax",%progbits 21 .align 1 22 .syntax unified 23 .thumb 24 .thumb_func 26 LL_ADC_SetCalibrationFactor: 27 .LVL0: 28 .LFB139: 29 .file 2 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h" 1:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ****************************************************************************** 3:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @file stm32g4xx_ll_adc.h 4:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @author MCD Application Team 5:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Header file of ADC LL module. 6:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ****************************************************************************** 7:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @attention 8:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 9:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Copyright (c) 2019 STMicroelectronics. 10:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All rights reserved. 11:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This software is licensed under terms that can be found in the LICENSE file 13:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * in the root directory of this software component. 14:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 16:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ****************************************************************************** 17:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 18:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 19:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Define to prevent recursive inclusion -------------------------------------*/ 20:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #ifndef STM32G4xx_LL_ADC_H 21:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define STM32G4xx_LL_ADC_H 22:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 23:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #ifdef __cplusplus 24:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** extern "C" { 25:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif 26:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 27:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Includes ------------------------------------------------------------------*/ 28:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #include "stm32g4xx.h" 29:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/cc3JIfda.s page 2 30:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @addtogroup STM32G4xx_LL_Driver 31:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 32:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 33:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 34:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined (ADC1) || defined (ADC2) || defined (ADC3) || defined (ADC4) || defined (ADC5) 35:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 36:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL ADC 37:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 38:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 39:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 40:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private types -------------------------------------------------------------*/ 41:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private variables ---------------------------------------------------------*/ 42:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 43:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private constants ---------------------------------------------------------*/ 44:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Private_Constants ADC Private Constants 45:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 46:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 47:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 48:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group regular sequencer: */ 49:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_REG_RANK_x the relevant bits for: */ 50:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - sequencer register offset */ 51:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - sequencer rank bits position into the selected register */ 52:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 53:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC group regular sequencer configuration */ 54:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */ 55:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR1_REGOFFSET (0x00000000UL) 56:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR2_REGOFFSET (0x00000100UL) 57:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR3_REGOFFSET (0x00000200UL) 58:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQR4_REGOFFSET (0x00000300UL) 59:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 60:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_SQRX_REGOFFSET_MASK (ADC_SQR1_REGOFFSET | ADC_SQR2_REGOFFSET \ 61:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_SQR3_REGOFFSET | ADC_SQR4_REGOFFSET) 62:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SQRX_REGOFFSET_POS (8UL) /* Position of bits ADC_SQRx_REGOFFSET in ADC_REG_ 63:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_ID_SQRX_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) 64:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 65:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group regular sequencer bits information to be inserted */ 66:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* into ADC group regular sequencer ranks literals definition. */ 67:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_1_SQRX_BITOFFSET_POS (ADC_SQR1_SQ1_Pos) 68:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_2_SQRX_BITOFFSET_POS (ADC_SQR1_SQ2_Pos) 69:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_3_SQRX_BITOFFSET_POS (ADC_SQR1_SQ3_Pos) 70:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_4_SQRX_BITOFFSET_POS (ADC_SQR1_SQ4_Pos) 71:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_5_SQRX_BITOFFSET_POS (ADC_SQR2_SQ5_Pos) 72:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_6_SQRX_BITOFFSET_POS (ADC_SQR2_SQ6_Pos) 73:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_7_SQRX_BITOFFSET_POS (ADC_SQR2_SQ7_Pos) 74:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_8_SQRX_BITOFFSET_POS (ADC_SQR2_SQ8_Pos) 75:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_9_SQRX_BITOFFSET_POS (ADC_SQR2_SQ9_Pos) 76:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_10_SQRX_BITOFFSET_POS (ADC_SQR3_SQ10_Pos) 77:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_11_SQRX_BITOFFSET_POS (ADC_SQR3_SQ11_Pos) 78:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_12_SQRX_BITOFFSET_POS (ADC_SQR3_SQ12_Pos) 79:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_13_SQRX_BITOFFSET_POS (ADC_SQR3_SQ13_Pos) 80:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_14_SQRX_BITOFFSET_POS (ADC_SQR3_SQ14_Pos) 81:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_15_SQRX_BITOFFSET_POS (ADC_SQR4_SQ15_Pos) 82:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_RANK_16_SQRX_BITOFFSET_POS (ADC_SQR4_SQ16_Pos) 83:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 84:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 85:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 86:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group injected sequencer: */ ARM GAS /tmp/cc3JIfda.s page 3 87:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_INJ_RANK_x the relevant bits for: */ 88:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - data register offset */ 89:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - sequencer rank bits position into the selected register */ 90:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 91:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC group injected data register */ 92:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */ 93:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR1_REGOFFSET (0x00000000UL) 94:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR2_REGOFFSET (0x00000100UL) 95:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR3_REGOFFSET (0x00000200UL) 96:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDR4_REGOFFSET (0x00000300UL) 97:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 98:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_JDRX_REGOFFSET_MASK (ADC_JDR1_REGOFFSET | ADC_JDR2_REGOFFSET \ 99:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_JDR3_REGOFFSET | ADC_JDR4_REGOFFSET) 100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) 101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_JDRX_REGOFFSET_POS (8UL) /* Position of bits ADC_JDRx_REGOFFSET in ADC_INJ_ 102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group injected sequencer bits information to be inserted */ 104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* into ADC group injected sequencer ranks literals definition. */ 105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_1_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ1_Pos) 106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_2_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ2_Pos) 107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_3_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ3_Pos) 108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_RANK_4_JSQR_BITOFFSET_POS (ADC_JSQR_JSQ4_Pos) 109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group regular trigger: */ 113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_REG_TRIG_x the relevant bits for: */ 114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - regular trigger source */ 115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - regular trigger edge */ 116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge ( 117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger source masks for each of possible */ 119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTSEL) << (4U * 122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U * 123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U * 124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_CFGR_EXTSEL) << (4U * 125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger edge masks for each of possible */ 127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN) << (4U * 130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group regular trigger bits information. */ 135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EXTSEL_BITOFFSET_POS (ADC_CFGR_EXTSEL_Pos) 136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_REG_TRIG_EXTEN_BITOFFSET_POS (ADC_CFGR_EXTEN_Pos) 137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC group injected trigger: */ 141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_INJ_TRIG_x the relevant bits for: */ 142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - injected trigger source */ 143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - injected trigger edge */ ARM GAS /tmp/cc3JIfda.s page 4 144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EXT_EDGE_DEFAULT (ADC_JSQR_JEXTEN_0) /* Trigger edge set to rising edge ( 145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger source masks for each of possible */ 147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_SOURCE_MASK (((LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTSEL) << (4U 150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U 151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U 152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_JSQR_JEXTSEL) << (4U 153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Mask containing trigger edge masks for each of possible */ 155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12] */ 156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */ 157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EDGE_MASK (((LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTEN) << (4U * 158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((ADC_INJ_TRIG_EXT_EDGE_DEFAULT) << (4U * 161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of ADC group injected trigger bits information. */ 163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EXTSEL_BITOFFSET_POS (ADC_JSQR_JEXTSEL_Pos) 164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_INJ_TRIG_EXTEN_BITOFFSET_POS (ADC_JSQR_JEXTEN_Pos) 165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC channel: */ 172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literal LL_ADC_CHANNEL_x the relevant bits for: */ 173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel identifier defined by number */ 174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel identifier defined by bitfield */ 175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel differentiation between external channels (connected to */ 176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* GPIO pins) and internal channels (connected to internal paths) */ 177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - channel sampling time defined by SMPRx register offset */ 178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* and SMPx bits positions into SMPRx register */ 179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_MASK (ADC_CFGR_AWD1CH) 180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_AWD2CR_AWD2CH) 181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS (ADC_CFGR_AWD1CH_Pos) 182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_MASK (ADC_CHANNEL_ID_NUMBER_MASK | ADC_CHANNEL_ID_BITFIELD_MA 183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_CHANNEL_ID_INTERNAL_CH_MASK) 184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Equivalent mask of ADC_CHANNEL_NUMBER_MASK aligned on register LSB (bit 0) */ 185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 (ADC_SQR2_SQ5) /* Equivalent to shift: (ADC_CHANNEL_NUMB 186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Channel differentiation between external and internal channels */ 188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH (0x80000000UL) /* Marker of internal channel */ 189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH_2 (0x00080000UL) /* Marker of internal channel for other A 190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH_MASK (ADC_CHANNEL_ID_INTERNAL_CH | ADC_CHANNEL_ID_INTERNAL_CH 191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC channel sampling time configuration */ 193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (offset placed into a spare area of literal definition) */ 194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SMPR1_REGOFFSET (0x00000000UL) 195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SMPR2_REGOFFSET (0x02000000UL) 196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_SMPRX_REGOFFSET_MASK (ADC_SMPR1_REGOFFSET | ADC_SMPR2_REGOFFSET) 197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SMPRX_REGOFFSET_POS (25UL) /* Position of bits ADC_SMPRx_REGOFFSET in ADC_CH 198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_SMPx_BITOFFSET_MASK (0x01F00000UL) 200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_SMPx_BITOFFSET_POS (20UL) /* Value equivalent to bitfield "ADC_CH ARM GAS /tmp/cc3JIfda.s page 5 201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of channels ID number information to be inserted into */ 203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* channels literals definition. */ 204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_0_NUMBER (0x00000000UL) 205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_1_NUMBER (ADC_CFGR_AWD1CH_0) 206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_2_NUMBER (ADC_CFGR_AWD1CH_1) 207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_3_NUMBER (ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH_0) 208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_4_NUMBER (ADC_CFGR_AWD1CH_2) 209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_5_NUMBER (ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH_0) 210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_6_NUMBER (ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH_1) 211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_7_NUMBER (ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH 212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_8_NUMBER (ADC_CFGR_AWD1CH_3) 213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_9_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_0) 214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_10_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_1) 215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_11_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH 216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_12_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2) 217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_13_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH 218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_14_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2 | ADC_CFGR_AWD1CH 219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_15_NUMBER (ADC_CFGR_AWD1CH_3 | ADC_CFGR_AWD1CH_2 | \ 220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CFGR_AWD1CH_1 | ADC_CFGR_AWD1CH_0) 221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_16_NUMBER (ADC_CFGR_AWD1CH_4) 222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_17_NUMBER (ADC_CFGR_AWD1CH_4 | ADC_CFGR_AWD1CH_0) 223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_18_NUMBER (ADC_CFGR_AWD1CH_4 | ADC_CFGR_AWD1CH_1) 224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of channels ID bitfield information to be inserted into */ 226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* channels literals definition. */ 227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0) 228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_1_BITFIELD (ADC_AWD2CR_AWD2CH_1) 229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_2_BITFIELD (ADC_AWD2CR_AWD2CH_2) 230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_3_BITFIELD (ADC_AWD2CR_AWD2CH_3) 231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_4_BITFIELD (ADC_AWD2CR_AWD2CH_4) 232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_5_BITFIELD (ADC_AWD2CR_AWD2CH_5) 233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_6_BITFIELD (ADC_AWD2CR_AWD2CH_6) 234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_7_BITFIELD (ADC_AWD2CR_AWD2CH_7) 235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_8_BITFIELD (ADC_AWD2CR_AWD2CH_8) 236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_9_BITFIELD (ADC_AWD2CR_AWD2CH_9) 237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_10_BITFIELD (ADC_AWD2CR_AWD2CH_10) 238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_11_BITFIELD (ADC_AWD2CR_AWD2CH_11) 239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_12_BITFIELD (ADC_AWD2CR_AWD2CH_12) 240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_13_BITFIELD (ADC_AWD2CR_AWD2CH_13) 241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_14_BITFIELD (ADC_AWD2CR_AWD2CH_14) 242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_15_BITFIELD (ADC_AWD2CR_AWD2CH_15) 243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_16_BITFIELD (ADC_AWD2CR_AWD2CH_16) 244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_17_BITFIELD (ADC_AWD2CR_AWD2CH_17) 245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_18_BITFIELD (ADC_AWD2CR_AWD2CH_18) 246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Definition of channels sampling time information to be inserted into */ 248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* channels literals definition. */ 249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_0_SMP (ADC_SMPR1_REGOFFSET | (( 0UL) << ADC_CHANNEL_SMPx_BITOF 250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_1_SMP (ADC_SMPR1_REGOFFSET | (( 3UL) << ADC_CHANNEL_SMPx_BITOF 251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_2_SMP (ADC_SMPR1_REGOFFSET | (( 6UL) << ADC_CHANNEL_SMPx_BITOF 252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_3_SMP (ADC_SMPR1_REGOFFSET | (( 9UL) << ADC_CHANNEL_SMPx_BITOF 253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_4_SMP (ADC_SMPR1_REGOFFSET | ((12UL) << ADC_CHANNEL_SMPx_BITOF 254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_5_SMP (ADC_SMPR1_REGOFFSET | ((15UL) << ADC_CHANNEL_SMPx_BITOF 255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_6_SMP (ADC_SMPR1_REGOFFSET | ((18UL) << ADC_CHANNEL_SMPx_BITOF 256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_7_SMP (ADC_SMPR1_REGOFFSET | ((21UL) << ADC_CHANNEL_SMPx_BITOF 257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_8_SMP (ADC_SMPR1_REGOFFSET | ((24UL) << ADC_CHANNEL_SMPx_BITOF ARM GAS /tmp/cc3JIfda.s page 6 258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_9_SMP (ADC_SMPR1_REGOFFSET | ((27UL) << ADC_CHANNEL_SMPx_BITOF 259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_10_SMP (ADC_SMPR2_REGOFFSET | (( 0UL) << ADC_CHANNEL_SMPx_BITOF 260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_11_SMP (ADC_SMPR2_REGOFFSET | (( 3UL) << ADC_CHANNEL_SMPx_BITOF 261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_12_SMP (ADC_SMPR2_REGOFFSET | (( 6UL) << ADC_CHANNEL_SMPx_BITOF 262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_13_SMP (ADC_SMPR2_REGOFFSET | (( 9UL) << ADC_CHANNEL_SMPx_BITOF 263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_14_SMP (ADC_SMPR2_REGOFFSET | ((12UL) << ADC_CHANNEL_SMPx_BITOF 264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_15_SMP (ADC_SMPR2_REGOFFSET | ((15UL) << ADC_CHANNEL_SMPx_BITOF 265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_16_SMP (ADC_SMPR2_REGOFFSET | ((18UL) << ADC_CHANNEL_SMPx_BITOF 266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_17_SMP (ADC_SMPR2_REGOFFSET | ((21UL) << ADC_CHANNEL_SMPx_BITOF 267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CHANNEL_18_SMP (ADC_SMPR2_REGOFFSET | ((24UL) << ADC_CHANNEL_SMPx_BITOF 268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC mode single or differential ended: */ 271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literals LL_ADC_SINGLE_ENDED or LL_ADC_SINGLE_DIFFERENTIAL */ 272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* the relevant bits for: */ 273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (concatenation of multiple bits used in different registers) */ 274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC calibration: calibration start, calibration factor get or set */ 275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC channels: set each ADC channel ending mode */ 276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_START_MASK (ADC_CR_ADCALDIF) 277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_FACTOR_MASK (ADC_CALFACT_CALFACT_D | ADC_CALFACT_CALFACT_S) 278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CHANNEL_MASK (ADC_CHANNEL_ID_BITFIELD_MASK) /* Equivalent to ADC_DIFS 279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK (ADC_CALFACT_CALFACT_S_4 | ADC_CALFACT_CALFACT_S_3) /* B 280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK (0x00010000UL) /* Selection o 281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_POS (16UL) /* Selection o 282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_SINGLEDIFF_CALIB_F_BIT_D_SHIFT4 (ADC_SINGLEDIFF_CALIB_F_BIT_D_POS - 4UL) /* Shift of bi 283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC analog watchdog: */ 285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* To select into literals LL_ADC_AWD_CHANNELx_xxx the relevant bits for: */ 286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (concatenation of multiple bits used in different analog watchdogs, */ 287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (feature of several watchdogs not available on all STM32 families)). */ 288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - analog watchdog 1: monitored channel defined by number, */ 289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* selection of ADC group (ADC groups regular and-or injected). */ 290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - analog watchdog 2 and 3: monitored channel defined by bitfield, no */ 291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* selection on groups. */ 292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC analog watchdog channel configuration */ 294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) 295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR2_REGOFFSET (0x00100000UL) 296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR3_REGOFFSET (0x00200000UL) 297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Register offset gap between AWD1 and AWD2-AWD3 configuration registers */ 299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (Set separately as ADC_AWD_CRX_REGOFFSET to spare 32 bits space */ 300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0) 301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR12_REGOFFSETGAP_VAL (0x00000024UL) 302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD 304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR1_CHANNEL_MASK (ADC_CFGR_AWD1CH | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN | 306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR23_CHANNEL_MASK (ADC_AWD2CR_AWD2CH) 307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CR_ALL_CHANNEL_MASK (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR23_CHANNEL_MASK) 308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_CRX_REGOFFSET_POS (20UL) /* Position of bits ADC_AWD_CRx_REGOFFSET in ADC_ 310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC analog watchdog threshold configuration */ 312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET) 313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TR2_REGOFFSET (ADC_AWD_CR2_REGOFFSET) 314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TR3_REGOFFSET (ADC_AWD_CR3_REGOFFSET) ARM GAS /tmp/cc3JIfda.s page 7 315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_REGOFFSET_MASK (ADC_AWD_TR1_REGOFFSET | ADC_AWD_TR2_REGOFFSET | ADC_AWD 316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_REGOFFSET_POS (ADC_AWD_CRX_REGOFFSET_POS) /* Position of bits ADC_ 317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_MASK (0x00010000UL) /* Selection of 1 bit t 318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_POS (16UL) /* Selection of 1 bit t 319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_AWD_TRX_BIT_HIGH_SHIFT4 (ADC_AWD_TRX_BIT_HIGH_POS - 4UL) /* Shift of bit ADC_AWD 320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal mask for ADC offset: */ 322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal register offset for ADC offset number configuration */ 323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR1_REGOFFSET (0x00000000UL) 324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR2_REGOFFSET (0x00000001UL) 325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR3_REGOFFSET (0x00000002UL) 326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFR4_REGOFFSET (0x00000003UL) 327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_OFRx_REGOFFSET_MASK (ADC_OFR1_REGOFFSET | ADC_OFR2_REGOFFSET \ 328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ADC_OFR3_REGOFFSET | ADC_OFR4_REGOFFSET) 329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ADC registers bits positions */ 332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_RES_BITOFFSET_POS (ADC_CFGR_RES_Pos) 333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_AWD1SGL_BITOFFSET_POS (ADC_CFGR_AWD1SGL_Pos) 334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_AWD1EN_BITOFFSET_POS (ADC_CFGR_AWD1EN_Pos) 335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CFGR_JAWD1EN_BITOFFSET_POS (ADC_CFGR_JAWD1EN_Pos) 336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_TR1_HT1_BITOFFSET_POS (ADC_TR1_HT1_Pos) 337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ADC registers bits groups */ 340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define ADC_CR_BITS_PROPERTY_RS (ADC_CR_ADCAL | ADC_CR_JADSTP | ADC_CR_ADSTP | ADC_CR_JA 341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ADC internal channels related definitions */ 344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Internal voltage reference VrefInt */ 345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define VREFINT_CAL_ADDR ((uint16_t*) (0x1FFF75AAUL)) /* Internal voltage referen 346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define VREFINT_CAL_VREF (3000UL) /* Analog voltage reference 347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Temperature sensor */ 348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL1_ADDR ((uint16_t*) (0x1FFF75A8UL)) /* Internal temperature sen 349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL2_ADDR ((uint16_t*) (0x1FFF75CAUL)) /* Internal temperature sen 350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL1_TEMP (30L) /* Internal temperature sen 351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL2_TEMP (130L) /* Internal temperature sen 352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define TEMPSENSOR_CAL_VREFANALOG (3000UL) /* Analog voltage reference 353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Private macros ------------------------------------------------------------*/ 360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Private_Macros ADC Private Macros 361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Driver macro reserved for internal use: set a pointer to 366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a register from a register basis from which an offset 367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is applied. 368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG__ Register basis from which the offset is applied. 369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG_OFFFSET__ Offset to be applied (unit: number of registers). 370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Pointer to register address 371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/cc3JIfda.s page 8 372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ 373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__IO uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2UL)))) 374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported types ------------------------------------------------------------*/ 381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(USE_FULL_LL_DRIVER) 382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_ES_INIT ADC Exported Init structure 383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC common parameters 388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and multimode 389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (all ADC instances belonging to the same ADC common instance). 390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_CommonInit() 391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC instances state (all ADC instances 392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sharing the same ADC common instance): 393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances sharing the same ADC common instance must be 394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * disabled. 395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t CommonClock; /*!< Set parameter common to several ADC: Clock source and 399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_COMMON 400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note On this STM32 series, if ADC group injected is u 401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** clock ratio constraints between ADC clock and AH 402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** must be respected. Refer to reference manual. 403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Multimode; /*!< Set ADC multimode configuration to operate in independ 408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_ 409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t MultiDMATransfer; /*!< Set ADC multimode conversion data transfer: no transfe 413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_ 414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t MultiTwoSamplingDelay; /*!< Set ADC multimode delay between 2 sampling phases. 418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_MULTI_ 419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_CommonInitTypeDef; 424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC instance. 427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC instance. 428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Affects both group regular and group injected (availability ARM GAS /tmp/cc3JIfda.s page 9 429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of ADC group injected depends on STM32 families). 430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to corresponding unitary functions into 431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Instance . 432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_Init() 433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC state: 434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance must be disabled. 435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency 436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and compatibility over all STM32 families. However, the different 437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * features can be set under different ADC state conditions 438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going, 439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC enabled with conversion on going, ...) 440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function 441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and potentially with ADC in a different state than disabled, 442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * refer to description of each function for setting 443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conditioned to ADC state. 444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Resolution; /*!< Set ADC resolution. 448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_RESOLU 449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t DataAlignment; /*!< Set ADC conversion data alignment. 453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_DATA_A 454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t LowPowerMode; /*!< Set ADC low power mode. 458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_LP_MOD 459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_InitTypeDef; 463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC group regular. 466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC group regular. 467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to corresponding unitary functions into 468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Group_Regular 469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (functions with prefix "REG"). 470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_REG_Init() 471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC state: 472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance must be disabled. 473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency 474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and compatibility over all STM32 families. However, the different 475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * features can be set under different ADC state conditions 476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going, 477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC enabled with conversion on going, ...) 478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function 479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and potentially with ADC in a different state than disabled, 480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * refer to description of each function for setting 481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conditioned to ADC state. 482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TriggerSource; /*!< Set ADC group regular conversion trigger source: inter ARM GAS /tmp/cc3JIfda.s page 10 486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_TR 487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note On this STM32 series, setting trigger source to 488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (default setting for compatibility with some ADC 489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** In case of need to modify trigger edge, use func 490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerLength; /*!< Set ADC group regular sequencer length. 494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_SE 495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerDiscont; /*!< Set ADC group regular sequencer discontinuous mode: se 499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_SE 500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note This parameter has an effect only if group regul 501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (scan length of 2 ranks or more). 502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ContinuousMode; /*!< Set ADC continuous conversion mode on ADC group regula 506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_CO 507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: It is not possible to enable both ADC group regu 508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t DMATransfer; /*!< Set ADC group regular conversion data transfer: no tra 512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_DM 513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Overrun; /*!< Set ADC group regular behavior in case of overrun: 517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** data preserved or overwritten. 518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_REG_OV 519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_REG_InitTypeDef; 523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Structure definition of some features of ADC group injected. 526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These parameters have an impact on ADC scope: ADC group injected. 527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to corresponding unitary functions into 528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref ADC_LL_EF_Configuration_ADC_Group_Regular 529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (functions with prefix "INJ"). 530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The setting of these parameters by function @ref LL_ADC_INJ_Init() 531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is conditioned to ADC state: 532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance must be disabled. 533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This condition is applied to all ADC features, for efficiency 534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and compatibility over all STM32 families. However, the different 535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * features can be set under different ADC state conditions 536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (setting possible with ADC enabled without conversion on going, 537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC enabled with conversion on going, ...) 538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Each feature can be updated afterwards with a unitary function 539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and potentially with ADC in a different state than disabled, 540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * refer to description of each function for setting 541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conditioned to ADC state. 542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/cc3JIfda.s page 11 543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** typedef struct 544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TriggerSource; /*!< Set ADC group injected conversion trigger source: inte 546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_TR 547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note On this STM32 series, setting trigger source to 548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (default setting for compatibility with some ADC 549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** In case of need to modify trigger edge, use func 550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerLength; /*!< Set ADC group injected sequencer length. 554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_SE 555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerDiscont; /*!< Set ADC group injected sequencer discontinuous mode: s 559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_SE 560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** @note This parameter has an effect only if group injec 561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (scan length of 2 ranks or more). 562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TrigAuto; /*!< Set ADC group injected conversion trigger: independent 566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This parameter can be a value of @ref ADC_LL_EC_INJ_TR 567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: This parameter must be set to set to independent 568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** This feature can be modified afterwards using unitary 570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } LL_ADC_INJ_InitTypeDef; 572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* USE_FULL_LL_DRIVER */ 577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported constants --------------------------------------------------------*/ 579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Constants ADC Exported Constants 580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_FLAG ADC flags 584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Flags defines which can be used with LL_ADC_ReadReg function 585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY ADC_ISR_ADRDY /*!< ADC flag ADC instance ready */ 588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC flag ADC group regular end o 589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOS ADC_ISR_EOS /*!< ADC flag ADC group regular end o 590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC flag ADC group regular overr 591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC flag ADC group regular end o 592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC ADC_ISR_JEOC /*!< ADC flag ADC group injected end 593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS ADC_ISR_JEOS /*!< ADC flag ADC group injected end 594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF ADC_ISR_JQOVF /*!< ADC flag ADC group injected cont 595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1 ADC_ISR_AWD1 /*!< ADC flag ADC analog watchdog 1 * 596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2 ADC_ISR_AWD2 /*!< ADC flag ADC analog watchdog 2 * 597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3 ADC_ISR_AWD3 /*!< ADC flag ADC analog watchdog 3 * 598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY_MST ADC_CSR_ADRDY_MST /*!< ADC flag ADC multimode master in ARM GAS /tmp/cc3JIfda.s page 12 600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY_SLV ADC_CSR_ADRDY_SLV /*!< ADC flag ADC multimode slave ins 601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOC_MST ADC_CSR_EOC_MST /*!< ADC flag ADC multimode master gr 602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOC_SLV ADC_CSR_EOC_SLV /*!< ADC flag ADC multimode slave gro 603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOS_MST ADC_CSR_EOS_MST /*!< ADC flag ADC multimode master gr 604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOS_SLV ADC_CSR_EOS_SLV /*!< ADC flag ADC multimode slave gro 605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_OVR_MST ADC_CSR_OVR_MST /*!< ADC flag ADC multimode master gr 606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_OVR_SLV ADC_CSR_OVR_SLV /*!< ADC flag ADC multimode slave gro 607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP_MST ADC_CSR_EOSMP_MST /*!< ADC flag ADC multimode master gr 608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP_SLV ADC_CSR_EOSMP_SLV /*!< ADC flag ADC multimode slave gro 609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC_MST ADC_CSR_JEOC_MST /*!< ADC flag ADC multimode master gr 610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOC_SLV ADC_CSR_JEOC_SLV /*!< ADC flag ADC multimode slave gro 611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS_MST ADC_CSR_JEOS_MST /*!< ADC flag ADC multimode master gr 612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JEOS_SLV ADC_CSR_JEOS_SLV /*!< ADC flag ADC multimode slave gro 613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF_MST ADC_CSR_JQOVF_MST /*!< ADC flag ADC multimode master gr 614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_JQOVF_SLV ADC_CSR_JQOVF_SLV /*!< ADC flag ADC multimode slave gro 615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1_MST ADC_CSR_AWD1_MST /*!< ADC flag ADC multimode master an 616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1_SLV ADC_CSR_AWD1_SLV /*!< ADC flag ADC multimode slave ana 617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2_MST ADC_CSR_AWD2_MST /*!< ADC flag ADC multimode master an 618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD2_SLV ADC_CSR_AWD2_SLV /*!< ADC flag ADC multimode slave ana 619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3_MST ADC_CSR_AWD3_MST /*!< ADC flag ADC multimode master an 620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_FLAG_AWD3_SLV ADC_CSR_AWD3_SLV /*!< ADC flag ADC multimode slave ana 621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_IT ADC interruptions for configuration (interruption enable or disable) 627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions 628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_ADRDY ADC_IER_ADRDYIE /*!< ADC interruption ADC instance re 631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_EOC ADC_IER_EOCIE /*!< ADC interruption ADC group regul 632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_EOS ADC_IER_EOSIE /*!< ADC interruption ADC group regul 633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_OVR ADC_IER_OVRIE /*!< ADC interruption ADC group regul 634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_EOSMP ADC_IER_EOSMPIE /*!< ADC interruption ADC group regul 635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_JEOC ADC_IER_JEOCIE /*!< ADC interruption ADC group injec 636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_JEOS ADC_IER_JEOSIE /*!< ADC interruption ADC group injec 637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_JQOVF ADC_IER_JQOVFIE /*!< ADC interruption ADC group injec 638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_AWD1 ADC_IER_AWD1IE /*!< ADC interruption ADC analog watc 639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_AWD2 ADC_IER_AWD2IE /*!< ADC interruption ADC analog watc 640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_IT_AWD3 ADC_IER_AWD3IE /*!< ADC interruption ADC analog watc 641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose 646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* List of ADC registers intended to be used (most commonly) with */ 649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* DMA transfer. */ 650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Refer to function @ref LL_ADC_DMA_GetRegAddr(). */ 651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DMA_REG_REGULAR_DATA (0x00000000UL) /* ADC group regular conversion data re 652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DMA_REG_REGULAR_DATA_MULTI (0x00000001UL) /* ADC group regular conversion data re 654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} ARM GAS /tmp/cc3JIfda.s page 13 657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_COMMON_CLOCK_SOURCE ADC common - Clock source 660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CCR_CKMODE_0) /* 663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV2 (ADC_CCR_CKMODE_1 ) /* 664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CCR_CKMODE_1 | ADC_CCR_CKMODE_0) /* 665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV1 (0x00000000UL) /* 666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /* 667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1 ) /* 668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /* 669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2 ) /* 670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /* 671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 ) /* 672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /* 673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /* 674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /* 675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /* 676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /* 677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_COMMON_PATH_INTERNAL ADC common - Measurement path to internal channels 682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Other measurement paths to internal channels may be available */ 685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (connections to other peripherals). */ 686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* If they are not listed below, they do not require any specific */ 687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* path enable. In this case, Access to measurement path is done */ 688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* only by selecting the corresponding ADC internal channel. */ 689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_NONE (0x00000000UL) /*!< ADC measurement paths all di 690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_VREFINT (ADC_CCR_VREFEN) /*!< ADC measurement path to inte 691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_TEMPSENSOR (ADC_CCR_VSENSESEL) /*!< ADC measurement path to inte 692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_VBAT (ADC_CCR_VBATSEL) /*!< ADC measurement path to inte 693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_RESOLUTION ADC instance - Resolution 698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_12B (0x00000000UL) /*!< ADC resolution 701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_10B ( ADC_CFGR_RES_0) /*!< ADC resolution 702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_8B (ADC_CFGR_RES_1 ) /*!< ADC resolution 703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_RESOLUTION_6B (ADC_CFGR_RES_1 | ADC_CFGR_RES_0) /*!< ADC resolution 704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_DATA_ALIGN ADC instance - Data alignment 709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DATA_ALIGN_RIGHT (0x00000000UL) /*!< ADC conversion data alignmen 712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DATA_ALIGN_LEFT (ADC_CFGR_ALIGN) /*!< ADC conversion data alignmen 713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/cc3JIfda.s page 14 714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_LP_MODE ADC instance - Low power mode 718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_LP_MODE_NONE (0x00000000UL) /*!< No ADC low powe 721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_LP_AUTOWAIT (ADC_CFGR_AUTDLY) /*!< ADC low power m 722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_NB ADC instance - Offset number 727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_1 ADC_OFR1_REGOFFSET /*!< ADC offset number 1: ADC channel 730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_2 ADC_OFR2_REGOFFSET /*!< ADC offset number 2: ADC channel 731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_3 ADC_OFR3_REGOFFSET /*!< ADC offset number 3: ADC channel 732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_4 ADC_OFR4_REGOFFSET /*!< ADC offset number 4: ADC channel 733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_STATE ADC instance - Offset state 738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_DISABLE (0x00000000UL) /*!< ADC offset disabled (among A 741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_ENABLE (ADC_OFR1_OFFSET1_EN) /*!< ADC offset enabled (among AD 742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_SIGN ADC instance - Offset sign 747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SIGN_NEGATIVE (0x00000000UL) /*!< ADC offset is negative (among 750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SIGN_POSITIVE (ADC_OFR1_OFFSETPOS) /*!< ADC offset is positive (among 751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OFFSET_SATURATION ADC instance - Offset saturation mode 756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SATURATION_DISABLE (0x00000000UL) /*!< ADC offset saturation is di 759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OFFSET_SATURATION_ENABLE (ADC_OFR1_SATEN) /*!< ADC offset saturation is en 760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_GROUPS ADC instance - Groups 764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_GROUP_REGULAR (0x00000001UL) /*!< ADC group regular (available on all 767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_GROUP_INJECTED (0x00000002UL) /*!< ADC group injected (not available on 768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_GROUP_REGULAR_INJECTED (0x00000003UL) /*!< ADC both groups regular and injected 769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} ARM GAS /tmp/cc3JIfda.s page 15 771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL ADC instance - Channel number 774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_0 (ADC_CHANNEL_0_NUMBER | ADC_CHANNEL_0_SMP | ADC_CHANNE 777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_1 (ADC_CHANNEL_1_NUMBER | ADC_CHANNEL_1_SMP | ADC_CHANNE 778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_2 (ADC_CHANNEL_2_NUMBER | ADC_CHANNEL_2_SMP | ADC_CHANNE 779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_3 (ADC_CHANNEL_3_NUMBER | ADC_CHANNEL_3_SMP | ADC_CHANNE 780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_4 (ADC_CHANNEL_4_NUMBER | ADC_CHANNEL_4_SMP | ADC_CHANNE 781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_5 (ADC_CHANNEL_5_NUMBER | ADC_CHANNEL_5_SMP | ADC_CHANNE 782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_6 (ADC_CHANNEL_6_NUMBER | ADC_CHANNEL_6_SMP | ADC_CHANNE 783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_7 (ADC_CHANNEL_7_NUMBER | ADC_CHANNEL_7_SMP | ADC_CHANNE 784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_8 (ADC_CHANNEL_8_NUMBER | ADC_CHANNEL_8_SMP | ADC_CHANNE 785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_9 (ADC_CHANNEL_9_NUMBER | ADC_CHANNEL_9_SMP | ADC_CHANNE 786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_10 (ADC_CHANNEL_10_NUMBER | ADC_CHANNEL_10_SMP | ADC_CHANNE 787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_11 (ADC_CHANNEL_11_NUMBER | ADC_CHANNEL_11_SMP | ADC_CHANNE 788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_12 (ADC_CHANNEL_12_NUMBER | ADC_CHANNEL_12_SMP | ADC_CHANNE 789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_13 (ADC_CHANNEL_13_NUMBER | ADC_CHANNEL_13_SMP | ADC_CHANNE 790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_14 (ADC_CHANNEL_14_NUMBER | ADC_CHANNEL_14_SMP | ADC_CHANNE 791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_15 (ADC_CHANNEL_15_NUMBER | ADC_CHANNEL_15_SMP | ADC_CHANNE 792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_16 (ADC_CHANNEL_16_NUMBER | ADC_CHANNEL_16_SMP | ADC_CHANNE 793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_17 (ADC_CHANNEL_17_NUMBER | ADC_CHANNEL_17_SMP | ADC_CHANNE 794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_18 (ADC_CHANNEL_18_NUMBER | ADC_CHANNEL_18_SMP | ADC_CHANNE 795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VREFINT (LL_ADC_CHANNEL_18 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (LL_ADC_CHANNEL_16 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (LL_ADC_CHANNEL_4 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VBAT (LL_ADC_CHANNEL_17 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP1 (LL_ADC_CHANNEL_13 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP2 (LL_ADC_CHANNEL_16 | ADC_CHANNEL_ID_INTERNAL_CH | ADC_CH 801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP3_ADC2 (LL_ADC_CHANNEL_18 | ADC_CHANNEL_ID_INTERNAL_CH | ADC_CH 802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP3_ADC3 (LL_ADC_CHANNEL_13 | ADC_CHANNEL_ID_INTERNAL_CH | ADC_CH 803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP4 (LL_ADC_CHANNEL_5 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP5 (LL_ADC_CHANNEL_3 | ADC_CHANNEL_ID_INTERNAL_CH) /*!< AD 805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_CHANNEL_VOPAMP6 (LL_ADC_CHANNEL_17 | ADC_CHANNEL_ID_INTERNAL_CH | ADC_CH 806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_TRIGGER_SOURCE ADC group regular - Trigger source 811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_SOFTWARE (0x00000000UL) 814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger internal: SW start. 815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EX 818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) 820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL ARM GAS /tmp/cc3JIfda.s page 16 828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH1 (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH2 (ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH3 (ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) 841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_CH4 (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM4_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EX 847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM4_CH1 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EX 849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM4_CH4 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM6_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM7_TRGO (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM8_TRGO (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL 859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 (ADC_CFGR_EXTSEL_3 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM8_CH1 (ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM15_TRGO (ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_TRGO (ADC_CFGR_EXTSEL_4 | ADC_REG_TRIG_EXT_EDGE_DEFAULT) 868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_TRGO2 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_CH1 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EX 874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_CH2 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL 877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM20_CH3 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EX 880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG1 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al ARM GAS /tmp/cc3JIfda.s page 17 885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG2 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL 886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG3 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG4 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_REG_TRIG_EX 892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG5 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL 895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG6 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_REG_TRIG_EX 898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG7 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG8 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG9 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_HRTIM_TRG10 (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | ADC_REG_TRIG_EX 913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_EXTI_LINE2 (ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_0 | ADC_REG_TRIG_EX 916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_LPTIM_OUT (ADC_CFGR_EXTSEL_4 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL 919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group regular conversion trigger from external perip 920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_TRIGGER_EDGE ADC group regular - Trigger edge 925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_RISING ( ADC_CFGR_EXTEN_0) /*!< ADC group r 928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_FALLING (ADC_CFGR_EXTEN_1 ) /*!< ADC group r 929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_RISINGFALLING (ADC_CFGR_EXTEN_1 | ADC_CFGR_EXTEN_0) /*!< ADC group r 930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SAMPLING_MODE ADC group regular - Sampling mode 935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_NORMAL (0x00000000UL) /*!< ADC conversions sam 938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_BULB (ADC_CFGR2_BULB) /*!< ADC conversions sam 939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: First convers 940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED (ADC_CFGR2_SMPTRIG) /*!< ADC conversions sam 941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger rising edg ARM GAS /tmp/cc3JIfda.s page 18 942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger falling ed 943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_CONTINUOUS_MODE ADC group regular - Continuous mode 948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_CONV_SINGLE (0x00000000UL) /*!< ADC conversions are perform 951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_CONV_CONTINUOUS (ADC_CFGR_CONT) /*!< ADC conversions are perform 952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_DMA_TRANSFER ADC group regular - DMA transfer of ADC conversion data 957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_NONE (0x00000000UL) /*!< ADC conversio 960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_LIMITED ( ADC_CFGR_DMAEN) /*!< ADC conversio 961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_UNLIMITED (ADC_CFGR_DMACFG | ADC_CFGR_DMAEN) /*!< ADC conversio 962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_SMPR1_SMPPLUS) 967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_SAMPLINGTIME_COMMON_CONFIG ADC instance - ADC sampling time common configur 968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_COMMON_DEFAULT (0x00000000UL) /*!< ADC sampling time let to d 971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5 (ADC_SMPR1_SMPPLUS) /*!< ADC additional sampling ti 972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif 976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_OVR_DATA_BEHAVIOR ADC group regular - Overrun behavior on conversion d 978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_OVR_DATA_PRESERVED (0x00000000UL) /*!< ADC group regular behavior i 981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_OVR_DATA_OVERWRITTEN (ADC_CFGR_OVRMOD) /*!< ADC group regular behavior i 982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_SCAN_LENGTH ADC group regular - Sequencer scan length 987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_DISABLE (0x00000000UL) 990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS ( ADC_SQR1_L 991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS ( ADC_SQR1_L_1 992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS ( ADC_SQR1_L_1 | ADC_SQR1_L 993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS ( ADC_SQR1_L_2 994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L 995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L_1 996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS ( ADC_SQR1_L_2 | ADC_SQR1_L_1 | ADC_SQR1_L 997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS (ADC_SQR1_L_3 998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS (ADC_SQR1_L_3 | ADC_SQR1_L ARM GAS /tmp/cc3JIfda.s page 19 999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_1 1000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_1 | ADC_SQR1_L 1001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 1002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L 1003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L_1 1004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS (ADC_SQR1_L_3 | ADC_SQR1_L_2 | ADC_SQR1_L_1 | ADC_SQR1_L 1005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_DISCONT_MODE ADC group regular - Sequencer discontinuous mode 1010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_DISABLE (0x00000000UL) 1013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_1RANK ( 1014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_2RANKS ( ADC_CFGR_DISC 1015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_3RANKS ( ADC_CFGR_DISCNUM_1 1016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_4RANKS ( ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISC 1017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_5RANKS (ADC_CFGR_DISCNUM_2 1018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_6RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISC 1019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_7RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_1 1020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_8RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISC 1021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_RANKS ADC group regular - Sequencer ranks 1026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_1 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_1_SQRX_BITOFFSET_POS) 1029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_2 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_2_SQRX_BITOFFSET_POS) 1030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_3 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_3_SQRX_BITOFFSET_POS) 1031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_4 (ADC_SQR1_REGOFFSET | ADC_REG_RANK_4_SQRX_BITOFFSET_POS) 1032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_5 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_5_SQRX_BITOFFSET_POS) 1033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_6 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_6_SQRX_BITOFFSET_POS) 1034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_7 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_7_SQRX_BITOFFSET_POS) 1035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_8 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_8_SQRX_BITOFFSET_POS) 1036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_9 (ADC_SQR2_REGOFFSET | ADC_REG_RANK_9_SQRX_BITOFFSET_POS) 1037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_10 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_10_SQRX_BITOFFSET_POS 1038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_11 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_11_SQRX_BITOFFSET_POS 1039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_12 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_12_SQRX_BITOFFSET_POS 1040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_13 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_13_SQRX_BITOFFSET_POS 1041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_14 (ADC_SQR3_REGOFFSET | ADC_REG_RANK_14_SQRX_BITOFFSET_POS 1042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_15 (ADC_SQR4_REGOFFSET | ADC_REG_RANK_15_SQRX_BITOFFSET_POS 1043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_REG_RANK_16 (ADC_SQR4_REGOFFSET | ADC_REG_RANK_16_SQRX_BITOFFSET_POS 1044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIGGER_SOURCE ADC group injected - Trigger source 1049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_SOFTWARE (0x00000000UL) 1052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger internal: SW start 1053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO (ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 (ADC_JSQR_JEXTSEL_3 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) ARM GAS /tmp/cc3JIfda.s page 20 1056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT 1058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM1_CH4 (ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM2_TRGO (ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_ 1068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT 1073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM4_TRGO (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM6_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM7_TRGO (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM8_CH4 (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT 1098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM15_TRGO (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_TRGO (ADC_JSQR_JEXTSEL_4 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT) 1105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 1107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_ 1108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, TIM20 is not available on al 1110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger available only on ADC3/4/5 instances. On this ST ARM GAS /tmp/cc3JIfda.s page 21 1113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Trigger available only on ADC1/2 instances. On this STM3 1116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXT 1120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_ 1126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_INJ_TRIG_ 1138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, HRTIM is not available on al 1146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXT 1147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_ 1150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Note: On this STM32 series, this trigger is available on 1152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_LPTIM_OUT (ADC_JSQR_JEXTSEL_4 | ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXT 1153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC group injected conversion trigger from external peri 1154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIGGER_EDGE ADC group injected - Trigger edge 1159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_RISING ( ADC_JSQR_JEXTEN_0) /*!< ADC group i 1162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_FALLING (ADC_JSQR_JEXTEN_1 ) /*!< ADC group i 1163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_EXT_RISINGFALLING (ADC_JSQR_JEXTEN_1 | ADC_JSQR_JEXTEN_0) /*!< ADC group i 1164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_TRIG_AUTO ADC group injected - Automatic trigger mode 1169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ ARM GAS /tmp/cc3JIfda.s page 22 1170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_INDEPENDENT (0x00000000UL) /*!< ADC group injected conversio 1172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_TRIG_FROM_GRP_REGULAR (ADC_CFGR_JAUTO) /*!< ADC group injected conversio 1173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_CONTEXT_QUEUE ADC group injected - Context queue mode 1178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE (0x00000000UL) /* Group injected sequence co 1181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY (ADC_CFGR_JQM) /* Group injected sequence co 1182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_QUEUE_DISABLE (ADC_CFGR_JQDIS) /* Group injected sequence co 1183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_SCAN_LENGTH ADC group injected - Sequencer scan length 1188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_DISABLE (0x00000000UL) /*!< ADC group injected 1191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS ( ADC_JSQR_JL_0) /*!< ADC group injected 1192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS (ADC_JSQR_JL_1 ) /*!< ADC group injected 1193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS (ADC_JSQR_JL_1 | ADC_JSQR_JL_0) /*!< ADC group injected 1194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_DISCONT_MODE ADC group injected - Sequencer discontinuous mode 1199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_DISCONT_DISABLE (0x00000000UL) /*!< ADC group injected sequencer 1202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_SEQ_DISCONT_1RANK (ADC_CFGR_JDISCEN) /*!< ADC group injected sequencer 1203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_INJ_SEQ_RANKS ADC group injected - Sequencer ranks 1208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_1 (ADC_JDR1_REGOFFSET | ADC_INJ_RANK_1_JSQR_BITOFFSET_POS) 1211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_2 (ADC_JDR2_REGOFFSET | ADC_INJ_RANK_2_JSQR_BITOFFSET_POS) 1212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_3 (ADC_JDR3_REGOFFSET | ADC_INJ_RANK_3_JSQR_BITOFFSET_POS) 1213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_INJ_RANK_4 (ADC_JDR4_REGOFFSET | ADC_INJ_RANK_4_JSQR_BITOFFSET_POS) 1214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL_SAMPLINGTIME Channel - Sampling time 1219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_2CYCLES_5 (0x00000000UL) 1222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_6CYCLES_5 ( ADC_SMPR2_SMP10 1223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_12CYCLES_5 ( ADC_SMPR2_SMP10_1 1224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_24CYCLES_5 ( ADC_SMPR2_SMP10_1 | ADC_SMPR2_SMP10 1225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_47CYCLES_5 (ADC_SMPR2_SMP10_2 1226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_92CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10 ARM GAS /tmp/cc3JIfda.s page 23 1227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_247CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10_1 1228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_640CYCLES_5 (ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10_1 | ADC_SMPR2_SMP10 1229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL_SINGLE_DIFF_ENDING Channel - Single or differential ending 1234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_SINGLE_ENDED ( ADC_CALFACT_CALFACT_S) /*!< A 1237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DIFFERENTIAL_ENDED (ADC_CR_ADCALDIF | ADC_CALFACT_CALFACT_D) /*!< A 1238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_BOTH_SINGLE_DIFF_ENDED (LL_ADC_SINGLE_ENDED | LL_ADC_DIFFERENTIAL_ENDED) /*!< A 1239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_NUMBER Analog watchdog - Analog watchdog number 1244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!< 1247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD2 (ADC_AWD_CR23_CHANNEL_MASK | ADC_AWD_CR2_REGOFFSET) /*!< 1248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD3 (ADC_AWD_CR23_CHANNEL_MASK | ADC_AWD_CR3_REGOFFSET) /*!< 1249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_CHANNELS Analog watchdog - Monitored channels 1254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_DISABLE (0x00000000UL) 1257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_REG (ADC_AWD_CR23_CHANNEL_MASK 1258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_INJ (ADC_AWD_CR23_CHANNEL_MASK | ADC_CFGR_JA 1259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_REG_INJ (ADC_AWD_CR23_CHANNEL_MASK | ADC_CFGR_JA 1260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_REG ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) 1261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_INJ ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_REG_INJ ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_REG ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) 1264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_INJ ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_REG_INJ ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_REG ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) 1267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_INJ ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_REG_INJ ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_REG ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) 1270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_INJ ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_REG_INJ ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_REG ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) 1273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_INJ ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_REG_INJ ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_REG ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) 1276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_INJ ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_REG_INJ ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_REG ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) 1279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_INJ ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_REG_INJ ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_REG ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) 1282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_INJ ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_REG_INJ ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA ARM GAS /tmp/cc3JIfda.s page 24 1284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_REG ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) 1285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_INJ ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_REG_INJ ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_REG ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) 1288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_INJ ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_REG_INJ ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_REG ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) 1291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_INJ ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_REG_INJ ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_REG ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) 1294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_INJ ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_REG_INJ ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_REG ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) 1297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_INJ ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_REG_INJ ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_REG ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) 1300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_INJ ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_REG_INJ ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_REG ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) 1303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_INJ ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_REG_INJ ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_REG ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) 1306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_INJ ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_REG_INJ ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_REG ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) 1309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_INJ ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_REG_INJ ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_REG ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) 1312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_INJ ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_REG_INJ ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_REG ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) 1315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_INJ ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_REG_INJ ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JA 1317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_REG ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) 1318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_INJ ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) | 1319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_REG_INJ ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) | 1320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG ((LL_ADC_CHANNEL_TEMPSENSOR_ADC1 & ADC_CHANNEL_ID_M 1321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC1_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC1 & ADC_CHANNEL_ID_M 1322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC1 & ADC_CHANNEL_ID_M 1323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG ((LL_ADC_CHANNEL_TEMPSENSOR_ADC5 & ADC_CHANNEL_ID_M 1324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC5_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC5 & ADC_CHANNEL_ID_M 1325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG_INJ ((LL_ADC_CHANNEL_TEMPSENSOR_ADC5 & ADC_CHANNEL_ID_M 1326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_REG ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) 1327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_INJ ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) | 1328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VBAT_REG_INJ ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) | 1329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP1_REG ((LL_ADC_CHANNEL_VOPAMP1 & ADC_CHANNEL_ID_MASK) 1330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP1_INJ ((LL_ADC_CHANNEL_VOPAMP1 & ADC_CHANNEL_ID_MASK) | 1331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP1_REG_INJ ((LL_ADC_CHANNEL_VOPAMP1 & ADC_CHANNEL_ID_MASK) | 1332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP2_REG ((LL_ADC_CHANNEL_VOPAMP2 & ADC_CHANNEL_ID_MASK) 1333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP2_INJ ((LL_ADC_CHANNEL_VOPAMP2 & ADC_CHANNEL_ID_MASK) | 1334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP2_REG_INJ ((LL_ADC_CHANNEL_VOPAMP2 & ADC_CHANNEL_ID_MASK) | 1335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC2_REG ((LL_ADC_CHANNEL_VOPAMP3_ADC2 & ADC_CHANNEL_ID_MASK) 1336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC2_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC2 & ADC_CHANNEL_ID_MASK) | 1337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC2_REG_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC2 & ADC_CHANNEL_ID_MASK) | 1338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC3_REG ((LL_ADC_CHANNEL_VOPAMP3_ADC3 & ADC_CHANNEL_ID_MASK) 1339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC3_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC3 & ADC_CHANNEL_ID_MASK) | 1340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP3_ADC3_REG_INJ ((LL_ADC_CHANNEL_VOPAMP3_ADC3 & ADC_CHANNEL_ID_MASK) | ARM GAS /tmp/cc3JIfda.s page 25 1341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP4_REG ((LL_ADC_CHANNEL_VOPAMP4 & ADC_CHANNEL_ID_MASK) 1342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP4_INJ ((LL_ADC_CHANNEL_VOPAMP4 & ADC_CHANNEL_ID_MASK) | 1343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP4_REG_INJ ((LL_ADC_CHANNEL_VOPAMP4 & ADC_CHANNEL_ID_MASK) | 1344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP5_REG ((LL_ADC_CHANNEL_VOPAMP5 & ADC_CHANNEL_ID_MASK) 1345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP5_INJ ((LL_ADC_CHANNEL_VOPAMP5 & ADC_CHANNEL_ID_MASK) | 1346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP5_REG_INJ ((LL_ADC_CHANNEL_VOPAMP5 & ADC_CHANNEL_ID_MASK) | 1347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP6_REG ((LL_ADC_CHANNEL_VOPAMP6 & ADC_CHANNEL_ID_MASK) 1348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP6_INJ ((LL_ADC_CHANNEL_VOPAMP6 & ADC_CHANNEL_ID_MASK) | 1349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_CH_VOPAMP6_REG_INJ ((LL_ADC_CHANNEL_VOPAMP6 & ADC_CHANNEL_ID_MASK) | 1350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_THRESHOLDS Analog watchdog - Thresholds 1355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLD_HIGH (ADC_TR1_HT1 ) /*!< ADC analog watchdog thr 1358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLD_LOW ( ADC_TR1_LT1) /*!< ADC analog watchdog thr 1359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLDS_HIGH_LOW (ADC_TR1_HT1 | ADC_TR1_LT1) /*!< ADC analog watchdog bot 1360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_FILTERING_CONFIG Analog watchdog - filtering config 1365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_NONE (0x00000000UL) 1368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_2SAMPLES ( ADC_TR1_AWDFILT 1369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_3SAMPLES ( ADC_TR1_AWDFILT_1 1370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_4SAMPLES ( ADC_TR1_AWDFILT_1 | ADC_TR1_AWDFILT 1371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_5SAMPLES (ADC_TR1_AWDFILT_2 1372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_6SAMPLES (ADC_TR1_AWDFILT_2 | ADC_TR1_AWDFILT 1373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_7SAMPLES (ADC_TR1_AWDFILT_2 | ADC_TR1_AWDFILT_1 1374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_AWD_FILTERING_8SAMPLES (ADC_TR1_AWDFILT_2 | ADC_TR1_AWDFILT_1 | ADC_TR1_AWDFILT 1375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_SCOPE Oversampling - Oversampling scope 1380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_DISABLE (0x00000000UL) /* 1383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_REGULAR_CONTINUED ( ADC_CFGR2_ROVSE) /* 1384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_REGULAR_RESUMED (ADC_CFGR2_ROVSM | ADC_CFGR2_ROVSE) /* 1385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_INJECTED ( ADC_CFGR2_JOVSE ) /* 1386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_GRP_INJ_REG_RESUMED ( ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSE) /* 1387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_DISCONT_MODE Oversampling - Discontinuous mode 1392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_REG_CONT (0x00000000UL) /*!< ADC oversampling discontinuo 1395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_REG_DISCONT (ADC_CFGR2_TROVS) /*!< ADC oversampling discontinuo 1396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} ARM GAS /tmp/cc3JIfda.s page 26 1398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_RATIO Oversampling - Ratio 1401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_2 (0x00000000UL) 1404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_4 ( ADC_CFGR2_OVSR_0) 1405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_8 ( ADC_CFGR2_OVSR_1 ) 1406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_16 ( ADC_CFGR2_OVSR_1 | ADC_CFGR2_OVSR_0) 1407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_32 (ADC_CFGR2_OVSR_2 ) 1408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_64 (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_0) 1409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_128 (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_1 ) 1410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_256 (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_1 | ADC_CFGR2_OVSR_0) 1411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_SHIFT Oversampling - Data shift 1416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_NONE (0x00000000UL) 1419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_1 ( 1420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_2 ( ADC_CFGR2_OVSS_1 1421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_3 ( ADC_CFGR2_OVSS_1 1422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_4 ( ADC_CFGR2_OVSS_2 1423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_5 ( ADC_CFGR2_OVSS_2 1424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_6 ( ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1 1425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_7 ( ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1 1426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_8 (ADC_CFGR2_OVSS_3 1427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 1432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_MODE Multimode - Mode 1433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_INDEPENDENT (0x00000000UL) 1436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIMULT ( ADC_CCR_DUAL_2 | ADC_CCR_DUAL_1 1437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_INTERL ( ADC_CCR_DUAL_2 | ADC_CCR_DUAL_1 | ADC_ 1438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_INJ_SIMULT ( ADC_CCR_DUAL_2 | ADC_ 1439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_INJ_ALTERN (ADC_CCR_DUAL_3 | ADC_ 1440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM ( ADC_ 1441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT ( ADC_CCR_DUAL_1 1442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM ( ADC_CCR_DUAL_1 | ADC_ 1443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_DMA_TRANSFER Multimode - DMA transfer 1448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_EACH_ADC (0x00000000UL) /*! 1451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B ( ADC_CCR_MDMA_1 ) /*! 1452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B ( ADC_CCR_MDMA_1 | ADC_CCR_MDMA_0) /*! 1453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B (ADC_CCR_DMACFG | ADC_CCR_MDMA_1 ) /*! 1454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B (ADC_CCR_DMACFG | ADC_CCR_MDMA_1 | ADC_CCR_MDMA_0) /*! ARM GAS /tmp/cc3JIfda.s page 27 1455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_TWOSMP_DELAY Multimode - Delay between two sampling phases 1460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE (0x00000000UL) 1463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES ( A 1464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES ( ADC_CCR_DELAY_1 1465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES ( ADC_CCR_DELAY_1 | A 1466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES ( ADC_CCR_DELAY_2 1467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES ( ADC_CCR_DELAY_2 | A 1468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES ( ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 1469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES ( ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 | A 1470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (ADC_CCR_DELAY_3 1471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (ADC_CCR_DELAY_3 | A 1472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1 1473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1 | A 1474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_MULTI_MASTER_SLAVE Multimode - ADC master or slave 1479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_MASTER ( ADC_CDR_RDATA_MST) /*!< In multimod 1482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_SLAVE (ADC_CDR_RDATA_SLV ) /*!< In multimod 1483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_MULTI_MASTER_SLAVE (ADC_CDR_RDATA_SLV | ADC_CDR_RDATA_MST) /*!< In multimod 1484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 1489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EC_HW_DELAYS Definitions of ADC hardware constraints delays 1492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Only ADC peripheral HW delays are defined in ADC LL driver driver, 1493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * not timeout values. 1494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For details on delays values, refer to descriptions in source code 1495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * above each literal definition. 1496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Only ADC peripheral HW delays are defined in ADC LL driver driver, */ 1500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* not timeout values. */ 1501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Timeout values for ADC operations are dependent to device clock */ 1502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* configuration (system clock versus ADC clock), */ 1503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* and therefore must be defined in user application. */ 1504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Indications for estimation of ADC timeout delays, for this */ 1505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* STM32 series: */ 1506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC calibration time: maximum delay is 112/fADC. */ 1507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (refer to device datasheet, parameter "tCAL") */ 1508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC enable time: maximum delay is 1 conversion cycle. */ 1509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (refer to device datasheet, parameter "tSTAB") */ 1510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC disable time: maximum delay should be a few ADC clock cycles */ 1511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC stop conversion time: maximum delay should be a few ADC clock */ ARM GAS /tmp/cc3JIfda.s page 28 1512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* cycles */ 1513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* - ADC conversion time: duration depending on ADC clock and ADC */ 1514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* configuration. */ 1515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (refer to device reference manual, section "Timing") */ 1516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay for ADC stabilization time (ADC voltage regulator start-up time) */ 1518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay set to maximum value (refer to device datasheet, */ 1519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* parameter "tADCVREG_STUP"). */ 1520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: us */ 1521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_INTERNAL_REGUL_STAB_US ( 20UL) /*!< Delay for ADC stabilization time (ADC vol 1522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay for internal voltage reference stabilization time. */ 1524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay set to maximum value (refer to device datasheet, */ 1525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* parameter "tstart_vrefint"). */ 1526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: us */ 1527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_VREFINT_STAB_US ( 12UL) /*!< Delay for internal voltage reference s 1528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay for temperature sensor stabilization time. */ 1530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Literal set to maximum value (refer to device datasheet, */ 1531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* parameter "tSTART"). */ 1532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: us */ 1533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_TEMPSENSOR_STAB_US (120UL) /*!< Delay for temperature sensor stabiliza 1534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Delay required between ADC end of calibration and ADC enable. */ 1536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: On this STM32 series, a minimum number of ADC clock cycles */ 1537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* are required between ADC end of calibration and ADC enable. */ 1538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Wait time can be computed in user application by waiting for the */ 1539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* equivalent number of CPU cycles, by taking into account */ 1540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* ratio of CPU clock versus ADC clock prescalers. */ 1541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Unit: ADC clock cycles. */ 1542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES ( 4UL) /*!< Delay required between ADC end of cali 1543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported macro ------------------------------------------------------------*/ 1554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Macros ADC Exported Macros 1555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EM_WRITE_READ Common write and read registers Macros 1559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Write a value in ADC register 1564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __INSTANCE__ ADC Instance 1565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG__ Register to be written 1566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VALUE__ Value to be written in the register 1567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 1568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/cc3JIfda.s page 29 1569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE 1570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Read a value in ADC register 1573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __INSTANCE__ ADC Instance 1574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __REG__ Register to be read 1575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Register value 1576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define LL_ADC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 1578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 1580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EM_HELPER_MACRO ADC helper macro 1583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 1584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get ADC channel number in decimal format 1588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from literals LL_ADC_CHANNEL_x. 1589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Example: 1590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_CHANNEL_4) 1591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will return decimal number "4". 1592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The input can be a value from functions where a channel 1593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number is returned, either defined with number 1594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or with bitfield (only one bit must be set). 1595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 1596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 1598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 1599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 1600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 1601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 1602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 1603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 1606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 1607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 1611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 1621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) ARM GAS /tmp/cc3JIfda.s page 30 1626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 1628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 1633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 1634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 1636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 1637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0 and Max_Data=18 1638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \ 1640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0UL) ? \ 1641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 1642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS \ 1643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 1645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 1646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (uint32_t)POSITION_VAL((__CHANNEL__)) \ 1647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get ADC channel in literal format LL_ADC_CHANNEL_x 1652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from number in decimal format. 1653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Example: 1654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_DECIMAL_NB_TO_CHANNEL(4) 1655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will return a data equivalent to "LL_ADC_CHANNEL_4". 1656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __DECIMAL_NB__ Value between Min_Data=0 and Max_Data=18 1657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 1658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 1660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 1661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 1662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 1663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 1664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 1665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 1668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 1669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 1673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) ARM GAS /tmp/cc3JIfda.s page 31 1683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 1688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 1690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 1695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 1696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 1698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 1699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 1700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 1701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 1702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) 1704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__DECIMAL_NB__) <= 9UL) ? 1705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( 1706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) | 1707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | 1708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_SMPR1_REGOFFSET | (((3UL * (__DECIMAL_NB__))) << ADC_CHANNEL_SMPx_BITOFFSET_POS)) 1709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : 1711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( 1712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 1713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) 1714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_SMPR2_REGOFFSET | (((3UL * ((__DECIMAL_NB__) - 10UL))) << ADC_CHANNEL_SMPx_BITOFFSET_PO 1715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to determine whether the selected channel 1720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * corresponds to literal definitions of driver. 1721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The different literal definitions of ADC channels are: 1722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC internal channel: 1723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ... 1724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC external channel (channel connected to a GPIO pin): 1725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ... 1726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The channel parameter must be a value defined from literal 1727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT, 1728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...), 1729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...), 1730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * must not be a value from functions where a channel number is 1731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * returned from ADC registers, 1732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * because internal and external channels share the same channel 1733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number in ADC registers. The differentiation is made only with 1734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameters definitions of driver. 1735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 1736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 1738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 1739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) ARM GAS /tmp/cc3JIfda.s page 32 1740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 1741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 1742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 1743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 1746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 1747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 1751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 1761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 1766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 1768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 1773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 1774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 1776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 1777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if the channel corresponds to a parameter definition of a ADC external channe 1778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if the channel corresponds to a parameter definition of a ADC internal channe 1779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \ 1781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__CHANNEL__) & ADC_CHANNEL_ID_INTERNAL_CH_MASK) != 0UL) 1782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to convert a channel defined from parameter 1785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT, 1786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...), 1787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to its equivalent parameter definition of a ADC external channel 1788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...). 1789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The channel parameter can be, additionally to a value 1790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined from parameter definition of a ADC internal channel 1791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...), 1792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a value defined from parameter definition of 1793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...) 1794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or a value from functions where a channel number is returned 1795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC registers. 1796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: ARM GAS /tmp/cc3JIfda.s page 33 1797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 1799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 1800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 1801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 1802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 1803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 1804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 1807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 1808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 1812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 1822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 1827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 1829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 1834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 1835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 1837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 1838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 1839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 1840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 1841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 1842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 1843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 1844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 1845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 1846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 1847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 1848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 1849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 1850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 1851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 1852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 1853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 ARM GAS /tmp/cc3JIfda.s page 34 1854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 1855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 1856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 1857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 1858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(__CHANNEL__) \ 1860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) & ~ADC_CHANNEL_ID_INTERNAL_CH_MASK) 1861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 1863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to determine whether the internal channel 1864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * selected is available on the ADC instance selected. 1865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The channel parameter must be a value defined from parameter 1866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT, 1867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_CHANNEL_TEMPSENSOR, ...), 1868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * must not be a value defined from parameter definition of 1869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...) 1870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or a value from functions where a channel number is 1871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * returned from ADC registers, 1872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * because internal and external channels share the same channel 1873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number in ADC registers. The differentiation is made only with 1874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameters definitions of driver. 1875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_INSTANCE__ ADC instance 1876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: 1877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 1878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 1879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 1880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 1881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 1882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 1883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 1884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 1885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 1886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 1887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 1888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 1890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 1891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 1892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 1893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 1894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 1895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 1896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 1897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if the internal channel selected is not available on the ADC instance selecte 1898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if the internal channel selected is available on the ADC instance selected. 1899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 1900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) 1901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 1902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 1903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 1905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 1906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ ARM GAS /tmp/cc3JIfda.s page 35 1911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 1912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 1914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 1915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC3) \ 1919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC3) || \ 1921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC4) \ 1927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP6) || \ 1929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC5) \ 1934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP5) || \ 1936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC5) || \ 1937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP4) || \ 1938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #elif defined(STM32G471xx) 1944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 1945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 1946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 1948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 1949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 1955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 1957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 1958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC3) \ 1962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC3) || \ 1964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ ARM GAS /tmp/cc3JIfda.s page 36 1968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #elif defined(STM32GBK1CB) || defined(STM32G431xx) || defined(STM32G441xx) 1970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 1971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 1972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 1974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 1975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 1981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 1983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 1984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 1987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #elif defined(STM32G491xx) || defined(STM32G4A1xx) 1988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \ 1989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADC_INSTANCE__) == ADC1) \ 1990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 1991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP1) || \ 1992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR_ADC1) || \ 1993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) || \ 1994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 1995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 1997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 1998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC2) \ 1999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP2) || \ 2001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC2) \ 2002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** || \ 2005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_INSTANCE__) == ADC3) \ 2006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** &&( \ 2007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP3_ADC3) || \ 2008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VOPAMP6) || \ 2009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \ 2010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif 2014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to define ADC analog watchdog parameter: 2017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * define a single channel to monitor with analog watchdog 2018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from sequencer channel and groups definition. 2019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels(). 2020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: 2021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_SetAnalogWDMonitChannels( 2022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC1, LL_ADC_AWD1, 2023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_ANALOGWD_CHANNEL_GROUP(LL_ADC_CHANNEL4, LL_ADC_GROUP_REGULAR)) 2024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CHANNEL__ This parameter can be one of the following values: ARM GAS /tmp/cc3JIfda.s page 37 2025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 2026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 2027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 2028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 2029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 2030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 2031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 2032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 2033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 2034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 2035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 2036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 2037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 2038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 2039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 2040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 2041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 2042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 2043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 2044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 2045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 2046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 2047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 2048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 2049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 2050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 2051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 2052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 2053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 2054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 2055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 2057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 2058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 2059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 2060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 2061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 2062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 2063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 2064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 2065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 2066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 2067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 2068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 2069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __GROUP__ This parameter can be one of the following values: 2070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_REGULAR 2071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_INJECTED 2072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_GROUP_REGULAR_INJECTED 2073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 2074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE 2075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0) 2076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0) 2077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ 2078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0) 2079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0) 2080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ 2081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0) ARM GAS /tmp/cc3JIfda.s page 38 2082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0) 2083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ 2084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0) 2085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0) 2086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ 2087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0) 2088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0) 2089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ 2090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0) 2091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0) 2092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ 2093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0) 2094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0) 2095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ 2096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0) 2097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0) 2098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ 2099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0) 2100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0) 2101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ 2102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0) 2103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0) 2104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ 2105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0) 2106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0) 2107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ 2108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0) 2109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0) 2110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ 2111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0) 2112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0) 2113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ 2114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0) 2115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0) 2116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ 2117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0) 2118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0) 2119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ 2120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0) 2121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0) 2122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ 2123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0) 2124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0) 2125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ 2126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0) 2127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0) 2128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ 2129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0) 2130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0) 2131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ 2132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0) 2133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0) 2134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ 2135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG (0) 2136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_INJ (0) 2137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG_INJ 2138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG (0)(1) ARM GAS /tmp/cc3JIfda.s page 39 2139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_INJ (0)(1) 2140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG_INJ (1) 2141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG (0)(5) 2142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_INJ (0)(5) 2143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG_INJ (5) 2144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG (0)(6) 2145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_INJ (0)(6) 2146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG_INJ (6) 2147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG (0)(1) 2148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_INJ (0)(1) 2149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG_INJ (1) 2150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG (0)(2) 2151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_INJ (0)(2) 2152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG_INJ (2) 2153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG (0)(2) 2154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_INJ (0)(2) 2155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG_INJ (2) 2156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG (0)(3) 2157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_INJ (0)(3) 2158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG_INJ (3) 2159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG (0)(5) 2160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_INJ (0)(5) 2161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG_INJ (5) 2162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG (0)(5) 2163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_INJ (0)(5) 2164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG_INJ (5) 2165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG (0)(4) 2166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_INJ (0)(4) 2167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG_INJ (4) 2168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (0) On STM32G4, parameter available only on analog watchdog number: AWD1.\n 2170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 2171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 2172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 2173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 2174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 2175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 2176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 2177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 2178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_CHANNEL_GROUP(__CHANNEL__, __GROUP__) 2180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__GROUP__) == LL_ADC_GROUP_REGULAR) 2181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) 2182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : 2183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__GROUP__) == LL_ADC_GROUP_INJECTED) 2184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1SGL) 2185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : 2186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) 2187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to set the value of ADC analog watchdog threshold high 2191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or low in function of ADC resolution, when ADC resolution is 2192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * different of 12 bits. 2193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds() 2194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or @ref LL_ADC_SetAnalogWDThresholds(). 2195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, with a ADC resolution of 8 bits, to set the value of ARM GAS /tmp/cc3JIfda.s page 40 2196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog threshold high (on 8 bits): 2197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_SetAnalogWDThresholds 2198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (< ADCx param >, 2199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(LL_ADC_RESOLUTION_8B, > (ADC_CFGR_RES_BITOFFSET_POS - 1U ))) 2211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get the value of ADC analog watchdog threshold high 2214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or low in function of ADC resolution, when ADC resolution is 2215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * different of 12 bits. 2216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds(). 2217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, with a ADC resolution of 8 bits, to get the value of 2218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog threshold high (on 8 bits): 2219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * < threshold_value_6_bits > = __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION 2220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_RESOLUTION_8B, 2221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_GetAnalogWDThresholds(, LL_ADC_AWD_THRESHOLD_HIGH) 2222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ); 2223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 2224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __AWD_THRESHOLD_12_BITS__ Value between Min_Data=0x000 and Max_Data=0xFFF 2229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 2230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD_12_BITS__) \ 2232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__AWD_THRESHOLD_12_BITS__) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1U ))) 2233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get the ADC analog watchdog threshold high 2236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or low from raw value containing both thresholds concatenated. 2237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_GetAnalogWDThresholds(). 2238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, to get analog watchdog threshold high from the register raw value: 2239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(LL_ADC_AWD_THRESHOLD_HIGH, > (((__AWD_THRESHOLD_TYPE__) & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TRX_ 2248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to set the ADC calibration value with both single ended 2251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and differential modes calibration factors concatenated. 2252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To be used with function @ref LL_ADC_SetCalibrationFactor(). ARM GAS /tmp/cc3JIfda.s page 41 2253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example, to set calibration factors single ended to 0x55 2254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and differential ended to 0x2A: 2255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_SetCalibrationFactor( 2256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC1, 2257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(0x55, 0x2A)) 2258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CALIB_FACTOR_SINGLE_ENDED__ Value between Min_Data=0x00 and Max_Data=0x7F 2259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __CALIB_FACTOR_DIFFERENTIAL__ Value between Min_Data=0x00 and Max_Data=0x7F 2260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF 2261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(__CALIB_FACTOR_SINGLE_ENDED__, __CALIB_FACTOR_DIFFERENTIA 2263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__CALIB_FACTOR_DIFFERENTIAL__) << ADC_CALFACT_CALFACT_D_Pos) | (__CALIB_FACTOR_SINGLE_ENDED__) 2264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 2266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to get the ADC multimode conversion data of ADC master 2268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or ADC slave from raw value with both ADC conversion data concatenated. 2269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This macro is intended to be used when multimode transfer by DMA 2270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled: refer to function @ref LL_ADC_SetMultiDMATransfer(). 2271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In this case the transferred data need to processed with this macro 2272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to separate the conversion data of ADC master and ADC slave. 2273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_MULTI_MASTER_SLAVE__ This parameter can be one of the following values: 2274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER 2275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_SLAVE 2276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_MULTI_CONV_DATA__ Value between Min_Data=0x000 and Max_Data=0xFFF 2277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 2278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(__ADC_MULTI_MASTER_SLAVE__, __ADC_MULTI_CONV_DATA__) 2280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADC_MULTI_CONV_DATA__) >> ((ADC_CDR_RDATA_SLV_Pos) & ~(__ADC_MULTI_MASTER_SLAVE__))) & ADC_C 2281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 2282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 2284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to select, from a ADC instance, to which ADC instance 2286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * it has a dependence in multimode (ADC master of the corresponding 2287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC common instance). 2288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of device with multimode available and a mix of 2289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instances compliant and not compliant with multimode feature, 2290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instances not compliant with multimode feature are 2291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * considered as master instances (do not depend to 2292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * any other ADC instance). 2293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADCx__ ADC instance 2294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval __ADCx__ ADC instance master of the corresponding ADC common instance 2295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC5) 2297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_MULTI_INSTANCE_MASTER(__ADCx__) \ 2298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( ( ((__ADCx__) == ADC2) \ 2299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** )? \ 2300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC1) \ 2301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( ( ((__ADCx__) == ADC4) \ 2303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** )? \ 2304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC3) \ 2305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADCx__) \ 2307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else ARM GAS /tmp/cc3JIfda.s page 42 2310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_MULTI_INSTANCE_MASTER(__ADCx__) \ 2311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( ( ((__ADCx__) == ADC2) \ 2312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** )? \ 2313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC1) \ 2314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADCx__) \ 2316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC5 */ 2318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 2319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to select the ADC common instance 2322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to which is belonging the selected ADC instance. 2323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC common register instance can be used for: 2324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Set parameters common to several ADC instances 2325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Multimode (for devices with several ADC instances) 2326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to functions having argument "ADCxy_COMMON" as parameter. 2327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADCx__ ADC instance 2328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC common register instance 2329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC345_COMMON) 2331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_COMMON_INSTANCE(__ADCx__) \ 2332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((((__ADCx__) == ADC1) || ((__ADCx__) == ADC2)) \ 2333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? ( \ 2334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC12_COMMON) \ 2335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 2338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC345_COMMON) \ 2339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 2342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_COMMON_INSTANCE(__ADCx__) (ADC12_COMMON) 2343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC345_COMMON */ 2344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to check if all ADC instances sharing the same 2346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC common instance are disabled. 2347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This check is required by functions with setting conditioned to 2348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 2349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 2350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to functions having argument "ADCxy_COMMON" as parameter. 2351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On devices with only 1 ADC common instance, parameter of this macro 2352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is useless and can be ignored (parameter kept for compatibility 2353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with devices featuring several ADC common instances). 2354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADCXY_COMMON__ ADC common instance 2355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if all ADC instances sharing the same ADC common instance 2357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are disabled. 2358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if at least one ADC instance sharing the same ADC common instance 2359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled. 2360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC345_COMMON) 2362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC4) && defined(ADC5) 2363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \ 2364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADCXY_COMMON__) == ADC12_COMMON) \ 2365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? ( \ 2366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC1) | \ ARM GAS /tmp/cc3JIfda.s page 43 2367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC2) ) \ 2368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ( \ 2371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC3) | \ 2372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC4) | \ 2373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC5) ) \ 2374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 2377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \ 2378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__ADCXY_COMMON__) == ADC12_COMMON) \ 2379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ? ( \ 2380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC1) | \ 2381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_IsEnabled(ADC2) ) \ 2382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** : \ 2384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC3)) \ 2385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC4 && ADC5 */ 2387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 2388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \ 2389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (LL_ADC_IsEnabled(ADC1) | LL_ADC_IsEnabled(ADC2)) 2390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif 2391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to define the ADC conversion data full-scale digital 2394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * value corresponding to the selected ADC resolution. 2395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC conversion data full-scale corresponds to voltage range 2396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * determined by analog voltage references Vref+ and Vref- 2397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (refer to reference manual). 2398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 2399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC conversion data full-scale digital value (unit: digital value of ADC conversion dat 2404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \ 2406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (0xFFFUL >> ((__ADC_RESOLUTION__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL))) 2407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to convert the ADC conversion data from 2410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a resolution to another resolution. 2411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __DATA__ ADC conversion data to be converted 2412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION_CURRENT__ Resolution of the data to be converted 2413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 2414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION_TARGET__ Resolution of the data after conversion 2419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 2420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B ARM GAS /tmp/cc3JIfda.s page 44 2424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC conversion data to the requested resolution 2425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__,\ 2427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION_CURRENT__,\ 2428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION_TARGET__) \ 2429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((__DATA__) \ 2430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** << ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL))) \ 2431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR_RES_BITOFFSET_POS - 1UL)) \ 2432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate the voltage (unit: mVolt) 2436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * corresponding to a ADC conversion data (unit: digital value). 2437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from 2438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement 2439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE(). 2440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV) 2441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_DATA__ ADC conversion data (resolution 12 bits) 2442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: digital value). 2443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 2444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC conversion data equivalent voltage value (unit: mVolt) 2449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\ 2451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_DATA__,\ 2452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ 2453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__) \ 2454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \ 2455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate analog reference voltage (Vref+) 2459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: mVolt) from ADC conversion data of internal voltage 2460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * reference VrefInt. 2461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Computation is using VrefInt calibration value 2462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * stored in system memory for each device during production. 2463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This voltage depends on user board environment: voltage level 2464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * connected to pin Vref+. 2465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On devices with small package, the pin Vref+ is not present 2466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and internally bonded to pin Vdda. 2467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, calibration data of internal voltage reference 2468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * VrefInt corresponds to a resolution of 12 bits, 2469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * this is the recommended ADC resolution to convert voltage of 2470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal voltage reference VrefInt. 2471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Otherwise, this macro performs the processing to scale 2472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion data to 12 bits. 2473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFINT_ADC_DATA__ ADC conversion data (resolution 12 bits) 2474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of internal voltage reference VrefInt (unit: digital value). 2475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ This parameter can be one of the following values: 2476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Analog reference voltage (unit: mV) ARM GAS /tmp/cc3JIfda.s page 45 2481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\ 2483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ 2484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((uint32_t)(*VREFINT_CAL_ADDR) * VREFINT_CAL_VREF) \ 2485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / __LL_ADC_CONVERT_DATA_RESOLUTION((__VREFINT_ADC_DATA__), \ 2486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADC_RESOLUTION__), \ 2487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_RESOLUTION_12B) \ 2488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate the temperature (unit: degree Celsius) 2492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC conversion data of internal temperature sensor. 2493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Computation is using temperature sensor calibration values 2494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * stored in system memory for each device during production. 2495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Calculation formula: 2496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Temperature = ((TS_ADC_DATA - TS_CAL1) 2497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * * (TS_CAL2_TEMP - TS_CAL1_TEMP)) 2498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * / (TS_CAL2 - TS_CAL1) + TS_CAL1_TEMP 2499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with TS_ADC_DATA = temperature sensor raw data measured by ADC 2500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Avg_Slope = (TS_CAL2 - TS_CAL1) 2501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * / (TS_CAL2_TEMP - TS_CAL1_TEMP) 2502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_CAL1 = equivalent TS_ADC_DATA at temperature 2503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TEMP_DEGC_CAL1 (calibrated in factory) 2504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_CAL2 = equivalent TS_ADC_DATA at temperature 2505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TEMP_DEGC_CAL2 (calibrated in factory) 2506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Caution: Calculation relevancy under reserve that calibration 2507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameters are correct (address and data). 2508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * To calculate temperature using temperature sensor 2509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * datasheet typical values (generic values less, therefore 2510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * less accurate than calibrated values), 2511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(). 2512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note As calculation input, the analog reference voltage (Vref+) must be 2513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined as it impacts the ADC LSB equivalent voltage. 2514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from 2515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement 2516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE(). 2517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, calibration data of temperature sensor 2518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * corresponds to a resolution of 12 bits, 2519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * this is the recommended ADC resolution to convert voltage of 2520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor. 2521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Otherwise, this macro performs the processing to scale 2522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion data to 12 bits. 2523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV) 2524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal 2525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor (unit: digital value). 2526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ ADC resolution at which internal temperature 2527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sensor voltage has been measured. 2528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 2529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Temperature (unit: degree Celsius) 2534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_TEMPERATURE(__VREFANALOG_VOLTAGE__,\ 2536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_ADC_DATA__,\ 2537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ ARM GAS /tmp/cc3JIfda.s page 46 2538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((( ((int32_t)((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__), \ 2539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (__ADC_RESOLUTION__), \ 2540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** LL_ADC_RESOLUTION_12B) \ 2541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (__VREFANALOG_VOLTAGE__)) \ 2542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / TEMPSENSOR_CAL_VREFANALOG) \ 2543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** - (int32_t) *TEMPSENSOR_CAL1_ADDR) \ 2544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) * (int32_t)(TEMPSENSOR_CAL2_TEMP - TEMPSENSOR_CAL1_TEMP) \ 2545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) / (int32_t)((int32_t)*TEMPSENSOR_CAL2_ADDR - (int32_t)*TEMPSENSOR_CAL1_ADDR) \ 2546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) + TEMPSENSOR_CAL1_TEMP \ 2547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Helper macro to calculate the temperature (unit: degree Celsius) 2551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC conversion data of internal temperature sensor. 2552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Computation is using temperature sensor typical values 2553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (refer to device datasheet). 2554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Calculation formula: 2555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Temperature = (TS_TYP_CALx_VOLT(uV) - TS_ADC_DATA * Conversion_uV) 2556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * / Avg_Slope + CALx_TEMP 2557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with TS_ADC_DATA = temperature sensor raw data measured by ADC 2558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: digital value) 2559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Avg_Slope = temperature sensor slope 2560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (unit: uV/Degree Celsius) 2561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_TYP_CALx_VOLT = temperature sensor digital value at 2562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature CALx_TEMP (unit: mV) 2563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Caution: Calculation relevancy under reserve the temperature sensor 2564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of the current device has characteristics in line with 2565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * datasheet typical values. 2566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If temperature sensor calibration values are available on 2567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()), 2568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature calculation will be more accurate using 2569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CALC_TEMPERATURE(). 2570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note As calculation input, the analog reference voltage (Vref+) must be 2571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined as it impacts the ADC LSB equivalent voltage. 2572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Analog reference voltage (Vref+) must be either known from 2573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * user board environment or can be calculated using ADC measurement 2574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE(). 2575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC measurement data must correspond to a resolution of 12 bits 2576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (full scale digital value 4095). If not the case, the data must be 2577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * preliminarily rescaled to an equivalent resolution of 12 bits. 2578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_TYP_AVGSLOPE__ Device datasheet data: Temperature sensor slope typical v 2579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On STM32G4, refer to device datasheet parameter "Avg_Slop 2580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_TYP_CALX_V__ Device datasheet data: Temperature sensor voltage typical 2581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On STM32G4, refer to device datasheet parameter "V30" (co 2582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature s 2583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __VREFANALOG_VOLTAGE__ Analog voltage reference (Vref+) voltage (unit: mV) 2584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal temperature sensor (unit: 2585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param __ADC_RESOLUTION__ ADC resolution at which internal temperature sensor volta 2586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This parameter can be one of the following values: 2587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Temperature (unit: degree Celsius) 2592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_TYP_AVGSLOPE__,\ 2594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_TYP_CALX_V__,\ ARM GAS /tmp/cc3JIfda.s page 47 2595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_CALX_TEMP__,\ 2596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __VREFANALOG_VOLTAGE__,\ 2597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __TEMPSENSOR_ADC_DATA__,\ 2598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __ADC_RESOLUTION__) \ 2599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((((int32_t)((((__TEMPSENSOR_ADC_DATA__) * (__VREFANALOG_VOLTAGE__)) \ 2600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** / __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)) \ 2601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1000UL) \ 2602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** - \ 2603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (int32_t)(((__TEMPSENSOR_TYP_CALX_V__)) \ 2604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1000UL) \ 2605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) \ 2606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) / (int32_t)(__TEMPSENSOR_TYP_AVGSLOPE__) \ 2607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) + (int32_t)(__TEMPSENSOR_CALX_TEMP__) \ 2608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 2609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Exported functions --------------------------------------------------------*/ 2620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Functions ADC Exported Functions 2621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_DMA_Management ADC DMA management 2625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: LL ADC functions to set DMA transfer are located into sections of */ 2628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* configuration of ADC instance, groups and multimode (if available): */ 2629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* @ref LL_ADC_REG_SetDMATransfer(), ... */ 2630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Function to help to configure DMA transfer from ADC: retrieve the 2633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC register address from ADC instance and a list of ADC registers 2634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * intended to be used (most commonly) with DMA transfer. 2635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note These ADC registers are data registers: 2636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when ADC conversion data is available in ADC data registers, 2637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC generates a DMA transfer request. 2638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This macro is intended to be used with LL DMA driver, refer to 2639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_DMA_ConfigAddresses()". 2640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: 2641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_DMA_ConfigAddresses(DMA1, 2642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_DMA_CHANNEL_1, 2643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA), 2644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (uint32_t)&< array or variable >, 2645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_DMA_DIRECTION_PERIPH_TO_MEMORY); 2646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with several ADC: in multimode, some devices 2647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use a different data register outside of ADC instance scope 2648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (common data register). This macro manages this register difference, 2649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * only ADC instance has to be set as parameter. 2650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_DMA_GetRegAddr\n 2651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CDR RDATA_MST LL_ADC_DMA_GetRegAddr\n ARM GAS /tmp/cc3JIfda.s page 48 2652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CDR RDATA_SLV LL_ADC_DMA_GetRegAddr 2653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Register This parameter can be one of the following values: 2655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DMA_REG_REGULAR_DATA 2656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DMA_REG_REGULAR_DATA_MULTI (1) 2657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) Available on devices with several ADC instances. 2659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval ADC register address 2660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 2662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register) 2663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t data_reg_addr; 2665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if (Register == LL_ADC_DMA_REG_REGULAR_DATA) 2667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve address of register DR */ 2669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** data_reg_addr = (uint32_t) &(ADCx->DR); 2670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else /* (Register == LL_ADC_DMA_REG_REGULAR_DATA_MULTI) */ 2672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve address of register CDR */ 2674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** data_reg_addr = (uint32_t) &((__LL_ADC_COMMON_INSTANCE(ADCx))->CDR); 2675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return data_reg_addr; 2678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #else 2680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register) 2681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Prevent unused argument(s) compilation warning */ 2683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (void)(Register); 2684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve address of register DR */ 2686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) &(ADCx->DR); 2687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 2689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Common Configuration of ADC hierarchical scope: common to 2695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: Clock source and prescaler. 2700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, if ADC group injected is used, some 2701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * clock ratio constraints between ADC clock and AHB clock 2702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * must be respected. 2703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual. 2704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 2705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 2706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 2707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each 2708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance or by using helper macro helper macro ARM GAS /tmp/cc3JIfda.s page 49 2709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(). 2710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR CKMODE LL_ADC_SetCommonClock\n 2711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR PRESC LL_ADC_SetCommonClock 2712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param CommonClock This parameter can be one of the following values: 2715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 2716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2 2717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4 2718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV1 2719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV2 2720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV4 2721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV6 2722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV8 2723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV10 2724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV12 2725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV16 2726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV32 2727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV64 2728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 2729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 2730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock) 2733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_CKMODE | ADC_CCR_PRESC, CommonClock); 2735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get parameter common to several ADC: Clock source and prescaler. 2739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR CKMODE LL_ADC_GetCommonClock\n 2740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR PRESC LL_ADC_GetCommonClock 2741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 2744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 2745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2 2746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4 2747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV1 2748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV2 2749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV4 2750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV6 2751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV8 2752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV10 2753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV12 2754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV16 2755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV32 2756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV64 2757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 2758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 2759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON) 2761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_CKMODE | ADC_CCR_PRESC)); 2763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/cc3JIfda.s page 50 2766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to 2767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal channels (VrefInt, temperature sensor, ...). 2768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Configure all paths (overwrite current configuration). 2769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 2770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 2771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) 2772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * The values not selected are removed from configuration. 2773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Stabilization time of measurement path to internal channel: 2774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * After enabling internal paths, before starting ADC conversion, 2775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a delay is required for internal voltage reference and 2776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor stabilization time. 2777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 2778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US. 2779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US. 2780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC internal channel sampling time constraint: 2781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For ADC conversion of internal channels, 2782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a sampling time minimum value is required. 2783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 2784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalCh\n 2785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_SetCommonPathInternalCh\n 2786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_SetCommonPathInternalCh 2787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values: 2790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 2791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 2792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 2793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 2794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Path 2797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_VSENSESEL | ADC_CCR_VBATSEL, PathInternal) 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to 2803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal channels (VrefInt, temperature sensor, ...). 2804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Add paths to the current configuration. 2805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 2806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 2807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) 2808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Stabilization time of measurement path to internal channel: 2809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * After enabling internal paths, before starting ADC conversion, 2810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a delay is required for internal voltage reference and 2811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor stabilization time. 2812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 2813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US. 2814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US. 2815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note ADC internal channel sampling time constraint: 2816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For ADC conversion of internal channels, 2817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a sampling time minimum value is required. 2818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 2819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalChAdd\n 2820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_SetCommonPathInternalChAdd\n 2821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_SetCommonPathInternalChAdd 2822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance ARM GAS /tmp/cc3JIfda.s page 51 2823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values: 2825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 2826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 2827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 2828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 2829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalChAdd(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t P 2832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCxy_COMMON->CCR, PathInternal); 2834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set parameter common to several ADC: measurement path to 2838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal channels (VrefInt, temperature sensor, ...). 2839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Remove paths to the current configuration. 2840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 2841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 2842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) 2843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalChRem\n 2844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_SetCommonPathInternalChRem\n 2845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_SetCommonPathInternalChRem 2846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param PathInternal This parameter can be a combination of the following values: 2849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 2850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 2851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 2852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 2853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalChRem(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t P 2856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCxy_COMMON->CCR, PathInternal); 2858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get parameter common to several ADC: measurement path to internal 2862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channels (VrefInt, temperature sensor, ...). 2863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 2864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_PATH_INTERNAL_VREFINT | 2865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_PATH_INTERNAL_TEMPSENSOR) 2866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR VREFEN LL_ADC_GetCommonPathInternalCh\n 2867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VSENSESEL LL_ADC_GetCommonPathInternalCh\n 2868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR VBATSEL LL_ADC_GetCommonPathInternalCh 2869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 2870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 2871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be a combination of the following values: 2872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_NONE 2873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT 2874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR 2875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_PATH_INTERNAL_VBAT 2876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON) 2878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_VSENSESEL | ADC_CCR_VBATSE ARM GAS /tmp/cc3JIfda.s page 52 2880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 2884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Instance Configuration of ADC hierarchical scope: ADC ins 2887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 2888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC calibration factor in the mode single-ended 2892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or differential (for devices with differential mode available). 2893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function is intended to set calibration parameters 2894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without having to perform a new calibration using 2895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref LL_ADC_StartCalibration(). 2896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with differential mode available: 2897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Calibration of offset is specific to each of 2898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * single-ended and differential modes 2899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (calibration factor must be specified for each of these 2900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * differential modes, if used afterwards and if the application 2901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * requires their calibration). 2902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of setting calibration factors of both modes single ended 2903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and differential (parameter LL_ADC_BOTH_SINGLE_DIFF_ENDED): 2904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * both calibration factors must be concatenated. 2905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * To perform this processing, use helper macro 2906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CALIB_FACTOR_SINGLE_DIFF(). 2907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 2908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 2909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled, without calibration on going, without conversion 2910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on group regular. 2911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CALFACT CALFACT_S LL_ADC_SetCalibrationFactor\n 2912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CALFACT CALFACT_D LL_ADC_SetCalibrationFactor 2913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values: 2915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 2916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 2917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_BOTH_SINGLE_DIFF_ENDED 2918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param CalibrationFactor Value between Min_Data=0x00 and Max_Data=0x7F 2919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t SingleDiff, uint32_t C 2922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 30 .loc 2 2922 1 view -0 31 .cfi_startproc 32 @ args = 0, pretend = 0, frame = 0 33 @ frame_needed = 0, uses_anonymous_args = 0 34 @ link register save eliminated. 2923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CALFACT, 35 .loc 2 2923 3 view .LVU1 36 0000 D0F8B430 ldr r3, [r0, #180] 37 0004 01F07F1C and ip, r1, #8323199 38 0008 23EA0C0C bic ip, r3, ip 39 000c 01F07F03 and r3, r1, #127 40 0010 DB43 mvns r3, r3 41 0012 03EA1133 and r3, r3, r1, lsr #12 42 0016 03F01003 and r3, r3, #16 ARM GAS /tmp/cc3JIfda.s page 53 43 001a 9A40 lsls r2, r2, r3 44 .LVL1: 45 .loc 2 2923 3 is_stmt 0 view .LVU2 46 001c 4CEA0202 orr r2, ip, r2 47 0020 C0F8B420 str r2, [r0, #180] 2924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK, 2925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CalibrationFactor << (((SingleDiff & ADC_SINGLEDIFF_CALIB_F_BIT_D_MASK) >> ADC_SINGLED 2926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 48 .loc 2 2926 1 view .LVU3 49 0024 7047 bx lr 50 .cfi_endproc 51 .LFE139: 53 .section .text.LL_ADC_SetChannelSamplingTime,"ax",%progbits 54 .align 1 55 .syntax unified 56 .thumb 57 .thumb_func 59 LL_ADC_SetChannelSamplingTime: 60 .LVL2: 61 .LFB195: 2927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC calibration factor in the mode single-ended 2930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or differential (for devices with differential mode available). 2931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Calibration factors are set by hardware after performing 2932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a calibration run using function @ref LL_ADC_StartCalibration(). 2933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with differential mode available: 2934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Calibration of offset is specific to each of 2935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * single-ended and differential modes 2936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CALFACT CALFACT_S LL_ADC_GetCalibrationFactor\n 2937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CALFACT CALFACT_D LL_ADC_GetCalibrationFactor 2938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values: 2940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 2941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 2942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x7F 2943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t SingleDiff) 2945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Retrieve bits with position in register depending on parameter */ 2947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "SingleDiff". */ 2948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameter used with mask "ADC_SINGLEDIFF_CALIB_FACTOR_MASK" because */ 2949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 2950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CALFACT, 2951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) >> ((SingleDiff & ADC 2952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SINGLEDIFF_CA 2953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC resolution. 2957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual for alignments formats 2958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 2959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 2960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 2961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 2962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 2963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR RES LL_ADC_SetResolution ARM GAS /tmp/cc3JIfda.s page 54 2964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Resolution This parameter can be one of the following values: 2966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 2971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetResolution(ADC_TypeDef *ADCx, uint32_t Resolution) 2973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_RES, Resolution); 2975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC resolution. 2979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual for alignments formats 2980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 2981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR RES LL_ADC_GetResolution 2982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 2983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 2984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_12B 2985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_10B 2986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_8B 2987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_RESOLUTION_6B 2988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 2989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetResolution(ADC_TypeDef *ADCx) 2990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_RES)); 2992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 2994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 2995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC conversion data alignment. 2996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to reference manual for alignments formats 2997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 2998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 2999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR ALIGN LL_ADC_SetDataAlignment 3003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param DataAlignment This parameter can be one of the following values: 3005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_RIGHT 3006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_LEFT 3007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetDataAlignment(ADC_TypeDef *ADCx, uint32_t DataAlignment) 3010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_ALIGN, DataAlignment); 3012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC conversion data alignment. 3016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to reference manual for alignments formats 3017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * dependencies to ADC resolutions. 3018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR ALIGN LL_ADC_GetDataAlignment 3019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: ARM GAS /tmp/cc3JIfda.s page 55 3021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_RIGHT 3022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DATA_ALIGN_LEFT 3023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetDataAlignment(ADC_TypeDef *ADCx) 3025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_ALIGN)); 3027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC low power mode. 3031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC low power modes: 3032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC low power mode "auto wait": Dynamic low power mode, 3033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions occurrences are limited to the minimum necessary 3034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * in order to reduce power consumption. 3035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * New ADC conversion starts only when the previous 3036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * unitary conversion data (for ADC group regular) 3037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or previous sequence conversions data (for ADC group injected) 3038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * has been retrieved by user software. 3039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In the meantime, ADC remains idle: does not performs any 3040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * other conversion. 3041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This mode allows to automatically adapt the ADC conversions 3042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * triggers to the speed of the software that reads the data. 3043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Moreover, this avoids risk of overrun for low frequency 3044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * applications. 3045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * How to use this low power mode: 3046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - It is not recommended to use with interruption or DMA 3047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * since these modes have to clear immediately the EOC flag 3048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (by CPU to free the IRQ pending event or by DMA). 3049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Auto wait will work but fort a very short time, discarding 3050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * its intended benefit (except specific case of high load of CPU 3051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or DMA transfers which can justify usage of auto wait). 3052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Do use with polling: 1. Start conversion, 3053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2. Later on, when conversion data is needed: poll for end of 3054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversion to ensure that conversion is completed and 3055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * retrieve ADC conversion data. This will trig another 3056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion start. 3057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC low power mode "auto power-off" (feature available on 3058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * this device if parameter LL_ADC_LP_AUTOPOWEROFF is available): 3059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the ADC automatically powers-off after a conversion and 3060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * automatically wakes up when a new conversion is triggered 3061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (with startup time between trigger and start of sampling). 3062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This feature can be combined with low power mode "auto wait". 3063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note With ADC low power mode "auto wait", the ADC conversion data read 3064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is corresponding to previous ADC conversion start, independently 3065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of delay during which ADC was idle. 3066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, the ADC conversion data may be outdated: does not 3067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * correspond to the current voltage level on the selected 3068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 3069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AUTDLY LL_ADC_SetLowPowerMode 3074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param LowPowerMode This parameter can be one of the following values: 3076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_MODE_NONE 3077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_AUTOWAIT ARM GAS /tmp/cc3JIfda.s page 56 3078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetLowPowerMode(ADC_TypeDef *ADCx, uint32_t LowPowerMode) 3081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_AUTDLY, LowPowerMode); 3083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC low power mode: 3087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC low power modes: 3088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC low power mode "auto wait": Dynamic low power mode, 3089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions occurrences are limited to the minimum necessary 3090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * in order to reduce power consumption. 3091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * New ADC conversion starts only when the previous 3092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * unitary conversion data (for ADC group regular) 3093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or previous sequence conversions data (for ADC group injected) 3094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * has been retrieved by user software. 3095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In the meantime, ADC remains idle: does not performs any 3096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * other conversion. 3097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This mode allows to automatically adapt the ADC conversions 3098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * triggers to the speed of the software that reads the data. 3099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Moreover, this avoids risk of overrun for low frequency 3100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * applications. 3101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * How to use this low power mode: 3102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - It is not recommended to use with interruption or DMA 3103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * since these modes have to clear immediately the EOC flag 3104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (by CPU to free the IRQ pending event or by DMA). 3105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Auto wait will work but fort a very short time, discarding 3106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * its intended benefit (except specific case of high load of CPU 3107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or DMA transfers which can justify usage of auto wait). 3108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Do use with polling: 1. Start conversion, 3109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 2. Later on, when conversion data is needed: poll for end of 3110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversion to ensure that conversion is completed and 3111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * retrieve ADC conversion data. This will trig another 3112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion start. 3113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC low power mode "auto power-off" (feature available on 3114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * this device if parameter LL_ADC_LP_AUTOPOWEROFF is available): 3115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the ADC automatically powers-off after a conversion and 3116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * automatically wakes up when a new conversion is triggered 3117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (with startup time between trigger and start of sampling). 3118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This feature can be combined with low power mode "auto wait". 3119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note With ADC low power mode "auto wait", the ADC conversion data read 3120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is corresponding to previous ADC conversion start, independently 3121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of delay during which ADC was idle. 3122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, the ADC conversion data may be outdated: does not 3123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * correspond to the current voltage level on the selected 3124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 3125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AUTDLY LL_ADC_GetLowPowerMode 3126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_MODE_NONE 3129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_LP_AUTOWAIT 3130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetLowPowerMode(ADC_TypeDef *ADCx) 3132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_AUTDLY)); 3134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/cc3JIfda.s page 57 3135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC selected offset number 1, 2, 3 or 4. 3138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the 2 items of offset configuration: 3139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC channel to which the offset programmed will be applied 3140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (independently of channel mapped on ADC group regular 3141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or group injected) 3142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Offset level (offset to be subtracted from the raw 3143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * converted data). 3144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Caution: Offset format is dependent to ADC resolution: 3145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset has to be left-aligned on bit 11, the LSB (right bits) 3146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are set to 0. 3147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function enables the offset, by default. It can be forced 3148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to disable state using function LL_ADC_SetOffsetState(). 3149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If a channel is mapped on several offsets numbers, only the offset 3150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with the lowest value is considered for the subtraction. 3151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 3156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 3157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_CH LL_ADC_SetOffset\n 3158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR1 OFFSET1 LL_ADC_SetOffset\n 3159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR1 OFFSET1_EN LL_ADC_SetOffset\n 3160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_CH LL_ADC_SetOffset\n 3161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2 LL_ADC_SetOffset\n 3162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_SetOffset\n 3163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_CH LL_ADC_SetOffset\n 3164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3 LL_ADC_SetOffset\n 3165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_SetOffset\n 3166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_CH LL_ADC_SetOffset\n 3167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4 LL_ADC_SetOffset\n 3168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_SetOffset 3169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 3176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 3177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 3178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 3179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 3180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 3181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 3182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 3183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 3184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 3185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 3186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 3187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 3188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 3189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 3190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 3191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 ARM GAS /tmp/cc3JIfda.s page 58 3192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 3193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 3194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 3195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 3196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 3197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 3198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 3199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 3200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 3201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 3202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 3203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 3204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 3205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 3206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 3207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 3208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 3209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 3210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 3211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 3212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 3213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 3214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 3215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 3216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 3217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetLevel Value between Min_Data=0x000 and Max_Data=0xFFF 3218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffset(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Channel, uint32 3221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 3225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 3226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | (Channel & ADC_CHANNEL_ID_NUMBER_MASK) | OffsetLevel); 3227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channel to which the offset programmed will be applied 3232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (independently of channel mapped on ADC group regular 3233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or group injected) 3234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 3235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 3236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 3237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 3238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 3239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 3240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 3241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 3242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 3243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 3244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 3245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 3246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 3247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_CH LL_ADC_GetOffsetChannel\n 3248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_CH LL_ADC_GetOffsetChannel\n ARM GAS /tmp/cc3JIfda.s page 59 3249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_CH LL_ADC_GetOffsetChannel\n 3250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_CH LL_ADC_GetOffsetChannel 3251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 3259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 3260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 3261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 3262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 3263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 3264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 3265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 3266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 3267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 3268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 3269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 3270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 3271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 3272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 3273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 3274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 3275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 3276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 3277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 3278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 3279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 3280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 3281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 3282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 3283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 3284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 3285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 3286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 3287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 3288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 3289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 3290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 3291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 3292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 3293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 3294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 3295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 3296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 3297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 3298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 3299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 3300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 3301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 3302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetChannel(ADC_TypeDef *ADCx, uint32_t Offsety) 3304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); ARM GAS /tmp/cc3JIfda.s page 60 3306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1_CH); 3308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Offset level (offset to be subtracted from the raw 3313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * converted data). 3314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Caution: Offset format is dependent to ADC resolution: 3315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset has to be left-aligned on bit 11, the LSB (right bits) 3316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are set to 0. 3317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1 LL_ADC_GetOffsetLevel\n 3318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2 LL_ADC_GetOffsetLevel\n 3319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3 LL_ADC_GetOffsetLevel\n 3320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4 LL_ADC_GetOffsetLevel 3321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 3328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetLevel(ADC_TypeDef *ADCx, uint32_t Offsety) 3330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1); 3334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set for the ADC selected offset number 1, 2, 3 or 4: 3338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * force offset state disable or enable 3339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without modifying offset channel or offset value. 3340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function should be needed only in case of offset to be 3341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled-disabled dynamically, and should not be needed in other cases: 3342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function LL_ADC_SetOffset() automatically enables the offset. 3343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_EN LL_ADC_SetOffsetState\n 3348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_SetOffsetState\n 3349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_SetOffsetState\n 3350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_SetOffsetState 3351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetState This parameter can be one of the following values: 3358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_DISABLE 3359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_ENABLE 3360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetState(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetStat ARM GAS /tmp/cc3JIfda.s page 61 3363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 3367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** OffsetState); 3369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset state disabled or enabled. 3374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSET1_EN LL_ADC_GetOffsetState\n 3375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSET2_EN LL_ADC_GetOffsetState\n 3376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSET3_EN LL_ADC_GetOffsetState\n 3377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSET4_EN LL_ADC_GetOffsetState 3378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_DISABLE 3386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_ENABLE 3387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetState(ADC_TypeDef *ADCx, uint32_t Offsety) 3389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSET1_EN); 3393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set for the ADC selected offset number 1, 2, 3 or 4: 3397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * choose offset sign. 3398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSETPOS LL_ADC_SetOffsetSign\n 3403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSETPOS LL_ADC_SetOffsetSign\n 3404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSETPOS LL_ADC_SetOffsetSign\n 3405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSETPOS LL_ADC_SetOffsetSign 3406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetSign This parameter can be one of the following values: 3413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_NEGATIVE 3414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_POSITIVE 3415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetSign(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetSign) 3418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); ARM GAS /tmp/cc3JIfda.s page 62 3420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 3422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSETPOS, 3423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** OffsetSign); 3424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset sign if positive or negative. 3429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 OFFSETPOS LL_ADC_GetOffsetSign\n 3430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 OFFSETPOS LL_ADC_GetOffsetSign\n 3431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 OFFSETPOS LL_ADC_GetOffsetSign\n 3432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 OFFSETPOS LL_ADC_GetOffsetSign 3433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_NEGATIVE 3441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SIGN_POSITIVE 3442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetSign(ADC_TypeDef *ADCx, uint32_t Offsety) 3444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_OFFSETPOS); 3448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set for the ADC selected offset number 1, 2, 3 or 4: 3452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * choose offset saturation mode. 3453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 SATEN LL_ADC_SetOffsetSaturation\n 3458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 SATEN LL_ADC_SetOffsetSaturation\n 3459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 SATEN LL_ADC_SetOffsetSaturation\n 3460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 SATEN LL_ADC_SetOffsetSaturation 3461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OffsetSaturation This parameter can be one of the following values: 3468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_ENABLE 3469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_DISABLE 3470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOffsetSaturation(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Offse 3473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, ARM GAS /tmp/cc3JIfda.s page 63 3477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_SATEN, 3478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** OffsetSaturation); 3479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get for the ADC selected offset number 1, 2, 3 or 4: 3483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * offset saturation if enabled or disabled. 3484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll OFR1 SATEN LL_ADC_GetOffsetSaturation\n 3485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR2 SATEN LL_ADC_GetOffsetSaturation\n 3486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR3 SATEN LL_ADC_GetOffsetSaturation\n 3487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * OFR4 SATEN LL_ADC_GetOffsetSaturation 3488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Offsety This parameter can be one of the following values: 3490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_1 3491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_2 3492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_3 3493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_4 3494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_ENABLE 3496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OFFSET_SATURATION_DISABLE 3497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOffsetSaturation(ADC_TypeDef *ADCx, uint32_t Offsety) 3499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); 3501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t) READ_BIT(*preg, ADC_OFR1_SATEN); 3503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC gain compensation. 3507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the gain compensation coefficient 3508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * that is applied to raw converted data using the formula: 3509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * DATA = DATA(raw) * (gain compensation coef) / 4096 3510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function enables the gain compensation if given 3511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coefficient is above 0, otherwise it disables it. 3512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Gain compensation when enabled is applied to all channels. 3513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll GCOMP GCOMPCOEFF LL_ADC_SetGainCompensation\n 3518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 GCOMP LL_ADC_SetGainCompensation 3519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param GainCompensation This parameter can be: 3521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 0 Gain compensation will be disabled and value set to 0 3522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1 -> 16393 Gain compensation will be enabled with specified value 3523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetGainCompensation(ADC_TypeDef *ADCx, uint32_t GainCompensation) 3526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->GCOMP, ADC_GCOMP_GCOMPCOEFF, GainCompensation); 3528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_GCOMP, ((GainCompensation == 0UL) ? 0UL : 1UL) << ADC_CFGR2_GCO 3529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the ADC gain compensation value 3533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll GCOMP GCOMPCOEFF LL_ADC_GetGainCompensation\n ARM GAS /tmp/cc3JIfda.s page 64 3534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 GCOMP LL_ADC_GetGainCompensation 3535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be: 3537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 0 Gain compensation is disabled 3538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1 -> 16393 Gain compensation is enabled with returned value 3539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetGainCompensation(ADC_TypeDef *ADCx) 3541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CFGR2, ADC_CFGR2_GCOMP) == ADC_CFGR2_GCOMP) ? READ_BIT(ADCx->GCOMP, ADC_G 3543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_SMPR1_SMPPLUS) 3546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC sampling time common configuration impacting 3548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings of sampling time channel wise. 3549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 3553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMPPLUS LL_ADC_SetSamplingTimeCommonConfig 3554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SamplingTimeCommonConfig This parameter can be one of the following values: 3556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_DEFAULT 3557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5 3558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetSamplingTimeCommonConfig(ADC_TypeDef *ADCx, uint32_t SamplingTimeCom 3561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->SMPR1, ADC_SMPR1_SMPPLUS, SamplingTimeCommonConfig); 3563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC sampling time common configuration impacting 3567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings of sampling time channel wise. 3568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMPPLUS LL_ADC_GetSamplingTimeCommonConfig 3569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_DEFAULT 3572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5 3573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetSamplingTimeCommonConfig(ADC_TypeDef *ADCx) 3575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->SMPR1, ADC_SMPR1_SMPPLUS)); 3577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_SMPR1_SMPPLUS */ 3579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 3582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Group_Regular Configuration of ADC hierarchical scope: gr 3585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 3586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular conversion trigger source: 3590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, ARM GAS /tmp/cc3JIfda.s page 65 3591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 3592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting trigger source to external trigger 3593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * also set trigger polarity to rising edge 3594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (default setting for compatibility with some ADC on other 3595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * STM32 families having this setting set by HW default value). 3596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In case of need to modify trigger edge, use 3597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function @ref LL_ADC_REG_SetTriggerEdge(). 3598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 3599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 3600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTSEL LL_ADC_REG_SetTriggerSource\n 3605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR EXTEN LL_ADC_REG_SetTriggerSource 3606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values: 3608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_SOFTWARE 3609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO 3610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 3611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH1 (1) 3612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH2 (1) 3613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH3 3614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO 3615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH1 (2) 3616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH2 (1) 3617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (2) 3618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO 3619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH1 (2) 3620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH4 (1) 3621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_TRGO 3622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH1 (2) 3623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH4 (1) 3624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO 3625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM7_TRGO 3626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO 3627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 3628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_CH1 (2) 3629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO 3630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO 3631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO2 3632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH1 3633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH2 (1) 3634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH3 (1) 3635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG1 3636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG2 (2) 3637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG3 3638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG4 (2) 3639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG5 3640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG6 3641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG7 3642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG8 3643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG9 3644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG10 3645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (1) 3646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE2 (2) 3647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_LPTIM_OUT ARM GAS /tmp/cc3JIfda.s page 66 3648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 3649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 3650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 3651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 3652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource) 3655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); 3657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger source: 3661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 3662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 3663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To determine whether group regular trigger source is 3664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or external, without detail 3665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of which peripheral is selected as external trigger, 3666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (equivalent to 3667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * "if(LL_ADC_REG_GetTriggerSource(ADC1) == LL_ADC_REG_TRIG_SOFTWARE)") 3668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_REG_IsTriggerSourceSWStart. 3669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 3670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 3671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTSEL LL_ADC_REG_GetTriggerSource\n 3672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR EXTEN LL_ADC_REG_GetTriggerSource 3673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_SOFTWARE 3676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO 3677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 3678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH1 (1) 3679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH2 (1) 3680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH3 3681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO 3682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH1 (2) 3683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH2 (1) 3684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (2) 3685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO 3686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH1 (2) 3687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_CH4 (1) 3688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_TRGO 3689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH1 (2) 3690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM4_CH4 (1) 3691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO 3692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM7_TRGO 3693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO 3694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_TRGO2 3695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM8_CH1 (2) 3696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO 3697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO 3698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_TRGO2 3699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH1 3700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH2 (1) 3701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_TIM20_CH3 (1) 3702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG1 3703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG2 (2) 3704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG3 ARM GAS /tmp/cc3JIfda.s page 67 3705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG4 (2) 3706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG5 3707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG6 3708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG7 3709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG8 3710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG9 3711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_HRTIM_TRG10 3712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (1) 3713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE2 (2) 3714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_LPTIM_OUT 3715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 3716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 3717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 3718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 3719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerSource(ADC_TypeDef *ADCx) 3721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); 3723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Value for shift of {0; 4; 8; 12} depending on value of bitfield */ 3725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to ADC_CFGR_EXTEN {0; 1; 2; 3}. */ 3726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ShiftExten = ((TriggerSource & ADC_CFGR_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U 3727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bitfield corresponding to ADC_CFGR_EXTEN and ADC_CFGR_EXTSEL */ 3729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to match with triggers literals definition. */ 3730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((TriggerSource 3731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & (ADC_REG_TRIG_SOURCE_MASK >> ShiftExten) & ADC_CFGR_EXTSEL) 3732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR_EXTEN) 3733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 3734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger source internal (SW start) 3738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or external. 3739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of group regular trigger source set to external trigger, 3740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to determine which peripheral is selected as external trigger, 3741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_REG_GetTriggerSource(). 3742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_IsTriggerSourceSWStart 3743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if trigger source external trigger 3745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if trigger source SW start. 3746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx) 3748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)) ? 1 3750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular conversion trigger polarity. 3754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Applicable only for trigger source set to external trigger. 3755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_SetTriggerEdge 3760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values: ARM GAS /tmp/cc3JIfda.s page 68 3762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISING 3763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_FALLING 3764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING 3765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge) 3768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN, ExternalTriggerEdge); 3770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion trigger polarity. 3774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Applicable only for trigger source set to external trigger. 3775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR EXTEN LL_ADC_REG_GetTriggerEdge 3776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISING 3779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_FALLING 3780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING 3781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(ADC_TypeDef *ADCx) 3783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN)); 3785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC sampling mode. 3789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the ADC conversion sampling mode 3790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This mode applies to regular group only. 3791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Set sampling mode is applied to all conversion of regular group. 3792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 BULB LL_ADC_REG_SetSamplingMode\n 3797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 SMPTRIG LL_ADC_REG_SetSamplingMode 3798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SamplingMode This parameter can be one of the following values: 3800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_NORMAL 3801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_BULB 3802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED 3803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSamplingMode(ADC_TypeDef *ADCx, uint32_t SamplingMode) 3806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_BULB | ADC_CFGR2_SMPTRIG, SamplingMode); 3808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the ADC sampling mode 3812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 BULB LL_ADC_REG_GetSamplingMode\n 3813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 SMPTRIG LL_ADC_REG_GetSamplingMode 3814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_NORMAL 3817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_BULB 3818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED ARM GAS /tmp/cc3JIfda.s page 69 3819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSamplingMode(ADC_TypeDef *ADCx) 3821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_BULB | ADC_CFGR2_SMPTRIG)); 3823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular sequencer length and scan direction. 3827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC group regular sequencer features: 3828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer fully configurable 3829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerRanks()" available): 3830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 3831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are configurable. 3832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function performs configuration of: 3833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 3834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 3835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 3836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 3837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerRanks()". 3838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer not fully configurable 3839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerChannels()" available): 3840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 3841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are defined by channel number. 3842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function performs configuration of: 3843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence is 3844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined by number of channels set in the sequence, 3845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * rank of each channel is fixed by channel HW number. 3846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...). 3847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 3848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from lowest channel number to 3849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * highest channel number). 3850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 3851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerChannels()". 3852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 3853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 3854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 L LL_ADC_REG_SetSequencerLength 3859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values: 3861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_DISABLE 3862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS 3863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS 3864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS 3865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS 3866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS 3867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS 3868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS 3869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS 3870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS 3871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS 3872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS 3873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS 3874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS 3875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS ARM GAS /tmp/cc3JIfda.s page 70 3876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS 3877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks) 3880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->SQR1, ADC_SQR1_L, SequencerNbRanks); 3882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular sequencer length and scan direction. 3886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC group regular sequencer features: 3887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer fully configurable 3888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerRanks()" available): 3889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 3890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are configurable. 3891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function retrieves: 3892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 3893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 3894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 3895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 3896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerRanks()". 3897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - For devices with sequencer not fully configurable 3898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (function "LL_ADC_REG_SetSequencerChannels()" available): 3899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer length and each rank affectation to a channel 3900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are defined by channel number. 3901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function retrieves: 3902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence is 3903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * defined by number of channels set in the sequence, 3904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * rank of each channel is fixed by channel HW number. 3905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...). 3906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 3907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from lowest channel number to 3908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * highest channel number). 3909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Sequencer ranks are selected using 3910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function "LL_ADC_REG_SetSequencerChannels()". 3911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 3912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 3913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 L LL_ADC_REG_GetSequencerLength 3914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_DISABLE 3917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS 3918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS 3919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS 3920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS 3921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS 3922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS 3923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS 3924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS 3925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS 3926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS 3927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS 3928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS 3929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS 3930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS 3931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS 3932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/cc3JIfda.s page 71 3933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerLength(ADC_TypeDef *ADCx) 3934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->SQR1, ADC_SQR1_L)); 3936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular sequencer discontinuous mode: 3940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 3941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 3942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group regular 3943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * continuous mode and sequencer discontinuous mode. 3944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC auto-injected mode 3945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and ADC group regular sequencer discontinuous mode. 3946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 3947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 3948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 3949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 3950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DISCEN LL_ADC_REG_SetSequencerDiscont\n 3951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DISCNUM LL_ADC_REG_SetSequencerDiscont 3952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SeqDiscont This parameter can be one of the following values: 3954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE 3955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK 3956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_2RANKS 3957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_3RANKS 3958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_4RANKS 3959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_5RANKS 3960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_6RANKS 3961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_7RANKS 3962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_8RANKS 3963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 3964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont) 3966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_DISCEN | ADC_CFGR_DISCNUM, SeqDiscont); 3968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular sequencer discontinuous mode: 3972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 3973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 3974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DISCEN LL_ADC_REG_GetSequencerDiscont\n 3975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DISCNUM LL_ADC_REG_GetSequencerDiscont 3976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 3977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 3978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE 3979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK 3980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_2RANKS 3981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_3RANKS 3982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_4RANKS 3983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_5RANKS 3984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_6RANKS 3985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_7RANKS 3986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_SEQ_DISCONT_8RANKS 3987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 3988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerDiscont(ADC_TypeDef *ADCx) 3989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/cc3JIfda.s page 72 3990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DISCEN | ADC_CFGR_DISCNUM)); 3991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 3994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular sequence: channel on the selected 3995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan sequence rank. 3996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function performs configuration of: 3997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Channels ordering into each rank of scan sequence: 3998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever channel can be placed into whatever rank. 3999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, ADC group regular sequencer is 4000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * fully configurable: sequencer length and each rank 4001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * affectation to a channel are configurable. 4002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to description of function @ref LL_ADC_REG_SetSequencerLength(). 4003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 4004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 4005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt, 4006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be 4007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled separately. 4008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh(). 4009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 SQ1 LL_ADC_REG_SetSequencerRanks\n 4014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ2 LL_ADC_REG_SetSequencerRanks\n 4015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ3 LL_ADC_REG_SetSequencerRanks\n 4016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ4 LL_ADC_REG_SetSequencerRanks\n 4017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ5 LL_ADC_REG_SetSequencerRanks\n 4018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ6 LL_ADC_REG_SetSequencerRanks\n 4019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ7 LL_ADC_REG_SetSequencerRanks\n 4020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ8 LL_ADC_REG_SetSequencerRanks\n 4021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ9 LL_ADC_REG_SetSequencerRanks\n 4022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ10 LL_ADC_REG_SetSequencerRanks\n 4023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ11 LL_ADC_REG_SetSequencerRanks\n 4024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ12 LL_ADC_REG_SetSequencerRanks\n 4025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ13 LL_ADC_REG_SetSequencerRanks\n 4026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ14 LL_ADC_REG_SetSequencerRanks\n 4027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ15 LL_ADC_REG_SetSequencerRanks\n 4028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ16 LL_ADC_REG_SetSequencerRanks 4029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 4031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_1 4032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_2 4033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_3 4034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_4 4035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_5 4036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_6 4037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_7 4038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_8 4039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_9 4040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_10 4041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_11 4042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_12 4043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_13 4044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_14 4045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_15 4046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_16 ARM GAS /tmp/cc3JIfda.s page 73 4047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 4048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 4050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 4051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 4052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 4053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 4054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 4055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 4056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 4057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 4058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 4059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 4060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 4061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 4062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 4063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 4064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 4065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 4066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 4067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 4068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 4069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 4070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 4071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 4072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 4073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 4074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 4075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 4076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 4077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 4078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 4080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 4081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 4082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 4083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 4084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 4085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 4086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 4087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 4088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 4089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channe 4092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "Channel" with bits position */ 4094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register and register position depending on parameter "Rank". */ 4095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "Rank" and "Channel" are used with masks because containing */ 4096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* other bits reserved for other purpose. */ 4097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK) >> A 4098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 4100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MASK), 4101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Ra 4102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/cc3JIfda.s page 74 4104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular sequence: channel on the selected 4106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan sequence rank. 4107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, ADC group regular sequencer is 4108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * fully configurable: sequencer length and each rank 4109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * affectation to a channel are configurable. 4110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to description of function @ref LL_ADC_REG_SetSequencerLength(). 4111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 4112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 4113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 4114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 4115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 4116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 4117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 4118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 4119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 4120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 4121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 4122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 4123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 4124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SQR1 SQ1 LL_ADC_REG_GetSequencerRanks\n 4125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ2 LL_ADC_REG_GetSequencerRanks\n 4126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ3 LL_ADC_REG_GetSequencerRanks\n 4127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR1 SQ4 LL_ADC_REG_GetSequencerRanks\n 4128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ5 LL_ADC_REG_GetSequencerRanks\n 4129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ6 LL_ADC_REG_GetSequencerRanks\n 4130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ7 LL_ADC_REG_GetSequencerRanks\n 4131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ8 LL_ADC_REG_GetSequencerRanks\n 4132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR2 SQ9 LL_ADC_REG_GetSequencerRanks\n 4133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ10 LL_ADC_REG_GetSequencerRanks\n 4134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ11 LL_ADC_REG_GetSequencerRanks\n 4135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ12 LL_ADC_REG_GetSequencerRanks\n 4136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ13 LL_ADC_REG_GetSequencerRanks\n 4137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR3 SQ14 LL_ADC_REG_GetSequencerRanks\n 4138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ15 LL_ADC_REG_GetSequencerRanks\n 4139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SQR4 SQ16 LL_ADC_REG_GetSequencerRanks 4140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 4142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_1 4143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_2 4144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_3 4145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_4 4146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_5 4147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_6 4148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_7 4149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_8 4150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_9 4151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_10 4152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_11 4153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_12 4154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_13 4155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_14 4156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_15 4157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_RANK_16 4158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) ARM GAS /tmp/cc3JIfda.s page 75 4161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 4162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 4163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 4164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 4165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 4166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 4167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 4168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 4169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 4170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 4171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 4172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 4173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 4174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 4175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 4176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 4177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 4178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 4179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 4180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 4181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 4182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 4183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 4184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 4185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 4186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 4187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 4188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 4189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 4191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 4192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 4193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 4194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 4195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 4196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 4197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 4198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 4199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 4200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 4201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 4202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 4203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank) 4205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK 4207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)((READ_BIT(*preg, 4209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MA 4210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (Rank & ADC_REG_RANK_ID_SQRX_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS 4211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 4212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC continuous conversion mode on ADC group regular. 4216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC continuous conversion mode: 4217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - single mode: one conversion per trigger ARM GAS /tmp/cc3JIfda.s page 76 4218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode: after the first trigger, following 4219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversions launched successively automatically. 4220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group regular 4221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * continuous mode and sequencer discontinuous mode. 4222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR CONT LL_ADC_REG_SetContinuousMode 4227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Continuous This parameter can be one of the following values: 4229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_SINGLE 4230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_CONTINUOUS 4231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetContinuousMode(ADC_TypeDef *ADCx, uint32_t Continuous) 4234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_CONT, Continuous); 4236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC continuous conversion mode on ADC group regular. 4240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Description of ADC continuous conversion mode: 4241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - single mode: one conversion per trigger 4242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode: after the first trigger, following 4243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * conversions launched successively automatically. 4244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR CONT LL_ADC_REG_GetContinuousMode 4245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_SINGLE 4248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_CONV_CONTINUOUS 4249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetContinuousMode(ADC_TypeDef *ADCx) 4251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_CONT)); 4253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular conversion data transfer: no transfer or 4257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * transfer by DMA, and DMA requests mode. 4258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If transfer by DMA selected, specifies the DMA requests 4259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode: 4260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 4261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 4262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 4263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 4264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 4265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 4266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 4267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 4268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 4269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 4270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 4271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 4272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 4273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with several ADC instances: ADC multimode DMA 4274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings are available using function @ref LL_ADC_SetMultiDMATransfer(). ARM GAS /tmp/cc3JIfda.s page 77 4275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To configure DMA source address (peripheral address), 4276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_DMA_GetRegAddr(). 4277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DMAEN LL_ADC_REG_SetDMATransfer\n 4282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DMACFG LL_ADC_REG_SetDMATransfer 4283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param DMATransfer This parameter can be one of the following values: 4285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE 4286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED 4287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED 4288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetDMATransfer(ADC_TypeDef *ADCx, uint32_t DMATransfer) 4291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_DMAEN | ADC_CFGR_DMACFG, DMATransfer); 4293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data transfer: no transfer or 4297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * transfer by DMA, and DMA requests mode. 4298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If transfer by DMA selected, specifies the DMA requests 4299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode: 4300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 4301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 4302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 4303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 4304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 4305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 4306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 4307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 4308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 4309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 4310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 4311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 4312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 4313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with several ADC instances: ADC multimode DMA 4314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * settings are available using function @ref LL_ADC_GetMultiDMATransfer(). 4315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To configure DMA source address (peripheral address), 4316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_DMA_GetRegAddr(). 4317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR DMAEN LL_ADC_REG_GetDMATransfer\n 4318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR DMACFG LL_ADC_REG_GetDMATransfer 4319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE 4322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED 4323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED 4324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetDMATransfer(ADC_TypeDef *ADCx) 4326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_DMAEN | ADC_CFGR_DMACFG)); 4328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group regular behavior in case of overrun: ARM GAS /tmp/cc3JIfda.s page 78 4332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * data preserved or overwritten. 4333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Compatibility with devices without feature overrun: 4334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * other devices without this feature have a behavior 4335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * equivalent to data overwritten. 4336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * The default setting of overrun is data preserved. 4337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, for compatibility with all devices, parameter 4338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * overrun should be set to data overwritten. 4339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 4343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR OVRMOD LL_ADC_REG_SetOverrun 4344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Overrun This parameter can be one of the following values: 4346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED 4347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN 4348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetOverrun(ADC_TypeDef *ADCx, uint32_t Overrun) 4351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_OVRMOD, Overrun); 4353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular behavior in case of overrun: 4357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * data preserved or overwritten. 4358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR OVRMOD LL_ADC_REG_GetOverrun 4359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED 4362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN 4363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetOverrun(ADC_TypeDef *ADCx) 4365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_OVRMOD)); 4367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 4371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Group_Injected Configuration of ADC hierarchical scope: g 4374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 4375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger source: 4379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 4380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 4381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting trigger source to external trigger 4382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * also set trigger polarity to rising edge 4383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (default setting for compatibility with some ADC on other 4384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * STM32 families having this setting set by HW default value). 4385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In case of need to modify trigger edge, use 4386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * function @ref LL_ADC_INJ_SetTriggerEdge(). 4387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 4388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. ARM GAS /tmp/cc3JIfda.s page 79 4389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_SetTriggerSource\n 4394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_SetTriggerSource 4395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values: 4397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE 4398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO 4399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 4400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (2) 4401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4 4402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO 4403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (1) 4404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO 4405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (1) 4406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (1) 4407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (1) 4408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO 4409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (2) 4410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (2) 4411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO 4412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM7_TRGO 4413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO 4414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 4415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (2) 4416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4 4417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO 4418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (1) 4419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO 4420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 4421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (2) 4422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (1) 4423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (2) 4424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 4425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (2) 4426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 4427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 4428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 4429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 4430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 4431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 4432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 4433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (2) 4434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (1) 4435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM_OUT 4436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 4438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 4439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 4440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource) 4443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN, TriggerSource); 4445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/cc3JIfda.s page 80 4446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger source: 4449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or from external peripheral (timer event, 4450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external interrupt line). 4451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note To determine whether group injected trigger source is 4452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal (SW start) or external, without detail 4453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of which peripheral is selected as external trigger, 4454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (equivalent to 4455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * "if(LL_ADC_INJ_GetTriggerSource(ADC1) == LL_ADC_INJ_TRIG_SOFTWARE)") 4456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_INJ_IsTriggerSourceSWStart. 4457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Availability of parameters of trigger sources from timer 4458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * depends on timers availability on the selected device. 4459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_GetTriggerSource\n 4460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_GetTriggerSource 4461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE 4464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO 4465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 4466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (2) 4467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4 4468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO 4469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (1) 4470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO 4471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (1) 4472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (1) 4473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (1) 4474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO 4475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (2) 4476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (2) 4477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO 4478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM7_TRGO 4479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO 4480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 4481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (2) 4482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4 4483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO 4484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (1) 4485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO 4486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 4487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (2) 4488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (1) 4489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (2) 4490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 4491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (2) 4492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 4493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 4494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 4495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 4496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 4497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 4498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 4499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (2) 4500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (1) 4501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM_OUT 4502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ARM GAS /tmp/cc3JIfda.s page 81 4503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 4504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 4505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 4506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerSource(ADC_TypeDef *ADCx) 4508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t TriggerSource = READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN); 4510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Value for shift of {0; 4; 8; 12} depending on value of bitfield */ 4512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* corresponding to ADC_JSQR_JEXTEN {0; 1; 2; 3}. */ 4513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ShiftJexten = ((TriggerSource & ADC_JSQR_JEXTEN) >> (ADC_INJ_TRIG_EXTEN_BITOFFSET_POS - 4514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bitfield corresponding to ADC_JSQR_JEXTEN and ADC_JSQR_JEXTSEL */ 4516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to match with triggers literals definition. */ 4517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((TriggerSource 4518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & (ADC_INJ_TRIG_SOURCE_MASK >> ShiftJexten) & ADC_JSQR_JEXTSEL) 4519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ((ADC_INJ_TRIG_EDGE_MASK >> ShiftJexten) & ADC_JSQR_JEXTEN) 4520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 4521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger source internal (SW start) 4525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** or external 4526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of group injected trigger source set to external trigger, 4527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * to determine which peripheral is selected as external trigger, 4528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_INJ_GetTriggerSource. 4529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_IsTriggerSourceSWStart 4530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value "0" if trigger source external trigger 4532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Value "1" if trigger source SW start. 4533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_IsTriggerSourceSWStart(ADC_TypeDef *ADCx) 4535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTEN) == (LL_ADC_INJ_TRIG_SOFTWARE & ADC_JSQR_JEXTEN)) ? 4537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger polarity. 4541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Applicable only for trigger source set to external trigger. 4542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_SetTriggerEdge 4547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values: 4549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING 4550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING 4551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING 4552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge) 4555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JEXTEN, ExternalTriggerEdge); 4557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/cc3JIfda.s page 82 4560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger polarity. 4561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Applicable only for trigger source set to external trigger. 4562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTEN LL_ADC_INJ_GetTriggerEdge 4563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING 4566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING 4567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING 4568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTriggerEdge(ADC_TypeDef *ADCx) 4570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->JSQR, ADC_JSQR_JEXTEN)); 4572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected sequencer length and scan direction. 4576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function performs configuration of: 4577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 4578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 4579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 4580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 4581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 4582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JL LL_ADC_INJ_SetSequencerLength 4587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values: 4589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE 4590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS 4591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS 4592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS 4593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerLength(ADC_TypeDef *ADCx, uint32_t SequencerNbRanks) 4596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, ADC_JSQR_JL, SequencerNbRanks); 4598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected sequencer length and scan direction. 4602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function retrieves: 4603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence length: Number of ranks in the scan sequence. 4604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Sequence direction: Unless specified in parameters, sequencer 4605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * scan direction is forward (from rank 1 to rank n). 4606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Sequencer disabled is equivalent to sequencer of 1 rank: 4607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion on only 1 channel. 4608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JL LL_ADC_INJ_GetSequencerLength 4609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE 4612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS 4613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS 4614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS 4615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerLength(ADC_TypeDef *ADCx) ARM GAS /tmp/cc3JIfda.s page 83 4617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->JSQR, ADC_JSQR_JL)); 4619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected sequencer discontinuous mode: 4623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 4624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 4625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group injected 4626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * auto-injected mode and sequencer discontinuous mode. 4627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JDISCEN LL_ADC_INJ_SetSequencerDiscont 4628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SeqDiscont This parameter can be one of the following values: 4630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_DISABLE 4631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_1RANK 4632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont) 4635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JDISCEN, SeqDiscont); 4637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected sequencer discontinuous mode: 4641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence subdivided and scan conversions interrupted every selected 4642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * number of ranks. 4643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JDISCEN LL_ADC_INJ_GetSequencerDiscont 4644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_DISABLE 4647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_DISCONT_1RANK 4648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerDiscont(ADC_TypeDef *ADCx) 4650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JDISCEN)); 4652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected sequence: channel on the selected 4656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence rank. 4657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 4658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 4659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt, 4660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be 4661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled separately. 4662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh(). 4663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 4664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 4665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JSQ1 LL_ADC_INJ_SetSequencerRanks\n 4670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_SetSequencerRanks\n 4671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_SetSequencerRanks\n 4672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_SetSequencerRanks 4673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance ARM GAS /tmp/cc3JIfda.s page 84 4674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 4675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1 4676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2 4677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3 4678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4 4679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 4680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 4682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 4683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 4684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 4685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 4686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 4687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 4688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 4689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 4690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 4691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 4692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 4693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 4694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 4695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 4696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 4697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 4698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 4699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 4700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 4701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 4702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 4703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 4704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 4705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 4706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 4707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 4708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 4709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 4710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 4712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 4713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 4714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 4715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 4716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 4717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 4718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 4719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 4720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 4721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channe 4724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "Channel" with bits position */ 4726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register depending on parameter "Rank". */ 4727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "Rank" and "Channel" are used with masks because containing */ 4728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* other bits reserved for other purpose. */ 4729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, 4730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_CHANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ ARM GAS /tmp/cc3JIfda.s page 85 4731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Ra 4732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected sequence: channel on the selected 4736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequence rank. 4737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Depending on devices and packages, some channels may not be available. 4738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for channels availability. 4739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 4740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 4741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 4742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 4743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 4744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 4745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 4746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 4747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 4748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 4749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 4750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JSQ1 LL_ADC_INJ_GetSequencerRanks\n 4751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_GetSequencerRanks\n 4752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_GetSequencerRanks\n 4753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_GetSequencerRanks 4754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank This parameter can be one of the following values: 4756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_1 4757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_2 4758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_3 4759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_RANK_4 4760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 4762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 4763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 4764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 4765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 4766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 4767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 4768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 4769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 4770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 4771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 4772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 4773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 4774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 4775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 4776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 4777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 4778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 4779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 4780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 4781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 4782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 4783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 4784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 4785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 4786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 4787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) ARM GAS /tmp/cc3JIfda.s page 86 4788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 4789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 4790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 4791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 4792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 4793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 4794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 4795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 4796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 4797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 4798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 4799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 4800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 4801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 4802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1, 2, 3, 4, 5, 7) For ADC channel read back from ADC register, 4803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * comparison with internal channel parameter to be done 4804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(). 4805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank) 4807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)((READ_BIT(ADCx->JSQR, 4809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ADC_CHANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) < 4810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS 4811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 4812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected conversion trigger: 4816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * independent or from ADC group regular. 4817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This mode can be used to extend number of data registers 4818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * updated after one ADC conversion trigger and with data 4819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * permanently kept (not erased by successive conversions of scan of 4820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC sequencer ranks), up to 5 data registers: 4821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 1 data register on ADC group regular, 4 data registers 4822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on ADC group injected. 4823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC group injected injected trigger source is set to an 4824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * external trigger, this feature must be must be set to 4825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * independent trigger. 4826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC group injected automatic trigger is compliant only with 4827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * group injected trigger source set to SW start, without any 4828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * further action on ADC group injected conversion start or stop: 4829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * in this case, ADC group injected is controlled only 4830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * from ADC group regular. 4831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note It is not possible to enable both ADC group injected 4832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * auto-injected mode and sequencer discontinuous mode. 4833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JAUTO LL_ADC_INJ_SetTrigAuto 4838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TrigAuto This parameter can be one of the following values: 4840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_INDEPENDENT 4841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_FROM_GRP_REGULAR 4842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetTrigAuto(ADC_TypeDef *ADCx, uint32_t TrigAuto) ARM GAS /tmp/cc3JIfda.s page 87 4845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JAUTO, TrigAuto); 4847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion trigger: 4851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * independent or from ADC group regular. 4852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JAUTO LL_ADC_INJ_GetTrigAuto 4853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_INDEPENDENT 4856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_FROM_GRP_REGULAR 4857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetTrigAuto(ADC_TypeDef *ADCx) 4859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JAUTO)); 4861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC group injected contexts queue mode. 4865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note A context is a setting of group injected sequencer: 4866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - group injected trigger 4867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer length 4868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer ranks 4869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If contexts queue is disabled: 4870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - only 1 sequence can be configured 4871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and is active perpetually. 4872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If contexts queue is enabled: 4873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - up to 2 contexts can be queued 4874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * and are checked in and out as a FIFO stack (first-in, first-out). 4875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If a new context is set when queues is full, error is triggered 4876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * by interruption "Injected Queue Overflow". 4877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Two behaviors are possible when all contexts have been processed: 4878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the contexts queue can maintain the last context active perpetually 4879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or can be empty and injected group triggers are disabled. 4880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Triggers can be only external (not internal SW start) 4881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Caution: The sequence must be fully configured in one time 4882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (one write of register JSQR makes a check-in of a new context 4883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * into the queue). 4884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore functions to set separately injected trigger and 4885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sequencer channels cannot be used, register JSQR must be set 4886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using function @ref LL_ADC_INJ_ConfigQueueContext(). 4887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This parameter can be modified only when no conversion is on going 4888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note A modification of the context mode (bit JQDIS) causes the contexts 4890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * queue to be flushed and the register JSQR is cleared. 4891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 4894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 4895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JQM LL_ADC_INJ_SetQueueMode\n 4896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JQDIS LL_ADC_INJ_SetQueueMode 4897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param QueueMode This parameter can be one of the following values: 4899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_DISABLE 4900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE 4901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY ARM GAS /tmp/cc3JIfda.s page 88 4902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 4903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_SetQueueMode(ADC_TypeDef *ADCx, uint32_t QueueMode) 4905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR, ADC_CFGR_JQM | ADC_CFGR_JQDIS, QueueMode); 4907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected context queue mode. 4911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR JQM LL_ADC_INJ_GetQueueMode\n 4912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JQDIS LL_ADC_INJ_GetQueueMode 4913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 4914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 4915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_DISABLE 4916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_LAST_ACTIVE 4917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_QUEUE_2CONTEXTS_END_EMPTY 4918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 4919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_GetQueueMode(ADC_TypeDef *ADCx) 4920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_JQM | ADC_CFGR_JQDIS)); 4922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 4925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set one context on ADC group injected that will be checked in 4926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * contexts queue. 4927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note A context is a setting of group injected sequencer: 4928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - group injected trigger 4929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer length 4930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - sequencer ranks 4931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function is intended to be used when contexts queue is enabled, 4932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * because the sequence must be fully configured in one time 4933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (functions to set separately injected trigger and sequencer channels 4934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * cannot be used): 4935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to function @ref LL_ADC_INJ_SetQueueMode(). 4936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In the contexts queue, only the active context can be read. 4937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * The parameters of this function can be read using functions: 4938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetTriggerSource() 4939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetTriggerEdge() 4940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_GetSequencerRanks() 4941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, to measure internal channels (VrefInt, 4942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TempSensor, ...), measurement paths to internal channels must be 4943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * enabled separately. 4944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This can be done using function @ref LL_ADC_SetCommonPathInternalCh(). 4945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some fast channels are available: fast analog inputs 4946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * coming from GPIO pads (ADC_IN1..5). 4947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 4948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 4949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must not be disabled. Can be enabled with or without conversion 4950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on going on either groups regular or injected. 4951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll JSQR JEXTSEL LL_ADC_INJ_ConfigQueueContext\n 4952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JEXTEN LL_ADC_INJ_ConfigQueueContext\n 4953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JL LL_ADC_INJ_ConfigQueueContext\n 4954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ1 LL_ADC_INJ_ConfigQueueContext\n 4955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ2 LL_ADC_INJ_ConfigQueueContext\n 4956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ3 LL_ADC_INJ_ConfigQueueContext\n 4957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * JSQR JSQ4 LL_ADC_INJ_ConfigQueueContext 4958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance ARM GAS /tmp/cc3JIfda.s page 89 4959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param TriggerSource This parameter can be one of the following values: 4960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_SOFTWARE 4961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO 4962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2 4963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH3 (2) 4964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM1_CH4 4965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_TRGO 4966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM2_CH1 (1) 4967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_TRGO 4968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH1 (1) 4969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH3 (1) 4970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM3_CH4 (1) 4971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_TRGO 4972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH3 (2) 4973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM4_CH4 (2) 4974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM6_TRGO 4975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM7_TRGO 4976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO 4977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2 4978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH2 (2) 4979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM8_CH4 4980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM15_TRGO 4981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM16_CH1 (1) 4982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO 4983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_TRGO2 4984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH2 (2) 4985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_TIM20_CH4 (1) 4986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG1 (2) 4987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG2 4988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG3 (2) 4989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG4 4990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG5 4991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG6 4992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG7 4993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG8 4994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG9 4995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_HRTIM_TRG10 4996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE3 (2) 4997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_EXTI_LINE15 (1) 4998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_LPTIM_OUT 4999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4 series, parameter not available on all ADC instances: ADC1, ADC2.\n 5001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4 series, parameter not available on all ADC instances: ADC3, ADC4, ADC5. 5002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, all ADCx are not available on all devices. Refer to device da 5003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ExternalTriggerEdge This parameter can be one of the following values: 5004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISING 5005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_FALLING 5006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_TRIG_EXT_RISINGFALLING 5007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Note: This parameter is discarded in case of SW start: 5009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * parameter "TriggerSource" set to "LL_ADC_INJ_TRIG_SOFTWARE". 5010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SequencerNbRanks This parameter can be one of the following values: 5011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_DISABLE 5012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS 5013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS 5014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS 5015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank1_Channel This parameter can be one of the following values: ARM GAS /tmp/cc3JIfda.s page 90 5016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank2_Channel This parameter can be one of the following values: 5058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 ARM GAS /tmp/cc3JIfda.s page 91 5073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank3_Channel This parameter can be one of the following values: 5100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) ARM GAS /tmp/cc3JIfda.s page 92 5130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Rank4_Channel This parameter can be one of the following values: 5142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_ConfigQueueContext(ADC_TypeDef *ADCx, 5186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t TriggerSource, ARM GAS /tmp/cc3JIfda.s page 93 5187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t ExternalTriggerEdge, 5188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t SequencerNbRanks, 5189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank1_Channel, 5190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank2_Channel, 5191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank3_Channel, 5192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t Rank4_Channel) 5193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "Rankx_Channel" with bits position */ 5195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register depending on literal "LL_ADC_INJ_RANK_x". */ 5196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "Rankx_Channel" and "LL_ADC_INJ_RANK_x" are used with masks */ 5197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* because containing other bits reserved for other purpose. */ 5198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* If parameter "TriggerSource" is set to SW start, then parameter */ 5199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "ExternalTriggerEdge" is discarded. */ 5200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t is_trigger_not_sw = (uint32_t)((TriggerSource != LL_ADC_INJ_TRIG_SOFTWARE) ? 1UL : 0UL); 5201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->JSQR, 5202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTSEL | 5203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JEXTEN | 5204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ4 | 5205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ3 | 5206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ2 | 5207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JSQ1 | 5208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_JSQR_JL, 5209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (TriggerSource & ADC_JSQR_JEXTSEL) | 5210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (ExternalTriggerEdge * (is_trigger_not_sw)) | 5211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank4_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank3_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank2_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (((Rank1_Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) 5215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SequencerNbRanks 5216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 5221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_Channels Configuration of ADC hierarchical scope: channels 5224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 5225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set sampling time of the selected ADC channel 5229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Unit: ADC clock cycles. 5230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this device, sampling time is on channel scope: independently 5231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of channel mapped on ADC group regular or injected. 5232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of internal channel (VrefInt, TempSensor, ...) to be 5233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * converted: 5234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * sampling time constraints must be respected (sampling time can be 5235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * adjusted in function of ADC clock frequency and sampling time 5236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * setting). 5237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet for timings values (parameters TS_vrefint, 5238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TS_temp, ...). 5239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Conversion time is the addition of sampling time and processing time. 5240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, ADC processing time is: 5241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 12.5 ADC clock cycles at ADC resolution 12 bits 5242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 10.5 ADC clock cycles at ADC resolution 10 bits 5243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 8.5 ADC clock cycles at ADC resolution 8 bits ARM GAS /tmp/cc3JIfda.s page 94 5244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 6.5 ADC clock cycles at ADC resolution 6 bits 5245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC conversion of internal channel (VrefInt, 5246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temperature sensor, ...), a sampling time minimum value 5247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is required. 5248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet. 5249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 5252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 5253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMP0 LL_ADC_SetChannelSamplingTime\n 5254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP1 LL_ADC_SetChannelSamplingTime\n 5255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP2 LL_ADC_SetChannelSamplingTime\n 5256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP3 LL_ADC_SetChannelSamplingTime\n 5257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP4 LL_ADC_SetChannelSamplingTime\n 5258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP5 LL_ADC_SetChannelSamplingTime\n 5259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP6 LL_ADC_SetChannelSamplingTime\n 5260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP7 LL_ADC_SetChannelSamplingTime\n 5261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP8 LL_ADC_SetChannelSamplingTime\n 5262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP9 LL_ADC_SetChannelSamplingTime\n 5263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP10 LL_ADC_SetChannelSamplingTime\n 5264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP11 LL_ADC_SetChannelSamplingTime\n 5265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP12 LL_ADC_SetChannelSamplingTime\n 5266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP13 LL_ADC_SetChannelSamplingTime\n 5267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP14 LL_ADC_SetChannelSamplingTime\n 5268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP15 LL_ADC_SetChannelSamplingTime\n 5269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP16 LL_ADC_SetChannelSamplingTime\n 5270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP17 LL_ADC_SetChannelSamplingTime\n 5271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP18 LL_ADC_SetChannelSamplingTime 5272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 5274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 5292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) ARM GAS /tmp/cc3JIfda.s page 95 5301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SamplingTime This parameter can be one of the following values: 5316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_2CYCLES_5 (1) 5317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_6CYCLES_5 5318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5 5319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_24CYCLES_5 5320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_47CYCLES_5 5321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_92CYCLES_5 5322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_247CYCLES_5 5323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_640CYCLES_5 5324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On some devices, ADC sampling time 2.5 ADC clock cycles 5326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can be replaced by 3.5 ADC clock cycles. 5327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to function @ref LL_ADC_SetSamplingTimeCommonConfig(). 5328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t Sa 5331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 62 .loc 2 5331 1 is_stmt 1 view -0 63 .cfi_startproc 64 @ args = 0, pretend = 0, frame = 0 65 @ frame_needed = 0, uses_anonymous_args = 0 66 @ link register save eliminated. 67 .loc 2 5331 1 is_stmt 0 view .LVU5 68 0000 10B4 push {r4} 69 .LCFI0: 70 .cfi_def_cfa_offset 4 71 .cfi_offset 4, -4 5332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "SamplingTime" with bits position */ 5333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register and register position depending on parameter "Channel". */ 5334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameter "Channel" is used with masks because containing */ 5335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* other bits reserved for other purpose. */ 5336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFFSET_M 72 .loc 2 5336 3 is_stmt 1 view .LVU6 73 .loc 2 5336 25 is_stmt 0 view .LVU7 74 0002 1430 adds r0, r0, #20 75 .LVL3: 76 .loc 2 5336 25 view .LVU8 77 0004 4B0E lsrs r3, r1, #25 78 0006 9B00 lsls r3, r3, #2 79 0008 03F00403 and r3, r3, #4 80 .LVL4: 5337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, ARM GAS /tmp/cc3JIfda.s page 96 81 .loc 2 5338 3 is_stmt 1 view .LVU9 82 000c C458 ldr r4, [r0, r3] 83 000e C1F30451 ubfx r1, r1, #20, #5 84 .LVL5: 85 .loc 2 5338 3 is_stmt 0 view .LVU10 86 0012 4FF0070C mov ip, #7 87 0016 0CFA01FC lsl ip, ip, r1 88 001a 24EA0C0C bic ip, r4, ip 89 001e 8A40 lsls r2, r2, r1 90 .LVL6: 91 .loc 2 5338 3 view .LVU11 92 0020 4CEA0202 orr r2, ip, r2 93 0024 C250 str r2, [r0, r3] 5339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 5340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SamplingTime << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BIT 5341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 94 .loc 2 5341 1 view .LVU12 95 0026 5DF8044B ldr r4, [sp], #4 96 .LCFI1: 97 .cfi_restore 4 98 .cfi_def_cfa_offset 0 99 002a 7047 bx lr 100 .cfi_endproc 101 .LFE195: 103 .section .text.HAL_ADCEx_Calibration_Start,"ax",%progbits 104 .align 1 105 .global HAL_ADCEx_Calibration_Start 106 .syntax unified 107 .thumb 108 .thumb_func 110 HAL_ADCEx_Calibration_Start: 111 .LVL7: 112 .LFB329: 1:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ****************************************************************************** 3:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @file stm32g4xx_hal_adc_ex.c 4:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @author MCD Application Team 5:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief This file provides firmware functions to manage the following 6:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * functionalities of the Analog to Digital Converter (ADC) 7:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * peripheral: 8:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * + Peripheral Control functions 9:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Other functions (generic functions) are available in file 10:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * "stm32g4xx_hal_adc.c". 11:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 12:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ****************************************************************************** 13:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @attention 14:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 15:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Copyright (c) 2019 STMicroelectronics. 16:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * All rights reserved. 17:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 18:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This software is licensed under terms that can be found in the LICENSE file 19:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * in the root directory of this software component. 20:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 21:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 22:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ****************************************************************************** 23:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @verbatim 24:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** [..] ARM GAS /tmp/cc3JIfda.s page 97 25:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (@) Sections "ADC peripheral features" and "How to use this driver" are 26:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** available in file of generic functions "stm32g4xx_hal_adc.c". 27:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** [..] 28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @endverbatim 29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ****************************************************************************** 30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 32:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Includes ------------------------------------------------------------------*/ 33:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #include "stm32g4xx_hal.h" 34:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 35:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @addtogroup STM32G4xx_HAL_Driver 36:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 37:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 38:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 39:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx ADCEx 40:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief ADC Extended HAL module driver 41:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 42:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 43:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 44:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #ifdef HAL_ADC_MODULE_ENABLED 45:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 46:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private typedef -----------------------------------------------------------*/ 47:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private define ------------------------------------------------------------*/ 48:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 49:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx_Private_Constants ADC Extended Private Constants 50:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 51:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 52:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 53:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #define ADC_JSQR_FIELDS ((ADC_JSQR_JL | ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN |\ 54:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_JSQR_JSQ1 | ADC_JSQR_JSQ2 |\ 55:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_JSQR_JSQ3 | ADC_JSQR_JSQ4 )) /*!< ADC_JSQR fields of parameters tha 56:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 57:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Fixed timeout value for ADC calibration. */ 58:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Values defined to be higher than worst cases: low clock frequency, */ 59:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* maximum prescalers. */ 60:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Ex of profile low frequency : f_ADC at f_CPU/3968 (minimum value */ 61:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* considering both possible ADC clocking scheme: */ 62:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC clock from synchronous clock with AHB prescaler 512, */ 63:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC prescaler 4. */ 64:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Ratio max = 512 *4 = 2048 */ 65:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC clock from asynchronous clock (PLLP) with prescaler 256. */ 66:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Highest CPU clock PLL (PLLR). */ 67:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Ratio max = PLLRmax /PPLPmin * 256 = (VCO/2) / (VCO/31) * 256 */ 68:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* = 3968 ) */ 69:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Calibration_time MAX = 81 / f_ADC */ 70:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* = 81 / (f_CPU/3938) = 318978 CPU cycles */ 71:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #define ADC_CALIBRATION_TIMEOUT (318978UL) /*!< ADC calibration time-out value (unit: CPU 72:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 73:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 74:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @} 75:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 76:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 77:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private macro -------------------------------------------------------------*/ 78:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private variables ---------------------------------------------------------*/ 79:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Private function prototypes -----------------------------------------------*/ 80:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Exported functions --------------------------------------------------------*/ 81:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/cc3JIfda.s page 98 82:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions 83:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 84:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions 87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Extended IO operation functions 88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 89:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @verbatim 90:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** =============================================================================== 91:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ##### IO operation functions ##### 92:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** =============================================================================== 93:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** [..] This section provides functions allowing to: 94:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 95:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Perform the ADC self-calibration for single or differential ending. 96:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Get calibration factors for single or differential ending. 97:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Set calibration factors for single or differential ending. 98:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 99:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Start conversion of ADC group injected. 100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Stop conversion of ADC group injected. 101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Poll for conversion complete on ADC group injected. 102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Get result of ADC group injected channel conversion. 103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Start conversion of ADC group injected and enable interruptions. 104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Stop conversion of ADC group injected and disable interruptions. 105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) When multimode feature is available, start multimode and enable DMA transfer. 107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Stop multimode and disable ADC DMA transfer. 108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Get result of multimode conversion. 109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @endverbatim 111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Perform an ADC automatic self-calibration 116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Calibration prerequisite: ADC must be disabled (execute this 117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * function before HAL_ADC_Start() or after HAL_ADC_Stop() ). 118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param SingleDiff Selection of single-ended or differential input 120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This parameter can be one of the following values: 121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended 122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended 123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc, uint32_t SingleDiff) 126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 113 .loc 1 126 1 is_stmt 1 view -0 114 .cfi_startproc 115 @ args = 0, pretend = 0, frame = 8 116 @ frame_needed = 0, uses_anonymous_args = 0 117 .loc 1 126 1 is_stmt 0 view .LVU14 118 0000 30B5 push {r4, r5, lr} 119 .LCFI2: 120 .cfi_def_cfa_offset 12 121 .cfi_offset 4, -12 122 .cfi_offset 5, -8 123 .cfi_offset 14, -4 124 0002 83B0 sub sp, sp, #12 ARM GAS /tmp/cc3JIfda.s page 99 125 .LCFI3: 126 .cfi_def_cfa_offset 24 127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 127 .loc 1 127 3 is_stmt 1 view .LVU15 128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __IO uint32_t wait_loop_index = 0UL; 128 .loc 1 128 3 view .LVU16 129 .loc 1 128 17 is_stmt 0 view .LVU17 130 0004 0023 movs r3, #0 131 0006 0193 str r3, [sp, #4] 129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 132 .loc 1 131 3 is_stmt 1 view .LVU18 132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); 133 .loc 1 132 3 view .LVU19 133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 134 .loc 1 135 3 view .LVU20 135 .loc 1 135 3 view .LVU21 136 0008 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 137 000c 012B cmp r3, #1 138 000e 41D0 beq .L11 139 0010 0446 mov r4, r0 140 0012 0D46 mov r5, r1 141 .loc 1 135 3 discriminator 2 view .LVU22 142 0014 0123 movs r3, #1 143 0016 80F85830 strb r3, [r0, #88] 144 .loc 1 135 3 discriminator 2 view .LVU23 136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Calibration prerequisite: ADC must be disabled. */ 138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable the ADC (if not already disabled) */ 140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 145 .loc 1 140 3 discriminator 2 view .LVU24 146 .loc 1 140 20 is_stmt 0 discriminator 2 view .LVU25 147 001a FFF7FEFF bl ADC_Disable 148 .LVL8: 141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 149 .loc 1 143 3 is_stmt 1 discriminator 2 view .LVU26 150 .loc 1 143 6 is_stmt 0 discriminator 2 view .LVU27 151 001e 80BB cbnz r0, .L6 144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 152 .loc 1 146 5 is_stmt 1 view .LVU28 153 0020 E36D ldr r3, [r4, #92] 154 0022 23F48853 bic r3, r3, #4352 155 0026 23F00203 bic r3, r3, #2 156 002a 43F00203 orr r3, r3, #2 157 002e E365 str r3, [r4, #92] 147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL); 149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start ADC calibration in mode single-ended or differential */ ARM GAS /tmp/cc3JIfda.s page 100 151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_StartCalibration(hadc->Instance, SingleDiff); 158 .loc 1 151 5 view .LVU29 159 0030 2268 ldr r2, [r4] 160 .LVL9: 161 .LBB284: 162 .LBI284: 5342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get sampling time of the selected ADC channel 5345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Unit: ADC clock cycles. 5346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this device, sampling time is on channel scope: independently 5347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of channel mapped on ADC group regular or injected. 5348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Conversion time is the addition of sampling time and processing time. 5349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * On this STM32 series, ADC processing time is: 5350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 12.5 ADC clock cycles at ADC resolution 12 bits 5351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 10.5 ADC clock cycles at ADC resolution 10 bits 5352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 8.5 ADC clock cycles at ADC resolution 8 bits 5353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - 6.5 ADC clock cycles at ADC resolution 6 bits 5354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll SMPR1 SMP0 LL_ADC_GetChannelSamplingTime\n 5355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP1 LL_ADC_GetChannelSamplingTime\n 5356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP2 LL_ADC_GetChannelSamplingTime\n 5357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP3 LL_ADC_GetChannelSamplingTime\n 5358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP4 LL_ADC_GetChannelSamplingTime\n 5359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP5 LL_ADC_GetChannelSamplingTime\n 5360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP6 LL_ADC_GetChannelSamplingTime\n 5361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP7 LL_ADC_GetChannelSamplingTime\n 5362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP8 LL_ADC_GetChannelSamplingTime\n 5363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR1 SMP9 LL_ADC_GetChannelSamplingTime\n 5364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP10 LL_ADC_GetChannelSamplingTime\n 5365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP11 LL_ADC_GetChannelSamplingTime\n 5366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP12 LL_ADC_GetChannelSamplingTime\n 5367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP13 LL_ADC_GetChannelSamplingTime\n 5368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP14 LL_ADC_GetChannelSamplingTime\n 5369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP15 LL_ADC_GetChannelSamplingTime\n 5370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP16 LL_ADC_GetChannelSamplingTime\n 5371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP17 LL_ADC_GetChannelSamplingTime\n 5372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * SMPR2 SMP18 LL_ADC_GetChannelSamplingTime 5373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 5375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_0 5376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 (8) 5377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 (8) 5378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 (8) 5379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 (8) 5380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 (8) 5381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_16 5392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_17 ARM GAS /tmp/cc3JIfda.s page 101 5393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_18 5394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VREFINT (7) 5395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC1 (1) 5396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_TEMPSENSOR_ADC5 (5) 5397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VBAT (6) 5398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP1 (1) 5399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP2 (2) 5400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC2 (2) 5401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP3_ADC3 (3) 5402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP4 (5) 5403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP5 (5) 5404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_VOPAMP6 (4) 5405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (8) On STM32G4, fast channel allows: 2.5 (sampling) + 12.5 (conversion) = 15 ADC clock 5415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Other channels are slow channels allows: 6.5 (sampling) + 12.5 (conversion) = 19 A 5416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_2CYCLES_5 (1) 5418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_6CYCLES_5 5419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5 5420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_24CYCLES_5 5421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_47CYCLES_5 5422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_92CYCLES_5 5423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_247CYCLES_5 5424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SAMPLINGTIME_640CYCLES_5 5425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On some devices, ADC sampling time 2.5 ADC clock cycles 5427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can be replaced by 3.5 ADC clock cycles. 5428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to function @ref LL_ADC_SetSamplingTimeCommonConfig(). 5429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel) 5431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOF 5433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(*preg, 5435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_ 5436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_P 5437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set mode single-ended or differential input of the selected 5442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 5443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Channel ending is on channel scope: independently of channel mapped 5444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on ADC group regular or injected. 5445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * In differential mode: Differential measurement is carried out 5446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * between the selected channel 'i' (positive input) and 5447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel 'i+1' (negative input). Only channel 'i' has to be 5448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configured, channel 'i+1' is configured automatically. 5449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to Reference Manual to ensure the selected channel is ARM GAS /tmp/cc3JIfda.s page 102 5450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * available in differential mode. 5451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For example, internal channels (VrefInt, TempSensor, ...) are 5452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * not available in differential mode. 5453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode, 5454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the channel 'i+1' is not usable separately. 5455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some channels are internally fixed to single-ended inputs 5456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configuration: 5457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC1: Channels 12, 15, 16, 17 and 18 5458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC2: Channels 15, 17 and 18 5459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC3: Channels 12, 16, 17 and 18 (1) 5460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC4: Channels 16, 17 and 18 (1) 5461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC5: Channels 2, 3, 4, 16, 17 and 18 (1) 5462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) ADC3/4/5 are not available on all devices, refer to device datasheet 5463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 5464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For ADC channels configured in differential mode, both inputs 5465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * should be biased at (Vref+)/2 +/-200mV. 5466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (Vref+ is the analog voltage reference) 5467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 5470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. 5471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...) 5472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DIFSEL DIFSEL LL_ADC_SetChannelSingleDiff 5473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be one of the following values: 5475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 5476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 5477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 5478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 5479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 5480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be a combination of the following values: 5491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 5492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 5493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t Sing 5496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Bits for single or differential mode selection for each channel are set */ 5498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to 1 only when the differential mode is selected, and to 0 when the */ 5499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* single mode is selected. */ 5500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if (SingleDiff == LL_ADC_DIFFERENTIAL_ENDED) 5502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->DIFSEL, 5504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK); 5505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else ARM GAS /tmp/cc3JIfda.s page 103 5507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->DIFSEL, 5509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK); 5510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get mode single-ended or differential input of the selected 5515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC channel. 5516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode, 5517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the channel 'i+1' is not usable separately. 5518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Therefore, to ensure a channel is configured in single-ended mode, 5519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the configuration of channel itself and the channel 'i-1' must be 5520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * read back (to ensure that the selected channel channel has not been 5521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configured in differential mode by the previous channel). 5522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Refer to Reference Manual to ensure the selected channel is 5523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * available in differential mode. 5524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * For example, internal channels (VrefInt, TempSensor, ...) are 5525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * not available in differential mode. 5526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note When configuring a channel 'i' in differential mode, 5527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the channel 'i+1' is not usable separately. 5528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On STM32G4, some channels are internally fixed to single-ended inputs 5529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * configuration: 5530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC1: Channels 12, 15, 16, 17 and 18 5531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC2: Channels 15, 17 and 18 5532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC3: Channels 12, 16, 17 and 18 (1) 5533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC4: Channels 16, 17 and 18 (1) 5534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC5: Channels 2, 3, 4, 16, 17 and 18 (1) 5535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) ADC3/4/5 are not available on all devices, refer to device datasheet 5536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * for more details. 5537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note One or several values can be selected. In this case, the value 5538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * returned is null if all channels are in single ended-mode. 5539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...) 5540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DIFSEL DIFSEL LL_ADC_GetChannelSingleDiff 5541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Channel This parameter can be a combination of the following values: 5543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_1 5544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_2 5545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_3 5546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_4 5547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_5 5548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_6 5549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_7 5550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_8 5551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_9 5552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_10 5553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_11 5554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_12 5555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_13 5556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_14 5557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_CHANNEL_15 5558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: channel in single-ended mode, else: channel in differential mode 5559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel) 5561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->DIFSEL, (Channel & ADC_SINGLEDIFF_CHANNEL_MASK))); 5563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/cc3JIfda.s page 104 5564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 5567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_AnalogWatchdog Configuration of ADC transversal scope: an 5570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 5571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog monitored channels: 5575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a single channel, multiple channels or all channels, 5576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on ADC groups regular and-or injected. 5577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Once monitored channels are selected, analog watchdog 5578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled. 5579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of need to define a single channel to monitor 5580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with analog watchdog from sequencer channel definition, 5581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use helper macro @ref __LL_ADC_ANALOGWD_CHANNEL_GROUP(). 5582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 5583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 5584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 5585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 5586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 5587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 5588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 5589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 5590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 5591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 5592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 5593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 5594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 5595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 5596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 5597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 5598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 5599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 5600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 5601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 5602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 5603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 5606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 5607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AWD1CH LL_ADC_SetAnalogWDMonitChannels\n 5608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1SGL LL_ADC_SetAnalogWDMonitChannels\n 5609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1EN LL_ADC_SetAnalogWDMonitChannels\n 5610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JAWD1EN LL_ADC_SetAnalogWDMonitChannels\n 5611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD2CR AWD2CH LL_ADC_SetAnalogWDMonitChannels\n 5612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD3CR AWD3CH LL_ADC_SetAnalogWDMonitChannels 5613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 5615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 5616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 5617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 5618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDChannelGroup This parameter can be one of the following values: 5619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE 5620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0) ARM GAS /tmp/cc3JIfda.s page 105 5621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0) 5622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ 5623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0) 5624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0) 5625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ 5626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0) 5627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0) 5628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ 5629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0) 5630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0) 5631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ 5632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0) 5633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0) 5634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ 5635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0) 5636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0) 5637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ 5638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0) 5639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0) 5640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ 5641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0) 5642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0) 5643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ 5644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0) 5645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0) 5646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ 5647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0) 5648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0) 5649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ 5650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0) 5651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0) 5652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ 5653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0) 5654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0) 5655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ 5656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0) 5657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0) 5658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ 5659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0) 5660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0) 5661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ 5662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0) 5663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0) 5664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ 5665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0) 5666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0) 5667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ 5668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0) 5669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0) 5670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ 5671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0) 5672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0) 5673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ 5674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0) 5675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0) 5676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ 5677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0) ARM GAS /tmp/cc3JIfda.s page 106 5678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0) 5679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ 5680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG (0) 5681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_INJ (0) 5682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VREFINT_REG_INJ 5683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG (0)(1) 5684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_INJ (0)(1) 5685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC1_REG_INJ (1) 5686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG (0)(5) 5687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_INJ (0)(5) 5688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_ADC5_REG_INJ (5) 5689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG (0)(6) 5690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_INJ (0)(6) 5691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VBAT_REG_INJ (6) 5692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG (0)(1) 5693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_INJ (0)(1) 5694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP1_REG_INJ (1) 5695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG (0)(2) 5696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_INJ (0)(2) 5697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP2_REG_INJ (2) 5698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG (0)(2) 5699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_INJ (0)(2) 5700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC2_REG_INJ (2) 5701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG (0)(3) 5702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_INJ (0)(3) 5703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP3_ADC3_REG_INJ (3) 5704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG (0)(5) 5705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_INJ (0)(5) 5706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP4_REG_INJ (5) 5707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG (0)(5) 5708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_INJ (0)(5) 5709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP5_REG_INJ (5) 5710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG (0)(4) 5711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_INJ (0)(4) 5712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CH_VOPAMP6_REG_INJ (4) 5713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (0) On STM32G4, parameter available only on analog watchdog number: AWD1.\n 5715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On STM32G4, parameter available only on ADC instance: ADC1.\n 5716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) On STM32G4, parameter available only on ADC instance: ADC2.\n 5717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) On STM32G4, parameter available only on ADC instance: ADC3.\n 5718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (4) On STM32G4, parameter available only on ADC instance: ADC4.\n 5719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (5) On STM32G4, parameter available only on ADC instance: ADC5.\n 5720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (6) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC5.\n 5721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (7) On STM32G4, parameter available only on ADC instances: ADC1, ADC3, ADC4, ADC5.\n 5722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - On this STM32 series, all ADCx are not available on all devices. Refer to device da 5723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWD 5726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "AWDChannelGroup" with bits position */ 5728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* in register and register position depending on parameter "AWDy". */ 5729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "AWDChannelGroup" and "AWDy" are used with masks because */ 5730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 5731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, ((AWDy & ADC_AWD_CRX_REGOFFSET_MASK) >> AD 5732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** + ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) * ADC_AWD_C 5733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, ARM GAS /tmp/cc3JIfda.s page 107 5735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK), 5736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AWDChannelGroup & AWDy); 5737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC analog watchdog monitored channel. 5741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Usage of the returned channel number: 5742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To reinject this channel into another function LL_ADC_xxx: 5743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the returned channel number is only partly formatted on definition 5744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared 5745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with parts of literals LL_ADC_CHANNEL_x or using 5746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 5747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Then the selected literal LL_ADC_CHANNEL_x can be used 5748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * as parameter for another function. 5749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - To get the channel number in decimal format: 5750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * process the returned value with the helper macro 5751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB(). 5752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Applicable only when the analog watchdog is set to monitor 5753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * one channel. 5754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 5755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 5756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 5757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 5758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 5759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 5760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 5761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 5762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 5763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 5764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 5765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 5766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 5767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 5768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 5769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 5770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 5771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 5772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 5773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 5774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 5775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 5776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 5777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 5778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 5779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR AWD1CH LL_ADC_GetAnalogWDMonitChannels\n 5780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1SGL LL_ADC_GetAnalogWDMonitChannels\n 5781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR AWD1EN LL_ADC_GetAnalogWDMonitChannels\n 5782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR JAWD1EN LL_ADC_GetAnalogWDMonitChannels\n 5783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD2CR AWD2CH LL_ADC_GetAnalogWDMonitChannels\n 5784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * AWD3CR AWD3CH LL_ADC_GetAnalogWDMonitChannels 5785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 5787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 5788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 (1) 5789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 (1) 5790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) On this AWD number, monitored channel can be retrieved ARM GAS /tmp/cc3JIfda.s page 108 5792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * if only 1 channel is programmed (or none or all channels). 5793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This function cannot retrieve monitored channel if 5794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * multiple channels are programmed simultaneously 5795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * by bitfield. 5796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 5797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_DISABLE 5798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG (0) 5799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_INJ (0) 5800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG_INJ 5801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG (0) 5802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_INJ (0) 5803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_0_REG_INJ 5804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG (0) 5805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_INJ (0) 5806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_1_REG_INJ 5807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG (0) 5808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_INJ (0) 5809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_2_REG_INJ 5810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG (0) 5811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_INJ (0) 5812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_3_REG_INJ 5813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG (0) 5814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_INJ (0) 5815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_4_REG_INJ 5816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG (0) 5817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_INJ (0) 5818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_5_REG_INJ 5819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG (0) 5820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_INJ (0) 5821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_6_REG_INJ 5822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG (0) 5823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_INJ (0) 5824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_7_REG_INJ 5825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG (0) 5826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_INJ (0) 5827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_8_REG_INJ 5828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG (0) 5829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_INJ (0) 5830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_9_REG_INJ 5831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG (0) 5832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_INJ (0) 5833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_10_REG_INJ 5834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG (0) 5835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_INJ (0) 5836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_11_REG_INJ 5837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG (0) 5838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_INJ (0) 5839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_12_REG_INJ 5840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG (0) 5841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_INJ (0) 5842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_13_REG_INJ 5843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG (0) 5844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_INJ (0) 5845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_14_REG_INJ 5846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG (0) 5847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_INJ (0) 5848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_15_REG_INJ ARM GAS /tmp/cc3JIfda.s page 109 5849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG (0) 5850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_INJ (0) 5851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_16_REG_INJ 5852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG (0) 5853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_INJ (0) 5854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_17_REG_INJ 5855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG (0) 5856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_INJ (0) 5857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_CHANNEL_18_REG_INJ 5858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 5859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (0) On STM32G4, parameter available only on analog watchdog number: AWD1. 5860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDy) 5862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, ((AWDy & ADC_AWD_CRX_REGOFFSET_MASK) 5864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** + ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) * ADC 5865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t AnalogWDMonitChannels = (READ_BIT(*preg, AWDy) & ADC_AWD_CR_ALL_CHANNEL_MASK); 5867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* If "AnalogWDMonitChannels" == 0, then the selected AWD is disabled */ 5869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* (parameter value LL_ADC_AWD_DISABLE). */ 5870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Else, the selected AWD is enabled and is monitoring a group of channels */ 5871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* or a single channel. */ 5872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if (AnalogWDMonitChannels != 0UL) 5873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if (AWDy == LL_ADC_AWD1) 5875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if ((AnalogWDMonitChannels & ADC_CFGR_AWD1SGL) == 0UL) 5877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a group of channels */ 5879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AnalogWDMonitChannels = ((AnalogWDMonitChannels 5880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (ADC_AWD_CR23_CHANNEL_MASK) 5881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ) 5882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & (~(ADC_CFGR_AWD1CH)) 5883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else 5886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a single channel */ 5888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AnalogWDMonitChannels = (AnalogWDMonitChannels 5889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (ADC_AWD2CR_AWD2CH_0 << (AnalogWDMonitChannels >> ADC_CFGR_AWD1C 5890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else 5894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** if ((AnalogWDMonitChannels & ADC_AWD_CR23_CHANNEL_MASK) == ADC_AWD_CR23_CHANNEL_MASK) 5896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a group of channels */ 5898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AnalogWDMonitChannels = (ADC_AWD_CR23_CHANNEL_MASK 5899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | ((ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN)) 5900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** else 5903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a single channel */ 5905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* AWD monitoring a group of channels */ ARM GAS /tmp/cc3JIfda.s page 110 5906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AnalogWDMonitChannels = (AnalogWDMonitChannels 5907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (ADC_CFGR_JAWD1EN | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL) 5908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** | (__LL_ADC_CHANNEL_TO_DECIMAL_NB(AnalogWDMonitChannels) << ADC_CF 5909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 5910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return AnalogWDMonitChannels; 5915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog thresholds value of both thresholds 5919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * high and low. 5920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If value of only one threshold high or low must be set, 5921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_SetAnalogWDThresholds(). 5922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits, 5923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift. 5924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(). 5925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 5926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 5927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 5928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 5929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 5930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 5931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 5932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 5933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 5934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 5935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 5936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 5937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 5938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 5939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 5940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 5941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 5942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 5943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 5944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 5945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 5946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC oversampling is enabled, ADC analog watchdog thresholds are 5947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * impacted: the comparison of analog watchdog thresholds is done on 5948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * oversampling final computation (after ratio and shift application): 5949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC data register bitfield [15:4] (12 most significant bits). 5950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_ConfigAnalogWDThresholds\n 5951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 HT2 LL_ADC_ConfigAnalogWDThresholds\n 5952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 HT3 LL_ADC_ConfigAnalogWDThresholds\n 5953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR1 LT1 LL_ADC_ConfigAnalogWDThresholds\n 5954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 LT2 LL_ADC_ConfigAnalogWDThresholds\n 5955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 LT3 LL_ADC_ConfigAnalogWDThresholds 5956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 5957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 5958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 5959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 5960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 5961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdHighValue Value between Min_Data=0x000 and Max_Data=0xFFF 5962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdLowValue Value between Min_Data=0x000 and Max_Data=0xFFF ARM GAS /tmp/cc3JIfda.s page 111 5963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 5964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 5965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ConfigAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWD 5966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t AWDThresholdLowValue) 5967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "AWDThresholdxxxValue" with bits */ 5969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* position in register and register position depending on parameter */ 5970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "AWDy". */ 5971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "AWDy" and "AWDThresholdxxxValue" are used with masks because */ 5972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 5973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC 5974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 5976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_TR1_HT1 | ADC_TR1_LT1, 5977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDThresholdHighValue << ADC_TR1_HT1_BITOFFSET_POS) | AWDThresholdLowValue); 5978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 5980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 5981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog threshold value of threshold 5982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * high or low. 5983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If values of both thresholds high or low must be set, 5984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * use function @ref LL_ADC_ConfigAnalogWDThresholds(). 5985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits, 5986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift. 5987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(). 5988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, there are 2 kinds of analog watchdog 5989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * instance: 5990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD standard (instance AWD1): 5991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: can monitor 1 channel or all channels. 5992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: ADC groups regular and-or injected. 5993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is not limited (corresponds to 5994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution configured). 5995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - AWD flexible (instances AWD2, AWD3): 5996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - channels monitored: flexible on channels monitored, selection is 5997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * channel wise, from from 1 to all channels. 5998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specificity of this analog watchdog: Multiple channels can 5999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * be selected. For example: 6000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (LL_ADC_AWD_CHANNEL4_REG_INJ | LL_ADC_AWD_CHANNEL5_REG_INJ | ...) 6001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - groups monitored: not selection possible (monitoring on both 6002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * groups regular and injected). 6003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Channels selected are monitored on groups regular and injected: 6004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG_INJ (do not use parameters 6005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * LL_ADC_AWD_CHANNELxx_REG and LL_ADC_AWD_CHANNELxx_INJ) 6006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - resolution: resolution is limited to 8 bits: if ADC resolution is 6007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 12 bits the 4 LSB are ignored, if ADC resolution is 10 bits 6008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the 2 LSB are ignored. 6009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC oversampling is enabled, ADC analog watchdog thresholds are 6010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * impacted: the comparison of analog watchdog thresholds is done on 6011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * oversampling final computation (after ratio and shift application): 6012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC data register bitfield [15:4] (12 most significant bits). 6013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is not conditioned to 6014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC can be disabled, enabled with or without conversion on going 6016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either ADC groups regular or injected. 6017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_SetAnalogWDThresholds\n 6018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 HT2 LL_ADC_SetAnalogWDThresholds\n 6019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 HT3 LL_ADC_SetAnalogWDThresholds\n ARM GAS /tmp/cc3JIfda.s page 112 6020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR1 LT1 LL_ADC_SetAnalogWDThresholds\n 6021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 LT2 LL_ADC_SetAnalogWDThresholds\n 6022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 LT3 LL_ADC_SetAnalogWDThresholds 6023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 6027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 6028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdsHighLow This parameter can be one of the following values: 6029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_HIGH 6030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_LOW 6031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdValue Value between Min_Data=0x000 and Max_Data=0xFFF 6032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AWDThr 6035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** uint32_t AWDThresholdValue) 6036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Set bits with content of parameter "AWDThresholdValue" with bits */ 6038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* position in register and register position depending on parameters */ 6039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* "AWDThresholdsHighLow" and "AWDy". */ 6040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Parameters "AWDy" and "AWDThresholdValue" are used with masks because */ 6041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* containing other bits reserved for other purpose. */ 6042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, 6043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_AWD_TRX_RE 6044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(*preg, 6046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AWDThresholdsHighLow, 6047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** AWDThresholdValue << ((AWDThresholdsHighLow & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TR 6048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC analog watchdog threshold value of threshold high, 6052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * threshold low or raw data with ADC thresholds high and low 6053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * concatenated. 6054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If raw data with ADC thresholds high and low is retrieved, 6055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the data of each threshold high or low can be isolated 6056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using helper macro: 6057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(). 6058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC resolution different of 12 bits, 6059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog thresholds data require a specific shift. 6060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Use helper macro @ref __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(). 6061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 HT1 LL_ADC_GetAnalogWDThresholds\n 6062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 HT2 LL_ADC_GetAnalogWDThresholds\n 6063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 HT3 LL_ADC_GetAnalogWDThresholds\n 6064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR1 LT1 LL_ADC_GetAnalogWDThresholds\n 6065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR2 LT2 LL_ADC_GetAnalogWDThresholds\n 6066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * TR3 LT3 LL_ADC_GetAnalogWDThresholds 6067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD2 6071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD3 6072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDThresholdsHighLow This parameter can be one of the following values: 6073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_HIGH 6074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLD_LOW 6075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_THRESHOLDS_HIGH_LOW 6076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF ARM GAS /tmp/cc3JIfda.s page 113 6077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t AW 6079:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6080:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, 6081:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ((AWDy & ADC_AWD_TRX_REGOFFSET_MASK) >> ADC_AWD_ 6082:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6083:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(*preg, 6084:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (AWDThresholdsHighLow | ADC_TR1_LT1)) 6085:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (((AWDThresholdsHighLow & ADC_AWD_TRX_BIT_HIGH_MASK) >> ADC_AWD_TRX_BIT_HIGH 6086:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** & ~(AWDThresholdsHighLow & ADC_TR1_LT1))); 6087:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6088:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6089:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6090:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC analog watchdog filtering configuration 6091:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6092:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6093:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6094:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6095:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this feature is only available on first 6096:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog (AWD1) 6097:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 AWDFILT LL_ADC_SetAWDFilteringConfiguration 6098:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6099:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6100:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6101:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param FilteringConfig This parameter can be one of the following values: 6102:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_NONE 6103:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_2SAMPLES 6104:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_3SAMPLES 6105:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_4SAMPLES 6106:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_5SAMPLES 6107:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_6SAMPLES 6108:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_7SAMPLES 6109:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_8SAMPLES 6110:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6111:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6112:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAWDFilteringConfiguration(ADC_TypeDef *ADCx, uint32_t AWDy, uint32_t 6113:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6114:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Prevent unused argument(s) compilation warning */ 6115:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (void)(AWDy); 6116:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->TR1, ADC_TR1_AWDFILT, FilteringConfig); 6117:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6118:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6119:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6120:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC analog watchdog filtering configuration 6121:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this feature is only available on first 6122:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * analog watchdog (AWD1) 6123:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll TR1 AWDFILT LL_ADC_GetAWDFilteringConfiguration 6124:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6125:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param AWDy This parameter can be one of the following values: 6126:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD1 6127:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be: 6128:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_NONE 6129:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_2SAMPLES 6130:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_3SAMPLES 6131:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_4SAMPLES 6132:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_5SAMPLES 6133:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_6SAMPLES ARM GAS /tmp/cc3JIfda.s page 114 6134:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_7SAMPLES 6135:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_AWD_FILTERING_8SAMPLES 6136:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6137:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAWDFilteringConfiguration(ADC_TypeDef *ADCx, uint32_t AWDy) 6138:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6139:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Prevent unused argument(s) compilation warning */ 6140:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (void)(AWDy); 6141:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->TR1, ADC_TR1_AWDFILT)); 6142:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6143:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6144:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6145:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 6146:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6147:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6148:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_oversampling Configuration of ADC transversal scope: over 6149:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 6150:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6151:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6152:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6153:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC oversampling scope: ADC groups regular and-or injected 6154:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (availability of ADC group injected depends on STM32 families). 6155:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If both groups regular and injected are selected, 6156:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * specify behavior of ADC group injected interrupting 6157:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * group regular: when ADC group injected is triggered, 6158:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the oversampling on ADC group regular is either 6159:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temporary stopped and continued, or resumed from start 6160:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (oversampler buffer reset). 6161:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6162:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6163:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6164:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6165:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 ROVSE LL_ADC_SetOverSamplingScope\n 6166:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 JOVSE LL_ADC_SetOverSamplingScope\n 6167:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 ROVSM LL_ADC_SetOverSamplingScope 6168:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6169:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OvsScope This parameter can be one of the following values: 6170:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_DISABLE 6171:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED 6172:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_RESUMED 6173:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJECTED 6174:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJ_REG_RESUMED 6175:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6176:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6177:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOverSamplingScope(ADC_TypeDef *ADCx, uint32_t OvsScope) 6178:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6179:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSM, OvsScope); 6180:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6181:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6182:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6183:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling scope: ADC groups regular and-or injected 6184:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (availability of ADC group injected depends on STM32 families). 6185:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If both groups regular and injected are selected, 6186:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * specify behavior of ADC group injected interrupting 6187:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * group regular: when ADC group injected is triggered, 6188:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the oversampling on ADC group regular is either 6189:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * temporary stopped and continued, or resumed from start 6190:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (oversampler buffer reset). ARM GAS /tmp/cc3JIfda.s page 115 6191:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 ROVSE LL_ADC_GetOverSamplingScope\n 6192:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 JOVSE LL_ADC_GetOverSamplingScope\n 6193:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 ROVSM LL_ADC_GetOverSamplingScope 6194:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6195:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6196:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_DISABLE 6197:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED 6198:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_REGULAR_RESUMED 6199:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJECTED 6200:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_GRP_INJ_REG_RESUMED 6201:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6202:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingScope(ADC_TypeDef *ADCx) 6203:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6204:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSM)); 6205:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6206:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6207:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6208:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC oversampling discontinuous mode (triggered mode) 6209:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on the selected ADC group. 6210:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Number of oversampled conversions are done either in: 6211:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode (all conversions of oversampling ratio 6212:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are done from 1 trigger) 6213:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - discontinuous mode (each conversion of oversampling ratio 6214:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * needs a trigger) 6215:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6216:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6217:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6218:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on group regular. 6219:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, oversampling discontinuous mode 6220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (triggered mode) can be used only when oversampling is 6221:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * set on group regular only and in resumed mode. 6222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 TROVS LL_ADC_SetOverSamplingDiscont 6223:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param OverSamplingDiscont This parameter can be one of the following values: 6225:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_CONT 6226:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_DISCONT 6227:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6228:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6229:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOverSamplingDiscont(ADC_TypeDef *ADCx, uint32_t OverSamplingDiscont) 6230:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6231:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_TROVS, OverSamplingDiscont); 6232:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6233:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6234:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6235:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling discontinuous mode (triggered mode) 6236:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on the selected ADC group. 6237:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note Number of oversampled conversions are done either in: 6238:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - continuous mode (all conversions of oversampling ratio 6239:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are done from 1 trigger) 6240:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - discontinuous mode (each conversion of oversampling ratio 6241:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * needs a trigger) 6242:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 TROVS LL_ADC_GetOverSamplingDiscont 6243:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6244:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6245:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_CONT 6246:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_REG_DISCONT 6247:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ ARM GAS /tmp/cc3JIfda.s page 116 6248:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingDiscont(ADC_TypeDef *ADCx) 6249:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6250:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_TROVS)); 6251:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6252:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6253:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6254:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC oversampling 6255:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (impacting both ADC groups regular and injected) 6256:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function set the 2 items of oversampling configuration: 6257:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ratio 6258:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - shift 6259:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6260:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6261:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be disabled or enabled without conversion on going 6262:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6263:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 OVSS LL_ADC_ConfigOverSamplingRatioShift\n 6264:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CFGR2 OVSR LL_ADC_ConfigOverSamplingRatioShift 6265:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6266:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Ratio This parameter can be one of the following values: 6267:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_2 6268:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_4 6269:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_8 6270:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_16 6271:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_32 6272:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_64 6273:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_128 6274:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_256 6275:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Shift This parameter can be one of the following values: 6276:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_NONE 6277:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1 6278:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2 6279:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3 6280:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4 6281:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5 6282:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6 6283:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7 6284:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8 6285:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6286:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6287:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint32_t Ratio, uint32_ 6288:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6289:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS | ADC_CFGR2_OVSR), (Shift | Ratio)); 6290:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6291:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6292:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6293:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling ratio 6294:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (impacting both ADC groups regular and injected) 6295:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 OVSR LL_ADC_GetOverSamplingRatio 6296:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6297:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Ratio This parameter can be one of the following values: 6298:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_2 6299:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_4 6300:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_8 6301:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_16 6302:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_32 6303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_64 6304:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_128 ARM GAS /tmp/cc3JIfda.s page 117 6305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_RATIO_256 6306:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingRatio(ADC_TypeDef *ADCx) 6308:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6309:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR)); 6310:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6311:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6312:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6313:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC oversampling shift 6314:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (impacting both ADC groups regular and injected) 6315:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 OVSS LL_ADC_GetOverSamplingShift 6316:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6317:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Shift This parameter can be one of the following values: 6318:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_NONE 6319:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1 6320:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2 6321:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3 6322:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4 6323:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5 6324:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6 6325:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7 6326:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8 6327:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6328:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingShift(ADC_TypeDef *ADCx) 6329:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6330:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS)); 6331:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6332:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6333:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6334:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 6335:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6336:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6337:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Multimode Configuration of ADC hierarchical scope: multim 6338:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 6339:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6340:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6341:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 6342:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6343:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC multimode configuration to operate in independent mode 6344:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or multimode (for devices with several ADC instances). 6345:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If multimode configuration: the selected ADC instance is 6346:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * either master or slave depending on hardware. 6347:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual. 6348:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6349:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6350:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 6351:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each 6352:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance or by using helper macro 6353:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(). 6354:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DUAL LL_ADC_SetMultimode 6355:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6356:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6357:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param Multimode This parameter can be one of the following values: 6358:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_INDEPENDENT 6359:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIMULT 6360:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INTERL 6361:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_SIMULT ARM GAS /tmp/cc3JIfda.s page 118 6362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_ALTERN 6363:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM 6364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT 6365:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM 6366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6367:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6368:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultimode(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Multimode) 6369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6370:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DUAL, Multimode); 6371:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6372:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6373:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6374:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode configuration to operate in independent mode 6375:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or multimode (for devices with several ADC instances). 6376:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If multimode configuration: the selected ADC instance is 6377:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * either master or slave depending on hardware. 6378:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to reference manual. 6379:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DUAL LL_ADC_GetMultimode 6380:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6381:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6382:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6383:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_INDEPENDENT 6384:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIMULT 6385:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INTERL 6386:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_SIMULT 6387:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_INJ_ALTERN 6388:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM 6389:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT 6390:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM 6391:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultimode(ADC_Common_TypeDef *ADCxy_COMMON) 6393:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DUAL)); 6395:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6396:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6397:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6398:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC multimode conversion data transfer: no transfer 6399:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or transfer by DMA. 6400:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC multimode transfer by DMA is not selected: 6401:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * each ADC uses its own DMA channel, with its individual 6402:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * DMA transfer settings. 6403:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: 6404:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * One DMA channel is used for both ADC (DMA of ADC master) 6405:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specifies the DMA requests mode: 6406:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 6407:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 6408:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 6409:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 6410:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 6411:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 6412:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 6413:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 6414:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 6415:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 6416:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 6417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 6418:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). ARM GAS /tmp/cc3JIfda.s page 119 6419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note How to retrieve multimode conversion data: 6420:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Whatever multimode transfer by DMA setting: using function 6421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref LL_ADC_REG_ReadMultiConversionData32(). 6422:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: conversion data 6423:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is a raw data with ADC master and slave concatenated. 6424:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * A macro is available to get the conversion data of 6425:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC master or ADC slave: see helper macro 6426:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(). 6427:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6428:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6429:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled 6430:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or enabled without conversion on going on group regular. 6431:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR MDMA LL_ADC_SetMultiDMATransfer\n 6432:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR DMACFG LL_ADC_SetMultiDMATransfer 6433:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6434:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6435:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param MultiDMATransfer This parameter can be one of the following values: 6436:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC 6437:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B 6438:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B 6439:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B 6440:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B 6441:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6442:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6443:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultiDMATransfer(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t MultiDMA 6444:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6445:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG, MultiDMATransfer); 6446:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6447:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6448:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6449:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode conversion data transfer: no transfer 6450:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or transfer by DMA. 6451:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC multimode transfer by DMA is not selected: 6452:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * each ADC uses its own DMA channel, with its individual 6453:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * DMA transfer settings. 6454:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: 6455:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * One DMA channel is used for both ADC (DMA of ADC master) 6456:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Specifies the DMA requests mode: 6457:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Limited mode (One shot mode): DMA transfer requests are stopped 6458:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when number of DMA data transfers (number of 6459:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions) is reached. 6460:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode non-circular. 6461:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - Unlimited mode: DMA transfer requests are unlimited, 6462:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * whatever number of DMA data transfers (number of 6463:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions). 6464:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This ADC mode is intended to be used with DMA mode circular. 6465:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If ADC DMA requests mode is set to unlimited and DMA is set to 6466:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * mode non-circular: 6467:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * when DMA transfers size will be reached, DMA will stop transfers of 6468:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversions data ADC will raise an overrun error 6469:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (overrun flag and interruption if enabled). 6470:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note How to retrieve multimode conversion data: 6471:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Whatever multimode transfer by DMA setting: using function 6472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref LL_ADC_REG_ReadMultiConversionData32(). 6473:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * If ADC multimode transfer by DMA is selected: conversion data 6474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is a raw data with ADC master and slave concatenated. 6475:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * A macro is available to get the conversion data of ARM GAS /tmp/cc3JIfda.s page 120 6476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC master or ADC slave: see helper macro 6477:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(). 6478:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR MDMA LL_ADC_GetMultiDMATransfer\n 6479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CCR DMACFG LL_ADC_GetMultiDMATransfer 6480:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6481:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6482:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6483:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC 6484:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES12_10B 6485:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_LIMIT_RES8_6B 6486:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES12_10B 6487:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_REG_DMA_UNLMT_RES8_6B 6488:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6489:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultiDMATransfer(ADC_Common_TypeDef *ADCxy_COMMON) 6490:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6491:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG)); 6492:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6493:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6494:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Set ADC multimode delay between 2 sampling phases. 6496:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note The sampling delay range depends on ADC resolution: 6497:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 12 bits can have maximum delay of 12 cycles. 6498:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 10 bits can have maximum delay of 10 cycles. 6499:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 8 bits can have maximum delay of 8 cycles. 6500:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - ADC resolution 6 bits can have maximum delay of 6 cycles. 6501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6502:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * All ADC instances of the ADC common group must be disabled. 6504:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * This check can be done with function @ref LL_ADC_IsEnabled() for each 6505:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC instance or by using helper macro helper macro 6506:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(). 6507:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DELAY LL_ADC_SetMultiTwoSamplingDelay 6508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6509:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6510:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param MultiTwoSamplingDelay This parameter can be one of the following values: 6511:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE 6512:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES 6513:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES 6514:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES 6515:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES 6516:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (1) 6517:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES (1) 6518:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (2) 6519:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (2) 6520:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (2) 6521:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (3) 6522:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (3) 6523:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6524:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) Parameter available only if ADC resolution is 12, 10 or 8 bits.\n 6525:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) Parameter available only if ADC resolution is 12 or 10 bits.\n 6526:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) Parameter available only if ADC resolution is 12 bits. 6527:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6528:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6529:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetMultiTwoSamplingDelay(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Mul 6530:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6531:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_DELAY, MultiTwoSamplingDelay); 6532:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/cc3JIfda.s page 121 6533:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6535:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode delay between 2 sampling phases. 6536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CCR DELAY LL_ADC_GetMultiTwoSamplingDelay 6537:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6538:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6539:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Returned value can be one of the following values: 6540:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE 6541:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES 6542:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES 6543:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES 6544:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES 6545:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (1) 6546:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES (1) 6547:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (2) 6548:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (2) 6549:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES (2) 6550:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES (3) 6551:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES (3) 6552:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * 6553:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (1) Parameter available only if ADC resolution is 12, 10 or 8 bits.\n 6554:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (2) Parameter available only if ADC resolution is 12 or 10 bits.\n 6555:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (3) Parameter available only if ADC resolution is 12 bits. 6556:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6557:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetMultiTwoSamplingDelay(ADC_Common_TypeDef *ADCxy_COMMON) 6558:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6559:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DELAY)); 6560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6561:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 6562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6564:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 6565:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6566:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Instance Operation on ADC hierarchical scope: ADC instance 6567:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 6568:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6569:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6570:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6571:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Put ADC instance in deep power down state. 6572:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC calibration necessary: When ADC is in deep-power-down 6573:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * state, the internal analog calibration is lost. After exiting from 6574:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * deep power down, calibration must be relaunched or calibration factor 6575:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (preliminarily saved) must be set back into calibration register. 6576:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6577:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6578:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6579:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_EnableDeepPowerDown 6580:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6581:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6582:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableDeepPowerDown(ADC_TypeDef *ADCx) 6584:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6585:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6586:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6587:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6589:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, ARM GAS /tmp/cc3JIfda.s page 122 6590:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_DEEPPWD); 6591:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6592:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6593:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6594:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable ADC deep power down mode. 6595:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note In case of ADC calibration necessary: When ADC is in deep-power-down 6596:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * state, the internal analog calibration is lost. After exiting from 6597:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * deep power down, calibration must be relaunched or calibration factor 6598:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (preliminarily saved) must be set back into calibration register. 6599:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6600:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6601:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6602:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_DisableDeepPowerDown 6603:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6604:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6605:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6606:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableDeepPowerDown(ADC_TypeDef *ADCx) 6607:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6608:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6609:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6610:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6611:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->CR, (ADC_CR_DEEPPWD | ADC_CR_BITS_PROPERTY_RS)); 6612:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6613:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6614:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6615:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance deep power down state. 6616:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR DEEPPWD LL_ADC_IsDeepPowerDownEnabled 6617:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6618:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: deep power down is disabled, 1: deep power down is enabled. 6619:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6620:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsDeepPowerDownEnabled(ADC_TypeDef *ADCx) 6621:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6622:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_DEEPPWD) == (ADC_CR_DEEPPWD)) ? 1UL : 0UL); 6623:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6624:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6625:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6626:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable ADC instance internal voltage regulator. 6627:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, after ADC internal voltage regulator enable, 6628:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a delay for ADC internal voltage regulator stabilization 6629:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is required before performing a ADC calibration or ADC enable. 6630:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet, parameter tADCVREG_STUP. 6631:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_INTERNAL_REGUL_STAB_US. 6632:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6633:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6634:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6635:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_EnableInternalRegulator 6636:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6637:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6638:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6639:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx) 6640:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6641:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6642:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6643:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6644:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6645:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6646:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADVREGEN); ARM GAS /tmp/cc3JIfda.s page 123 6647:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6648:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6649:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6650:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable ADC internal voltage regulator. 6651:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6652:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6653:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6654:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_DisableInternalRegulator 6655:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6656:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6657:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableInternalRegulator(ADC_TypeDef *ADCx) 6659:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->CR, (ADC_CR_ADVREGEN | ADC_CR_BITS_PROPERTY_RS)); 6661:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6662:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6663:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6664:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance internal voltage regulator state. 6665:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADVREGEN LL_ADC_IsInternalRegulatorEnabled 6666:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6667:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: internal regulator is disabled, 1: internal regulator is enabled. 6668:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6669:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(ADC_TypeDef *ADCx) 6670:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6671:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN)) ? 1UL : 0UL); 6672:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6673:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6674:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6675:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Enable the selected ADC instance. 6676:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, after ADC enable, a delay for 6677:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC internal analog stabilization is required before performing a 6678:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC conversion start. 6679:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to device datasheet, parameter tSTAB. 6680:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC 6681:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled and when conversion clock is active. 6682:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (not only core clock: this ADC has a dual clock domain) 6683:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6684:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6685:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled and ADC internal voltage regulator enabled. 6686:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADEN LL_ADC_Enable 6687:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6688:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6689:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6690:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx) 6691:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6692:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6693:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6694:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6695:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6696:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6697:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADEN); 6698:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6699:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6700:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6701:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Disable the selected ADC instance. 6702:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6703:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: ARM GAS /tmp/cc3JIfda.s page 124 6704:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be not disabled. Must be enabled without conversion on going 6705:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * on either groups regular or injected. 6706:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADDIS LL_ADC_Disable 6707:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6708:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6709:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6710:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx) 6711:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6712:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6713:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6714:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6715:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6716:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6717:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADDIS); 6718:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6719:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6720:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6721:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance enable state. 6722:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, flag LL_ADC_FLAG_ADRDY is raised when the ADC 6723:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * is enabled and when conversion clock is active. 6724:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (not only core clock: this ADC has a dual clock domain) 6725:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADEN LL_ADC_IsEnabled 6726:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6727:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: ADC is disabled, 1: ADC is enabled. 6728:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx) 6730:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN)) ? 1UL : 0UL); 6732:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6733:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6734:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6735:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get the selected ADC instance disable state. 6736:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADDIS LL_ADC_IsDisableOngoing 6737:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6738:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no ADC disable command on going. 6739:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6740:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx) 6741:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6742:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS)) ? 1UL : 0UL); 6743:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6744:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6745:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6746:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC calibration in the mode single-ended 6747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or differential (for devices with differential mode available). 6748:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, a minimum number of ADC clock cycles 6749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * are required between ADC end of calibration and ADC enable. 6750:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Refer to literal @ref LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES. 6751:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with differential mode available: 6752:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * Calibration of offset is specific to each of 6753:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * single-ended and differential modes 6754:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (calibration run must be performed for each of these 6755:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * differential modes, if used afterwards and if the application 6756:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * requires their calibration). 6757:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6758:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6759:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be ADC disabled. 6760:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADCAL LL_ADC_StartCalibration\n ARM GAS /tmp/cc3JIfda.s page 125 6761:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CR ADCALDIF LL_ADC_StartCalibration 6762:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6763:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param SingleDiff This parameter can be one of the following values: 6764:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_SINGLE_ENDED 6765:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_DIFFERENTIAL_ENDED 6766:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6767:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6768:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_StartCalibration(ADC_TypeDef *ADCx, uint32_t SingleDiff) 163 .loc 2 6768 22 view .LVU30 164 .LBB285: 6769:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6770:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6771:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6772:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6773:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 165 .loc 2 6773 3 view .LVU31 166 0032 9368 ldr r3, [r2, #8] 167 0034 23F04043 bic r3, r3, #-1073741824 168 0038 23F03F03 bic r3, r3, #63 169 003c 05F08045 and r5, r5, #1073741824 170 .LVL10: 171 .loc 2 6773 3 is_stmt 0 view .LVU32 172 0040 2B43 orrs r3, r3, r5 173 0042 43F00043 orr r3, r3, #-2147483648 174 0046 9360 str r3, [r2, #8] 175 .LVL11: 176 .L7: 177 .loc 2 6773 3 view .LVU33 178 .LBE285: 179 .LBE284: 152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Wait for calibration completion */ 154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL) 180 .loc 1 154 56 is_stmt 1 view .LVU34 181 .loc 1 154 12 is_stmt 0 view .LVU35 182 0048 2368 ldr r3, [r4] 183 .LVL12: 184 .LBB286: 185 .LBI286: 6774:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADCALDIF | ADC_CR_BITS_PROPERTY_RS, 6775:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADCAL | (SingleDiff & ADC_SINGLEDIFF_CALIB_START_MASK)); 6776:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6777:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6778:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6779:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC calibration state. 6780:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADCAL LL_ADC_IsCalibrationOnGoing 6781:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6782:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: calibration complete, 1: calibration in progress. 6783:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6784:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsCalibrationOnGoing(ADC_TypeDef *ADCx) 186 .loc 2 6784 26 is_stmt 1 view .LVU36 187 .LBB287: 6785:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6786:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL)) ? 1UL : 0UL); 188 .loc 2 6786 3 view .LVU37 189 .loc 2 6786 12 is_stmt 0 view .LVU38 190 004a 9B68 ldr r3, [r3, #8] ARM GAS /tmp/cc3JIfda.s page 126 191 .LVL13: 192 .loc 2 6786 70 view .LVU39 193 004c 002B cmp r3, #0 194 004e 06DB blt .L13 195 .LVL14: 196 .loc 2 6786 70 view .LVU40 197 .LBE287: 198 .LBE286: 155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** wait_loop_index++; 157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT) 158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, 162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_ERROR_INTERNAL); 163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 199 .loc 1 172 5 is_stmt 1 view .LVU41 200 0050 E36D ldr r3, [r4, #92] 201 0052 23F00303 bic r3, r3, #3 202 0056 43F00103 orr r3, r3, #1 203 005a E365 str r3, [r4, #92] 204 005c 15E0 b .L10 205 .LVL15: 206 .L13: 156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT) 207 .loc 1 156 7 view .LVU42 156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT) 208 .loc 1 156 22 is_stmt 0 view .LVU43 209 005e 019B ldr r3, [sp, #4] 210 0060 0133 adds r3, r3, #1 211 0062 0193 str r3, [sp, #4] 157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 212 .loc 1 157 7 is_stmt 1 view .LVU44 157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 213 .loc 1 157 27 is_stmt 0 view .LVU45 214 0064 019A ldr r2, [sp, #4] 157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 215 .loc 1 157 10 view .LVU46 216 0066 0C4B ldr r3, .L14 217 0068 9A42 cmp r2, r3 218 006a EDD9 bls .L7 160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, 219 .loc 1 160 9 is_stmt 1 view .LVU47 220 006c E36D ldr r3, [r4, #92] 221 006e 23F01203 bic r3, r3, #18 222 0072 43F01003 orr r3, r3, #16 223 0076 E365 str r3, [r4, #92] ARM GAS /tmp/cc3JIfda.s page 127 165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 224 .loc 1 165 9 view .LVU48 165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 225 .loc 1 165 9 view .LVU49 226 0078 0023 movs r3, #0 227 007a 84F85830 strb r3, [r4, #88] 165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 228 .loc 1 165 9 view .LVU50 167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 229 .loc 1 167 9 view .LVU51 167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 230 .loc 1 167 16 is_stmt 0 view .LVU52 231 007e 0120 movs r0, #1 232 .LVL16: 167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 233 .loc 1 167 16 view .LVU53 234 0080 06E0 b .L5 235 .LVL17: 236 .L6: 173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, 174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 237 .loc 1 178 5 is_stmt 1 view .LVU54 238 0082 E36D ldr r3, [r4, #92] 239 0084 43F01003 orr r3, r3, #16 240 0088 E365 str r3, [r4, #92] 241 .LVL18: 242 .L10: 179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: No need to update variable "tmp_hal_status" here: already set */ 181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* to state "HAL_ERROR" by function disabling the ADC. */ 182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 243 .loc 1 185 3 view .LVU55 244 .loc 1 185 3 view .LVU56 245 008a 0023 movs r3, #0 246 008c 84F85830 strb r3, [r4, #88] 247 .loc 1 185 3 view .LVU57 186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 248 .loc 1 188 3 view .LVU58 249 .LVL19: 250 .L5: 189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 251 .loc 1 189 1 is_stmt 0 view .LVU59 252 0090 03B0 add sp, sp, #12 253 .LCFI4: 254 .cfi_remember_state 255 .cfi_def_cfa_offset 12 256 @ sp needed 257 0092 30BD pop {r4, r5, pc} ARM GAS /tmp/cc3JIfda.s page 128 258 .LVL20: 259 .L11: 260 .LCFI5: 261 .cfi_restore_state 135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 262 .loc 1 135 3 view .LVU60 263 0094 0220 movs r0, #2 264 .LVL21: 135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 265 .loc 1 135 3 view .LVU61 266 0096 FBE7 b .L5 267 .L15: 268 .align 2 269 .L14: 270 0098 01DE0400 .word 318977 271 .cfi_endproc 272 .LFE329: 274 .section .text.HAL_ADCEx_Calibration_GetValue,"ax",%progbits 275 .align 1 276 .global HAL_ADCEx_Calibration_GetValue 277 .syntax unified 278 .thumb 279 .thumb_func 281 HAL_ADCEx_Calibration_GetValue: 282 .LVL22: 283 .LFB330: 190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Get the calibration factor. 193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle. 194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param SingleDiff This parameter can be only: 195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended 196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended 197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval Calibration value. 198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff) 200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 284 .loc 1 200 1 is_stmt 1 view -0 285 .cfi_startproc 286 @ args = 0, pretend = 0, frame = 0 287 @ frame_needed = 0, uses_anonymous_args = 0 288 @ link register save eliminated. 201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 289 .loc 1 202 3 view .LVU63 203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); 290 .loc 1 203 3 view .LVU64 204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return the selected ADC calibration value */ 206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return LL_ADC_GetCalibrationFactor(hadc->Instance, SingleDiff); 291 .loc 1 206 3 view .LVU65 292 .loc 1 206 10 is_stmt 0 view .LVU66 293 0000 0368 ldr r3, [r0] 294 .LVL23: 295 .LBB288: 296 .LBI288: 2944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/cc3JIfda.s page 129 297 .loc 2 2944 26 is_stmt 1 view .LVU67 298 .LBB289: 2950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) >> ((SingleDiff & ADC 299 .loc 2 2950 3 view .LVU68 2950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) >> ((SingleDiff & ADC 300 .loc 2 2950 21 is_stmt 0 view .LVU69 301 0002 D3F8B400 ldr r0, [r3, #180] 302 .LVL24: 2950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** (SingleDiff & ADC_SINGLEDIFF_CALIB_FACTOR_MASK)) >> ((SingleDiff & ADC 303 .loc 2 2950 21 view .LVU70 304 0006 0840 ands r0, r0, r1 305 0008 00F07F10 and r0, r0, #8323199 2951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SINGLEDIFF_CA 306 .loc 2 2951 132 view .LVU71 307 000c 090B lsrs r1, r1, #12 308 .LVL25: 2951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SINGLEDIFF_CA 309 .loc 2 2951 132 view .LVU72 310 000e 01F01001 and r1, r1, #16 311 .LVL26: 2951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_SINGLEDIFF_CA 312 .loc 2 2951 132 view .LVU73 313 .LBE289: 314 .LBE288: 207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 315 .loc 1 207 1 view .LVU74 316 0012 C840 lsrs r0, r0, r1 317 0014 7047 bx lr 318 .cfi_endproc 319 .LFE330: 321 .section .text.HAL_ADCEx_Calibration_SetValue,"ax",%progbits 322 .align 1 323 .global HAL_ADCEx_Calibration_SetValue 324 .syntax unified 325 .thumb 326 .thumb_func 328 HAL_ADCEx_Calibration_SetValue: 329 .LVL27: 330 .LFB331: 208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Set the calibration factor to overwrite automatic conversion result. 211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC must be enabled and no conversion is ongoing. 212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param SingleDiff This parameter can be only: 214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended 215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended 216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param CalibrationFactor Calibration factor (coded on 7 bits maximum) 217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL state 218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff, 220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t CalibrationFactor) 221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 331 .loc 1 221 1 is_stmt 1 view -0 332 .cfi_startproc 333 @ args = 0, pretend = 0, frame = 0 334 @ frame_needed = 0, uses_anonymous_args = 0 ARM GAS /tmp/cc3JIfda.s page 130 222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 335 .loc 1 222 3 view .LVU76 223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 336 .loc 1 223 3 view .LVU77 224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 337 .loc 1 224 3 view .LVU78 225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 338 .loc 1 227 3 view .LVU79 228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); 339 .loc 1 228 3 view .LVU80 229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_CALFACT(CalibrationFactor)); 340 .loc 1 229 3 view .LVU81 230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 341 .loc 1 232 3 view .LVU82 342 .loc 1 232 3 view .LVU83 343 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 344 0004 012B cmp r3, #1 345 0006 26D0 beq .L23 221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 346 .loc 1 221 1 is_stmt 0 discriminator 2 view .LVU84 347 0008 70B5 push {r4, r5, r6, lr} 348 .LCFI6: 349 .cfi_def_cfa_offset 16 350 .cfi_offset 4, -16 351 .cfi_offset 5, -12 352 .cfi_offset 6, -8 353 .cfi_offset 14, -4 354 000a 0446 mov r4, r0 355 .loc 1 232 3 is_stmt 1 discriminator 2 view .LVU85 356 000c 0123 movs r3, #1 357 000e 80F85830 strb r3, [r0, #88] 358 .loc 1 232 3 discriminator 2 view .LVU86 233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Verification of hardware constraints before modifying the calibration */ 235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* factors register: ADC must be enabled, no conversion on going. */ 236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 359 .loc 1 236 3 discriminator 2 view .LVU87 360 .loc 1 236 44 is_stmt 0 discriminator 2 view .LVU88 361 0012 0068 ldr r0, [r0] 362 .LVL28: 363 .LBB290: 364 .LBI290: 6787:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6788:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6789:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6790:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 6791:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6792:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6793:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Group_Regular Operation on ADC hierarchical scope: group regu 6794:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 6795:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6797:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** ARM GAS /tmp/cc3JIfda.s page 131 6798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC group regular conversion. 6799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this function is relevant for both 6800:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal trigger (SW start) and external trigger: 6801:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to software start, ADC conversion 6802:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * starts immediately. 6803:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to external trigger, ADC conversion 6804:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will start at next trigger event (on the selected trigger edge) 6805:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * following the ADC start conversion command. 6806:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6807:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6808:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group regular, 6809:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group regular, 6810:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 6811:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTART LL_ADC_REG_StartConversion 6812:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6813:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6814:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx) 6816:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6817:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6818:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6819:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6821:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6822:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADSTART); 6823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6824:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6825:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6826:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Stop ADC group regular conversion. 6827:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6828:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6829:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled with conversion on going on group regular, 6830:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 6831:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTP LL_ADC_REG_StopConversion 6832:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6833:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6834:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6835:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx) 6836:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6837:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 6838:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 6839:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 6840:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 6841:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 6842:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_ADSTP); 6843:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6844:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6845:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6846:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion state. 6847:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing 6848:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6849:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no conversion is on going on ADC group regular. 6850:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx) 365 .loc 2 6851 26 is_stmt 1 discriminator 2 view .LVU89 366 .LBB291: 6852:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/cc3JIfda.s page 132 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART)) ? 1UL : 0UL); 367 .loc 2 6853 3 discriminator 2 view .LVU90 368 .loc 2 6853 12 is_stmt 0 discriminator 2 view .LVU91 369 0014 8368 ldr r3, [r0, #8] 370 .loc 2 6853 74 discriminator 2 view .LVU92 371 0016 13F00403 ands r3, r3, #4 372 001a 00D0 beq .L19 373 .loc 2 6853 74 view .LVU93 374 001c 0123 movs r3, #1 375 .L19: 376 .LVL29: 377 .loc 2 6853 74 view .LVU94 378 .LBE291: 379 .LBE290: 237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 380 .loc 1 237 3 is_stmt 1 view .LVU95 381 .LBB292: 382 .LBI292: 6854:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6855:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6856:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6857:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular command of conversion stop state 6858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR ADSTP LL_ADC_REG_IsStopConversionOngoing 6859:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no command of conversion stop is on going on ADC group regular. 6861:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6862:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(ADC_TypeDef *ADCx) 6863:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6864:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_ADSTP) == (ADC_CR_ADSTP)) ? 1UL : 0UL); 6865:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6866:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6867:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6868:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC sampling phase for sampling time trigger mode 6869:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function is relevant only when 6870:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED has been set 6871:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using @ref LL_ADC_REG_SetSamplingMode 6872:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_TRIG_SOFTWARE is used as trigger source 6873:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6874:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6875:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group regular, 6876:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group regular, 6877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 6878:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 SWTRIG LL_ADC_REG_StartSamplingPhase 6879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6880:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6881:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6882:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StartSamplingPhase(ADC_TypeDef *ADCx) 6883:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6884:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** SET_BIT(ADCx->CFGR2, ADC_CFGR2_SWTRIG); 6885:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6886:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6887:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6888:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Stop ADC sampling phase for sampling time trigger mode and start conversion 6889:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note This function is relevant only when 6890:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_SAMPLING_MODE_TRIGGER_CONTROLED has been set 6891:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * using @ref LL_ADC_REG_SetSamplingMode 6892:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_TRIG_SOFTWARE is used as trigger source ARM GAS /tmp/cc3JIfda.s page 133 6893:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - @ref LL_ADC_REG_StartSamplingPhase has been called to start 6894:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * the sampling phase 6895:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 6896:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 6897:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group regular, 6898:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group regular, 6899:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 6900:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CFGR2 SWTRIG LL_ADC_REG_StopSamplingPhase 6901:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6902:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 6903:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StopSamplingPhase(ADC_TypeDef *ADCx) 6905:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_SWTRIG); 6907:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6908:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6909:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6910:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6911:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * all ADC configurations: all ADC resolutions and 6912:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * all oversampling increased data width (for devices 6913:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * with feature oversampling). 6914:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData32 6915:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6916:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF 6917:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6918:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_ReadConversionData32(ADC_TypeDef *ADCx) 6919:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6920:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6921:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6922:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6923:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6924:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6925:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 12 bits. 6926:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 6927:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 6928:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 6929:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData12 6930:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6931:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0xFFF 6932:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6933:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData12(ADC_TypeDef *ADCx) 6934:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6935:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6936:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6937:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6938:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6939:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6940:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 10 bits. 6941:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 6942:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 6943:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 6944:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData10 6945:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6946:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x000 and Max_Data=0x3FF 6947:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6948:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData10(ADC_TypeDef *ADCx) 6949:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/cc3JIfda.s page 134 6950:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6951:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6952:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6953:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6954:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6955:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 8 bits. 6956:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 6957:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 6958:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 6959:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData8 6960:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6961:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0xFF 6962:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6963:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData8(ADC_TypeDef *ADCx) 6964:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6965:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6966:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6967:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6968:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6969:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group regular conversion data, range fit for 6970:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC resolution 6 bits. 6971:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note For devices with feature oversampling: Oversampling 6972:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * can increase data width, function for extended range 6973:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * may be needed: @ref LL_ADC_REG_ReadConversionData32. 6974:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll DR RDATA LL_ADC_REG_ReadConversionData6 6975:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 6976:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x3F 6977:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 6978:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData6(ADC_TypeDef *ADCx) 6979:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 6980:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_RDATA)); 6981:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 6982:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 6983:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #if defined(ADC_MULTIMODE_SUPPORT) 6984:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 6985:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC multimode conversion data of ADC master, ADC slave 6986:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * or raw data with ADC master and slave concatenated. 6987:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note If raw data with ADC master and slave concatenated is retrieved, 6988:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * a macro is available to get the conversion data of 6989:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC master or ADC slave: see helper macro 6990:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @ref __LL_ADC_MULTI_CONV_DATA_MASTER_SLAVE(). 6991:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (however this macro is mainly intended for multimode 6992:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * transfer by DMA, because this function can do the same 6993:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * by getting multimode conversion data of ADC master or ADC slave 6994:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * separately). 6995:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CDR RDATA_MST LL_ADC_REG_ReadMultiConversionData32\n 6996:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * CDR RDATA_SLV LL_ADC_REG_ReadMultiConversionData32 6997:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCxy_COMMON ADC common instance 6998:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO 6999:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ConversionData This parameter can be one of the following values: 7000:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER 7001:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_SLAVE 7002:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @arg @ref LL_ADC_MULTI_MASTER_SLAVE 7003:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF 7004:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7005:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_ReadMultiConversionData32(ADC_Common_TypeDef *ADCxy_COMMON, uin 7006:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { ARM GAS /tmp/cc3JIfda.s page 135 7007:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return (uint32_t)(READ_BIT(ADCxy_COMMON->CDR, 7008:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ConversionData) 7009:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** >> (POSITION_VAL(ConversionData) & 0x1FUL) 7010:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ); 7011:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7012:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** #endif /* ADC_MULTIMODE_SUPPORT */ 7013:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7014:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7015:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @} 7016:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7017:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7018:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Group_Injected Operation on ADC hierarchical scope: group inj 7019:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @{ 7020:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7021:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7022:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7023:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Start ADC group injected conversion. 7024:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, this function is relevant for both 7025:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * internal trigger (SW start) and external trigger: 7026:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to software start, ADC conversion 7027:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * starts immediately. 7028:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * - If ADC trigger has been set to external trigger, ADC conversion 7029:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * will start at next trigger event (on the selected trigger edge) 7030:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * following the ADC start conversion command. 7031:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7032:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7033:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled without conversion on going on group injected, 7034:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without conversion stop command on going on group injected, 7035:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 7036:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR JADSTART LL_ADC_INJ_StartConversion 7037:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7038:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7039:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_StartConversion(ADC_TypeDef *ADCx) 7041:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7042:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 7043:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ 7044:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 7045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 7046:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 7047:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_JADSTART); 7048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7049:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7050:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7051:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Stop ADC group injected conversion. 7052:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @note On this STM32 series, setting of this feature is conditioned to 7053:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC state: 7054:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * ADC must be enabled with conversion on going on group injected, 7055:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * without ADC disable command on going. 7056:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR JADSTP LL_ADC_INJ_StopConversion 7057:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7058:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval None 7059:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7060:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_INJ_StopConversion(ADC_TypeDef *ADCx) 7061:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7062:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* Note: Write register with some additional bits forced to state reset */ 7063:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* instead of modifying only the selected bit for this function, */ ARM GAS /tmp/cc3JIfda.s page 136 7064:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /* to not interfere with bits with HW property "rs". */ 7065:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** MODIFY_REG(ADCx->CR, 7066:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 7067:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_JADSTP); 7068:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 7069:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 7070:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** /** 7071:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @brief Get ADC group injected conversion state. 7072:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @rmtoll CR JADSTART LL_ADC_INJ_IsConversionOngoing 7073:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @param ADCx ADC instance 7074:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** * @retval 0: no conversion is on going on ADC group injected. 7075:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** */ 7076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_INJ_IsConversionOngoing(ADC_TypeDef *ADCx) 383 .loc 2 7076 26 view .LVU96 384 .LBB293: 7077:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 7078:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** return ((READ_BIT(ADCx->CR, ADC_CR_JADSTART) == (ADC_CR_JADSTART)) ? 1UL : 0UL); 385 .loc 2 7078 3 view .LVU97 386 .loc 2 7078 12 is_stmt 0 view .LVU98 387 001e 8568 ldr r5, [r0, #8] 388 .loc 2 7078 76 view .LVU99 389 0020 15F00805 ands r5, r5, #8 390 0024 00D0 beq .L20 391 0026 0125 movs r5, #1 392 .L20: 393 .LVL30: 394 .loc 2 7078 76 view .LVU100 395 .LBE293: 396 .LBE292: 238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL) 397 .loc 1 239 3 is_stmt 1 view .LVU101 398 .LBB294: 399 .LBI294: 6729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 400 .loc 2 6729 26 view .LVU102 401 .LBB295: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 402 .loc 2 6731 3 view .LVU103 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 403 .loc 2 6731 12 is_stmt 0 view .LVU104 404 0028 8668 ldr r6, [r0, #8] 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 405 .loc 2 6731 68 view .LVU105 406 002a 16F0010F tst r6, #1 407 002e 01D0 beq .L21 408 .LVL31: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 409 .loc 2 6731 68 view .LVU106 410 .LBE295: 411 .LBE294: 240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_regular == 0UL) 412 .loc 1 240 7 view .LVU107 413 0030 03B9 cbnz r3, .L21 241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 414 .loc 1 241 7 view .LVU108 415 0032 65B1 cbz r5, .L28 ARM GAS /tmp/cc3JIfda.s page 137 416 .L21: 242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the selected ADC calibration value */ 245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetCalibrationFactor(hadc->Instance, SingleDiff, CalibrationFactor); 246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine */ 250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 417 .loc 1 250 5 is_stmt 1 view .LVU109 418 0034 E36D ldr r3, [r4, #92] 419 .LVL32: 420 .loc 1 250 5 is_stmt 0 view .LVU110 421 0036 43F02003 orr r3, r3, #32 422 003a E365 str r3, [r4, #92] 251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC error code */ 252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 423 .loc 1 252 5 is_stmt 1 view .LVU111 424 003c 236E ldr r3, [r4, #96] 425 003e 43F00103 orr r3, r3, #1 426 0042 2366 str r3, [r4, #96] 253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 427 .loc 1 255 5 view .LVU112 428 .LVL33: 429 .loc 1 255 20 is_stmt 0 view .LVU113 430 0044 0120 movs r0, #1 431 .LVL34: 432 .L22: 256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 433 .loc 1 259 3 is_stmt 1 view .LVU114 434 .loc 1 259 3 view .LVU115 435 0046 0023 movs r3, #0 436 0048 84F85830 strb r3, [r4, #88] 437 .loc 1 259 3 view .LVU116 260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 438 .loc 1 262 3 view .LVU117 263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 439 .loc 1 263 1 is_stmt 0 view .LVU118 440 004c 70BD pop {r4, r5, r6, pc} 441 .LVL35: 442 .L28: 245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 443 .loc 1 245 5 is_stmt 1 view .LVU119 444 004e FFF7FEFF bl LL_ADC_SetCalibrationFactor 445 .LVL36: 222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 446 .loc 1 222 21 is_stmt 0 view .LVU120 447 0052 0020 movs r0, #0 245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } ARM GAS /tmp/cc3JIfda.s page 138 448 .loc 1 245 5 view .LVU121 449 0054 F7E7 b .L22 450 .LVL37: 451 .L23: 452 .LCFI7: 453 .cfi_def_cfa_offset 0 454 .cfi_restore 4 455 .cfi_restore 5 456 .cfi_restore 6 457 .cfi_restore 14 232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 458 .loc 1 232 3 view .LVU122 459 0056 0220 movs r0, #2 460 .LVL38: 461 .loc 1 263 1 view .LVU123 462 0058 7047 bx lr 463 .cfi_endproc 464 .LFE331: 466 .section .text.HAL_ADCEx_InjectedStart,"ax",%progbits 467 .align 1 468 .global HAL_ADCEx_InjectedStart 469 .syntax unified 470 .thumb 471 .thumb_func 473 HAL_ADCEx_InjectedStart: 474 .LVL39: 475 .LFB332: 264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable ADC, start conversion of injected group. 267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Interruptions enabled in this function: None. 268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Case of multimode enabled when multimode feature is available: 269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStart() API must be called for ADC slave first, 270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * then for ADC master. 271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC slave, ADC is enabled only (conversion is not started). 272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC master, ADC is enabled and multimode conversion is started. 273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle. 274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef *hadc) 277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 476 .loc 1 277 1 is_stmt 1 view -0 477 .cfi_startproc 478 @ args = 0, pretend = 0, frame = 0 479 @ frame_needed = 0, uses_anonymous_args = 0 480 .loc 1 277 1 is_stmt 0 view .LVU125 481 0000 38B5 push {r3, r4, r5, lr} 482 .LCFI8: 483 .cfi_def_cfa_offset 16 484 .cfi_offset 3, -16 485 .cfi_offset 4, -12 486 .cfi_offset 5, -8 487 .cfi_offset 14, -4 278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 488 .loc 1 278 3 is_stmt 1 view .LVU126 279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_config_injected_queue; 489 .loc 1 279 3 view .LVU127 ARM GAS /tmp/cc3JIfda.s page 139 280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); 490 .loc 1 281 3 view .LVU128 491 .LVL40: 492 .LBB296: 493 .LBI296: 6392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 494 .loc 2 6392 26 view .LVU129 495 .LBB297: 6394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 496 .loc 2 6394 3 view .LVU130 6394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 497 .loc 2 6394 21 is_stmt 0 view .LVU131 498 0002 394B ldr r3, .L50 499 0004 9D68 ldr r5, [r3, #8] 500 .LVL41: 6394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 501 .loc 2 6394 21 view .LVU132 502 .LBE297: 503 .LBE296: 282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 504 .loc 1 285 3 is_stmt 1 view .LVU133 286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL) 505 .loc 1 287 3 view .LVU134 506 .loc 1 287 7 is_stmt 0 view .LVU135 507 0006 0368 ldr r3, [r0] 508 .LVL42: 509 .LBB298: 510 .LBI298: 7076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 511 .loc 2 7076 26 is_stmt 1 view .LVU136 512 .LBB299: 513 .loc 2 7078 3 view .LVU137 514 .loc 2 7078 12 is_stmt 0 view .LVU138 515 0008 9A68 ldr r2, [r3, #8] 516 .loc 2 7078 76 view .LVU139 517 000a 12F0080F tst r2, #8 518 000e 67D1 bne .L42 519 0010 0446 mov r4, r0 520 0012 05F01F05 and r5, r5, #31 521 .LVL43: 522 .loc 2 7078 76 view .LVU140 523 .LBE299: 524 .LBE298: 288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_BUSY; 290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* In case of software trigger detection enabled, JQDIS must be set 294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (which can be done only if ADSTART and JADSTART are both cleared). 295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** If JQDIS is not set at that point, returns an error 296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - since software trigger detection is disabled. User needs to ARM GAS /tmp/cc3JIfda.s page 140 297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS. 298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means 299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** the queue is empty */ 300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); 525 .loc 1 300 5 is_stmt 1 view .LVU141 526 .loc 1 300 33 is_stmt 0 view .LVU142 527 0016 DA68 ldr r2, [r3, #12] 528 .LVL44: 301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL) 529 .loc 1 302 5 is_stmt 1 view .LVU143 530 .loc 1 302 10 is_stmt 0 view .LVU144 531 0018 DB6C ldr r3, [r3, #76] 532 .loc 1 302 8 view .LVU145 533 001a 13F4C07F tst r3, #384 534 001e 01D1 bne .L31 303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_config_injected_queue == 0UL) 535 .loc 1 303 9 view .LVU146 536 0020 002A cmp r2, #0 537 0022 3DDA bge .L47 538 .L31: 304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 539 .loc 1 311 5 is_stmt 1 view .LVU147 540 .loc 1 311 5 view .LVU148 541 0024 94F85830 ldrb r3, [r4, #88] @ zero_extendqisi2 542 0028 012B cmp r3, #1 543 002a 5BD0 beq .L43 544 .loc 1 311 5 discriminator 2 view .LVU149 545 002c 0123 movs r3, #1 546 002e 84F85830 strb r3, [r4, #88] 547 .loc 1 311 5 discriminator 2 view .LVU150 312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable the ADC peripheral */ 314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(hadc); 548 .loc 1 314 5 discriminator 2 view .LVU151 549 .loc 1 314 22 is_stmt 0 discriminator 2 view .LVU152 550 0032 2046 mov r0, r4 551 .LVL45: 552 .loc 1 314 22 discriminator 2 view .LVU153 553 0034 FFF7FEFF bl ADC_Enable 554 .LVL46: 315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start conversion if ADC is effectively enabled */ 317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 555 .loc 1 317 5 is_stmt 1 discriminator 2 view .LVU154 556 .loc 1 317 8 is_stmt 0 discriminator 2 view .LVU155 557 0038 0028 cmp r0, #0 558 003a 4DD1 bne .L32 318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if a regular conversion is ongoing */ ARM GAS /tmp/cc3JIfda.s page 141 320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL) 559 .loc 1 320 7 is_stmt 1 view .LVU156 560 .loc 1 320 16 is_stmt 0 view .LVU157 561 003c E36D ldr r3, [r4, #92] 562 .loc 1 320 10 view .LVU158 563 003e 13F4807F tst r3, #256 564 0042 33D0 beq .L33 321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Reset ADC error code field related to injected conversions only */ 323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); 565 .loc 1 323 9 is_stmt 1 view .LVU159 566 0044 236E ldr r3, [r4, #96] 567 0046 23F00803 bic r3, r3, #8 568 004a 2366 str r3, [r4, #96] 569 .L34: 324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC error code to none */ 328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(hadc); 329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Clear state bitfield related to injected group conversion results */ 333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Set state bitfield related to injected operation */ 334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 570 .loc 1 334 7 view .LVU160 571 004c E36D ldr r3, [r4, #92] 572 004e 23F44053 bic r3, r3, #12288 573 0052 23F00103 bic r3, r3, #1 574 0056 43F48053 orr r3, r3, #4096 575 005a E365 str r3, [r4, #92] 335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, 336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY); 337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit 340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - if ADC instance is master or if multimode feature is not available 341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - if multimode setting is disabled (ADC instance slave in independent mode) */ 342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 576 .loc 1 342 7 view .LVU161 577 .loc 1 342 12 is_stmt 0 view .LVU162 578 005c 2368 ldr r3, [r4] 579 005e 234A ldr r2, .L50+4 580 0060 9342 cmp r3, r2 581 0062 26D0 beq .L48 582 0064 1A46 mov r2, r3 583 .L35: 584 .loc 1 342 10 discriminator 4 view .LVU163 585 0066 9342 cmp r3, r2 586 0068 00D0 beq .L36 343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 587 .loc 1 343 11 view .LVU164 588 006a 1DB9 cbnz r5, .L37 589 .L36: 344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/cc3JIfda.s page 142 346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 590 .loc 1 346 9 is_stmt 1 view .LVU165 591 006c E26D ldr r2, [r4, #92] 592 006e 22F48012 bic r2, r2, #1048576 593 0072 E265 str r2, [r4, #92] 594 .L37: 347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear ADC group injected group conversion flag */ 351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (To ensure of no unknown state from potential previous ADC operations) */ 352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS)); 595 .loc 1 352 7 view .LVU166 596 0074 6022 movs r2, #96 597 0076 1A60 str r2, [r3] 353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Unlock before starting ADC conversions: in case of potential */ 356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* interruption, to let the process to ADC IRQ Handler. */ 357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 598 .loc 1 357 7 view .LVU167 599 .loc 1 357 7 view .LVU168 600 0078 0023 movs r3, #0 601 007a 84F85830 strb r3, [r4, #88] 602 .loc 1 357 7 view .LVU169 358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable conversion of injected group, if automatic injected conversion */ 360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* is disabled. */ 361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If software start has been selected, conversion starts immediately. */ 362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If external trigger has been selected, conversion will start at next */ 363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* trigger event. */ 364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Case of multimode enabled (when multimode feature is available): */ 365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if ADC is slave, */ 366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC is enabled only (conversion is not started), */ 367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - if multimode only concerns regular conversion, ADC is enabled */ 368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and conversion is started. */ 369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If ADC is master or independent, */ 370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC is enabled and conversion is started. */ 371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 603 .loc 1 372 7 view .LVU170 604 .loc 1 372 12 is_stmt 0 view .LVU171 605 007e 2368 ldr r3, [r4] 606 0080 1A4A ldr r2, .L50+4 607 0082 9342 cmp r3, r2 608 0084 18D0 beq .L49 609 0086 1A46 mov r2, r3 610 .L38: 611 .loc 1 372 10 discriminator 4 view .LVU172 612 0088 9342 cmp r3, r2 613 008a 18D0 beq .L39 373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 614 .loc 1 373 11 view .LVU173 615 008c BDB1 cbz r5, .L39 374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT) 616 .loc 1 374 11 view .LVU174 617 008e 062D cmp r5, #6 ARM GAS /tmp/cc3JIfda.s page 143 618 0090 15D0 beq .L39 375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 619 .loc 1 375 11 view .LVU175 620 0092 072D cmp r5, #7 621 0094 13D0 beq .L39 376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl 379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT) 380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_StartConversion(hadc->Instance); 382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl 387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 622 .loc 1 387 9 is_stmt 1 view .LVU176 623 0096 E36D ldr r3, [r4, #92] 624 0098 43F48013 orr r3, r3, #1048576 625 009c E365 str r3, [r4, #92] 626 009e 20E0 b .L30 627 .LVL47: 628 .L47: 306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 629 .loc 1 306 7 view .LVU177 630 00a0 C36D ldr r3, [r0, #92] 631 00a2 43F02003 orr r3, r3, #32 632 00a6 C365 str r3, [r0, #92] 307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 633 .loc 1 307 7 view .LVU178 307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 634 .loc 1 307 14 is_stmt 0 view .LVU179 635 00a8 0120 movs r0, #1 636 .LVL48: 307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 637 .loc 1 307 14 view .LVU180 638 00aa 1AE0 b .L30 639 .LVL49: 640 .L33: 328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 641 .loc 1 328 9 is_stmt 1 view .LVU181 642 00ac 0023 movs r3, #0 643 00ae 2366 str r3, [r4, #96] 644 00b0 CCE7 b .L34 645 .L48: 342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 646 .loc 1 342 12 is_stmt 0 view .LVU182 647 00b2 4FF0A042 mov r2, #1342177280 648 00b6 D6E7 b .L35 649 .L49: 372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 650 .loc 1 372 12 view .LVU183 651 00b8 4FF0A042 mov r2, #1342177280 652 00bc E4E7 b .L38 653 .L39: 379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/cc3JIfda.s page 144 654 .loc 1 379 9 is_stmt 1 view .LVU184 655 .LVL50: 656 .LBB300: 657 .LBI300: 4858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 658 .loc 2 4858 26 view .LVU185 659 .LBB301: 4860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 660 .loc 2 4860 3 view .LVU186 4860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 661 .loc 2 4860 21 is_stmt 0 view .LVU187 662 00be DA68 ldr r2, [r3, #12] 663 .LVL51: 4860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 664 .loc 2 4860 21 view .LVU188 665 .LBE301: 666 .LBE300: 379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 667 .loc 1 379 12 view .LVU189 668 00c0 12F0007F tst r2, #33554432 669 00c4 0DD1 bne .L30 381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 670 .loc 1 381 11 is_stmt 1 view .LVU190 671 .LVL52: 672 .LBB302: 673 .LBI302: 7040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 674 .loc 2 7040 22 view .LVU191 675 .LBB303: 7045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 676 .loc 2 7045 3 view .LVU192 677 00c6 9A68 ldr r2, [r3, #8] 678 00c8 22F00042 bic r2, r2, #-2147483648 679 00cc 22F03F02 bic r2, r2, #63 680 00d0 42F00802 orr r2, r2, #8 681 00d4 9A60 str r2, [r3, #8] 7048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 682 .loc 2 7048 1 is_stmt 0 view .LVU193 683 00d6 04E0 b .L30 684 .LVL53: 685 .L32: 7048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 686 .loc 2 7048 1 view .LVU194 687 .LBE303: 688 .LBE302: 388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #else 390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT) 391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start ADC group injected conversion */ 393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_StartConversion(hadc->Instance); 394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/cc3JIfda.s page 145 400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 689 .loc 1 401 7 is_stmt 1 view .LVU195 690 .loc 1 401 7 view .LVU196 691 00d8 0023 movs r3, #0 692 00da 84F85830 strb r3, [r4, #88] 693 .loc 1 401 7 view .LVU197 402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 694 .loc 1 405 5 view .LVU198 695 .loc 1 405 12 is_stmt 0 view .LVU199 696 00de 00E0 b .L30 697 .LVL54: 698 .L42: 289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 699 .loc 1 289 12 view .LVU200 700 00e0 0220 movs r0, #2 701 .LVL55: 702 .L30: 406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 703 .loc 1 407 1 view .LVU201 704 00e2 38BD pop {r3, r4, r5, pc} 705 .LVL56: 706 .L43: 311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 707 .loc 1 311 5 view .LVU202 708 00e4 0220 movs r0, #2 709 .LVL57: 311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 710 .loc 1 311 5 view .LVU203 711 00e6 FCE7 b .L30 712 .L51: 713 .align 2 714 .L50: 715 00e8 00030050 .word 1342178048 716 00ec 00010050 .word 1342177536 717 .cfi_endproc 718 .LFE332: 720 .section .text.HAL_ADCEx_InjectedStop,"ax",%progbits 721 .align 1 722 .global HAL_ADCEx_InjectedStop 723 .syntax unified 724 .thumb 725 .thumb_func 727 HAL_ADCEx_InjectedStop: 728 .LVL58: 729 .LFB333: 408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop conversion of injected channels. Disable ADC peripheral if 411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * no regular conversion is on going. 412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note If ADC must be disabled and if conversion is on going on 413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * regular group, function HAL_ADC_Stop must be used to stop both 414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * injected and regular groups, and disable the ADC. ARM GAS /tmp/cc3JIfda.s page 146 415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note If injected group mode auto-injection is enabled, 416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * function HAL_ADC_Stop must be used. 417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of multimode enabled (when multimode feature is available), 418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStop() must be called for ADC master first, then for ADC slave. 419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC master, conversion is stopped and ADC is disabled. 420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC slave, ADC is disabled only (conversion stop of ADC master 421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * has already stopped conversion of ADC slave). 422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle. 423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef *hadc) 426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 730 .loc 1 426 1 is_stmt 1 view -0 731 .cfi_startproc 732 @ args = 0, pretend = 0, frame = 0 733 @ frame_needed = 0, uses_anonymous_args = 0 427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 734 .loc 1 427 3 view .LVU205 428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 735 .loc 1 430 3 view .LVU206 431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 736 .loc 1 433 3 view .LVU207 737 .loc 1 433 3 view .LVU208 738 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 739 0004 012B cmp r3, #1 740 0006 23D0 beq .L56 426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 741 .loc 1 426 1 is_stmt 0 discriminator 2 view .LVU209 742 0008 10B5 push {r4, lr} 743 .LCFI9: 744 .cfi_def_cfa_offset 8 745 .cfi_offset 4, -8 746 .cfi_offset 14, -4 747 000a 0446 mov r4, r0 748 .loc 1 433 3 is_stmt 1 discriminator 2 view .LVU210 749 000c 0123 movs r3, #1 750 000e 80F85830 strb r3, [r0, #88] 751 .loc 1 433 3 discriminator 2 view .LVU211 434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential conversion on going on injected group only. */ 436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP); 752 .loc 1 436 3 discriminator 2 view .LVU212 753 .loc 1 436 20 is_stmt 0 discriminator 2 view .LVU213 754 0012 0221 movs r1, #2 755 0014 FFF7FEFF bl ADC_ConversionStop 756 .LVL59: 437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if injected conversions are effectively stopped */ 439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and if no conversion on regular group is on-going */ 440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 757 .loc 1 440 3 is_stmt 1 discriminator 2 view .LVU214 758 .loc 1 440 6 is_stmt 0 discriminator 2 view .LVU215 759 0018 40B9 cbnz r0, .L54 ARM GAS /tmp/cc3JIfda.s page 147 441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) 760 .loc 1 442 5 is_stmt 1 view .LVU216 761 .loc 1 442 9 is_stmt 0 view .LVU217 762 001a 2368 ldr r3, [r4] 763 .LVL60: 764 .LBB304: 765 .LBI304: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 766 .loc 2 6851 26 is_stmt 1 view .LVU218 767 .LBB305: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 768 .loc 2 6853 3 view .LVU219 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 769 .loc 2 6853 12 is_stmt 0 view .LVU220 770 001c 9B68 ldr r3, [r3, #8] 771 .LVL61: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 772 .loc 2 6853 74 view .LVU221 773 001e 13F0040F tst r3, #4 774 0022 07D0 beq .L55 775 .LVL62: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 776 .loc 2 6853 74 view .LVU222 777 .LBE305: 778 .LBE304: 443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */ 445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Conversion on injected group is stopped, but ADC not disabled since */ 457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on regular group is still running. */ 458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 779 .loc 1 461 7 is_stmt 1 view .LVU223 780 0024 E36D ldr r3, [r4, #92] 781 0026 23F48053 bic r3, r3, #4096 782 002a E365 str r3, [r4, #92] 783 .L54: 462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 784 .loc 1 466 3 view .LVU224 785 .loc 1 466 3 view .LVU225 ARM GAS /tmp/cc3JIfda.s page 148 786 002c 0023 movs r3, #0 787 002e 84F85830 strb r3, [r4, #88] 788 .loc 1 466 3 view .LVU226 467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 789 .loc 1 469 3 view .LVU227 470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 790 .loc 1 470 1 is_stmt 0 view .LVU228 791 0032 10BD pop {r4, pc} 792 .LVL63: 793 .L55: 445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 794 .loc 1 445 7 is_stmt 1 view .LVU229 445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 795 .loc 1 445 24 is_stmt 0 view .LVU230 796 0034 2046 mov r0, r4 797 .LVL64: 445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 798 .loc 1 445 24 view .LVU231 799 0036 FFF7FEFF bl ADC_Disable 800 .LVL65: 448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 801 .loc 1 448 7 is_stmt 1 view .LVU232 448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 802 .loc 1 448 10 is_stmt 0 view .LVU233 803 003a 0028 cmp r0, #0 804 003c F6D1 bne .L54 451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 805 .loc 1 451 9 is_stmt 1 view .LVU234 806 003e E36D ldr r3, [r4, #92] 807 0040 23F48853 bic r3, r3, #4352 808 0044 23F00103 bic r3, r3, #1 809 0048 43F00103 orr r3, r3, #1 810 004c E365 str r3, [r4, #92] 811 004e EDE7 b .L54 812 .LVL66: 813 .L56: 814 .LCFI10: 815 .cfi_def_cfa_offset 0 816 .cfi_restore 4 817 .cfi_restore 14 433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 818 .loc 1 433 3 is_stmt 0 view .LVU235 819 0050 0220 movs r0, #2 820 .LVL67: 821 .loc 1 470 1 view .LVU236 822 0052 7047 bx lr 823 .cfi_endproc 824 .LFE333: 826 .section .text.HAL_ADCEx_InjectedPollForConversion,"ax",%progbits 827 .align 1 828 .global HAL_ADCEx_InjectedPollForConversion 829 .syntax unified 830 .thumb 831 .thumb_func 833 HAL_ADCEx_InjectedPollForConversion: ARM GAS /tmp/cc3JIfda.s page 149 834 .LVL68: 835 .LFB334: 471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Wait for injected group conversion to be completed. 474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param Timeout Timeout value in millisecond. 476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Depending on hadc->Init.EOCSelection, JEOS or JEOC is 477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * checked and cleared depending on AUTDLY bit status. 478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout) 481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 836 .loc 1 481 1 is_stmt 1 view -0 837 .cfi_startproc 838 @ args = 0, pretend = 0, frame = 0 839 @ frame_needed = 0, uses_anonymous_args = 0 840 .loc 1 481 1 is_stmt 0 view .LVU238 841 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} 842 .LCFI11: 843 .cfi_def_cfa_offset 24 844 .cfi_offset 4, -24 845 .cfi_offset 5, -20 846 .cfi_offset 6, -16 847 .cfi_offset 7, -12 848 .cfi_offset 8, -8 849 .cfi_offset 14, -4 850 0004 0446 mov r4, r0 851 0006 0D46 mov r5, r1 482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tickstart; 852 .loc 1 482 3 is_stmt 1 view .LVU239 483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_Flag_End; 853 .loc 1 483 3 view .LVU240 484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_inj_is_trigger_source_sw_start; 854 .loc 1 484 3 view .LVU241 485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_reg_is_trigger_source_sw_start; 855 .loc 1 485 3 view .LVU242 486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_cfgr; 856 .loc 1 486 3 view .LVU243 487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** const ADC_TypeDef *tmpADC_Master; 857 .loc 1 488 3 view .LVU244 489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); 858 .loc 1 489 3 view .LVU245 859 .LVL69: 860 .LBB306: 861 .LBI306: 6392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 862 .loc 2 6392 26 view .LVU246 863 .LBB307: 6394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 864 .loc 2 6394 3 view .LVU247 6394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 865 .loc 2 6394 21 is_stmt 0 view .LVU248 866 0008 3B4B ldr r3, .L87 867 000a 9F68 ldr r7, [r3, #8] 6394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/cc3JIfda.s page 150 868 .loc 2 6394 10 view .LVU249 869 000c 07F01F07 and r7, r7, #31 870 .LVL70: 6394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 871 .loc 2 6394 10 view .LVU250 872 .LBE307: 873 .LBE306: 490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 874 .loc 1 493 3 is_stmt 1 view .LVU251 494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If end of sequence selected */ 496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) 875 .loc 1 496 3 view .LVU252 876 .loc 1 496 17 is_stmt 0 view .LVU253 877 0010 8369 ldr r3, [r0, #24] 878 .loc 1 496 6 view .LVU254 879 0012 082B cmp r3, #8 880 0014 1FD0 beq .L83 497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_Flag_End = ADC_FLAG_JEOS; 499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else /* end of conversion selected */ 501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_Flag_End = ADC_FLAG_JEOC; 881 .loc 1 502 18 view .LVU255 882 0016 2026 movs r6, #32 883 .L62: 884 .LVL71: 503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Get timeout */ 506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); 885 .loc 1 506 3 is_stmt 1 view .LVU256 886 .loc 1 506 15 is_stmt 0 view .LVU257 887 0018 FFF7FEFF bl HAL_GetTick 888 .LVL72: 889 .loc 1 506 15 view .LVU258 890 001c 8046 mov r8, r0 891 .LVL73: 507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Wait until End of Conversion or Sequence flag is raised */ 509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while ((hadc->Instance->ISR & tmp_Flag_End) == 0UL) 892 .loc 1 509 3 is_stmt 1 view .LVU259 893 .L64: 894 .loc 1 509 47 view .LVU260 895 .loc 1 509 15 is_stmt 0 view .LVU261 896 001e 2368 ldr r3, [r4] 897 .loc 1 509 25 view .LVU262 898 0020 1A68 ldr r2, [r3] 899 .loc 1 509 47 view .LVU263 900 0022 3242 tst r2, r6 901 0024 19D1 bne .L84 510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if timeout is disabled (set to infinite wait) */ ARM GAS /tmp/cc3JIfda.s page 151 512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (Timeout != HAL_MAX_DELAY) 902 .loc 1 512 5 is_stmt 1 view .LVU264 903 .loc 1 512 8 is_stmt 0 view .LVU265 904 0026 B5F1FF3F cmp r5, #-1 905 002a F8D0 beq .L64 513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL)) 906 .loc 1 514 7 is_stmt 1 view .LVU266 907 .loc 1 514 13 is_stmt 0 view .LVU267 908 002c FFF7FEFF bl HAL_GetTick 909 .LVL74: 910 .loc 1 514 27 view .LVU268 911 0030 A0EB0800 sub r0, r0, r8 912 .loc 1 514 10 view .LVU269 913 0034 A842 cmp r0, r5 914 0036 01D8 bhi .L65 915 .loc 1 514 51 discriminator 1 view .LVU270 916 0038 002D cmp r5, #0 917 003a F0D1 bne .L64 918 .L65: 515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* New check to avoid false timeout detection in case of preemption */ 517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->Instance->ISR & tmp_Flag_End) == 0UL) 919 .loc 1 517 9 is_stmt 1 view .LVU271 920 .loc 1 517 18 is_stmt 0 view .LVU272 921 003c 2368 ldr r3, [r4] 922 .loc 1 517 28 view .LVU273 923 003e 1B68 ldr r3, [r3] 924 .loc 1 517 12 view .LVU274 925 0040 3342 tst r3, r6 926 0042 ECD1 bne .L64 518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to timeout */ 520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); 927 .loc 1 520 11 is_stmt 1 view .LVU275 928 0044 E36D ldr r3, [r4, #92] 929 0046 43F00403 orr r3, r3, #4 930 004a E365 str r3, [r4, #92] 521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 931 .loc 1 523 11 view .LVU276 932 .loc 1 523 11 view .LVU277 933 004c 0023 movs r3, #0 934 004e 84F85830 strb r3, [r4, #88] 935 .loc 1 523 11 view .LVU278 524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_TIMEOUT; 936 .loc 1 525 11 view .LVU279 937 .loc 1 525 18 is_stmt 0 view .LVU280 938 0052 0320 movs r0, #3 939 0054 44E0 b .L66 940 .LVL75: 941 .L83: 498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 942 .loc 1 498 18 view .LVU281 943 0056 4026 movs r6, #64 ARM GAS /tmp/cc3JIfda.s page 152 944 0058 DEE7 b .L62 945 .LVL76: 946 .L84: 526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Retrieve ADC configuration */ 532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_inj_is_trigger_source_sw_start = LL_ADC_INJ_IsTriggerSourceSWStart(hadc->Instance); 947 .loc 1 532 3 is_stmt 1 view .LVU282 948 .LBB308: 949 .LBI308: 4534:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 950 .loc 2 4534 26 view .LVU283 951 .LBB309: 4536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 952 .loc 2 4536 3 view .LVU284 4536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 953 .loc 2 4536 12 is_stmt 0 view .LVU285 954 005a DA6C ldr r2, [r3, #76] 4536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 955 .loc 2 4536 105 view .LVU286 956 005c 12F4C07F tst r2, #384 957 0060 12D1 bne .L78 958 0062 0120 movs r0, #1 959 .L68: 960 .LVL77: 4536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 961 .loc 2 4536 105 view .LVU287 962 .LBE309: 963 .LBE308: 533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_reg_is_trigger_source_sw_start = LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance); 964 .loc 1 533 3 is_stmt 1 view .LVU288 965 .LBB311: 966 .LBI311: 3747:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 967 .loc 2 3747 26 view .LVU289 968 .LBB312: 3749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 969 .loc 2 3749 3 view .LVU290 3749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 970 .loc 2 3749 12 is_stmt 0 view .LVU291 971 0064 DA68 ldr r2, [r3, #12] 3749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 972 .loc 2 3749 103 view .LVU292 973 0066 12F4406F tst r2, #3072 974 006a 0FD1 bne .L79 975 006c 0125 movs r5, #1 976 .LVL78: 977 .L69: 3749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 978 .loc 2 3749 103 view .LVU293 979 .LBE312: 980 .LBE311: 534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Get relevant register CFGR in ADC instance of ADC master or slave */ 535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* in function of multimode state (for devices with multimode */ ARM GAS /tmp/cc3JIfda.s page 153 536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* available). */ 537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 981 .loc 1 538 3 is_stmt 1 view .LVU294 982 .loc 1 538 8 is_stmt 0 view .LVU295 983 006e 234A ldr r2, .L87+4 984 0070 9342 cmp r3, r2 985 0072 0DD0 beq .L85 986 0074 1A46 mov r2, r3 987 .L70: 988 .loc 1 538 6 discriminator 4 view .LVU296 989 0076 9342 cmp r3, r2 990 0078 0DD0 beq .L71 539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 991 .loc 1 539 7 view .LVU297 992 007a 67B1 cbz r7, .L71 540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT) 993 .loc 1 540 7 view .LVU298 994 007c 062F cmp r7, #6 995 007e 0AD0 beq .L71 541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 996 .loc 1 541 7 view .LVU299 997 0080 072F cmp r7, #7 998 0082 08D0 beq .L71 542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_cfgr = READ_REG(hadc->Instance->CFGR); 545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance); 999 .loc 1 548 5 is_stmt 1 discriminator 4 view .LVU300 1000 .LVL79: 549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_cfgr = READ_REG(tmpADC_Master->CFGR); 1001 .loc 1 549 5 discriminator 4 view .LVU301 1002 .loc 1 549 14 is_stmt 0 discriminator 4 view .LVU302 1003 0084 D168 ldr r1, [r2, #12] 1004 .LVL80: 1005 .loc 1 549 14 discriminator 4 view .LVU303 1006 0086 07E0 b .L73 1007 .LVL81: 1008 .L78: 1009 .LBB314: 1010 .LBB310: 4536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1011 .loc 2 4536 105 view .LVU304 1012 0088 0020 movs r0, #0 1013 008a EBE7 b .L68 1014 .LVL82: 1015 .L79: 4536:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1016 .loc 2 4536 105 view .LVU305 1017 .LBE310: 1018 .LBE314: 1019 .LBB315: 1020 .LBB313: 3749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/cc3JIfda.s page 154 1021 .loc 2 3749 103 view .LVU306 1022 008c 0025 movs r5, #0 1023 .LVL83: 3749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1024 .loc 2 3749 103 view .LVU307 1025 008e EEE7 b .L69 1026 .LVL84: 1027 .L85: 3749:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1028 .loc 2 3749 103 view .LVU308 1029 .LBE313: 1030 .LBE315: 538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1031 .loc 1 538 8 view .LVU309 1032 0090 4FF0A042 mov r2, #1342177280 1033 0094 EFE7 b .L70 1034 .L71: 544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1035 .loc 1 544 5 is_stmt 1 view .LVU310 544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1036 .loc 1 544 14 is_stmt 0 view .LVU311 1037 0096 D968 ldr r1, [r3, #12] 1038 .LVL85: 1039 .L73: 550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #else 552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_cfgr = READ_REG(hadc->Instance->CFGR); 553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine */ 556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC); 1040 .loc 1 556 3 is_stmt 1 view .LVU312 1041 0098 E26D ldr r2, [r4, #92] 1042 009a 42F40052 orr r2, r2, #8192 1043 009e E265 str r2, [r4, #92] 557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Determine whether any further conversion upcoming on group injected */ 559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* by external trigger or by automatic injected conversion */ 560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from group regular. */ 561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((tmp_adc_inj_is_trigger_source_sw_start != 0UL) || 1044 .loc 1 561 3 view .LVU313 1045 .loc 1 561 6 is_stmt 0 view .LVU314 1046 00a0 30B9 cbnz r0, .L74 1047 .loc 1 561 66 discriminator 1 view .LVU315 1048 00a2 11F0007F tst r1, #33554432 1049 00a6 16D1 bne .L75 562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ((READ_BIT(tmp_cfgr, ADC_CFGR_JAUTO) == 0UL) && 1050 .loc 1 562 57 view .LVU316 1051 00a8 ADB1 cbz r5, .L75 563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ((tmp_adc_reg_is_trigger_source_sw_start != 0UL) && 1052 .loc 1 563 58 view .LVU317 1053 00aa 11F4005F tst r1, #8192 1054 00ae 12D1 bne .L75 1055 .L74: 564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (READ_BIT(tmp_cfgr, ADC_CFGR_CONT) == 0UL)))) 565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check whether end of sequence is reached */ ARM GAS /tmp/cc3JIfda.s page 155 567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS)) 1056 .loc 1 567 5 is_stmt 1 view .LVU318 1057 .loc 1 567 9 is_stmt 0 view .LVU319 1058 00b0 1A68 ldr r2, [r3] 1059 .loc 1 567 8 view .LVU320 1060 00b2 12F0400F tst r2, #64 1061 00b6 0ED0 beq .L75 568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Particular case if injected contexts queue is enabled: */ 570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* when the last context has been fully processed, JSQR is reset */ 571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* by the hardware. Even if no injected conversion is planned to come */ 572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (queue empty, triggers are ignored), it can start again */ 573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* immediately after setting a new context (JADSTART is still set). */ 574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Therefore, state of HAL ADC injected group is kept to busy. */ 575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (READ_BIT(tmp_cfgr, ADC_CFGR_JQM) == 0UL) 1062 .loc 1 575 7 is_stmt 1 view .LVU321 1063 .loc 1 575 10 is_stmt 0 view .LVU322 1064 00b8 11F4001F tst r1, #2097152 1065 00bc 0BD1 bne .L75 576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 1066 .loc 1 578 9 is_stmt 1 view .LVU323 1067 00be E26D ldr r2, [r4, #92] 1068 00c0 22F48052 bic r2, r2, #4096 1069 00c4 E265 str r2, [r4, #92] 579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->State & HAL_ADC_STATE_REG_BUSY) == 0UL) 1070 .loc 1 580 9 view .LVU324 1071 .loc 1 580 18 is_stmt 0 view .LVU325 1072 00c6 E26D ldr r2, [r4, #92] 1073 .loc 1 580 12 view .LVU326 1074 00c8 12F4807F tst r2, #256 1075 00cc 03D1 bne .L75 581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_READY); 1076 .loc 1 582 11 is_stmt 1 view .LVU327 1077 00ce E26D ldr r2, [r4, #92] 1078 00d0 42F00102 orr r2, r2, #1 1079 00d4 E265 str r2, [r4, #92] 1080 .L75: 583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear polled flag */ 589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_Flag_End == ADC_FLAG_JEOS) 1081 .loc 1 589 3 view .LVU328 1082 .loc 1 589 6 is_stmt 0 view .LVU329 1083 00d6 402E cmp r6, #64 1084 00d8 04D0 beq .L86 590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear end of sequence JEOS flag of injected group if low power feature */ 592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* "LowPowerAutoWait " is disabled, to not interfere with this feature. */ 593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* For injected groups, no new conversion will start before JEOS is */ 594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* cleared. */ ARM GAS /tmp/cc3JIfda.s page 156 595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (READ_BIT(tmp_cfgr, ADC_CFGR_AUTDLY) == 0UL) 596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS)); 598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC); 1085 .loc 1 602 5 is_stmt 1 view .LVU330 1086 00da 2022 movs r2, #32 1087 00dc 1A60 str r2, [r3] 603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return API HAL status */ 606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_OK; 1088 .loc 1 606 10 is_stmt 0 view .LVU331 1089 00de 0020 movs r0, #0 1090 .LVL86: 1091 .L66: 607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1092 .loc 1 607 1 view .LVU332 1093 00e0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} 1094 .LVL87: 1095 .L86: 595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1096 .loc 1 595 5 is_stmt 1 view .LVU333 595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1097 .loc 1 595 8 is_stmt 0 view .LVU334 1098 00e4 11F4804F tst r1, #16384 1099 00e8 03D1 bne .L81 597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1100 .loc 1 597 7 is_stmt 1 view .LVU335 1101 00ea 6022 movs r2, #96 1102 00ec 1A60 str r2, [r3] 606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1103 .loc 1 606 10 is_stmt 0 view .LVU336 1104 00ee 0020 movs r0, #0 1105 .LVL88: 606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1106 .loc 1 606 10 view .LVU337 1107 00f0 F6E7 b .L66 1108 .LVL89: 1109 .L81: 606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1110 .loc 1 606 10 view .LVU338 1111 00f2 0020 movs r0, #0 1112 .LVL90: 606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1113 .loc 1 606 10 view .LVU339 1114 00f4 F4E7 b .L66 1115 .L88: 1116 00f6 00BF .align 2 1117 .L87: 1118 00f8 00030050 .word 1342178048 1119 00fc 00010050 .word 1342177536 1120 .cfi_endproc 1121 .LFE334: ARM GAS /tmp/cc3JIfda.s page 157 1123 .section .text.HAL_ADCEx_InjectedStart_IT,"ax",%progbits 1124 .align 1 1125 .global HAL_ADCEx_InjectedStart_IT 1126 .syntax unified 1127 .thumb 1128 .thumb_func 1130 HAL_ADCEx_InjectedStart_IT: 1131 .LVL91: 1132 .LFB335: 608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable ADC, start conversion of injected group with interruption. 611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Interruptions enabled in this function according to initialization 612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * setting : JEOC (end of conversion) or JEOS (end of sequence) 613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Case of multimode enabled (when multimode feature is enabled): 614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStart_IT() API must be called for ADC slave first, 615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * then for ADC master. 616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC slave, ADC is enabled only (conversion is not started). 617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC master, ADC is enabled and multimode conversion is started. 618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle. 619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status. 620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef *hadc) 622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1133 .loc 1 622 1 is_stmt 1 view -0 1134 .cfi_startproc 1135 @ args = 0, pretend = 0, frame = 0 1136 @ frame_needed = 0, uses_anonymous_args = 0 1137 .loc 1 622 1 is_stmt 0 view .LVU341 1138 0000 38B5 push {r3, r4, r5, lr} 1139 .LCFI12: 1140 .cfi_def_cfa_offset 16 1141 .cfi_offset 3, -16 1142 .cfi_offset 4, -12 1143 .cfi_offset 5, -8 1144 .cfi_offset 14, -4 623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1145 .loc 1 623 3 is_stmt 1 view .LVU342 624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_config_injected_queue; 1146 .loc 1 624 3 view .LVU343 625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); 1147 .loc 1 626 3 view .LVU344 1148 .LVL92: 1149 .LBB316: 1150 .LBI316: 6392:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1151 .loc 2 6392 26 view .LVU345 1152 .LBB317: 6394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1153 .loc 2 6394 3 view .LVU346 6394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1154 .loc 2 6394 21 is_stmt 0 view .LVU347 1155 0002 4A4B ldr r3, .L114 1156 0004 9D68 ldr r5, [r3, #8] 1157 .LVL93: 6394:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/cc3JIfda.s page 158 1158 .loc 2 6394 21 view .LVU348 1159 .LBE317: 1160 .LBE316: 627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1161 .loc 1 630 3 is_stmt 1 view .LVU349 631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL) 1162 .loc 1 632 3 view .LVU350 1163 .loc 1 632 7 is_stmt 0 view .LVU351 1164 0006 0368 ldr r3, [r0] 1165 .LVL94: 1166 .LBB318: 1167 .LBI318: 7076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1168 .loc 2 7076 26 is_stmt 1 view .LVU352 1169 .LBB319: 1170 .loc 2 7078 3 view .LVU353 1171 .loc 2 7078 12 is_stmt 0 view .LVU354 1172 0008 9A68 ldr r2, [r3, #8] 1173 .loc 2 7078 76 view .LVU355 1174 000a 12F0080F tst r2, #8 1175 000e 40F08980 bne .L105 1176 0012 0446 mov r4, r0 1177 0014 05F01F05 and r5, r5, #31 1178 .LVL95: 1179 .loc 2 7078 76 view .LVU356 1180 .LBE319: 1181 .LBE318: 633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_BUSY; 635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* In case of software trigger detection enabled, JQDIS must be set 639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (which can be done only if ADSTART and JADSTART are both cleared). 640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** If JQDIS is not set at that point, returns an error 641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - since software trigger detection is disabled. User needs to 642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS. 643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means 644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** the queue is empty */ 645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); 1182 .loc 1 645 5 is_stmt 1 view .LVU357 1183 .loc 1 645 33 is_stmt 0 view .LVU358 1184 0018 DA68 ldr r2, [r3, #12] 1185 .LVL96: 646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL) 1186 .loc 1 647 5 is_stmt 1 view .LVU359 1187 .loc 1 647 10 is_stmt 0 view .LVU360 1188 001a DB6C ldr r3, [r3, #76] 1189 .loc 1 647 8 view .LVU361 1190 001c 13F4C07F tst r3, #384 1191 0020 01D1 bne .L91 648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_config_injected_queue == 0UL) ARM GAS /tmp/cc3JIfda.s page 159 1192 .loc 1 648 9 view .LVU362 1193 0022 002A cmp r2, #0 1194 0024 53DA bge .L110 1195 .L91: 649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 1196 .loc 1 656 5 is_stmt 1 view .LVU363 1197 .loc 1 656 5 view .LVU364 1198 0026 94F85830 ldrb r3, [r4, #88] @ zero_extendqisi2 1199 002a 012B cmp r3, #1 1200 002c 7CD0 beq .L106 1201 .loc 1 656 5 discriminator 2 view .LVU365 1202 002e 0123 movs r3, #1 1203 0030 84F85830 strb r3, [r4, #88] 1204 .loc 1 656 5 discriminator 2 view .LVU366 657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable the ADC peripheral */ 659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(hadc); 1205 .loc 1 659 5 discriminator 2 view .LVU367 1206 .loc 1 659 22 is_stmt 0 discriminator 2 view .LVU368 1207 0034 2046 mov r0, r4 1208 .LVL97: 1209 .loc 1 659 22 discriminator 2 view .LVU369 1210 0036 FFF7FEFF bl ADC_Enable 1211 .LVL98: 660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start conversion if ADC is effectively enabled */ 662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1212 .loc 1 662 5 is_stmt 1 discriminator 2 view .LVU370 1213 .loc 1 662 8 is_stmt 0 discriminator 2 view .LVU371 1214 003a 0028 cmp r0, #0 1215 003c 6ED1 bne .L92 663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if a regular conversion is ongoing */ 665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL) 1216 .loc 1 665 7 is_stmt 1 view .LVU372 1217 .loc 1 665 16 is_stmt 0 view .LVU373 1218 003e E36D ldr r3, [r4, #92] 1219 .loc 1 665 10 view .LVU374 1220 0040 13F4807F tst r3, #256 1221 0044 49D0 beq .L93 666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Reset ADC error code field related to injected conversions only */ 668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); 1222 .loc 1 668 9 is_stmt 1 view .LVU375 1223 0046 236E ldr r3, [r4, #96] 1224 0048 23F00803 bic r3, r3, #8 1225 004c 2366 str r3, [r4, #96] 1226 .L94: 669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else ARM GAS /tmp/cc3JIfda.s page 160 671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC error code to none */ 673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(hadc); 674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Clear state bitfield related to injected group conversion results */ 678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Set state bitfield related to injected operation */ 679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 1227 .loc 1 679 7 view .LVU376 1228 004e E36D ldr r3, [r4, #92] 1229 0050 23F44053 bic r3, r3, #12288 1230 0054 23F00103 bic r3, r3, #1 1231 0058 43F48053 orr r3, r3, #4096 1232 005c E365 str r3, [r4, #92] 680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, 681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY); 682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit 685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - if ADC instance is master or if multimode feature is not available 686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** - if multimode setting is disabled (ADC instance slave in independent mode) */ 687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 1233 .loc 1 687 7 view .LVU377 1234 .loc 1 687 12 is_stmt 0 view .LVU378 1235 005e 2368 ldr r3, [r4] 1236 0060 334A ldr r2, .L114+4 1237 0062 9342 cmp r3, r2 1238 0064 3CD0 beq .L111 1239 0066 1A46 mov r2, r3 1240 .L95: 1241 .loc 1 687 10 discriminator 4 view .LVU379 1242 0068 9342 cmp r3, r2 1243 006a 00D0 beq .L96 688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1244 .loc 1 688 11 view .LVU380 1245 006c 1DB9 cbnz r5, .L97 1246 .L96: 689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 1247 .loc 1 691 9 is_stmt 1 view .LVU381 1248 006e E26D ldr r2, [r4, #92] 1249 0070 22F48012 bic r2, r2, #1048576 1250 0074 E265 str r2, [r4, #92] 1251 .L97: 692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear ADC group injected group conversion flag */ 696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (To ensure of no unknown state from potential previous ADC operations) */ 697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS)); 1252 .loc 1 697 7 view .LVU382 1253 0076 6022 movs r2, #96 1254 0078 1A60 str r2, [r3] 698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ ARM GAS /tmp/cc3JIfda.s page 161 700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Unlock before starting ADC conversions: in case of potential */ 701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* interruption, to let the process to ADC IRQ Handler. */ 702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1255 .loc 1 702 7 view .LVU383 1256 .loc 1 702 7 view .LVU384 1257 007a 0023 movs r3, #0 1258 007c 84F85830 strb r3, [r4, #88] 1259 .loc 1 702 7 view .LVU385 703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable ADC Injected context queue overflow interrupt if this feature */ 705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* is enabled. */ 706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->Instance->CFGR & ADC_CFGR_JQM) != 0UL) 1260 .loc 1 706 7 view .LVU386 1261 .loc 1 706 16 is_stmt 0 view .LVU387 1262 0080 2368 ldr r3, [r4] 1263 .loc 1 706 26 view .LVU388 1264 0082 DA68 ldr r2, [r3, #12] 1265 .loc 1 706 10 view .LVU389 1266 0084 12F4001F tst r2, #2097152 1267 0088 03D0 beq .L98 707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_FLAG_JQOVF); 1268 .loc 1 708 9 is_stmt 1 view .LVU390 1269 008a 5A68 ldr r2, [r3, #4] 1270 008c 42F48062 orr r2, r2, #1024 1271 0090 5A60 str r2, [r3, #4] 1272 .L98: 709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable ADC end of conversion interrupt */ 712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** switch (hadc->Init.EOCSelection) 1273 .loc 1 712 7 view .LVU391 1274 .loc 1 712 25 is_stmt 0 view .LVU392 1275 0092 A369 ldr r3, [r4, #24] 1276 .loc 1 712 7 view .LVU393 1277 0094 082B cmp r3, #8 1278 0096 26D0 beq .L112 713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_EOC_SEQ_CONV: 715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); 716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); 717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* case ADC_EOC_SINGLE_CONV */ 719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** default: 720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS); 1279 .loc 1 720 11 is_stmt 1 view .LVU394 1280 0098 2268 ldr r2, [r4] 1281 009a 5368 ldr r3, [r2, #4] 1282 009c 23F04003 bic r3, r3, #64 1283 00a0 5360 str r3, [r2, #4] 721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); 1284 .loc 1 721 11 view .LVU395 1285 00a2 2268 ldr r2, [r4] 1286 00a4 5368 ldr r3, [r2, #4] 1287 00a6 43F02003 orr r3, r3, #32 1288 00aa 5360 str r3, [r2, #4] 722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; ARM GAS /tmp/cc3JIfda.s page 162 1289 .loc 1 722 11 view .LVU396 1290 .L100: 723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable conversion of injected group, if automatic injected conversion */ 726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* is disabled. */ 727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If software start has been selected, conversion starts immediately. */ 728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If external trigger has been selected, conversion will start at next */ 729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* trigger event. */ 730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Case of multimode enabled (when multimode feature is available): */ 731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if ADC is slave, */ 732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC is enabled only (conversion is not started), */ 733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - if multimode only concerns regular conversion, ADC is enabled */ 734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and conversion is started. */ 735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If ADC is master or independent, */ 736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - ADC is enabled and conversion is started. */ 737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) 1291 .loc 1 738 7 view .LVU397 1292 .loc 1 738 12 is_stmt 0 view .LVU398 1293 00ac 2368 ldr r3, [r4] 1294 00ae 204A ldr r2, .L114+4 1295 00b0 9342 cmp r3, r2 1296 00b2 23D0 beq .L113 1297 00b4 1A46 mov r2, r3 1298 .L101: 1299 .loc 1 738 10 discriminator 4 view .LVU399 1300 00b6 9342 cmp r3, r2 1301 00b8 23D0 beq .L102 739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1302 .loc 1 739 11 view .LVU400 1303 00ba 15B3 cbz r5, .L102 740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT) 1304 .loc 1 740 11 view .LVU401 1305 00bc 062D cmp r5, #6 1306 00be 20D0 beq .L102 741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL) 1307 .loc 1 741 11 view .LVU402 1308 00c0 072D cmp r5, #7 1309 00c2 1ED0 beq .L102 742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl 745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT) 746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_StartConversion(hadc->Instance); 748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ADC instance is not a multimode slave instance with multimode injected conversions enabl 753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 1310 .loc 1 753 9 is_stmt 1 view .LVU403 1311 00c4 E36D ldr r3, [r4, #92] 1312 00c6 43F48013 orr r3, r3, #1048576 1313 00ca E365 str r3, [r4, #92] 1314 00cc 2BE0 b .L90 ARM GAS /tmp/cc3JIfda.s page 163 1315 .LVL99: 1316 .L110: 651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 1317 .loc 1 651 7 view .LVU404 1318 00ce C36D ldr r3, [r0, #92] 1319 00d0 43F02003 orr r3, r3, #32 1320 00d4 C365 str r3, [r0, #92] 652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1321 .loc 1 652 7 view .LVU405 652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1322 .loc 1 652 14 is_stmt 0 view .LVU406 1323 00d6 0120 movs r0, #1 1324 .LVL100: 652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1325 .loc 1 652 14 view .LVU407 1326 00d8 25E0 b .L90 1327 .LVL101: 1328 .L93: 673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1329 .loc 1 673 9 is_stmt 1 view .LVU408 1330 00da 0023 movs r3, #0 1331 00dc 2366 str r3, [r4, #96] 1332 00de B6E7 b .L94 1333 .L111: 687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1334 .loc 1 687 12 is_stmt 0 view .LVU409 1335 00e0 4FF0A042 mov r2, #1342177280 1336 00e4 C0E7 b .L95 1337 .L112: 715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); 1338 .loc 1 715 11 is_stmt 1 view .LVU410 1339 00e6 2268 ldr r2, [r4] 1340 00e8 5368 ldr r3, [r2, #4] 1341 00ea 23F02003 bic r3, r3, #32 1342 00ee 5360 str r3, [r2, #4] 716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1343 .loc 1 716 11 view .LVU411 1344 00f0 2268 ldr r2, [r4] 1345 00f2 5368 ldr r3, [r2, #4] 1346 00f4 43F04003 orr r3, r3, #64 1347 00f8 5360 str r3, [r2, #4] 717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* case ADC_EOC_SINGLE_CONV */ 1348 .loc 1 717 11 view .LVU412 1349 00fa D7E7 b .L100 1350 .L113: 738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) 1351 .loc 1 738 12 is_stmt 0 view .LVU413 1352 00fc 4FF0A042 mov r2, #1342177280 1353 0100 D9E7 b .L101 1354 .L102: 745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1355 .loc 1 745 9 is_stmt 1 view .LVU414 1356 .LVL102: 1357 .LBB320: 1358 .LBI320: 4858:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1359 .loc 2 4858 26 view .LVU415 ARM GAS /tmp/cc3JIfda.s page 164 1360 .LBB321: 4860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1361 .loc 2 4860 3 view .LVU416 4860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1362 .loc 2 4860 21 is_stmt 0 view .LVU417 1363 0102 DA68 ldr r2, [r3, #12] 1364 .LVL103: 4860:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1365 .loc 2 4860 21 view .LVU418 1366 .LBE321: 1367 .LBE320: 745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1368 .loc 1 745 12 view .LVU419 1369 0104 12F0007F tst r2, #33554432 1370 0108 0DD1 bne .L90 747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1371 .loc 1 747 11 is_stmt 1 view .LVU420 1372 .LVL104: 1373 .LBB322: 1374 .LBI322: 7040:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1375 .loc 2 7040 22 view .LVU421 1376 .LBB323: 7045:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 1377 .loc 2 7045 3 view .LVU422 1378 010a 9A68 ldr r2, [r3, #8] 1379 010c 22F00042 bic r2, r2, #-2147483648 1380 0110 22F03F02 bic r2, r2, #63 1381 0114 42F00802 orr r2, r2, #8 1382 0118 9A60 str r2, [r3, #8] 7048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1383 .loc 2 7048 1 is_stmt 0 view .LVU423 1384 011a 04E0 b .L90 1385 .LVL105: 1386 .L92: 7048:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1387 .loc 2 7048 1 view .LVU424 1388 .LBE323: 1389 .LBE322: 754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #else 756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT) 757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start ADC group injected conversion */ 759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_StartConversion(hadc->Instance); 760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif 762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1390 .loc 1 767 7 is_stmt 1 view .LVU425 1391 .loc 1 767 7 view .LVU426 1392 011c 0023 movs r3, #0 1393 011e 84F85830 strb r3, [r4, #88] ARM GAS /tmp/cc3JIfda.s page 165 1394 .loc 1 767 7 view .LVU427 768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 1395 .loc 1 771 5 view .LVU428 1396 .loc 1 771 12 is_stmt 0 view .LVU429 1397 0122 00E0 b .L90 1398 .LVL106: 1399 .L105: 634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1400 .loc 1 634 12 view .LVU430 1401 0124 0220 movs r0, #2 1402 .LVL107: 1403 .L90: 772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1404 .loc 1 773 1 view .LVU431 1405 0126 38BD pop {r3, r4, r5, pc} 1406 .LVL108: 1407 .L106: 656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1408 .loc 1 656 5 view .LVU432 1409 0128 0220 movs r0, #2 1410 .LVL109: 656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1411 .loc 1 656 5 view .LVU433 1412 012a FCE7 b .L90 1413 .L115: 1414 .align 2 1415 .L114: 1416 012c 00030050 .word 1342178048 1417 0130 00010050 .word 1342177536 1418 .cfi_endproc 1419 .LFE335: 1421 .section .text.HAL_ADCEx_InjectedStop_IT,"ax",%progbits 1422 .align 1 1423 .global HAL_ADCEx_InjectedStop_IT 1424 .syntax unified 1425 .thumb 1426 .thumb_func 1428 HAL_ADCEx_InjectedStop_IT: 1429 .LVL110: 1430 .LFB336: 774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop conversion of injected channels, disable interruption of 777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * end-of-conversion. Disable ADC peripheral if no regular conversion 778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * is on going. 779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note If ADC must be disabled and if conversion is on going on 780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * regular group, function HAL_ADC_Stop must be used to stop both 781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * injected and regular groups, and disable the ADC. 782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note If injected group mode auto-injection is enabled, 783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * function HAL_ADC_Stop must be used. 784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Case of multimode enabled (when multimode feature is available): 785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedStop_IT() API must be called for ADC master first, 786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * then for ADC slave. ARM GAS /tmp/cc3JIfda.s page 166 787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC master, conversion is stopped and ADC is disabled. 788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For ADC slave, ADC is disabled only (conversion stop of ADC master 789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * has already stopped conversion of ADC slave). 790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of auto-injection mode, HAL_ADC_Stop() must be used. 791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef *hadc) 795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1431 .loc 1 795 1 is_stmt 1 view -0 1432 .cfi_startproc 1433 @ args = 0, pretend = 0, frame = 0 1434 @ frame_needed = 0, uses_anonymous_args = 0 796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1435 .loc 1 796 3 view .LVU435 797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 1436 .loc 1 799 3 view .LVU436 800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 1437 .loc 1 802 3 view .LVU437 1438 .loc 1 802 3 view .LVU438 1439 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 1440 0004 012B cmp r3, #1 1441 0006 28D0 beq .L120 795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1442 .loc 1 795 1 is_stmt 0 discriminator 2 view .LVU439 1443 0008 10B5 push {r4, lr} 1444 .LCFI13: 1445 .cfi_def_cfa_offset 8 1446 .cfi_offset 4, -8 1447 .cfi_offset 14, -4 1448 000a 0446 mov r4, r0 1449 .loc 1 802 3 is_stmt 1 discriminator 2 view .LVU440 1450 000c 0123 movs r3, #1 1451 000e 80F85830 strb r3, [r0, #88] 1452 .loc 1 802 3 discriminator 2 view .LVU441 803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential conversion on going on injected group only. */ 805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP); 1453 .loc 1 805 3 discriminator 2 view .LVU442 1454 .loc 1 805 20 is_stmt 0 discriminator 2 view .LVU443 1455 0012 0221 movs r1, #2 1456 0014 FFF7FEFF bl ADC_ConversionStop 1457 .LVL111: 806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if injected conversions are effectively stopped */ 808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and if no conversion on the other group (regular group) is intended to */ 809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* continue. */ 810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1458 .loc 1 810 3 is_stmt 1 discriminator 2 view .LVU444 1459 .loc 1 810 6 is_stmt 0 discriminator 2 view .LVU445 1460 0018 68B9 cbnz r0, .L118 811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC end of conversion interrupt for injected channels */ ARM GAS /tmp/cc3JIfda.s page 167 813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC | ADC_IT_JEOS | ADC_FLAG_JQOVF)); 1461 .loc 1 813 5 is_stmt 1 view .LVU446 1462 001a 2268 ldr r2, [r4] 1463 001c 5368 ldr r3, [r2, #4] 1464 001e 23F48C63 bic r3, r3, #1120 1465 0022 5360 str r3, [r2, #4] 814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) 1466 .loc 1 815 5 view .LVU447 1467 .loc 1 815 9 is_stmt 0 view .LVU448 1468 0024 2368 ldr r3, [r4] 1469 .LVL112: 1470 .LBB324: 1471 .LBI324: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1472 .loc 2 6851 26 is_stmt 1 view .LVU449 1473 .LBB325: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1474 .loc 2 6853 3 view .LVU450 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1475 .loc 2 6853 12 is_stmt 0 view .LVU451 1476 0026 9B68 ldr r3, [r3, #8] 1477 .LVL113: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1478 .loc 2 6853 74 view .LVU452 1479 0028 13F0040F tst r3, #4 1480 002c 07D0 beq .L119 1481 .LVL114: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1482 .loc 2 6853 74 view .LVU453 1483 .LBE325: 1484 .LBE324: 816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */ 818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Conversion on injected group is stopped, but ADC not disabled since */ 830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on regular group is still running. */ 831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 1485 .loc 1 834 7 is_stmt 1 view .LVU454 1486 002e E36D ldr r3, [r4, #92] 1487 0030 23F48053 bic r3, r3, #4096 1488 0034 E365 str r3, [r4, #92] 1489 .L118: 835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } ARM GAS /tmp/cc3JIfda.s page 168 836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1490 .loc 1 839 3 view .LVU455 1491 .loc 1 839 3 view .LVU456 1492 0036 0023 movs r3, #0 1493 0038 84F85830 strb r3, [r4, #88] 1494 .loc 1 839 3 view .LVU457 840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 1495 .loc 1 842 3 view .LVU458 843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1496 .loc 1 843 1 is_stmt 0 view .LVU459 1497 003c 10BD pop {r4, pc} 1498 .LVL115: 1499 .L119: 818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1500 .loc 1 818 7 is_stmt 1 view .LVU460 818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1501 .loc 1 818 24 is_stmt 0 view .LVU461 1502 003e 2046 mov r0, r4 1503 .LVL116: 818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1504 .loc 1 818 24 view .LVU462 1505 0040 FFF7FEFF bl ADC_Disable 1506 .LVL117: 821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1507 .loc 1 821 7 is_stmt 1 view .LVU463 821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1508 .loc 1 821 10 is_stmt 0 view .LVU464 1509 0044 0028 cmp r0, #0 1510 0046 F6D1 bne .L118 824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 1511 .loc 1 824 9 is_stmt 1 view .LVU465 1512 0048 E36D ldr r3, [r4, #92] 1513 004a 23F48853 bic r3, r3, #4352 1514 004e 23F00103 bic r3, r3, #1 1515 0052 43F00103 orr r3, r3, #1 1516 0056 E365 str r3, [r4, #92] 1517 0058 EDE7 b .L118 1518 .LVL118: 1519 .L120: 1520 .LCFI14: 1521 .cfi_def_cfa_offset 0 1522 .cfi_restore 4 1523 .cfi_restore 14 802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1524 .loc 1 802 3 is_stmt 0 view .LVU466 1525 005a 0220 movs r0, #2 1526 .LVL119: 1527 .loc 1 843 1 view .LVU467 1528 005c 7047 bx lr 1529 .cfi_endproc 1530 .LFE336: 1532 .section .text.HAL_ADCEx_MultiModeStart_DMA,"ax",%progbits ARM GAS /tmp/cc3JIfda.s page 169 1533 .align 1 1534 .global HAL_ADCEx_MultiModeStart_DMA 1535 .syntax unified 1536 .thumb 1537 .thumb_func 1539 HAL_ADCEx_MultiModeStart_DMA: 1540 .LVL120: 1541 .LFB337: 844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable ADC, start MultiMode conversion and transfer regular results through DMA. 848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Multimode must have been previously configured using 849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_MultiModeConfigChannel() function. 850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Interruptions enabled in this function: 851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * overrun, DMA half transfer, DMA transfer complete. 852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Each of these interruptions has its dedicated callback function. 853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note State field of Slave ADC handle is not updated in this configuration: 854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * user should not rely on it for information related to Slave regular 855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * conversions. 856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC master (handle of ADC slave must not be used) 857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param pData Destination Buffer address. 858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes). 859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t L 862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1542 .loc 1 862 1 is_stmt 1 view -0 1543 .cfi_startproc 1544 @ args = 0, pretend = 0, frame = 112 1545 @ frame_needed = 0, uses_anonymous_args = 0 1546 .loc 1 862 1 is_stmt 0 view .LVU469 1547 0000 70B5 push {r4, r5, r6, lr} 1548 .LCFI15: 1549 .cfi_def_cfa_offset 16 1550 .cfi_offset 4, -16 1551 .cfi_offset 5, -12 1552 .cfi_offset 6, -8 1553 .cfi_offset 14, -4 1554 0002 9CB0 sub sp, sp, #112 1555 .LCFI16: 1556 .cfi_def_cfa_offset 128 1557 0004 0446 mov r4, r0 863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1558 .loc 1 863 3 is_stmt 1 view .LVU470 864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_HandleTypeDef tmphadcSlave; 1559 .loc 1 864 3 view .LVU471 865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 1560 .loc 1 865 3 view .LVU472 866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 1561 .loc 1 868 3 view .LVU473 869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); 1562 .loc 1 869 3 view .LVU474 870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); 1563 .loc 1 870 3 view .LVU475 ARM GAS /tmp/cc3JIfda.s page 170 871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); 1564 .loc 1 871 3 view .LVU476 872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL) 1565 .loc 1 873 3 view .LVU477 1566 .loc 1 873 7 is_stmt 0 view .LVU478 1567 0006 0068 ldr r0, [r0] 1568 .LVL121: 1569 .LBB326: 1570 .LBI326: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1571 .loc 2 6851 26 is_stmt 1 view .LVU479 1572 .LBB327: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1573 .loc 2 6853 3 view .LVU480 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1574 .loc 2 6853 12 is_stmt 0 view .LVU481 1575 0008 8068 ldr r0, [r0, #8] 1576 .LVL122: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1577 .loc 2 6853 74 view .LVU482 1578 000a 10F0040F tst r0, #4 1579 000e 5AD1 bne .L132 1580 0010 0E46 mov r6, r1 1581 0012 1546 mov r5, r2 1582 .LVL123: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1583 .loc 2 6853 74 view .LVU483 1584 .LBE327: 1585 .LBE326: 874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_BUSY; 876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 1586 .loc 1 880 5 is_stmt 1 view .LVU484 1587 .loc 1 880 5 view .LVU485 1588 0014 94F85830 ldrb r3, [r4, #88] @ zero_extendqisi2 1589 0018 012B cmp r3, #1 1590 001a 57D0 beq .L133 1591 .loc 1 880 5 discriminator 2 view .LVU486 1592 001c 0123 movs r3, #1 1593 001e 84F85830 strb r3, [r4, #88] 1594 .loc 1 880 5 discriminator 2 view .LVU487 881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Temporary handle minimum initialization */ 883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_RESET_HANDLE_STATE(&tmphadcSlave); 1595 .loc 1 883 5 discriminator 2 view .LVU488 1596 0022 0023 movs r3, #0 1597 0024 1893 str r3, [sp, #96] 884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmphadcSlave); 1598 .loc 1 884 5 discriminator 2 view .LVU489 1599 0026 1993 str r3, [sp, #100] 885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set a temporary handle of the ADC slave associated to the ADC master */ ARM GAS /tmp/cc3JIfda.s page 171 887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmphadcSlave); 1600 .loc 1 887 5 discriminator 2 view .LVU490 1601 0028 2368 ldr r3, [r4] 1602 002a B3F1A04F cmp r3, #1342177280 1603 002e 0BD0 beq .L135 1604 0030 0023 movs r3, #0 1605 0032 0193 str r3, [sp, #4] 1606 .L128: 888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmphadcSlave.Instance == NULL) 1607 .loc 1 889 5 view .LVU491 1608 .loc 1 889 21 is_stmt 0 view .LVU492 1609 0034 019B ldr r3, [sp, #4] 1610 .loc 1 889 8 view .LVU493 1611 0036 5BB1 cbz r3, .L136 890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable the ADC peripherals: master and slave (in case if not already */ 901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* enabled previously) */ 902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(hadc); 1612 .loc 1 902 5 is_stmt 1 view .LVU494 1613 .loc 1 902 22 is_stmt 0 view .LVU495 1614 0038 2046 mov r0, r4 1615 003a FFF7FEFF bl ADC_Enable 1616 .LVL124: 903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1617 .loc 1 903 5 is_stmt 1 view .LVU496 1618 .loc 1 903 8 is_stmt 0 view .LVU497 1619 003e 80B1 cbz r0, .L137 1620 .L130: 1621 .LVL125: 904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Enable(&tmphadcSlave); 906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start multimode conversion of ADCs pair */ 909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ 914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY); 915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC error code to none */ 917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(hadc); 918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the DMA transfer complete callback */ 920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/cc3JIfda.s page 172 922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the DMA half transfer complete callback */ 923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; 924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the DMA error callback */ 926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ; 927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Pointer to the common control register */ 929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance); 930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */ 932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* start (in case of SW start): */ 933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear regular group conversion flag and overrun flag */ 935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (To ensure of no unknown state from potential previous ADC operations) */ 936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); 937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Unlock before starting ADC conversions: in case of potential */ 940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* interruption, to let the process to ADC IRQ Handler. */ 941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable ADC overrun interrupt */ 944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); 945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start the DMA channel */ 947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t) 948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable conversion of regular group. */ 950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If software start has been selected, conversion starts immediately. */ 951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If external trigger has been selected, conversion will start at next */ 952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* trigger event. */ 953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Start ADC group regular conversion */ 954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_REG_StartConversion(hadc->Instance); 955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1622 .loc 1 959 7 is_stmt 1 view .LVU498 1623 .loc 1 959 7 view .LVU499 1624 0040 0023 movs r3, #0 1625 0042 84F85830 strb r3, [r4, #88] 1626 .LVL126: 1627 .loc 1 959 7 view .LVU500 960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 1628 .loc 1 963 5 view .LVU501 1629 .loc 1 963 12 is_stmt 0 view .LVU502 1630 0046 3FE0 b .L126 1631 .LVL127: 1632 .L135: 887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1633 .loc 1 887 5 discriminator 1 view .LVU503 1634 0048 03F58073 add r3, r3, #256 1635 004c 0193 str r3, [sp, #4] ARM GAS /tmp/cc3JIfda.s page 173 1636 004e F1E7 b .L128 1637 .L136: 892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1638 .loc 1 892 7 is_stmt 1 view .LVU504 1639 0050 E36D ldr r3, [r4, #92] 1640 0052 43F02003 orr r3, r3, #32 1641 0056 E365 str r3, [r4, #92] 895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1642 .loc 1 895 7 view .LVU505 895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1643 .loc 1 895 7 view .LVU506 1644 0058 0023 movs r3, #0 1645 005a 84F85830 strb r3, [r4, #88] 895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1646 .loc 1 895 7 view .LVU507 897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1647 .loc 1 897 7 view .LVU508 897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1648 .loc 1 897 14 is_stmt 0 view .LVU509 1649 005e 0120 movs r0, #1 1650 0060 32E0 b .L126 1651 .LVL128: 1652 .L137: 905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1653 .loc 1 905 7 is_stmt 1 view .LVU510 905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1654 .loc 1 905 24 is_stmt 0 view .LVU511 1655 0062 01A8 add r0, sp, #4 1656 .LVL129: 905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1657 .loc 1 905 24 view .LVU512 1658 0064 FFF7FEFF bl ADC_Enable 1659 .LVL130: 909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1660 .loc 1 909 5 is_stmt 1 view .LVU513 909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1661 .loc 1 909 8 is_stmt 0 view .LVU514 1662 0068 0028 cmp r0, #0 1663 006a E9D1 bne .L130 912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ 1664 .loc 1 912 7 is_stmt 1 view .LVU515 1665 006c E36D ldr r3, [r4, #92] 1666 006e 23F47063 bic r3, r3, #3840 1667 0072 23F00103 bic r3, r3, #1 1668 0076 43F48073 orr r3, r3, #256 1669 007a E365 str r3, [r4, #92] 917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1670 .loc 1 917 7 view .LVU516 1671 007c 0023 movs r3, #0 1672 007e 2366 str r3, [r4, #96] 920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1673 .loc 1 920 7 view .LVU517 920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1674 .loc 1 920 11 is_stmt 0 view .LVU518 1675 0080 626D ldr r2, [r4, #84] 920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1676 .loc 1 920 42 view .LVU519 ARM GAS /tmp/cc3JIfda.s page 174 1677 0082 1349 ldr r1, .L138 1678 0084 D162 str r1, [r2, #44] 923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1679 .loc 1 923 7 is_stmt 1 view .LVU520 923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1680 .loc 1 923 11 is_stmt 0 view .LVU521 1681 0086 626D ldr r2, [r4, #84] 923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1682 .loc 1 923 46 view .LVU522 1683 0088 1249 ldr r1, .L138+4 1684 008a 1163 str r1, [r2, #48] 926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1685 .loc 1 926 7 is_stmt 1 view .LVU523 926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1686 .loc 1 926 11 is_stmt 0 view .LVU524 1687 008c 626D ldr r2, [r4, #84] 926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1688 .loc 1 926 43 view .LVU525 1689 008e 1249 ldr r1, .L138+8 1690 0090 5163 str r1, [r2, #52] 929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1691 .loc 1 929 7 is_stmt 1 view .LVU526 1692 .LVL131: 936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1693 .loc 1 936 7 view .LVU527 1694 0092 2268 ldr r2, [r4] 1695 0094 1C21 movs r1, #28 1696 0096 1160 str r1, [r2] 941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1697 .loc 1 941 7 view .LVU528 941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1698 .loc 1 941 7 view .LVU529 1699 0098 84F85830 strb r3, [r4, #88] 941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1700 .loc 1 941 7 view .LVU530 944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1701 .loc 1 944 7 view .LVU531 1702 009c 2268 ldr r2, [r4] 1703 009e 5368 ldr r3, [r2, #4] 1704 00a0 43F01003 orr r3, r3, #16 1705 00a4 5360 str r3, [r2, #4] 947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1706 .loc 1 947 7 view .LVU532 947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1707 .loc 1 947 24 is_stmt 0 view .LVU533 1708 00a6 2B46 mov r3, r5 1709 00a8 3246 mov r2, r6 1710 00aa 0C49 ldr r1, .L138+12 1711 00ac 606D ldr r0, [r4, #84] 1712 .LVL132: 947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1713 .loc 1 947 24 view .LVU534 1714 00ae FFF7FEFF bl HAL_DMA_Start_IT 1715 .LVL133: 954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1716 .loc 1 954 7 is_stmt 1 view .LVU535 1717 00b2 2268 ldr r2, [r4] ARM GAS /tmp/cc3JIfda.s page 175 1718 .LVL134: 1719 .LBB328: 1720 .LBI328: 6815:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1721 .loc 2 6815 22 view .LVU536 1722 .LBB329: 6820:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 1723 .loc 2 6820 3 view .LVU537 1724 00b4 9368 ldr r3, [r2, #8] 1725 00b6 23F00043 bic r3, r3, #-2147483648 1726 00ba 23F03F03 bic r3, r3, #63 1727 00be 43F00403 orr r3, r3, #4 1728 00c2 9360 str r3, [r2, #8] 6823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1729 .loc 2 6823 1 is_stmt 0 view .LVU538 1730 00c4 00E0 b .L126 1731 .LVL135: 1732 .L132: 6823:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 1733 .loc 2 6823 1 view .LVU539 1734 .LBE329: 1735 .LBE328: 875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1736 .loc 1 875 12 view .LVU540 1737 00c6 0220 movs r0, #2 1738 .LVL136: 1739 .L126: 964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1740 .loc 1 965 1 view .LVU541 1741 00c8 1CB0 add sp, sp, #112 1742 .LCFI17: 1743 .cfi_remember_state 1744 .cfi_def_cfa_offset 16 1745 @ sp needed 1746 00ca 70BD pop {r4, r5, r6, pc} 1747 .LVL137: 1748 .L133: 1749 .LCFI18: 1750 .cfi_restore_state 880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1751 .loc 1 880 5 view .LVU542 1752 00cc 0220 movs r0, #2 1753 00ce FBE7 b .L126 1754 .L139: 1755 .align 2 1756 .L138: 1757 00d0 00000000 .word ADC_DMAConvCplt 1758 00d4 00000000 .word ADC_DMAHalfConvCplt 1759 00d8 00000000 .word ADC_DMAError 1760 00dc 0C030050 .word 1342178060 1761 .cfi_endproc 1762 .LFE337: 1764 .section .text.HAL_ADCEx_MultiModeStop_DMA,"ax",%progbits 1765 .align 1 1766 .global HAL_ADCEx_MultiModeStop_DMA 1767 .syntax unified ARM GAS /tmp/cc3JIfda.s page 176 1768 .thumb 1769 .thumb_func 1771 HAL_ADCEx_MultiModeStop_DMA: 1772 .LVL138: 1773 .LFB338: 966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral. 969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Multimode is kept enabled after this function. MultiMode DMA bits 970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (MDMA and DMACFG bits of common CCR register) are maintained. To disable 971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be 972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can 973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * resort to HAL_ADCEx_DisableMultiMode() API. 974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of DMA configured in circular mode, function 975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADC_Stop_DMA() must be called after this function with handle of 976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC slave, to properly disable the DMA channel. 977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC master (handle of ADC slave must not be used) 978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc) 981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1774 .loc 1 981 1 is_stmt 1 view -0 1775 .cfi_startproc 1776 @ args = 0, pretend = 0, frame = 112 1777 @ frame_needed = 0, uses_anonymous_args = 0 1778 .loc 1 981 1 is_stmt 0 view .LVU544 1779 0000 70B5 push {r4, r5, r6, lr} 1780 .LCFI19: 1781 .cfi_def_cfa_offset 16 1782 .cfi_offset 4, -16 1783 .cfi_offset 5, -12 1784 .cfi_offset 6, -8 1785 .cfi_offset 14, -4 1786 0002 9CB0 sub sp, sp, #112 1787 .LCFI20: 1788 .cfi_def_cfa_offset 128 982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 1789 .loc 1 982 3 is_stmt 1 view .LVU545 983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tickstart; 1790 .loc 1 983 3 view .LVU546 984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_HandleTypeDef tmphadcSlave; 1791 .loc 1 984 3 view .LVU547 985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmphadcSlave_conversion_on_going; 1792 .loc 1 985 3 view .LVU548 986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmphadcSlave_disable_status; 1793 .loc 1 986 3 view .LVU549 987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 1794 .loc 1 989 3 view .LVU550 990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 1795 .loc 1 992 3 view .LVU551 1796 .loc 1 992 3 view .LVU552 1797 0004 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 1798 0008 012B cmp r3, #1 ARM GAS /tmp/cc3JIfda.s page 177 1799 000a 00F08580 beq .L158 1800 000e 0446 mov r4, r0 1801 .loc 1 992 3 discriminator 2 view .LVU553 1802 0010 0123 movs r3, #1 1803 0012 80F85830 strb r3, [r0, #88] 1804 .loc 1 992 3 discriminator 2 view .LVU554 993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential multimode conversion on going, on regular and injected groups */ 996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); 1805 .loc 1 996 3 discriminator 2 view .LVU555 1806 .loc 1 996 20 is_stmt 0 discriminator 2 view .LVU556 1807 0016 0321 movs r1, #3 1808 0018 FFF7FEFF bl ADC_ConversionStop 1809 .LVL139: 997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped */ 999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1810 .loc 1 999 3 is_stmt 1 discriminator 2 view .LVU557 1811 .loc 1 999 6 is_stmt 0 discriminator 2 view .LVU558 1812 001c 0546 mov r5, r0 1813 001e 0028 cmp r0, #0 1814 0020 74D1 bne .L142 1000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Temporary handle minimum initialization */ 1002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_RESET_HANDLE_STATE(&tmphadcSlave); 1815 .loc 1 1002 5 is_stmt 1 view .LVU559 1816 0022 0023 movs r3, #0 1817 0024 1893 str r3, [sp, #96] 1003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmphadcSlave); 1818 .loc 1 1003 5 view .LVU560 1819 0026 1993 str r3, [sp, #100] 1004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set a temporary handle of the ADC slave associated to the ADC master */ 1006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmphadcSlave); 1820 .loc 1 1006 5 view .LVU561 1821 0028 2368 ldr r3, [r4] 1822 002a B3F1A04F cmp r3, #1342177280 1823 002e 0DD0 beq .L161 1824 .loc 1 1006 5 is_stmt 0 discriminator 2 view .LVU562 1825 0030 0023 movs r3, #0 1826 0032 0193 str r3, [sp, #4] 1827 .L144: 1007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmphadcSlave.Instance == NULL) 1828 .loc 1 1008 5 is_stmt 1 view .LVU563 1829 .loc 1 1008 21 is_stmt 0 view .LVU564 1830 0034 019B ldr r3, [sp, #4] 1831 .loc 1 1008 8 view .LVU565 1832 0036 6BB1 cbz r3, .L162 1009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 1012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/cc3JIfda.s page 178 1016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 1017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Procedure to disable the ADC peripheral: wait for conversions */ 1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* effectively stopped (ADC master and ADC slave), then disable ADC */ 1021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Wait for ADC conversion completion for ADC master and ADC slave */ 1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); 1833 .loc 1 1023 5 is_stmt 1 view .LVU566 1834 .loc 1 1023 17 is_stmt 0 view .LVU567 1835 0038 FFF7FEFF bl HAL_GetTick 1836 .LVL140: 1837 .loc 1 1023 17 view .LVU568 1838 003c 0546 mov r5, r0 1839 .LVL141: 1024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance); 1840 .loc 1 1025 5 is_stmt 1 view .LVU569 1841 .loc 1 1025 40 is_stmt 0 view .LVU570 1842 003e 019B ldr r3, [sp, #4] 1843 .LVL142: 1844 .LBB330: 1845 .LBI330: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1846 .loc 2 6851 26 is_stmt 1 view .LVU571 1847 .LBB331: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1848 .loc 2 6853 3 view .LVU572 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1849 .loc 2 6853 12 is_stmt 0 view .LVU573 1850 0040 9B68 ldr r3, [r3, #8] 1851 .LVL143: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1852 .loc 2 6853 74 view .LVU574 1853 0042 13F00403 ands r3, r3, #4 1854 0046 13D0 beq .L153 1855 0048 0123 movs r3, #1 1856 004a 11E0 b .L153 1857 .LVL144: 1858 .L161: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1859 .loc 2 6853 74 view .LVU575 1860 .LBE331: 1861 .LBE330: 1006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1862 .loc 1 1006 5 discriminator 1 view .LVU576 1863 004c 03F58073 add r3, r3, #256 1864 0050 0193 str r3, [sp, #4] 1865 0052 EFE7 b .L144 1866 .L162: 1011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1867 .loc 1 1011 7 is_stmt 1 view .LVU577 1868 0054 E36D ldr r3, [r4, #92] 1869 0056 43F02003 orr r3, r3, #32 1870 005a E365 str r3, [r4, #92] 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1871 .loc 1 1014 7 view .LVU578 ARM GAS /tmp/cc3JIfda.s page 179 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1872 .loc 1 1014 7 view .LVU579 1873 005c 0023 movs r3, #0 1874 005e 84F85830 strb r3, [r4, #88] 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1875 .loc 1 1014 7 view .LVU580 1016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1876 .loc 1 1016 7 view .LVU581 1016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1877 .loc 1 1016 14 is_stmt 0 view .LVU582 1878 0062 0125 movs r5, #1 1879 0064 55E0 b .L141 1880 .LVL145: 1881 .L148: 1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 1028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) 1031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* New check to avoid false timeout detection in case of preemption */ 1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance 1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 1036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 1040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 1045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance); 1882 .loc 1 1048 7 is_stmt 1 view .LVU583 1883 .loc 1 1048 42 is_stmt 0 view .LVU584 1884 0066 019B ldr r3, [sp, #4] 1885 .LVL146: 1886 .LBB332: 1887 .LBI332: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1888 .loc 2 6851 26 is_stmt 1 view .LVU585 1889 .LBB333: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1890 .loc 2 6853 3 view .LVU586 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1891 .loc 2 6853 12 is_stmt 0 view .LVU587 1892 0068 9B68 ldr r3, [r3, #8] 1893 .LVL147: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1894 .loc 2 6853 74 view .LVU588 1895 006a 13F00403 ands r3, r3, #4 1896 006e 21D1 bne .L151 1897 .LVL148: ARM GAS /tmp/cc3JIfda.s page 180 1898 .L153: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1899 .loc 2 6853 74 view .LVU589 1900 .LBE333: 1901 .LBE332: 1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1902 .loc 1 1027 12 is_stmt 1 view .LVU590 1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 1903 .loc 1 1026 13 is_stmt 0 view .LVU591 1904 0070 2268 ldr r2, [r4] 1905 .LVL149: 1906 .LBB335: 1907 .LBI335: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1908 .loc 2 6851 26 is_stmt 1 view .LVU592 1909 .LBB336: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1910 .loc 2 6853 3 view .LVU593 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1911 .loc 2 6853 12 is_stmt 0 view .LVU594 1912 0072 9268 ldr r2, [r2, #8] 1913 .LVL150: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1914 .loc 2 6853 74 view .LVU595 1915 0074 12F0040F tst r2, #4 1916 0078 01D1 bne .L154 1917 .LVL151: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1918 .loc 2 6853 74 view .LVU596 1919 .LBE336: 1920 .LBE335: 1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1921 .loc 1 1027 12 view .LVU597 1922 007a 012B cmp r3, #1 1923 007c 1CD1 bne .L163 1924 .L154: 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1925 .loc 1 1030 7 is_stmt 1 view .LVU598 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1926 .loc 1 1030 12 is_stmt 0 view .LVU599 1927 007e FFF7FEFF bl HAL_GetTick 1928 .LVL152: 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1929 .loc 1 1030 26 view .LVU600 1930 0082 431B subs r3, r0, r5 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1931 .loc 1 1030 10 view .LVU601 1932 0084 052B cmp r3, #5 1933 0086 EED9 bls .L148 1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1934 .loc 1 1033 9 is_stmt 1 view .LVU602 1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1935 .loc 1 1033 44 is_stmt 0 view .LVU603 1936 0088 019B ldr r3, [sp, #4] 1937 .LVL153: 1938 .LBB337: 1939 .LBI337: ARM GAS /tmp/cc3JIfda.s page 181 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1940 .loc 2 6851 26 is_stmt 1 view .LVU604 1941 .LBB338: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1942 .loc 2 6853 3 view .LVU605 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1943 .loc 2 6853 12 is_stmt 0 view .LVU606 1944 008a 9B68 ldr r3, [r3, #8] 1945 .LVL154: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1946 .loc 2 6853 74 view .LVU607 1947 008c 13F00403 ands r3, r3, #4 1948 0090 00D0 beq .L149 1949 0092 0123 movs r3, #1 1950 .L149: 1951 .LVL155: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1952 .loc 2 6853 74 view .LVU608 1953 .LBE338: 1954 .LBE337: 1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 1955 .loc 1 1034 9 is_stmt 1 view .LVU609 1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 1956 .loc 1 1034 14 is_stmt 0 view .LVU610 1957 0094 2268 ldr r2, [r4] 1958 .LVL156: 1959 .LBB339: 1960 .LBI339: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 1961 .loc 2 6851 26 is_stmt 1 view .LVU611 1962 .LBB340: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1963 .loc 2 6853 3 view .LVU612 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1964 .loc 2 6853 12 is_stmt 0 view .LVU613 1965 0096 9268 ldr r2, [r2, #8] 1966 .LVL157: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1967 .loc 2 6853 74 view .LVU614 1968 0098 12F0040F tst r2, #4 1969 009c 01D1 bne .L150 1970 .LVL158: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1971 .loc 2 6853 74 view .LVU615 1972 .LBE340: 1973 .LBE339: 1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1974 .loc 1 1035 13 view .LVU616 1975 009e 012B cmp r3, #1 1976 00a0 E1D1 bne .L148 1977 .L150: 1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1978 .loc 1 1039 11 is_stmt 1 view .LVU617 1979 00a2 E36D ldr r3, [r4, #92] 1980 .LVL159: 1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1981 .loc 1 1039 11 is_stmt 0 view .LVU618 ARM GAS /tmp/cc3JIfda.s page 182 1982 00a4 43F01003 orr r3, r3, #16 1983 00a8 E365 str r3, [r4, #92] 1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1984 .loc 1 1042 11 is_stmt 1 view .LVU619 1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1985 .loc 1 1042 11 view .LVU620 1986 00aa 0023 movs r3, #0 1987 00ac 84F85830 strb r3, [r4, #88] 1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1988 .loc 1 1042 11 view .LVU621 1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1989 .loc 1 1044 11 view .LVU622 1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1990 .loc 1 1044 18 is_stmt 0 view .LVU623 1991 00b0 0125 movs r5, #1 1992 .LVL160: 1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1993 .loc 1 1044 18 view .LVU624 1994 00b2 2EE0 b .L141 1995 .LVL161: 1996 .L151: 1997 .LBB341: 1998 .LBB334: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 1999 .loc 2 6853 74 view .LVU625 2000 00b4 0123 movs r3, #1 2001 00b6 DBE7 b .L153 2002 .LVL162: 2003 .L163: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2004 .loc 2 6853 74 view .LVU626 2005 .LBE334: 2006 .LBE341: 1049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop */ 1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* while DMA transfer is on going) */ 1053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: DMA channel of ADC slave should be stopped after this function */ 1054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* with HAL_ADC_Stop_DMA() API. */ 1055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); 2007 .loc 1 1055 5 is_stmt 1 view .LVU627 2008 .loc 1 1055 22 is_stmt 0 view .LVU628 2009 00b8 606D ldr r0, [r4, #84] 2010 00ba FFF7FEFF bl HAL_DMA_Abort 2011 .LVL163: 2012 .loc 1 1055 22 view .LVU629 2013 00be 0546 mov r5, r0 2014 .LVL164: 1056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if DMA channel effectively disabled */ 1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_ERROR) 2015 .loc 1 1058 5 is_stmt 1 view .LVU630 2016 .loc 1 1058 8 is_stmt 0 view .LVU631 2017 00c0 0128 cmp r0, #1 2018 00c2 10D0 beq .L164 2019 .L155: 1059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/cc3JIfda.s page 183 1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 1062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC overrun interrupt */ 1065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); 2020 .loc 1 1065 5 is_stmt 1 view .LVU632 2021 00c4 2268 ldr r2, [r4] 2022 00c6 5368 ldr r3, [r2, #4] 2023 00c8 23F01003 bic r3, r3, #16 2024 00cc 5360 str r3, [r2, #4] 1066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripherals: master and slave */ 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */ 1069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* memory a potential failing status. */ 1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2025 .loc 1 1070 5 view .LVU633 2026 .loc 1 1070 8 is_stmt 0 view .LVU634 2027 00ce 7DB9 cbnz r5, .L156 1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_disable_status = ADC_Disable(&tmphadcSlave); 2028 .loc 1 1072 7 is_stmt 1 view .LVU635 2029 .loc 1 1072 37 is_stmt 0 view .LVU636 2030 00d0 01A8 add r0, sp, #4 2031 .LVL165: 2032 .loc 1 1072 37 view .LVU637 2033 00d2 FFF7FEFF bl ADC_Disable 2034 .LVL166: 2035 00d6 0646 mov r6, r0 2036 .LVL167: 1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((ADC_Disable(hadc) == HAL_OK) && 2037 .loc 1 1073 7 is_stmt 1 view .LVU638 2038 .loc 1 1073 12 is_stmt 0 view .LVU639 2039 00d8 2046 mov r0, r4 2040 00da FFF7FEFF bl ADC_Disable 2041 .LVL168: 2042 .loc 1 1073 10 view .LVU640 2043 00de 68B9 cbnz r0, .L157 2044 .loc 1 1073 51 discriminator 1 view .LVU641 2045 00e0 66B9 cbnz r6, .L157 1074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (tmphadcSlave_disable_status == HAL_OK)) 1075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 2046 .loc 1 1076 24 view .LVU642 2047 00e2 3546 mov r5, r6 2048 00e4 0AE0 b .L157 2049 .LVL169: 2050 .L164: 1061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2051 .loc 1 1061 7 is_stmt 1 view .LVU643 2052 00e6 E36D ldr r3, [r4, #92] 2053 00e8 43F04003 orr r3, r3, #64 2054 00ec E365 str r3, [r4, #92] 2055 00ee E9E7 b .L155 2056 .L156: 1077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } ARM GAS /tmp/cc3JIfda.s page 184 1079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* In case of error, attempt to disable ADC master and slave without status assert */ 1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (void) ADC_Disable(hadc); 2057 .loc 1 1082 7 view .LVU644 2058 .loc 1 1082 14 is_stmt 0 view .LVU645 2059 00f0 2046 mov r0, r4 2060 .LVL170: 2061 .loc 1 1082 14 view .LVU646 2062 00f2 FFF7FEFF bl ADC_Disable 2063 .LVL171: 1083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (void) ADC_Disable(&tmphadcSlave); 2064 .loc 1 1083 7 is_stmt 1 view .LVU647 2065 .loc 1 1083 14 is_stmt 0 view .LVU648 2066 00f6 01A8 add r0, sp, #4 2067 00f8 FFF7FEFF bl ADC_Disable 2068 .LVL172: 2069 .L157: 1084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state (ADC master) */ 1087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 2070 .loc 1 1087 5 is_stmt 1 view .LVU649 2071 00fc E36D ldr r3, [r4, #92] 2072 00fe 23F48853 bic r3, r3, #4352 2073 0102 23F00103 bic r3, r3, #1 2074 0106 43F00103 orr r3, r3, #1 2075 010a E365 str r3, [r4, #92] 2076 .LVL173: 2077 .L142: 1088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, 1089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 1090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1093:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2078 .loc 1 1093 3 view .LVU650 2079 .loc 1 1093 3 view .LVU651 2080 010c 0023 movs r3, #0 2081 010e 84F85830 strb r3, [r4, #88] 2082 .loc 1 1093 3 view .LVU652 1094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 1096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 2083 .loc 1 1096 3 view .LVU653 2084 .LVL174: 2085 .L141: 1097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2086 .loc 1 1097 1 is_stmt 0 view .LVU654 2087 0112 2846 mov r0, r5 2088 0114 1CB0 add sp, sp, #112 2089 .LCFI21: 2090 .cfi_remember_state 2091 .cfi_def_cfa_offset 16 2092 @ sp needed 2093 0116 70BD pop {r4, r5, r6, pc} 2094 .LVL175: ARM GAS /tmp/cc3JIfda.s page 185 2095 .L158: 2096 .LCFI22: 2097 .cfi_restore_state 992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2098 .loc 1 992 3 view .LVU655 2099 0118 0225 movs r5, #2 2100 011a FAE7 b .L141 2101 .cfi_endproc 2102 .LFE338: 2104 .section .text.HAL_ADCEx_MultiModeGetValue,"ax",%progbits 2105 .align 1 2106 .global HAL_ADCEx_MultiModeGetValue 2107 .syntax unified 2108 .thumb 2109 .thumb_func 2111 HAL_ADCEx_MultiModeGetValue: 2112 .LVL176: 2113 .LFB339: 1098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1099:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Return the last ADC Master and Slave regular conversions results when in multimode conf 1101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC Master (handle of ADC Slave must not be used) 1102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval The converted data values. 1103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc) 1105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2114 .loc 1 1105 1 is_stmt 1 view -0 2115 .cfi_startproc 2116 @ args = 0, pretend = 0, frame = 0 2117 @ frame_needed = 0, uses_anonymous_args = 0 2118 @ link register save eliminated. 1106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** const ADC_Common_TypeDef *tmpADC_Common; 2119 .loc 1 1106 3 view .LVU657 1107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 2120 .loc 1 1109 3 view .LVU658 1110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning if no assert_param check */ 1112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* and possible no usage in __LL_ADC_COMMON_INSTANCE() below */ 1113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 2121 .loc 1 1113 3 view .LVU659 1114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Pointer to the common control register */ 1116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance); 2122 .loc 1 1116 3 view .LVU660 1117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return the multi mode conversion value */ 1119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmpADC_Common->CDR; 2123 .loc 1 1119 3 view .LVU661 2124 .loc 1 1119 23 is_stmt 0 view .LVU662 2125 0000 014B ldr r3, .L166 2126 0002 D868 ldr r0, [r3, #12] 2127 .LVL177: 1120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2128 .loc 1 1120 1 view .LVU663 2129 0004 7047 bx lr ARM GAS /tmp/cc3JIfda.s page 186 2130 .L167: 2131 0006 00BF .align 2 2132 .L166: 2133 0008 00030050 .word 1342178048 2134 .cfi_endproc 2135 .LFE339: 2137 .section .text.HAL_ADCEx_InjectedGetValue,"ax",%progbits 2138 .align 1 2139 .global HAL_ADCEx_InjectedGetValue 2140 .syntax unified 2141 .thumb 2142 .thumb_func 2144 HAL_ADCEx_InjectedGetValue: 2145 .LVL178: 2146 .LFB340: 1121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 1122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Get ADC injected group conversion result. 1125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Reading register JDRx automatically clears ADC flag JEOC 1126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (ADC group injected end of unitary conversion). 1127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This function does not clear ADC flag JEOS 1128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (ADC group injected end of sequence conversion) 1129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Occurrence of flag JEOS rising: 1130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * - If sequencer is composed of 1 rank, flag JEOS is equivalent 1131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * to flag JEOC. 1132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * - If sequencer is composed of several ranks, during the scan 1133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * sequence flag JEOC only is raised, at the end of the scan sequence 1134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * both flags JEOC and EOS are raised. 1135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Flag JEOS must not be cleared by this function because 1136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * it would not be compliant with low power features 1137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (feature low power auto-wait, not available on all STM32 families). 1138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * To clear this flag, either use function: 1139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming 1140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * model polling: @ref HAL_ADCEx_InjectedPollForConversion() 1141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS). 1142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param InjectedRank the converted ADC injected rank. 1144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This parameter can be one of the following values: 1145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_1 ADC group injected rank 1 1146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_2 ADC group injected rank 2 1147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_3 ADC group injected rank 3 1148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @arg @ref ADC_INJECTED_RANK_4 ADC group injected rank 4 1149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval ADC group injected conversion data 1150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef *hadc, uint32_t InjectedRank) 1152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2147 .loc 1 1152 1 is_stmt 1 view -0 2148 .cfi_startproc 2149 @ args = 0, pretend = 0, frame = 0 2150 @ frame_needed = 0, uses_anonymous_args = 0 2151 @ link register save eliminated. 1153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_jdr; 2152 .loc 1 1153 3 view .LVU665 1154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); ARM GAS /tmp/cc3JIfda.s page 187 2153 .loc 1 1156 3 view .LVU666 1157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_INJECTED_RANK(InjectedRank)); 2154 .loc 1 1157 3 view .LVU667 1158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Get ADC converted value */ 1160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** switch (InjectedRank) 2155 .loc 1 1160 3 view .LVU668 2156 0000 40F21523 movw r3, #533 2157 0004 9942 cmp r1, r3 2158 0006 0FD0 beq .L169 2159 0008 40F21B33 movw r3, #795 2160 000c 9942 cmp r1, r3 2161 000e 07D0 beq .L170 2162 0010 40F20F13 movw r3, #271 2163 0014 9942 cmp r1, r3 2164 0016 0BD0 beq .L175 1161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_4: 1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR4; 1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_3: 1166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR3; 1167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_2: 1169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR2; 1170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 1171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_1: 1172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** default: 1173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_jdr = hadc->Instance->JDR1; 2165 .loc 1 1173 7 view .LVU669 2166 .loc 1 1173 21 is_stmt 0 view .LVU670 2167 0018 0368 ldr r3, [r0] 2168 .loc 1 1173 15 view .LVU671 2169 001a D3F88000 ldr r0, [r3, #128] 2170 .LVL179: 1174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2171 .loc 1 1174 7 is_stmt 1 view .LVU672 1175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return ADC converted value */ 1178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_jdr; 2172 .loc 1 1178 3 view .LVU673 1179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2173 .loc 1 1179 1 is_stmt 0 view .LVU674 2174 001e 7047 bx lr 2175 .LVL180: 2176 .L170: 1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2177 .loc 1 1163 7 is_stmt 1 view .LVU675 1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2178 .loc 1 1163 21 is_stmt 0 view .LVU676 2179 0020 0368 ldr r3, [r0] 1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2180 .loc 1 1163 15 view .LVU677 2181 0022 D3F88C00 ldr r0, [r3, #140] 2182 .LVL181: 1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_3: ARM GAS /tmp/cc3JIfda.s page 188 2183 .loc 1 1164 7 is_stmt 1 view .LVU678 2184 0026 7047 bx lr 2185 .LVL182: 2186 .L169: 1166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2187 .loc 1 1166 7 view .LVU679 1166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2188 .loc 1 1166 21 is_stmt 0 view .LVU680 2189 0028 0368 ldr r3, [r0] 1166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2190 .loc 1 1166 15 view .LVU681 2191 002a D3F88800 ldr r0, [r3, #136] 2192 .LVL183: 1167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_2: 2193 .loc 1 1167 7 is_stmt 1 view .LVU682 2194 002e 7047 bx lr 2195 .LVL184: 2196 .L175: 1169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2197 .loc 1 1169 7 view .LVU683 1169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2198 .loc 1 1169 21 is_stmt 0 view .LVU684 2199 0030 0368 ldr r3, [r0] 1169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** break; 2200 .loc 1 1169 15 view .LVU685 2201 0032 D3F88400 ldr r0, [r3, #132] 2202 .LVL185: 1170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** case ADC_INJECTED_RANK_1: 2203 .loc 1 1170 7 is_stmt 1 view .LVU686 2204 0036 7047 bx lr 2205 .cfi_endproc 2206 .LFE340: 2208 .section .text.HAL_ADCEx_InjectedConvCpltCallback,"ax",%progbits 2209 .align 1 2210 .weak HAL_ADCEx_InjectedConvCpltCallback 2211 .syntax unified 2212 .thumb 2213 .thumb_func 2215 HAL_ADCEx_InjectedConvCpltCallback: 2216 .LVL186: 2217 .LFB341: 1180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Injected conversion complete callback in non-blocking mode. 1183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef *hadc) 1187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2218 .loc 1 1187 1 view -0 2219 .cfi_startproc 2220 @ args = 0, pretend = 0, frame = 0 2221 @ frame_needed = 0, uses_anonymous_args = 0 2222 @ link register save eliminated. 1188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ 1189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 2223 .loc 1 1189 3 view .LVU688 ARM GAS /tmp/cc3JIfda.s page 189 1190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_InjectedConvCpltCallback must be implemented in the user file. 1193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2224 .loc 1 1194 1 is_stmt 0 view .LVU689 2225 0000 7047 bx lr 2226 .cfi_endproc 2227 .LFE341: 2229 .section .text.HAL_ADCEx_InjectedQueueOverflowCallback,"ax",%progbits 2230 .align 1 2231 .weak HAL_ADCEx_InjectedQueueOverflowCallback 2232 .syntax unified 2233 .thumb 2234 .thumb_func 2236 HAL_ADCEx_InjectedQueueOverflowCallback: 2237 .LVL187: 2238 .LFB342: 1195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Injected context queue overflow callback. 1198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This callback is called if injected context queue is enabled 1199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (parameter "QueueInjectedContext" in injected channel configuration) 1200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** and if a new injected context is set when queue is full (maximum 2 1201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** contexts). 1202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef *hadc) 1206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2239 .loc 1 1206 1 is_stmt 1 view -0 2240 .cfi_startproc 2241 @ args = 0, pretend = 0, frame = 0 2242 @ frame_needed = 0, uses_anonymous_args = 0 2243 @ link register save eliminated. 1207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ 1208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 2244 .loc 1 1208 3 view .LVU691 1209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented in the user file. 1212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2245 .loc 1 1213 1 is_stmt 0 view .LVU692 2246 0000 7047 bx lr 2247 .cfi_endproc 2248 .LFE342: 2250 .section .text.HAL_ADCEx_LevelOutOfWindow2Callback,"ax",%progbits 2251 .align 1 2252 .weak HAL_ADCEx_LevelOutOfWindow2Callback 2253 .syntax unified 2254 .thumb 2255 .thumb_func 2257 HAL_ADCEx_LevelOutOfWindow2Callback: 2258 .LVL188: 2259 .LFB343: 1214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/cc3JIfda.s page 190 1215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Analog watchdog 2 callback in non-blocking mode. 1217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef *hadc) 1221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2260 .loc 1 1221 1 is_stmt 1 view -0 2261 .cfi_startproc 2262 @ args = 0, pretend = 0, frame = 0 2263 @ frame_needed = 0, uses_anonymous_args = 0 2264 @ link register save eliminated. 1222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ 1223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 2265 .loc 1 1223 3 view .LVU694 1224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_LevelOutOfWindow2Callback must be implemented in the user file. 1227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2266 .loc 1 1228 1 is_stmt 0 view .LVU695 2267 0000 7047 bx lr 2268 .cfi_endproc 2269 .LFE343: 2271 .section .text.HAL_ADCEx_LevelOutOfWindow3Callback,"ax",%progbits 2272 .align 1 2273 .weak HAL_ADCEx_LevelOutOfWindow3Callback 2274 .syntax unified 2275 .thumb 2276 .thumb_func 2278 HAL_ADCEx_LevelOutOfWindow3Callback: 2279 .LVL189: 2280 .LFB344: 1229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Analog watchdog 3 callback in non-blocking mode. 1232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef *hadc) 1236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2281 .loc 1 1236 1 is_stmt 1 view -0 2282 .cfi_startproc 2283 @ args = 0, pretend = 0, frame = 0 2284 @ frame_needed = 0, uses_anonymous_args = 0 2285 @ link register save eliminated. 1237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ 1238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 2286 .loc 1 1238 3 view .LVU697 1239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_LevelOutOfWindow3Callback must be implemented in the user file. 1242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2287 .loc 1 1243 1 is_stmt 0 view .LVU698 2288 0000 7047 bx lr 2289 .cfi_endproc ARM GAS /tmp/cc3JIfda.s page 191 2290 .LFE344: 2292 .section .text.HAL_ADCEx_EndOfSamplingCallback,"ax",%progbits 2293 .align 1 2294 .weak HAL_ADCEx_EndOfSamplingCallback 2295 .syntax unified 2296 .thumb 2297 .thumb_func 2299 HAL_ADCEx_EndOfSamplingCallback: 2300 .LVL190: 2301 .LFB345: 1244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief End Of Sampling callback in non-blocking mode. 1248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval None 1250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __weak void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef *hadc) 1252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2302 .loc 1 1252 1 is_stmt 1 view -0 2303 .cfi_startproc 2304 @ args = 0, pretend = 0, frame = 0 2305 @ frame_needed = 0, uses_anonymous_args = 0 2306 @ link register save eliminated. 1253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ 1254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** UNUSED(hadc); 2307 .loc 1 1254 3 view .LVU700 1255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* NOTE : This function should not be modified. When the callback is needed, 1257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** function HAL_ADCEx_EndOfSamplingCallback must be implemented in the user file. 1258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2308 .loc 1 1259 1 is_stmt 0 view .LVU701 2309 0000 7047 bx lr 2310 .cfi_endproc 2311 .LFE345: 2313 .section .text.HAL_ADCEx_RegularStop,"ax",%progbits 2314 .align 1 2315 .global HAL_ADCEx_RegularStop 2316 .syntax unified 2317 .thumb 2318 .thumb_func 2320 HAL_ADCEx_RegularStop: 2321 .LVL191: 2322 .LFB346: 1260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop ADC conversion of regular group (and injected channels in 1263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * case of auto_injection mode), disable ADC peripheral if no 1264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * conversion is on going on injected group. 1265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status. 1267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef *hadc) 1269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2323 .loc 1 1269 1 is_stmt 1 view -0 2324 .cfi_startproc ARM GAS /tmp/cc3JIfda.s page 192 2325 @ args = 0, pretend = 0, frame = 0 2326 @ frame_needed = 0, uses_anonymous_args = 0 1270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2327 .loc 1 1270 3 view .LVU703 1271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2328 .loc 1 1273 3 view .LVU704 1274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 2329 .loc 1 1276 3 view .LVU705 2330 .loc 1 1276 3 view .LVU706 2331 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 2332 0004 012B cmp r3, #1 2333 0006 26D0 beq .L185 1269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2334 .loc 1 1269 1 is_stmt 0 discriminator 2 view .LVU707 2335 0008 10B5 push {r4, lr} 2336 .LCFI23: 2337 .cfi_def_cfa_offset 8 2338 .cfi_offset 4, -8 2339 .cfi_offset 14, -4 2340 000a 0446 mov r4, r0 2341 .loc 1 1276 3 is_stmt 1 discriminator 2 view .LVU708 2342 000c 0121 movs r1, #1 2343 000e 80F85810 strb r1, [r0, #88] 2344 .loc 1 1276 3 discriminator 2 view .LVU709 1277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential regular conversion on going */ 1279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); 2345 .loc 1 1279 3 discriminator 2 view .LVU710 2346 .loc 1 1279 20 is_stmt 0 discriminator 2 view .LVU711 2347 0012 FFF7FEFF bl ADC_ConversionStop 2348 .LVL192: 1280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if regular conversions are effectively stopped 1282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** and if no injected conversions are on-going */ 1283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2349 .loc 1 1283 3 is_stmt 1 discriminator 2 view .LVU712 2350 .loc 1 1283 6 is_stmt 0 discriminator 2 view .LVU713 2351 0016 60B9 cbnz r0, .L183 1284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */ 1286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 2352 .loc 1 1286 5 is_stmt 1 view .LVU714 2353 0018 E36D ldr r3, [r4, #92] 2354 001a 23F48073 bic r3, r3, #256 2355 001e E365 str r3, [r4, #92] 1287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 2356 .loc 1 1288 5 view .LVU715 2357 .loc 1 1288 9 is_stmt 0 view .LVU716 2358 0020 2368 ldr r3, [r4] 2359 .LVL193: 2360 .LBB342: 2361 .LBI342: ARM GAS /tmp/cc3JIfda.s page 193 7076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2362 .loc 2 7076 26 is_stmt 1 view .LVU717 2363 .LBB343: 2364 .loc 2 7078 3 view .LVU718 2365 .loc 2 7078 12 is_stmt 0 view .LVU719 2366 0022 9B68 ldr r3, [r3, #8] 2367 .LVL194: 2368 .loc 2 7078 76 view .LVU720 2369 0024 13F0080F tst r3, #8 2370 0028 07D0 beq .L184 2371 .LVL195: 2372 .loc 2 7078 76 view .LVU721 2373 .LBE343: 2374 .LBE342: 1289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */ 1291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 1292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 1294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 1297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 1298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 1299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 1300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Conversion on injected group is stopped, but ADC not disabled since */ 1303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on regular group is still running. */ 1304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 2375 .loc 1 1306 7 is_stmt 1 view .LVU722 2376 002a E36D ldr r3, [r4, #92] 2377 002c 43F48053 orr r3, r3, #4096 2378 0030 E365 str r3, [r4, #92] 2379 .L183: 1307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2380 .loc 1 1311 3 view .LVU723 2381 .loc 1 1311 3 view .LVU724 2382 0032 0023 movs r3, #0 2383 0034 84F85830 strb r3, [r4, #88] 2384 .loc 1 1311 3 view .LVU725 1312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 1314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 2385 .loc 1 1314 3 view .LVU726 1315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2386 .loc 1 1315 1 is_stmt 0 view .LVU727 2387 0038 10BD pop {r4, pc} 2388 .LVL196: 2389 .L184: 1291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ARM GAS /tmp/cc3JIfda.s page 194 2390 .loc 1 1291 7 is_stmt 1 view .LVU728 1291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2391 .loc 1 1291 24 is_stmt 0 view .LVU729 2392 003a 2046 mov r0, r4 2393 .LVL197: 1291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2394 .loc 1 1291 24 view .LVU730 2395 003c FFF7FEFF bl ADC_Disable 2396 .LVL198: 1294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2397 .loc 1 1294 7 is_stmt 1 view .LVU731 1294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2398 .loc 1 1294 10 is_stmt 0 view .LVU732 2399 0040 0028 cmp r0, #0 2400 0042 F6D1 bne .L183 1297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 2401 .loc 1 1297 9 is_stmt 1 view .LVU733 2402 0044 E36D ldr r3, [r4, #92] 2403 0046 23F48053 bic r3, r3, #4096 2404 004a 23F00103 bic r3, r3, #1 2405 004e 43F00103 orr r3, r3, #1 2406 0052 E365 str r3, [r4, #92] 2407 0054 EDE7 b .L183 2408 .LVL199: 2409 .L185: 2410 .LCFI24: 2411 .cfi_def_cfa_offset 0 2412 .cfi_restore 4 2413 .cfi_restore 14 1276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2414 .loc 1 1276 3 is_stmt 0 view .LVU734 2415 0056 0220 movs r0, #2 2416 .LVL200: 2417 .loc 1 1315 1 view .LVU735 2418 0058 7047 bx lr 2419 .cfi_endproc 2420 .LFE346: 2422 .section .text.HAL_ADCEx_RegularStop_IT,"ax",%progbits 2423 .align 1 2424 .global HAL_ADCEx_RegularStop_IT 2425 .syntax unified 2426 .thumb 2427 .thumb_func 2429 HAL_ADCEx_RegularStop_IT: 2430 .LVL201: 2431 .LFB347: 1316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop ADC conversion of ADC groups regular and injected, 1320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * disable interrution of end-of-conversion, 1321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * disable ADC peripheral if no conversion is on going 1322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * on injected group. 1323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status. 1325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef *hadc) ARM GAS /tmp/cc3JIfda.s page 195 1327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2432 .loc 1 1327 1 is_stmt 1 view -0 2433 .cfi_startproc 2434 @ args = 0, pretend = 0, frame = 0 2435 @ frame_needed = 0, uses_anonymous_args = 0 1328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2436 .loc 1 1328 3 view .LVU737 1329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2437 .loc 1 1331 3 view .LVU738 1332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 2438 .loc 1 1334 3 view .LVU739 2439 .loc 1 1334 3 view .LVU740 2440 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 2441 0004 012B cmp r3, #1 2442 0006 2BD0 beq .L194 1327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2443 .loc 1 1327 1 is_stmt 0 discriminator 2 view .LVU741 2444 0008 10B5 push {r4, lr} 2445 .LCFI25: 2446 .cfi_def_cfa_offset 8 2447 .cfi_offset 4, -8 2448 .cfi_offset 14, -4 2449 000a 0446 mov r4, r0 2450 .loc 1 1334 3 is_stmt 1 discriminator 2 view .LVU742 2451 000c 0121 movs r1, #1 2452 000e 80F85810 strb r1, [r0, #88] 2453 .loc 1 1334 3 discriminator 2 view .LVU743 1335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential regular conversion on going */ 1337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); 2454 .loc 1 1337 3 discriminator 2 view .LVU744 2455 .loc 1 1337 20 is_stmt 0 discriminator 2 view .LVU745 2456 0012 FFF7FEFF bl ADC_ConversionStop 2457 .LVL202: 1338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped 1340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** and if no injected conversion is on-going */ 1341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2458 .loc 1 1341 3 is_stmt 1 discriminator 2 view .LVU746 2459 .loc 1 1341 6 is_stmt 0 discriminator 2 view .LVU747 2460 0016 88B9 cbnz r0, .L192 1342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */ 1344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 2461 .loc 1 1344 5 is_stmt 1 view .LVU748 2462 0018 E36D ldr r3, [r4, #92] 2463 001a 23F48073 bic r3, r3, #256 2464 001e E365 str r3, [r4, #92] 1345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable all regular-related interrupts */ 1347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); 2465 .loc 1 1347 5 view .LVU749 2466 0020 2268 ldr r2, [r4] ARM GAS /tmp/cc3JIfda.s page 196 2467 0022 5368 ldr r3, [r2, #4] 2468 0024 23F01C03 bic r3, r3, #28 2469 0028 5360 str r3, [r2, #4] 1348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable ADC peripheral if no injected conversions are on-going */ 1350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 2470 .loc 1 1350 5 view .LVU750 2471 .loc 1 1350 9 is_stmt 0 view .LVU751 2472 002a 2368 ldr r3, [r4] 2473 .LVL203: 2474 .LBB344: 2475 .LBI344: 7076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2476 .loc 2 7076 26 is_stmt 1 view .LVU752 2477 .LBB345: 2478 .loc 2 7078 3 view .LVU753 2479 .loc 2 7078 12 is_stmt 0 view .LVU754 2480 002c 9B68 ldr r3, [r3, #8] 2481 .LVL204: 2482 .loc 2 7078 76 view .LVU755 2483 002e 13F0080F tst r3, #8 2484 0032 07D0 beq .L193 2485 .LVL205: 2486 .loc 2 7078 76 view .LVU756 2487 .LBE345: 2488 .LBE344: 1351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 1353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if no issue reported */ 1354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 1357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 1358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 1359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 1360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 2489 .loc 1 1364 7 is_stmt 1 view .LVU757 2490 0034 E36D ldr r3, [r4, #92] 2491 0036 43F48053 orr r3, r3, #4096 2492 003a E365 str r3, [r4, #92] 2493 .L192: 1365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2494 .loc 1 1369 3 view .LVU758 2495 .loc 1 1369 3 view .LVU759 2496 003c 0023 movs r3, #0 2497 003e 84F85830 strb r3, [r4, #88] 2498 .loc 1 1369 3 view .LVU760 1370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ ARM GAS /tmp/cc3JIfda.s page 197 1372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 2499 .loc 1 1372 3 view .LVU761 1373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2500 .loc 1 1373 1 is_stmt 0 view .LVU762 2501 0042 10BD pop {r4, pc} 2502 .LVL206: 2503 .L193: 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if no issue reported */ 2504 .loc 1 1352 7 is_stmt 1 view .LVU763 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if no issue reported */ 2505 .loc 1 1352 24 is_stmt 0 view .LVU764 2506 0044 2046 mov r0, r4 2507 .LVL207: 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if no issue reported */ 2508 .loc 1 1352 24 view .LVU765 2509 0046 FFF7FEFF bl ADC_Disable 2510 .LVL208: 1354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2511 .loc 1 1354 7 is_stmt 1 view .LVU766 1354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2512 .loc 1 1354 10 is_stmt 0 view .LVU767 2513 004a 0028 cmp r0, #0 2514 004c F6D1 bne .L192 1357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 2515 .loc 1 1357 9 is_stmt 1 view .LVU768 2516 004e E36D ldr r3, [r4, #92] 2517 0050 23F48053 bic r3, r3, #4096 2518 0054 23F00103 bic r3, r3, #1 2519 0058 43F00103 orr r3, r3, #1 2520 005c E365 str r3, [r4, #92] 2521 005e EDE7 b .L192 2522 .LVL209: 2523 .L194: 2524 .LCFI26: 2525 .cfi_def_cfa_offset 0 2526 .cfi_restore 4 2527 .cfi_restore 14 1334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2528 .loc 1 1334 3 is_stmt 0 view .LVU769 2529 0060 0220 movs r0, #2 2530 .LVL210: 2531 .loc 1 1373 1 view .LVU770 2532 0062 7047 bx lr 2533 .cfi_endproc 2534 .LFE347: 2536 .section .text.HAL_ADCEx_RegularStop_DMA,"ax",%progbits 2537 .align 1 2538 .global HAL_ADCEx_RegularStop_DMA 2539 .syntax unified 2540 .thumb 2541 .thumb_func 2543 HAL_ADCEx_RegularStop_DMA: 2544 .LVL211: 2545 .LFB348: 1374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop ADC conversion of regular group (and injected group in ARM GAS /tmp/cc3JIfda.s page 198 1377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * case of auto_injection mode), disable ADC DMA transfer, disable 1378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC peripheral if no conversion is on going 1379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * on injected group. 1380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note HAL_ADCEx_RegularStop_DMA() function is dedicated to single-ADC mode only. 1381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For multimode (when multimode feature is available), 1382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_RegularMultiModeStop_DMA() API must be used. 1383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status. 1385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef *hadc) 1387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2546 .loc 1 1387 1 is_stmt 1 view -0 2547 .cfi_startproc 2548 @ args = 0, pretend = 0, frame = 0 2549 @ frame_needed = 0, uses_anonymous_args = 0 2550 .loc 1 1387 1 is_stmt 0 view .LVU772 2551 0000 38B5 push {r3, r4, r5, lr} 2552 .LCFI27: 2553 .cfi_def_cfa_offset 16 2554 .cfi_offset 3, -16 2555 .cfi_offset 4, -12 2556 .cfi_offset 5, -8 2557 .cfi_offset 14, -4 1388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2558 .loc 1 1388 3 is_stmt 1 view .LVU773 1389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 2559 .loc 1 1391 3 view .LVU774 1392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 2560 .loc 1 1394 3 view .LVU775 2561 .loc 1 1394 3 view .LVU776 2562 0002 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 2563 0006 012B cmp r3, #1 2564 0008 41D0 beq .L206 2565 000a 0446 mov r4, r0 2566 .loc 1 1394 3 discriminator 2 view .LVU777 2567 000c 0121 movs r1, #1 2568 000e 80F85810 strb r1, [r0, #88] 2569 .loc 1 1394 3 discriminator 2 view .LVU778 1395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential regular conversion on going */ 1397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); 2570 .loc 1 1397 3 discriminator 2 view .LVU779 2571 .loc 1 1397 20 is_stmt 0 discriminator 2 view .LVU780 2572 0012 FFF7FEFF bl ADC_ConversionStop 2573 .LVL212: 1398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped 1400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** and if no injected conversion is on-going */ 1401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2574 .loc 1 1401 3 is_stmt 1 discriminator 2 view .LVU781 2575 .loc 1 1401 6 is_stmt 0 discriminator 2 view .LVU782 2576 0016 0546 mov r5, r0 2577 0018 20B1 cbz r0, .L208 ARM GAS /tmp/cc3JIfda.s page 199 2578 .LVL213: 2579 .L201: 1402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */ 1404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 1405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */ 1407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN); 1408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop while */ 1410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* while DMA transfer is on going) */ 1411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); 1412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if DMA channel effectively disabled */ 1414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status != HAL_OK) 1415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 1418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC overrun interrupt */ 1421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); 1422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripheral */ 1424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, */ 1425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* to keep in memory a potential failing status. */ 1426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 1427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 1431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (void)ADC_Disable(hadc); 1435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 1438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 1439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC state */ 1441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, 1442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 1443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); 1444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 1449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2580 .loc 1 1453 3 is_stmt 1 view .LVU783 2581 .loc 1 1453 3 view .LVU784 2582 001a 0023 movs r3, #0 ARM GAS /tmp/cc3JIfda.s page 200 2583 001c 84F85830 strb r3, [r4, #88] 2584 .loc 1 1453 3 view .LVU785 1454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 1456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 2585 .loc 1 1456 3 view .LVU786 2586 .LVL214: 2587 .L200: 1457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2588 .loc 1 1457 1 is_stmt 0 view .LVU787 2589 0020 2846 mov r0, r5 2590 0022 38BD pop {r3, r4, r5, pc} 2591 .LVL215: 2592 .L208: 1404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2593 .loc 1 1404 5 is_stmt 1 view .LVU788 2594 0024 E36D ldr r3, [r4, #92] 2595 0026 23F48073 bic r3, r3, #256 2596 002a E365 str r3, [r4, #92] 1407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2597 .loc 1 1407 5 view .LVU789 2598 002c 2268 ldr r2, [r4] 2599 002e D368 ldr r3, [r2, #12] 2600 0030 23F00103 bic r3, r3, #1 2601 0034 D360 str r3, [r2, #12] 1411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2602 .loc 1 1411 5 view .LVU790 1411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2603 .loc 1 1411 22 is_stmt 0 view .LVU791 2604 0036 606D ldr r0, [r4, #84] 2605 .LVL216: 1411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2606 .loc 1 1411 22 view .LVU792 2607 0038 FFF7FEFF bl HAL_DMA_Abort 2608 .LVL217: 1414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2609 .loc 1 1414 5 is_stmt 1 view .LVU793 1414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2610 .loc 1 1414 8 is_stmt 0 view .LVU794 2611 003c 0546 mov r5, r0 2612 003e 18B1 cbz r0, .L202 1417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2613 .loc 1 1417 7 is_stmt 1 view .LVU795 2614 0040 E36D ldr r3, [r4, #92] 2615 0042 43F04003 orr r3, r3, #64 2616 0046 E365 str r3, [r4, #92] 2617 .L202: 1421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2618 .loc 1 1421 5 view .LVU796 2619 0048 2268 ldr r2, [r4] 2620 004a 5368 ldr r3, [r2, #4] 2621 004c 23F01003 bic r3, r3, #16 2622 0050 5360 str r3, [r2, #4] 1426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2623 .loc 1 1426 5 view .LVU797 1426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2624 .loc 1 1426 9 is_stmt 0 view .LVU798 ARM GAS /tmp/cc3JIfda.s page 201 2625 0052 2368 ldr r3, [r4] 2626 .LVL218: 2627 .LBB346: 2628 .LBI346: 7076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2629 .loc 2 7076 26 is_stmt 1 view .LVU799 2630 .LBB347: 2631 .loc 2 7078 3 view .LVU800 2632 .loc 2 7078 12 is_stmt 0 view .LVU801 2633 0054 9B68 ldr r3, [r3, #8] 2634 .LVL219: 2635 .loc 2 7078 76 view .LVU802 2636 0056 13F0080F tst r3, #8 2637 005a 04D0 beq .L203 2638 .LVL220: 2639 .loc 2 7078 76 view .LVU803 2640 .LBE347: 2641 .LBE346: 1448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2642 .loc 1 1448 7 is_stmt 1 view .LVU804 2643 005c E36D ldr r3, [r4, #92] 2644 005e 43F48053 orr r3, r3, #4096 2645 0062 E365 str r3, [r4, #92] 2646 0064 D9E7 b .L201 2647 .LVL221: 2648 .L203: 1428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2649 .loc 1 1428 7 view .LVU805 1428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2650 .loc 1 1428 10 is_stmt 0 view .LVU806 2651 0066 75B9 cbnz r5, .L204 1430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2652 .loc 1 1430 9 is_stmt 1 view .LVU807 1430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2653 .loc 1 1430 26 is_stmt 0 view .LVU808 2654 0068 2046 mov r0, r4 2655 .LVL222: 1430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2656 .loc 1 1430 26 view .LVU809 2657 006a FFF7FEFF bl ADC_Disable 2658 .LVL223: 2659 006e 0546 mov r5, r0 2660 .LVL224: 2661 .L205: 1438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2662 .loc 1 1438 7 is_stmt 1 view .LVU810 1438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2663 .loc 1 1438 10 is_stmt 0 view .LVU811 2664 0070 002D cmp r5, #0 2665 0072 D2D1 bne .L201 1441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADC_STATE_INJ_BUSY, 2666 .loc 1 1441 9 is_stmt 1 view .LVU812 2667 0074 E36D ldr r3, [r4, #92] 2668 0076 23F48053 bic r3, r3, #4096 2669 007a 23F00103 bic r3, r3, #1 2670 007e 43F00103 orr r3, r3, #1 2671 0082 E365 str r3, [r4, #92] ARM GAS /tmp/cc3JIfda.s page 202 2672 0084 C9E7 b .L201 2673 .LVL225: 2674 .L204: 1434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2675 .loc 1 1434 9 view .LVU813 1434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2676 .loc 1 1434 15 is_stmt 0 view .LVU814 2677 0086 2046 mov r0, r4 2678 .LVL226: 1434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2679 .loc 1 1434 15 view .LVU815 2680 0088 FFF7FEFF bl ADC_Disable 2681 .LVL227: 2682 008c F0E7 b .L205 2683 .LVL228: 2684 .L206: 1394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2685 .loc 1 1394 3 view .LVU816 2686 008e 0225 movs r5, #2 2687 0090 C6E7 b .L200 2688 .cfi_endproc 2689 .LFE348: 2691 .section .text.HAL_ADCEx_RegularMultiModeStop_DMA,"ax",%progbits 2692 .align 1 2693 .global HAL_ADCEx_RegularMultiModeStop_DMA 2694 .syntax unified 2695 .thumb 2696 .thumb_func 2698 HAL_ADCEx_RegularMultiModeStop_DMA: 2699 .LVL229: 2700 .LFB349: 1458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 1460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Stop DMA-based multimode ADC conversion, disable ADC DMA transfer, disable ADC peripher 1462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Multimode is kept enabled after this function. Multimode DMA bits 1463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (MDMA and DMACFG bits of common CCR register) are maintained. To disable 1464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be 1465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can 1466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * resort to HAL_ADCEx_DisableMultiMode() API. 1467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of DMA configured in circular mode, function 1468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_RegularStop_DMA() must be called after this function with handle of 1469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC slave, to properly disable the DMA channel. 1470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle of ADC master (handle of ADC slave must not be used) 1471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 1472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef *hadc) 1474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2701 .loc 1 1474 1 is_stmt 1 view -0 2702 .cfi_startproc 2703 @ args = 0, pretend = 0, frame = 112 2704 @ frame_needed = 0, uses_anonymous_args = 0 1475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2705 .loc 1 1475 3 view .LVU818 1476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tickstart; 2706 .loc 1 1476 3 view .LVU819 1477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_HandleTypeDef tmphadcSlave; ARM GAS /tmp/cc3JIfda.s page 203 2707 .loc 1 1477 3 view .LVU820 1478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmphadcSlave_conversion_on_going; 2708 .loc 1 1478 3 view .LVU821 1479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 2709 .loc 1 1481 3 view .LVU822 1482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 2710 .loc 1 1484 3 view .LVU823 2711 .loc 1 1484 3 view .LVU824 2712 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 2713 0004 012B cmp r3, #1 2714 0006 00F08680 beq .L226 1474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 2715 .loc 1 1474 1 is_stmt 0 discriminator 2 view .LVU825 2716 000a 30B5 push {r4, r5, lr} 2717 .LCFI28: 2718 .cfi_def_cfa_offset 12 2719 .cfi_offset 4, -12 2720 .cfi_offset 5, -8 2721 .cfi_offset 14, -4 2722 000c 9DB0 sub sp, sp, #116 2723 .LCFI29: 2724 .cfi_def_cfa_offset 128 2725 000e 0446 mov r4, r0 2726 .loc 1 1484 3 is_stmt 1 discriminator 2 view .LVU826 2727 0010 0121 movs r1, #1 2728 0012 80F85810 strb r1, [r0, #88] 2729 .loc 1 1484 3 discriminator 2 view .LVU827 1485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Stop potential multimode conversion on going, on regular groups */ 1488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); 2730 .loc 1 1488 3 discriminator 2 view .LVU828 2731 .loc 1 1488 20 is_stmt 0 discriminator 2 view .LVU829 2732 0016 FFF7FEFF bl ADC_ConversionStop 2733 .LVL230: 1489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC peripheral if conversions are effectively stopped */ 1491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2734 .loc 1 1491 3 is_stmt 1 discriminator 2 view .LVU830 2735 .loc 1 1491 6 is_stmt 0 discriminator 2 view .LVU831 2736 001a 0028 cmp r0, #0 2737 001c 76D1 bne .L211 1492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_REG_BUSY bit */ 1494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 2738 .loc 1 1494 5 is_stmt 1 view .LVU832 2739 001e E36D ldr r3, [r4, #92] 2740 0020 23F48073 bic r3, r3, #256 2741 0024 E365 str r3, [r4, #92] 1495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Temporary handle minimum initialization */ 1497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_RESET_HANDLE_STATE(&tmphadcSlave); 2742 .loc 1 1497 5 view .LVU833 ARM GAS /tmp/cc3JIfda.s page 204 2743 0026 0023 movs r3, #0 2744 0028 1893 str r3, [sp, #96] 1498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmphadcSlave); 2745 .loc 1 1498 5 view .LVU834 2746 002a 1993 str r3, [sp, #100] 1499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set a temporary handle of the ADC slave associated to the ADC master */ 1501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmphadcSlave); 2747 .loc 1 1501 5 view .LVU835 2748 002c 2368 ldr r3, [r4] 2749 002e B3F1A04F cmp r3, #1342177280 2750 0032 0DD0 beq .L231 2751 .loc 1 1501 5 is_stmt 0 discriminator 2 view .LVU836 2752 0034 0023 movs r3, #0 2753 0036 0193 str r3, [sp, #4] 2754 .L213: 1502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmphadcSlave.Instance == NULL) 2755 .loc 1 1503 5 is_stmt 1 view .LVU837 2756 .loc 1 1503 21 is_stmt 0 view .LVU838 2757 0038 019B ldr r3, [sp, #4] 2758 .loc 1 1503 8 view .LVU839 2759 003a 6BB1 cbz r3, .L232 1504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 1507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 1512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Procedure to disable the ADC peripheral: wait for conversions */ 1515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* effectively stopped (ADC master and ADC slave), then disable ADC */ 1516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Wait for ADC conversion completion for ADC master and ADC slave */ 1518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); 2760 .loc 1 1518 5 is_stmt 1 view .LVU840 2761 .loc 1 1518 17 is_stmt 0 view .LVU841 2762 003c FFF7FEFF bl HAL_GetTick 2763 .LVL231: 2764 .loc 1 1518 17 view .LVU842 2765 0040 0546 mov r5, r0 2766 .LVL232: 1519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance); 2767 .loc 1 1520 5 is_stmt 1 view .LVU843 2768 .loc 1 1520 40 is_stmt 0 view .LVU844 2769 0042 019B ldr r3, [sp, #4] 2770 .LVL233: 2771 .LBB348: 2772 .LBI348: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2773 .loc 2 6851 26 is_stmt 1 view .LVU845 2774 .LBB349: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/cc3JIfda.s page 205 2775 .loc 2 6853 3 view .LVU846 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2776 .loc 2 6853 12 is_stmt 0 view .LVU847 2777 0044 9B68 ldr r3, [r3, #8] 2778 .LVL234: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2779 .loc 2 6853 74 view .LVU848 2780 0046 13F00403 ands r3, r3, #4 2781 004a 13D0 beq .L222 2782 004c 0123 movs r3, #1 2783 004e 11E0 b .L222 2784 .LVL235: 2785 .L231: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2786 .loc 2 6853 74 view .LVU849 2787 .LBE349: 2788 .LBE348: 1501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2789 .loc 1 1501 5 discriminator 1 view .LVU850 2790 0050 03F58073 add r3, r3, #256 2791 0054 0193 str r3, [sp, #4] 2792 0056 EFE7 b .L213 2793 .L232: 1506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2794 .loc 1 1506 7 is_stmt 1 view .LVU851 2795 0058 E36D ldr r3, [r4, #92] 2796 005a 43F02003 orr r3, r3, #32 2797 005e E365 str r3, [r4, #92] 1509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2798 .loc 1 1509 7 view .LVU852 1509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2799 .loc 1 1509 7 view .LVU853 2800 0060 0023 movs r3, #0 2801 0062 84F85830 strb r3, [r4, #88] 1509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2802 .loc 1 1509 7 view .LVU854 1511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2803 .loc 1 1511 7 view .LVU855 1511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2804 .loc 1 1511 14 is_stmt 0 view .LVU856 2805 0066 0120 movs r0, #1 2806 .LVL236: 1511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2807 .loc 1 1511 14 view .LVU857 2808 0068 53E0 b .L210 2809 .LVL237: 2810 .L217: 1521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 1523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) 1526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* New check to avoid false timeout detection in case of preemption */ 1528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance 1529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 1530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) ARM GAS /tmp/cc3JIfda.s page 206 1531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 1535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 1538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 1540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance); 2811 .loc 1 1543 7 is_stmt 1 view .LVU858 2812 .loc 1 1543 42 is_stmt 0 view .LVU859 2813 006a 019B ldr r3, [sp, #4] 2814 .LVL238: 2815 .LBB350: 2816 .LBI350: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2817 .loc 2 6851 26 is_stmt 1 view .LVU860 2818 .LBB351: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2819 .loc 2 6853 3 view .LVU861 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2820 .loc 2 6853 12 is_stmt 0 view .LVU862 2821 006c 9B68 ldr r3, [r3, #8] 2822 .LVL239: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2823 .loc 2 6853 74 view .LVU863 2824 006e 13F00403 ands r3, r3, #4 2825 0072 21D1 bne .L220 2826 .LVL240: 2827 .L222: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2828 .loc 2 6853 74 view .LVU864 2829 .LBE351: 2830 .LBE350: 1522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 2831 .loc 1 1522 12 is_stmt 1 view .LVU865 1521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 2832 .loc 1 1521 13 is_stmt 0 view .LVU866 2833 0074 2268 ldr r2, [r4] 2834 .LVL241: 2835 .LBB353: 2836 .LBI353: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2837 .loc 2 6851 26 is_stmt 1 view .LVU867 2838 .LBB354: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2839 .loc 2 6853 3 view .LVU868 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2840 .loc 2 6853 12 is_stmt 0 view .LVU869 2841 0076 9268 ldr r2, [r2, #8] 2842 .LVL242: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2843 .loc 2 6853 74 view .LVU870 ARM GAS /tmp/cc3JIfda.s page 207 2844 0078 12F0040F tst r2, #4 2845 007c 01D1 bne .L223 2846 .LVL243: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2847 .loc 2 6853 74 view .LVU871 2848 .LBE354: 2849 .LBE353: 1522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 2850 .loc 1 1522 12 view .LVU872 2851 007e 012B cmp r3, #1 2852 0080 1CD1 bne .L233 2853 .L223: 1525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2854 .loc 1 1525 7 is_stmt 1 view .LVU873 1525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2855 .loc 1 1525 12 is_stmt 0 view .LVU874 2856 0082 FFF7FEFF bl HAL_GetTick 2857 .LVL244: 1525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2858 .loc 1 1525 26 view .LVU875 2859 0086 431B subs r3, r0, r5 1525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2860 .loc 1 1525 10 view .LVU876 2861 0088 052B cmp r3, #5 2862 008a EED9 bls .L217 1528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 2863 .loc 1 1528 9 is_stmt 1 view .LVU877 1528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL) 2864 .loc 1 1528 44 is_stmt 0 view .LVU878 2865 008c 019B ldr r3, [sp, #4] 2866 .LVL245: 2867 .LBB355: 2868 .LBI355: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2869 .loc 2 6851 26 is_stmt 1 view .LVU879 2870 .LBB356: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2871 .loc 2 6853 3 view .LVU880 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2872 .loc 2 6853 12 is_stmt 0 view .LVU881 2873 008e 9B68 ldr r3, [r3, #8] 2874 .LVL246: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2875 .loc 2 6853 74 view .LVU882 2876 0090 13F00403 ands r3, r3, #4 2877 0094 00D0 beq .L218 2878 0096 0123 movs r3, #1 2879 .L218: 2880 .LVL247: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2881 .loc 2 6853 74 view .LVU883 2882 .LBE356: 2883 .LBE355: 1529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 2884 .loc 1 1529 9 is_stmt 1 view .LVU884 1529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (tmphadcSlave_conversion_on_going == 1UL) 2885 .loc 1 1529 14 is_stmt 0 view .LVU885 ARM GAS /tmp/cc3JIfda.s page 208 2886 0098 2268 ldr r2, [r4] 2887 .LVL248: 2888 .LBB357: 2889 .LBI357: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2890 .loc 2 6851 26 is_stmt 1 view .LVU886 2891 .LBB358: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2892 .loc 2 6853 3 view .LVU887 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2893 .loc 2 6853 12 is_stmt 0 view .LVU888 2894 009a 9268 ldr r2, [r2, #8] 2895 .LVL249: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2896 .loc 2 6853 74 view .LVU889 2897 009c 12F0040F tst r2, #4 2898 00a0 01D1 bne .L219 2899 .LVL250: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2900 .loc 2 6853 74 view .LVU890 2901 .LBE358: 2902 .LBE357: 1530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 2903 .loc 1 1530 13 view .LVU891 2904 00a2 012B cmp r3, #1 2905 00a4 E1D1 bne .L217 2906 .L219: 1534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2907 .loc 1 1534 11 is_stmt 1 view .LVU892 2908 00a6 E36D ldr r3, [r4, #92] 2909 .LVL251: 1534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2910 .loc 1 1534 11 is_stmt 0 view .LVU893 2911 00a8 43F01003 orr r3, r3, #16 2912 00ac E365 str r3, [r4, #92] 1537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2913 .loc 1 1537 11 is_stmt 1 view .LVU894 1537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2914 .loc 1 1537 11 view .LVU895 2915 00ae 0023 movs r3, #0 2916 00b0 84F85830 strb r3, [r4, #88] 1537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2917 .loc 1 1537 11 view .LVU896 1539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2918 .loc 1 1539 11 view .LVU897 1539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2919 .loc 1 1539 18 is_stmt 0 view .LVU898 2920 00b4 0120 movs r0, #1 2921 00b6 2CE0 b .L210 2922 .LVL252: 2923 .L220: 2924 .LBB359: 2925 .LBB352: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2926 .loc 2 6853 74 view .LVU899 2927 00b8 0123 movs r3, #1 2928 00ba DBE7 b .L222 ARM GAS /tmp/cc3JIfda.s page 209 2929 .LVL253: 2930 .L233: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 2931 .loc 2 6853 74 view .LVU900 2932 .LBE352: 2933 .LBE359: 1544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop */ 1547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* while DMA transfer is on going) */ 1548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: DMA channel of ADC slave should be stopped after this function */ 1549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* with HAL_ADCEx_RegularStop_DMA() API. */ 1550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); 2934 .loc 1 1550 5 is_stmt 1 view .LVU901 2935 .loc 1 1550 22 is_stmt 0 view .LVU902 2936 00bc 606D ldr r0, [r4, #84] 2937 00be FFF7FEFF bl HAL_DMA_Abort 2938 .LVL254: 1551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check if DMA channel effectively disabled */ 1553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status != HAL_OK) 2939 .loc 1 1553 5 is_stmt 1 view .LVU903 2940 .loc 1 1553 8 is_stmt 0 view .LVU904 2941 00c2 18B1 cbz r0, .L224 1554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 2942 .loc 1 1556 7 is_stmt 1 view .LVU905 2943 00c4 E36D ldr r3, [r4, #92] 2944 00c6 43F04003 orr r3, r3, #64 2945 00ca E365 str r3, [r4, #92] 2946 .L224: 1557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable ADC overrun interrupt */ 1560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); 2947 .loc 1 1560 5 view .LVU906 2948 00cc 2268 ldr r2, [r4] 2949 00ce 5368 ldr r3, [r2, #4] 2950 00d0 23F01003 bic r3, r3, #16 2951 00d4 5360 str r3, [r2, #4] 1561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Disable the ADC peripherals: master and slave if no injected */ 1563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion is on-going. */ 1564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */ 1565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* memory a potential failing status. */ 1566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2952 .loc 1 1566 5 view .LVU907 2953 .loc 1 1566 8 is_stmt 0 view .LVU908 2954 00d6 C8B9 cbnz r0, .L211 1567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 2955 .loc 1 1568 7 is_stmt 1 view .LVU909 2956 .loc 1 1568 11 is_stmt 0 view .LVU910 2957 00d8 2368 ldr r3, [r4] 2958 .LVL255: 2959 .LBB360: ARM GAS /tmp/cc3JIfda.s page 210 2960 .LBI360: 7076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2961 .loc 2 7076 26 is_stmt 1 view .LVU911 2962 .LBB361: 2963 .loc 2 7078 3 view .LVU912 2964 .loc 2 7078 12 is_stmt 0 view .LVU913 2965 00da 9B68 ldr r3, [r3, #8] 2966 .LVL256: 2967 .loc 2 7078 76 view .LVU914 2968 00dc 13F0080F tst r3, #8 2969 00e0 0BD1 bne .L225 2970 .LVL257: 2971 .loc 2 7078 76 view .LVU915 2972 .LBE361: 2973 .LBE360: 1569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(hadc); 2974 .loc 1 1570 9 is_stmt 1 view .LVU916 2975 .loc 1 1570 27 is_stmt 0 view .LVU917 2976 00e2 2046 mov r0, r4 2977 .LVL258: 2978 .loc 1 1570 27 view .LVU918 2979 00e4 FFF7FEFF bl ADC_Disable 2980 .LVL259: 1571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 2981 .loc 1 1571 9 is_stmt 1 view .LVU919 2982 .loc 1 1571 12 is_stmt 0 view .LVU920 2983 00e8 80B9 cbnz r0, .L211 1572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing((&tmphadcSlave)->Instance) == 0UL) 2984 .loc 1 1573 11 is_stmt 1 view .LVU921 2985 .loc 1 1573 15 is_stmt 0 view .LVU922 2986 00ea 019B ldr r3, [sp, #4] 2987 .LVL260: 2988 .LBB362: 2989 .LBI362: 7076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 2990 .loc 2 7076 26 is_stmt 1 view .LVU923 2991 .LBB363: 2992 .loc 2 7078 3 view .LVU924 2993 .loc 2 7078 12 is_stmt 0 view .LVU925 2994 00ec 9B68 ldr r3, [r3, #8] 2995 .LVL261: 2996 .loc 2 7078 76 view .LVU926 2997 00ee 13F0080F tst r3, #8 2998 00f2 02D1 bne .L225 2999 .LVL262: 3000 .loc 2 7078 76 view .LVU927 3001 .LBE363: 3002 .LBE362: 1574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = ADC_Disable(&tmphadcSlave); 3003 .loc 1 1575 13 is_stmt 1 view .LVU928 3004 .loc 1 1575 31 is_stmt 0 view .LVU929 3005 00f4 01A8 add r0, sp, #4 3006 .LVL263: 3007 .loc 1 1575 31 view .LVU930 ARM GAS /tmp/cc3JIfda.s page 211 3008 00f6 FFF7FEFF bl ADC_Disable 3009 .LVL264: 3010 .L225: 1576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmp_hal_status == HAL_OK) 3011 .loc 1 1580 7 is_stmt 1 view .LVU931 3012 .loc 1 1580 10 is_stmt 0 view .LVU932 3013 00fa 38B9 cbnz r0, .L211 1581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Both Master and Slave ADC's could be disabled. Update Master State */ 1583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */ 1584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY); 3014 .loc 1 1584 9 is_stmt 1 view .LVU933 3015 00fc E36D ldr r3, [r4, #92] 3016 00fe 23F48053 bic r3, r3, #4096 3017 0102 23F00103 bic r3, r3, #1 3018 0106 43F00103 orr r3, r3, #1 3019 010a E365 str r3, [r4, #92] 3020 .LVL265: 3021 .L211: 1585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* injected (Master or Slave) conversions are still on-going, 1589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** no Master State change */ 1590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3022 .loc 1 1590 7 view .LVU934 1591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 1595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 3023 .loc 1 1595 3 view .LVU935 3024 .loc 1 1595 3 view .LVU936 3025 010c 0023 movs r3, #0 3026 010e 84F85830 strb r3, [r4, #88] 3027 .loc 1 1595 3 view .LVU937 1596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 1598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 3028 .loc 1 1598 3 view .LVU938 3029 .LVL266: 3030 .L210: 1599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3031 .loc 1 1599 1 is_stmt 0 view .LVU939 3032 0112 1DB0 add sp, sp, #116 3033 .LCFI30: 3034 .cfi_def_cfa_offset 12 3035 @ sp needed 3036 0114 30BD pop {r4, r5, pc} 3037 .LVL267: 3038 .L226: 3039 .LCFI31: 3040 .cfi_def_cfa_offset 0 ARM GAS /tmp/cc3JIfda.s page 212 3041 .cfi_restore 4 3042 .cfi_restore 5 3043 .cfi_restore 14 1484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3044 .loc 1 1484 3 view .LVU940 3045 0116 0220 movs r0, #2 3046 .LVL268: 3047 .loc 1 1599 1 view .LVU941 3048 0118 7047 bx lr 3049 .cfi_endproc 3050 .LFE349: 3052 .section .text.HAL_ADCEx_InjectedConfigChannel,"ax",%progbits 3053 .align 1 3054 .global HAL_ADCEx_InjectedConfigChannel 3055 .syntax unified 3056 .thumb 3057 .thumb_func 3059 HAL_ADCEx_InjectedConfigChannel: 3060 .LVL269: 3061 .LFB350: 1600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 1601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @} 1604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions 1607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief ADC Extended Peripheral Control functions 1608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 1609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @verbatim 1610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** =============================================================================== 1611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ##### Peripheral Control functions ##### 1612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** =============================================================================== 1613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** [..] This section provides functions allowing to: 1614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Configure channels on injected group 1615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Configure multimode when multimode feature is available 1616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Enable or Disable Injected Queue 1617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Disable ADC voltage regulator 1618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (+) Enter ADC deep-power-down mode 1619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** @endverbatim 1621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @{ 1622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 1625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Configure a channel to be assigned to ADC group injected. 1626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Possibility to update parameters on the fly: 1627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This function initializes injected group, following calls to this 1628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * function can be used to reconfigure some parameters of structure 1629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC. 1630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * The setting of these parameters is conditioned to ADC state: 1631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Refer to comments of structure "ADC_InjectionConfTypeDef". 1632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note In case of usage of internal measurement channels: 1633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Vbat/VrefInt/TempSensor. 1634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * These internal paths can be disabled using function 1635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADC_DeInit(). 1636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Caution: For Injected Context Queue use, a context must be fully ARM GAS /tmp/cc3JIfda.s page 213 1637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * defined before start of injected conversion. All channels are configured 1638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * consecutively for the same ADC instance. Therefore, the number of calls to 1639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedConfigChannel() must be equal to the value of parameter 1640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * InjectedNbrOfConversion for each context. 1641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * - Example 1: If 1 context is intended to be used (or if there is no use of the 1642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Injected Queue Context feature) and if the context contains 3 injected ranks 1643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * (InjectedNbrOfConversion = 3), HAL_ADCEx_InjectedConfigChannel() must be 1644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * called once for each channel (i.e. 3 times) before starting a conversion. 1645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This function must not be called to configure a 4th injected channel: 1646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * it would start a new context into context queue. 1647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * - Example 2: If 2 contexts are intended to be used and each of them contains 1648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * 3 injected ranks (InjectedNbrOfConversion = 3), 1649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and 1650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * for each context (3 channels x 2 contexts = 6 calls). Conversion can 1651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * start once the 1st context is set, that is after the first three 1652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_InjectedConfigChannel() calls. The 2nd context can be set on the fly. 1653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 1654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param sConfigInjected Structure of ADC injected group and ADC channel for 1655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * injected group. 1656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 1657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 1658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc, ADC_InjectionConfTypeDef 1659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3062 .loc 1 1659 1 is_stmt 1 view -0 3063 .cfi_startproc 3064 @ args = 0, pretend = 0, frame = 8 3065 @ frame_needed = 0, uses_anonymous_args = 0 3066 .loc 1 1659 1 is_stmt 0 view .LVU943 3067 0000 F0B5 push {r4, r5, r6, r7, lr} 3068 .LCFI32: 3069 .cfi_def_cfa_offset 20 3070 .cfi_offset 4, -20 3071 .cfi_offset 5, -16 3072 .cfi_offset 6, -12 3073 .cfi_offset 7, -8 3074 .cfi_offset 14, -4 3075 0002 83B0 sub sp, sp, #12 3076 .LCFI33: 3077 .cfi_def_cfa_offset 32 1660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 3078 .loc 1 1660 3 is_stmt 1 view .LVU944 3079 .LVL270: 1661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted; 3080 .loc 1 1661 3 view .LVU945 1662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_config_internal_channel; 3081 .loc 1 1662 3 view .LVU946 1663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 3082 .loc 1 1663 3 view .LVU947 1664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 3083 .loc 1 1664 3 view .LVU948 1665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __IO uint32_t wait_loop_index = 0; 3084 .loc 1 1665 3 view .LVU949 3085 .loc 1 1665 17 is_stmt 0 view .LVU950 3086 0004 0023 movs r3, #0 3087 0006 0193 str r3, [sp, #4] 1666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_JSQR_ContextQueueBeingBuilt = 0U; ARM GAS /tmp/cc3JIfda.s page 214 3088 .loc 1 1667 3 is_stmt 1 view .LVU951 3089 .LVL271: 1668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 1670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 3090 .loc 1 1670 3 view .LVU952 1671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime)); 3091 .loc 1 1671 3 view .LVU953 1672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfigInjected->InjectedSingleDiff)); 3092 .loc 1 1672 3 view .LVU954 1673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv)); 3093 .loc 1 1673 3 view .LVU955 1674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->QueueInjectedContext)); 3094 .loc 1 1674 3 view .LVU956 1675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge)); 3095 .loc 1 1675 3 view .LVU957 1676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_EXTTRIGINJEC(hadc, sConfigInjected->ExternalTrigInjecConv)); 3096 .loc 1 1676 3 view .LVU958 1677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_OFFSET_NUMBER(sConfigInjected->InjectedOffsetNumber)); 3097 .loc 1 1677 3 view .LVU959 1678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset)); 3098 .loc 1 1678 3 view .LVU960 1679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_OFFSET_SIGN(sConfigInjected->InjectedOffsetSign)); 3099 .loc 1 1679 3 view .LVU961 1680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedOffsetSaturation)); 3100 .loc 1 1680 3 view .LVU962 1681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjecOversamplingMode)); 3101 .loc 1 1681 3 view .LVU963 1682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 3102 .loc 1 1683 3 view .LVU964 3103 .loc 1 1683 17 is_stmt 0 view .LVU965 3104 0008 4269 ldr r2, [r0, #20] 1684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank)); 3105 .loc 1 1685 5 is_stmt 1 view .LVU966 1686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion)); 3106 .loc 1 1686 5 view .LVU967 1687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode)); 3107 .loc 1 1687 5 view .LVU968 1688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if JOVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is 1692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ignored (considered as reset) */ 1693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(!((sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE) && (sConfigInjected->In 3108 .loc 1 1693 3 view .LVU969 1694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* JDISCEN and JAUTO bits can't be set at the same time */ 1696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(!((sConfigInjected->InjectedDiscontinuousConvMode == ENABLE) && (sConfigInjected->Au 3109 .loc 1 1696 3 view .LVU970 1697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* DISCEN and JAUTO bits can't be set at the same time */ 1699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv 3110 .loc 1 1699 3 view .LVU971 1700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Verification of channel number */ ARM GAS /tmp/cc3JIfda.s page 215 1702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED) 3111 .loc 1 1702 3 view .LVU972 1703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_CHANNEL(hadc, sConfigInjected->InjectedChannel)); 1705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_DIFF_CHANNEL(hadc, sConfigInjected->InjectedChannel)); 3112 .loc 1 1708 5 view .LVU973 1709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 1712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 3113 .loc 1 1712 3 view .LVU974 3114 .loc 1 1712 3 view .LVU975 3115 000a 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 3116 000e 012B cmp r3, #1 3117 0010 00F0CC82 beq .L306 3118 0014 0446 mov r4, r0 3119 0016 0D46 mov r5, r1 3120 .loc 1 1712 3 discriminator 2 view .LVU976 3121 0018 0123 movs r3, #1 3122 001a 80F85830 strb r3, [r0, #88] 3123 .loc 1 1712 3 discriminator 2 view .LVU977 1713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of injected group sequencer: */ 1715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Hardware constraint: Must fully define injected context register JSQR */ 1716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* before make it entering into injected sequencer queue. */ 1717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* */ 1718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - if scan mode is disabled: */ 1719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* * Injected channels sequence length is set to 0x00: 1 channel */ 1720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* converted (channel on injected rank 1) */ 1721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameter "InjectedNbrOfConversion" is discarded. */ 1722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* * Injected context register JSQR setting is simple: register is fully */ 1723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* defined on one call of this function (for injected rank 1) and can */ 1724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* be entered into queue directly. */ 1725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - if scan mode is enabled: */ 1726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* * Injected channels sequence length is set to parameter */ 1727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* "InjectedNbrOfConversion". */ 1728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* * Injected context register JSQR setting more complex: register is */ 1729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* fully defined over successive calls of this function, for each */ 1730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* injected channel rank. It is entered into queue only when all */ 1731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* injected ranks have been set. */ 1732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: Scan mode is not present by hardware on this device, but used */ 1733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* by software for alignment over all STM32 devices. */ 1734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) || 3124 .loc 1 1735 3 discriminator 2 view .LVU978 3125 .loc 1 1735 6 is_stmt 0 discriminator 2 view .LVU979 3126 001e AAB1 cbz r2, .L236 1736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (sConfigInjected->InjectedNbrOfConversion == 1U)) 3127 .loc 1 1736 23 discriminator 1 view .LVU980 3128 0020 0B6A ldr r3, [r1, #32] 1735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (sConfigInjected->InjectedNbrOfConversion == 1U)) 3129 .loc 1 1735 54 discriminator 1 view .LVU981 3130 0022 012B cmp r3, #1 3131 0024 12D0 beq .L236 ARM GAS /tmp/cc3JIfda.s page 216 1737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of context register JSQR: */ 1739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - number of ranks in injected group sequencer: fixed to 1st rank */ 1740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* (scan mode disabled, only rank 1 used) */ 1741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - external trigger to start conversion */ 1742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - external trigger polarity */ 1743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - channel set to rank 1 (scan mode disabled, only rank 1 can be used) */ 1744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1) 1746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable external trigger if trigger selection is different of */ 1748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start. */ 1749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: This configuration keeps the hardware feature of parameter */ 1750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */ 1751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start. */ 1752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START) 1753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt = (ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECT 1755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX 1756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | sConfigInjected->ExternalTrigInjecConvEdge 1757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ); 1758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt = (ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECT 1762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, tmp_JSQR_ContextQueueBeingBuilt); 1765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* For debug and informative reasons, hadc handle saves JSQR setting */ 1766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ContextQueue = tmp_JSQR_ContextQueueBeingBuilt; 1767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Case of scan mode enabled, several channels to set into injected group */ 1773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* sequencer. */ 1774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* */ 1775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Procedure to define injected context register JSQR over successive */ 1776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* calls of this function, for each injected channel rank: */ 1777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 1. Start new context and set parameters related to all injected */ 1778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* channels: injected sequence length and trigger. */ 1779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* if hadc->InjectionConfig.ChannelCount is equal to 0, this is the first */ 1781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* call of the context under setting */ 1782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (hadc->InjectionConfig.ChannelCount == 0U) 3132 .loc 1 1782 5 is_stmt 1 view .LVU982 3133 .loc 1 1782 30 is_stmt 0 view .LVU983 3134 0026 826E ldr r2, [r0, #104] 3135 .loc 1 1782 8 view .LVU984 3136 0028 002A cmp r2, #0 3137 002a 40F0B980 bne .L307 1783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Initialize number of channels that will be configured on the context */ 1785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* being built */ 1786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ChannelCount = sConfigInjected->InjectedNbrOfConversion; 3138 .loc 1 1786 7 is_stmt 1 view .LVU985 ARM GAS /tmp/cc3JIfda.s page 217 3139 .loc 1 1786 42 is_stmt 0 view .LVU986 3140 002e 8366 str r3, [r0, #104] 1787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Handle hadc saves the context under build up over each HAL_ADCEx_InjectedConfigChannel() 1788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** call, this context will be written in JSQR register at the last call. 1789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** At this point, the context is merely reset */ 1790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ContextQueue = 0x00000000U; 3141 .loc 1 1790 7 is_stmt 1 view .LVU987 3142 .loc 1 1790 42 is_stmt 0 view .LVU988 3143 0030 0023 movs r3, #0 3144 0032 4366 str r3, [r0, #100] 1791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of context register JSQR: */ 1793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - number of ranks in injected group sequencer */ 1794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - external trigger to start conversion */ 1795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - external trigger polarity */ 1796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable external trigger if trigger selection is different of */ 1798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start. */ 1799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: This configuration keeps the hardware feature of parameter */ 1800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */ 1801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start. */ 1802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START) 3145 .loc 1 1802 7 is_stmt 1 view .LVU989 3146 .loc 1 1802 26 is_stmt 0 view .LVU990 3147 0034 8B6A ldr r3, [r1, #40] 3148 .loc 1 1802 10 view .LVU991 3149 0036 002B cmp r3, #0 3150 0038 00F0AF80 beq .L242 1803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - 1U) 3151 .loc 1 1804 9 is_stmt 1 view .LVU992 3152 .loc 1 1804 60 is_stmt 0 view .LVU993 3153 003c 0A6A ldr r2, [r1, #32] 3154 .loc 1 1804 86 view .LVU994 3155 003e 013A subs r2, r2, #1 1805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX 3156 .loc 1 1805 86 view .LVU995 3157 0040 03F07C03 and r3, r3, #124 3158 .loc 1 1805 44 view .LVU996 3159 0044 1A43 orrs r2, r2, r3 1806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | sConfigInjected->ExternalTrigInjecConvEdge 3160 .loc 1 1806 61 view .LVU997 3161 0046 CB6A ldr r3, [r1, #44] 1804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX 3162 .loc 1 1804 41 view .LVU998 3163 0048 1A43 orrs r2, r2, r3 3164 .LVL272: 1804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX 3165 .loc 1 1804 41 view .LVU999 3166 004a AAE0 b .L241 3167 .LVL273: 3168 .L236: 1745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3169 .loc 1 1745 5 is_stmt 1 view .LVU1000 1745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3170 .loc 1 1745 24 is_stmt 0 view .LVU1001 3171 004c 6B68 ldr r3, [r5, #4] ARM GAS /tmp/cc3JIfda.s page 218 1745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3172 .loc 1 1745 8 view .LVU1002 3173 004e 092B cmp r3, #9 3174 0050 00F08380 beq .L322 3175 .LVL274: 3176 .L238: 1807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ); 1808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - 1U)); 1812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 2. Continue setting of context under definition with parameter */ 1817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* related to each channel: channel rank sequence */ 1818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Clear the old JSQx bits for the selected rank */ 1819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt &= ~ADC_JSQR_RK(ADC_SQR3_SQ10, sConfigInjected->InjectedRank); 1820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set the JSQx bits for the selected rank */ 1822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_JSQR_ContextQueueBeingBuilt |= ADC_JSQR_RK(sConfigInjected->InjectedChannel, sConfigInjecte 1823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Decrease channel count */ 1825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ChannelCount--; 1826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 3. tmp_JSQR_ContextQueueBeingBuilt is fully built for this HAL_ADCEx_InjectedConfigChannel() 1828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** call, aggregate the setting to those already built during the previous 1829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_ADCEx_InjectedConfigChannel() calls (for the same context of course) */ 1830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** hadc->InjectionConfig.ContextQueue |= tmp_JSQR_ContextQueueBeingBuilt; 1831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* 4. End of context setting: if this is the last channel set, then write context 1833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** into register JSQR and make it enter into queue */ 1834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (hadc->InjectionConfig.ChannelCount == 0U) 1835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, hadc->InjectionConfig.ContextQueue); 1837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */ 1841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ 1842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on going on injected group: */ 1843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Injected context queue: Queue disable (active context is kept) or */ 1844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* enable (context decremented, up to 2 contexts queued) */ 1845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Injected discontinuous mode: can be enabled only if auto-injected */ 1846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* mode is disabled. */ 1847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL) 3177 .loc 1 1847 3 is_stmt 1 view .LVU1003 3178 .loc 1 1847 7 is_stmt 0 view .LVU1004 3179 0054 2368 ldr r3, [r4] 3180 .LVL275: 3181 .LBB364: 3182 .LBI364: 7076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3183 .loc 2 7076 26 is_stmt 1 view .LVU1005 3184 .LBB365: 3185 .loc 2 7078 3 view .LVU1006 ARM GAS /tmp/cc3JIfda.s page 219 3186 .loc 2 7078 12 is_stmt 0 view .LVU1007 3187 0056 9A68 ldr r2, [r3, #8] 3188 .loc 2 7078 76 view .LVU1008 3189 0058 12F0080F tst r2, #8 3190 005c 10D1 bne .L243 3191 .LVL276: 3192 .loc 2 7078 76 view .LVU1009 3193 .LBE365: 3194 .LBE364: 1848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If auto-injected mode is disabled: no constraint */ 1850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->AutoInjectedConv == DISABLE) 3195 .loc 1 1850 5 is_stmt 1 view .LVU1010 3196 .loc 1 1850 24 is_stmt 0 view .LVU1011 3197 005e 95F82520 ldrb r2, [r5, #37] @ zero_extendqisi2 3198 .loc 1 1850 8 view .LVU1012 3199 0062 002A cmp r2, #0 3200 0064 40F0BB80 bne .L244 1851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR, 3201 .loc 1 1852 7 is_stmt 1 view .LVU1013 3202 0068 DA68 ldr r2, [r3, #12] 3203 006a 22F44012 bic r2, r2, #3145728 3204 006e 95F82600 ldrb r0, [r5, #38] @ zero_extendqisi2 3205 .LVL277: 3206 .loc 1 1852 7 is_stmt 0 view .LVU1014 3207 0072 95F82410 ldrb r1, [r5, #36] @ zero_extendqisi2 3208 0076 0905 lsls r1, r1, #20 3209 0078 41EA4051 orr r1, r1, r0, lsl #21 3210 007c 0A43 orrs r2, r2, r1 3211 007e DA60 str r2, [r3, #12] 3212 .L243: 1853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_JQM | ADC_CFGR_JDISCEN, 1854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext) 1855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_INJECT_DISCCONTINUOUS((uint32_t)sConfigInjected->InjectedDiscontinuousCon 1856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If auto-injected mode is enabled: Injected discontinuous setting is */ 1858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* discarded. */ 1859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR, 1862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_JQM | ADC_CFGR_JDISCEN, 1863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext)); 1864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */ 1869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ 1870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on going on regular and injected groups: */ 1871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Automatic injected conversion: can be enabled if injected group */ 1872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* external triggers are disabled. */ 1873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Channel sampling time */ 1874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Channel offset */ 1875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 3213 .loc 1 1875 3 is_stmt 1 view .LVU1015 3214 .loc 1 1875 44 is_stmt 0 view .LVU1016 ARM GAS /tmp/cc3JIfda.s page 220 3215 0080 2268 ldr r2, [r4] 3216 .LVL278: 3217 .LBB366: 3218 .LBI366: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3219 .loc 2 6851 26 is_stmt 1 view .LVU1017 3220 .LBB367: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3221 .loc 2 6853 3 view .LVU1018 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3222 .loc 2 6853 12 is_stmt 0 view .LVU1019 3223 0082 9368 ldr r3, [r2, #8] 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3224 .loc 2 6853 74 view .LVU1020 3225 0084 13F00403 ands r3, r3, #4 3226 0088 00D0 beq .L245 3227 008a 0123 movs r3, #1 3228 .L245: 3229 .LVL279: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3230 .loc 2 6853 74 view .LVU1021 3231 .LBE367: 3232 .LBE366: 1876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 3233 .loc 1 1876 3 is_stmt 1 view .LVU1022 3234 .LBB368: 3235 .LBI368: 7076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3236 .loc 2 7076 26 view .LVU1023 3237 .LBB369: 3238 .loc 2 7078 3 view .LVU1024 3239 .loc 2 7078 12 is_stmt 0 view .LVU1025 3240 008c 9668 ldr r6, [r2, #8] 3241 .loc 2 7078 76 view .LVU1026 3242 008e 16F00806 ands r6, r6, #8 3243 0092 00D0 beq .L246 3244 0094 0126 movs r6, #1 3245 .L246: 3246 .LVL280: 3247 .loc 2 7078 76 view .LVU1027 3248 .LBE369: 3249 .LBE368: 1877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL) 3250 .loc 1 1878 3 is_stmt 1 view .LVU1028 3251 .loc 1 1878 6 is_stmt 0 view .LVU1029 3252 0096 002B cmp r3, #0 3253 0098 40F04081 bne .L308 1879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 3254 .loc 1 1879 7 view .LVU1030 3255 009c 002E cmp r6, #0 3256 009e 40F07281 bne .L309 1880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 1881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If injected group external triggers are disabled (set to injected */ 1883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* software start): no constraint */ 1884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START) ARM GAS /tmp/cc3JIfda.s page 221 3257 .loc 1 1884 5 is_stmt 1 view .LVU1031 3258 .loc 1 1884 25 is_stmt 0 view .LVU1032 3259 00a2 AB6A ldr r3, [r5, #40] 3260 .LVL281: 3261 .loc 1 1884 8 view .LVU1033 3262 00a4 1BB1 cbz r3, .L248 1885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (sConfigInjected->ExternalTrigInjecConvEdge == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE)) 3263 .loc 1 1885 28 view .LVU1034 3264 00a6 EB6A ldr r3, [r5, #44] 3265 .loc 1 1885 9 view .LVU1035 3266 00a8 002B cmp r3, #0 3267 00aa 40F0A780 bne .L249 3268 .L248: 1886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->AutoInjectedConv == ENABLE) 3269 .loc 1 1887 7 is_stmt 1 view .LVU1036 3270 .loc 1 1887 26 is_stmt 0 view .LVU1037 3271 00ae 95F82530 ldrb r3, [r5, #37] @ zero_extendqisi2 3272 .loc 1 1887 10 view .LVU1038 3273 00b2 012B cmp r3, #1 3274 00b4 00F09C80 beq .L323 1888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO); 1890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO); 3275 .loc 1 1893 9 is_stmt 1 view .LVU1039 3276 00b8 D368 ldr r3, [r2, #12] 3277 00ba 23F00073 bic r3, r3, #33554432 3278 00be D360 str r3, [r2, #12] 1660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted; 3279 .loc 1 1660 21 is_stmt 0 view .LVU1040 3280 00c0 0027 movs r7, #0 3281 .LVL282: 3282 .L251: 1894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If Automatic injected conversion was intended to be set and could not */ 1897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* due to injected group external triggers enabled, error is reported. */ 1898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->AutoInjectedConv == ENABLE) 1901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 1903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 1904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 1906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO); 1910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->InjecOversamplingMode == ENABLE) 3283 .loc 1 1913 5 is_stmt 1 view .LVU1041 ARM GAS /tmp/cc3JIfda.s page 222 3284 .loc 1 1913 24 is_stmt 0 view .LVU1042 3285 00c2 95F83030 ldrb r3, [r5, #48] @ zero_extendqisi2 3286 .loc 1 1913 8 view .LVU1043 3287 00c6 012B cmp r3, #1 3288 00c8 00F0A780 beq .L324 1914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_OVERSAMPLING_RATIO(sConfigInjected->InjecOversampling.Ratio)); 1916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_RIGHT_BIT_SHIFT(sConfigInjected->InjecOversampling.RightBitShift)); 1917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* JOVSE must be reset in case of triggered regular mode */ 1919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(!(READ_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS) == (ADC_CFG 1920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of Injected Oversampler: */ 1922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Oversampling Ratio */ 1923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Right bit shift */ 1924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Enable OverSampling mode */ 1926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(hadc->Instance->CFGR2, 1927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE | 1928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_OVSR | 1929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_OVSS, 1930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE | 1931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** sConfigInjected->InjecOversampling.Ratio | 1932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** sConfigInjected->InjecOversampling.RightBitShift 1933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ); 1934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Disable Regular OverSampling */ 1938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_JOVSE); 3289 .loc 1 1938 7 is_stmt 1 view .LVU1044 3290 00cc 2268 ldr r2, [r4] 3291 00ce 1369 ldr r3, [r2, #16] 3292 00d0 23F00203 bic r3, r3, #2 3293 00d4 1361 str r3, [r2, #16] 3294 .L254: 1939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Manage specific case of sampling time 3.5 cycles replacing 2.5 cyles */ 1942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->InjectedSamplingTime == ADC_SAMPLETIME_3CYCLES_5) 3295 .loc 1 1942 5 view .LVU1045 3296 .loc 1 1942 24 is_stmt 0 view .LVU1046 3297 00d6 AA68 ldr r2, [r5, #8] 3298 .loc 1 1942 8 view .LVU1047 3299 00d8 B2F1004F cmp r2, #-2147483648 3300 00dc 00F0A980 beq .L325 1943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set sampling time of the selected ADC channel */ 1945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, LL_ADC_SAMPLI 1946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC sampling time common configuration */ 1948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5); 1949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set sampling time of the selected ADC channel */ 1953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInject ARM GAS /tmp/cc3JIfda.s page 223 3301 .loc 1 1953 7 is_stmt 1 view .LVU1048 3302 00e0 2968 ldr r1, [r5] 3303 00e2 2068 ldr r0, [r4] 3304 00e4 FFF7FEFF bl LL_ADC_SetChannelSamplingTime 3305 .LVL283: 1954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC sampling time common configuration */ 1956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_DEFAULT); 3306 .loc 1 1956 7 view .LVU1049 3307 00e8 2268 ldr r2, [r4] 3308 .LVL284: 3309 .LBB370: 3310 .LBI370: 3560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3311 .loc 2 3560 22 view .LVU1050 3312 .LBB371: 3562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3313 .loc 2 3562 3 view .LVU1051 3314 00ea 5369 ldr r3, [r2, #20] 3315 00ec 23F00043 bic r3, r3, #-2147483648 3316 00f0 5361 str r3, [r2, #20] 3317 .LVL285: 3318 .L256: 3562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3319 .loc 2 3562 3 is_stmt 0 view .LVU1052 3320 .LBE371: 3321 .LBE370: 1957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configure the offset: offset enable/disable, channel, offset value */ 1960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Shift the offset with respect to the selected ADC resolution. */ 1962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */ 1963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfigInjected->InjectedOffset); 3322 .loc 1 1963 5 is_stmt 1 view .LVU1053 3323 .loc 1 1963 24 is_stmt 0 view .LVU1054 3324 00f2 6A69 ldr r2, [r5, #20] 3325 00f4 2168 ldr r1, [r4] 3326 00f6 CB68 ldr r3, [r1, #12] 3327 00f8 C3F3C103 ubfx r3, r3, #3, #2 3328 00fc 5B00 lsls r3, r3, #1 3329 .loc 1 1963 22 view .LVU1055 3330 00fe 9A40 lsls r2, r2, r3 3331 .LVL286: 1964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE) 3332 .loc 1 1965 5 is_stmt 1 view .LVU1056 3333 .loc 1 1965 24 is_stmt 0 view .LVU1057 3334 0100 D5F810C0 ldr ip, [r5, #16] 3335 .loc 1 1965 8 view .LVU1058 3336 0104 BCF1040F cmp ip, #4 3337 0108 00F0A180 beq .L257 1966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC selected offset number */ 1968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffset(hadc->Instance, sConfigInjected->InjectedOffsetNumber, sConfigInjected->Inje 3338 .loc 1 1968 7 is_stmt 1 view .LVU1059 3339 .LVL287: ARM GAS /tmp/cc3JIfda.s page 224 3340 .LBB372: 3341 .LBI372: 3220:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3342 .loc 2 3220 22 view .LVU1060 3343 .LBB373: 3222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3344 .loc 2 3222 3 view .LVU1061 3222:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3345 .loc 2 3222 25 is_stmt 0 view .LVU1062 3346 010c 6031 adds r1, r1, #96 3347 .LVL288: 3224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 3348 .loc 2 3224 3 is_stmt 1 view .LVU1063 3349 010e 51F82C00 ldr r0, [r1, ip, lsl #2] 3350 0112 A24B ldr r3, .L335 3351 0114 0340 ands r3, r3, r0 3352 0116 2868 ldr r0, [r5] 3353 0118 00F0F840 and r0, r0, #2080374784 3354 011c 0243 orrs r2, r2, r0 3355 .LVL289: 3224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 3356 .loc 2 3224 3 is_stmt 0 view .LVU1064 3357 011e 1343 orrs r3, r3, r2 3358 0120 43F00043 orr r3, r3, #-2147483648 3359 0124 41F82C30 str r3, [r1, ip, lsl #2] 3360 .LVL290: 3224:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, 3361 .loc 2 3224 3 view .LVU1065 3362 .LBE373: 3363 .LBE372: 1969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpOffsetShifted); 1970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 1971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set ADC selected offset sign & saturation */ 1972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetSign(hadc->Instance, sConfigInjected->InjectedOffsetNumber, sConfigInjected-> 3364 .loc 1 1972 7 is_stmt 1 view .LVU1066 3365 0128 2368 ldr r3, [r4] 3366 012a 2869 ldr r0, [r5, #16] 3367 012c AA69 ldr r2, [r5, #24] 3368 .LVL291: 3369 .LBB374: 3370 .LBI374: 3417:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3371 .loc 2 3417 22 view .LVU1067 3372 .LBB375: 3419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3373 .loc 2 3419 3 view .LVU1068 3419:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3374 .loc 2 3419 25 is_stmt 0 view .LVU1069 3375 012e 6033 adds r3, r3, #96 3376 .LVL292: 3421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSETPOS, 3377 .loc 2 3421 3 is_stmt 1 view .LVU1070 3378 0130 53F82010 ldr r1, [r3, r0, lsl #2] 3379 0134 21F08071 bic r1, r1, #16777216 3380 0138 0A43 orrs r2, r2, r1 3381 .LVL293: 3421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSETPOS, ARM GAS /tmp/cc3JIfda.s page 225 3382 .loc 2 3421 3 is_stmt 0 view .LVU1071 3383 013a 43F82020 str r2, [r3, r0, lsl #2] 3384 .LVL294: 3421:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSETPOS, 3385 .loc 2 3421 3 view .LVU1072 3386 .LBE375: 3387 .LBE374: 1973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetSaturation(hadc->Instance, sConfigInjected->InjectedOffsetNumber, 3388 .loc 1 1973 7 is_stmt 1 view .LVU1073 3389 013e 2368 ldr r3, [r4] 3390 0140 2869 ldr r0, [r5, #16] 1974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (sConfigInjected->InjectedOffsetSaturation == ENABLE) ? LL_ADC_OFF 3391 .loc 1 1974 50 is_stmt 0 view .LVU1074 3392 0142 2A7F ldrb r2, [r5, #28] @ zero_extendqisi2 1973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetSaturation(hadc->Instance, sConfigInjected->InjectedOffsetNumber, 3393 .loc 1 1973 7 view .LVU1075 3394 0144 012A cmp r2, #1 3395 0146 7FD0 beq .L326 3396 .LVL295: 3397 .L258: 3398 .LBB376: 3399 .LBI376: 3472:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3400 .loc 2 3472 22 is_stmt 1 discriminator 4 view .LVU1076 3401 .LBB377: 3474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3402 .loc 2 3474 3 discriminator 4 view .LVU1077 3474:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3403 .loc 2 3474 25 is_stmt 0 discriminator 4 view .LVU1078 3404 0148 6033 adds r3, r3, #96 3405 .LVL296: 3476:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_SATEN, 3406 .loc 2 3476 3 is_stmt 1 discriminator 4 view .LVU1079 3407 014a 53F82020 ldr r2, [r3, r0, lsl #2] 3408 014e 22F00072 bic r2, r2, #33554432 3409 0152 3243 orrs r2, r2, r6 3410 0154 43F82020 str r2, [r3, r0, lsl #2] 3411 .LVL297: 3479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3412 .loc 2 3479 1 is_stmt 0 discriminator 4 view .LVU1080 3413 0158 E1E0 b .L247 3414 .LVL298: 3415 .L322: 3479:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3416 .loc 2 3479 1 discriminator 4 view .LVU1081 3417 .LBE377: 3418 .LBE376: 1752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3419 .loc 1 1752 7 is_stmt 1 view .LVU1082 1752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3420 .loc 1 1752 26 is_stmt 0 view .LVU1083 3421 015a AA6A ldr r2, [r5, #40] 1752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3422 .loc 1 1752 10 view .LVU1084 3423 015c BAB1 cbz r2, .L239 1754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX 3424 .loc 1 1754 9 is_stmt 1 view .LVU1085 ARM GAS /tmp/cc3JIfda.s page 226 1754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX 3425 .loc 1 1754 44 is_stmt 0 view .LVU1086 3426 015e 2B68 ldr r3, [r5] 3427 0160 9B0E lsrs r3, r3, #26 3428 0162 5B02 lsls r3, r3, #9 3429 0164 03F47853 and r3, r3, #15872 1755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | sConfigInjected->ExternalTrigInjecConvEdge 3430 .loc 1 1755 86 view .LVU1087 3431 0168 02F07C02 and r2, r2, #124 1755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | sConfigInjected->ExternalTrigInjecConvEdge 3432 .loc 1 1755 44 view .LVU1088 3433 016c 1343 orrs r3, r3, r2 1756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ); 3434 .loc 1 1756 61 view .LVU1089 3435 016e EA6A ldr r2, [r5, #44] 1754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEX 3436 .loc 1 1754 41 view .LVU1090 3437 0170 1343 orrs r3, r3, r2 3438 .LVL299: 3439 .L240: 1764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* For debug and informative reasons, hadc handle saves JSQR setting */ 3440 .loc 1 1764 7 is_stmt 1 view .LVU1091 3441 0172 2168 ldr r1, [r4] 3442 .LVL300: 1764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* For debug and informative reasons, hadc handle saves JSQR setting */ 3443 .loc 1 1764 7 is_stmt 0 view .LVU1092 3444 0174 CA6C ldr r2, [r1, #76] 3445 0176 22F07B42 bic r2, r2, #-83886080 3446 017a 22F46F02 bic r2, r2, #15663104 3447 017e 22F43F42 bic r2, r2, #48896 3448 0182 22F0FF02 bic r2, r2, #255 3449 0186 1A43 orrs r2, r2, r3 3450 0188 CA64 str r2, [r1, #76] 1766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3451 .loc 1 1766 7 is_stmt 1 view .LVU1093 1766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3452 .loc 1 1766 42 is_stmt 0 view .LVU1094 3453 018a 6366 str r3, [r4, #100] 3454 018c 62E7 b .L238 3455 .LVL301: 3456 .L239: 1761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3457 .loc 1 1761 9 is_stmt 1 view .LVU1095 1761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3458 .loc 1 1761 44 is_stmt 0 view .LVU1096 3459 018e 2B68 ldr r3, [r5] 3460 0190 9B0E lsrs r3, r3, #26 3461 0192 5B02 lsls r3, r3, #9 1761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3462 .loc 1 1761 41 view .LVU1097 3463 0194 03F47853 and r3, r3, #15872 3464 .LVL302: 1761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3465 .loc 1 1761 41 view .LVU1098 3466 0198 EBE7 b .L240 3467 .LVL303: 3468 .L242: ARM GAS /tmp/cc3JIfda.s page 227 1811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3469 .loc 1 1811 9 is_stmt 1 view .LVU1099 1811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3470 .loc 1 1811 60 is_stmt 0 view .LVU1100 3471 019a 0A6A ldr r2, [r1, #32] 1811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3472 .loc 1 1811 41 view .LVU1101 3473 019c 013A subs r2, r2, #1 3474 .LVL304: 1811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3475 .loc 1 1811 41 view .LVU1102 3476 019e 00E0 b .L241 3477 .LVL305: 3478 .L307: 1667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3479 .loc 1 1667 12 view .LVU1103 3480 01a0 0022 movs r2, #0 3481 .LVL306: 3482 .L241: 1819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3483 .loc 1 1819 5 is_stmt 1 view .LVU1104 1822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3484 .loc 1 1822 5 view .LVU1105 1822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3485 .loc 1 1822 40 is_stmt 0 view .LVU1106 3486 01a2 2B68 ldr r3, [r5] 3487 01a4 C3F38463 ubfx r3, r3, #26, #5 3488 01a8 6968 ldr r1, [r5, #4] 3489 .LVL307: 1822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3490 .loc 1 1822 40 view .LVU1107 3491 01aa 01F01F01 and r1, r1, #31 3492 01ae 8B40 lsls r3, r3, r1 1822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3493 .loc 1 1822 37 view .LVU1108 3494 01b0 1343 orrs r3, r3, r2 3495 .LVL308: 1825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3496 .loc 1 1825 5 is_stmt 1 view .LVU1109 1825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3497 .loc 1 1825 26 is_stmt 0 view .LVU1110 3498 01b2 A16E ldr r1, [r4, #104] 1825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3499 .loc 1 1825 39 view .LVU1111 3500 01b4 0139 subs r1, r1, #1 3501 01b6 A166 str r1, [r4, #104] 1830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3502 .loc 1 1830 5 is_stmt 1 view .LVU1112 1830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3503 .loc 1 1830 26 is_stmt 0 view .LVU1113 3504 01b8 626E ldr r2, [r4, #100] 1830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3505 .loc 1 1830 40 view .LVU1114 3506 01ba 1343 orrs r3, r3, r2 3507 .LVL309: 1830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3508 .loc 1 1830 40 view .LVU1115 ARM GAS /tmp/cc3JIfda.s page 228 3509 01bc 6366 str r3, [r4, #100] 1834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3510 .loc 1 1834 5 is_stmt 1 view .LVU1116 1834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3511 .loc 1 1834 8 is_stmt 0 view .LVU1117 3512 01be 0029 cmp r1, #0 3513 01c0 7FF448AF bne .L238 1836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3514 .loc 1 1836 7 is_stmt 1 view .LVU1118 3515 01c4 2168 ldr r1, [r4] 3516 01c6 CA6C ldr r2, [r1, #76] 3517 01c8 22F07B42 bic r2, r2, #-83886080 3518 01cc 22F46F02 bic r2, r2, #15663104 3519 01d0 22F43F42 bic r2, r2, #48896 3520 01d4 22F0FF02 bic r2, r2, #255 3521 01d8 1343 orrs r3, r3, r2 3522 01da CB64 str r3, [r1, #76] 3523 01dc 3AE7 b .L238 3524 .LVL310: 3525 .L244: 1861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR_JQM | ADC_CFGR_JDISCEN, 3526 .loc 1 1861 7 view .LVU1119 3527 01de DA68 ldr r2, [r3, #12] 3528 01e0 22F44012 bic r2, r2, #3145728 3529 01e4 95F82610 ldrb r1, [r5, #38] @ zero_extendqisi2 3530 01e8 42EA4152 orr r2, r2, r1, lsl #21 3531 01ec DA60 str r2, [r3, #12] 3532 01ee 47E7 b .L243 3533 .LVL311: 3534 .L323: 1889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3535 .loc 1 1889 9 view .LVU1120 3536 01f0 D368 ldr r3, [r2, #12] 3537 01f2 43F00073 orr r3, r3, #33554432 3538 01f6 D360 str r3, [r2, #12] 1660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted; 3539 .loc 1 1660 21 is_stmt 0 view .LVU1121 3540 01f8 0027 movs r7, #0 3541 01fa 62E7 b .L251 3542 .L249: 1900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3543 .loc 1 1900 7 is_stmt 1 view .LVU1122 1900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3544 .loc 1 1900 26 is_stmt 0 view .LVU1123 3545 01fc 95F82570 ldrb r7, [r5, #37] @ zero_extendqisi2 1900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 3546 .loc 1 1900 10 view .LVU1124 3547 0200 012F cmp r7, #1 3548 0202 05D0 beq .L327 1909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3549 .loc 1 1909 9 is_stmt 1 view .LVU1125 3550 0204 D368 ldr r3, [r2, #12] 3551 0206 23F00073 bic r3, r3, #33554432 3552 020a D360 str r3, [r2, #12] 1660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted; 3553 .loc 1 1660 21 is_stmt 0 view .LVU1126 3554 020c 0027 movs r7, #0 ARM GAS /tmp/cc3JIfda.s page 229 3555 020e 58E7 b .L251 3556 .L327: 1903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3557 .loc 1 1903 9 is_stmt 1 view .LVU1127 3558 0210 E36D ldr r3, [r4, #92] 3559 0212 43F02003 orr r3, r3, #32 3560 0216 E365 str r3, [r4, #92] 1905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3561 .loc 1 1905 9 view .LVU1128 3562 .LVL312: 1905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3563 .loc 1 1905 9 is_stmt 0 view .LVU1129 3564 0218 53E7 b .L251 3565 .LVL313: 3566 .L324: 1915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_RIGHT_BIT_SHIFT(sConfigInjected->InjecOversampling.RightBitShift)); 3567 .loc 1 1915 7 is_stmt 1 view .LVU1130 1916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3568 .loc 1 1916 7 view .LVU1131 1919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3569 .loc 1 1919 7 view .LVU1132 1926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CFGR2_JOVSE | 3570 .loc 1 1926 7 view .LVU1133 3571 021a 2168 ldr r1, [r4] 3572 021c 0B69 ldr r3, [r1, #16] 3573 021e 23F4FF73 bic r3, r3, #510 3574 0222 6A6B ldr r2, [r5, #52] 3575 0224 A86B ldr r0, [r5, #56] 3576 0226 0243 orrs r2, r2, r0 3577 0228 1343 orrs r3, r3, r2 3578 022a 43F00203 orr r3, r3, #2 3579 022e 0B61 str r3, [r1, #16] 3580 0230 51E7 b .L254 3581 .L325: 1945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 3582 .loc 1 1945 7 view .LVU1134 3583 0232 0022 movs r2, #0 3584 0234 2968 ldr r1, [r5] 3585 0236 2068 ldr r0, [r4] 3586 0238 FFF7FEFF bl LL_ADC_SetChannelSamplingTime 3587 .LVL314: 1948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3588 .loc 1 1948 7 view .LVU1135 3589 023c 2268 ldr r2, [r4] 3590 .LVL315: 3591 .LBB378: 3592 .LBI378: 3560:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3593 .loc 2 3560 22 view .LVU1136 3594 .LBB379: 3562:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3595 .loc 2 3562 3 view .LVU1137 3596 023e 5369 ldr r3, [r2, #20] 3597 0240 43F00043 orr r3, r3, #-2147483648 3598 0244 5361 str r3, [r2, #20] 3563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3599 .loc 2 3563 1 is_stmt 0 view .LVU1138 ARM GAS /tmp/cc3JIfda.s page 230 3600 0246 54E7 b .L256 3601 .LVL316: 3602 .L326: 3563:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3603 .loc 2 3563 1 view .LVU1139 3604 .LBE379: 3605 .LBE378: 1973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (sConfigInjected->InjectedOffsetSaturation == ENABLE) ? LL_ADC_OFF 3606 .loc 1 1973 7 view .LVU1140 3607 0248 4FF00076 mov r6, #33554432 3608 .LVL317: 1973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (sConfigInjected->InjectedOffsetSaturation == ENABLE) ? LL_ADC_OFF 3609 .loc 1 1973 7 view .LVU1141 3610 024c 7CE7 b .L258 3611 .LVL318: 3612 .L257: 1975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 1977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Scan each offset register to check if the selected channel is targeted. */ 1979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If this is the case, the corresponding offset number is disabled. */ 1980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_1)) 3613 .loc 1 1980 7 is_stmt 1 view .LVU1142 3614 .LBB380: 3615 .LBI380: 3303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3616 .loc 2 3303 26 view .LVU1143 3617 .LBB381: 3305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3618 .loc 2 3305 3 view .LVU1144 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3619 .loc 2 3307 3 view .LVU1145 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3620 .loc 2 3307 10 is_stmt 0 view .LVU1146 3621 024e 0B6E ldr r3, [r1, #96] 3622 .LVL319: 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3623 .loc 2 3307 10 view .LVU1147 3624 .LBE381: 3625 .LBE380: 3626 .LBB382: 3627 .LBI382: 3303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3628 .loc 2 3303 26 is_stmt 1 view .LVU1148 3629 .LBB383: 3305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3630 .loc 2 3305 3 view .LVU1149 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3631 .loc 2 3307 3 view .LVU1150 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3632 .loc 2 3307 10 is_stmt 0 view .LVU1151 3633 0250 0A6E ldr r2, [r1, #96] 3634 .LVL320: 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3635 .loc 2 3307 10 view .LVU1152 3636 .LBE383: 3637 .LBE382: ARM GAS /tmp/cc3JIfda.s page 231 3638 .loc 1 1980 11 view .LVU1153 3639 0252 C2F38462 ubfx r2, r2, #26, #5 1981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3640 .loc 1 1981 14 view .LVU1154 3641 0256 2B68 ldr r3, [r5] 3642 0258 C3F31200 ubfx r0, r3, #0, #19 3643 025c 78BB cbnz r0, .L259 3644 .loc 1 1981 14 discriminator 1 view .LVU1155 3645 025e C3F38463 ubfx r3, r3, #26, #5 3646 .L260: 1980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3647 .loc 1 1980 10 view .LVU1156 3648 0262 9A42 cmp r2, r3 3649 0264 33D0 beq .L328 3650 .L262: 1982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_1, LL_ADC_OFFSET_DISABLE); 1984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_2)) 3651 .loc 1 1985 7 is_stmt 1 view .LVU1157 3652 .loc 1 1985 11 is_stmt 0 view .LVU1158 3653 0266 2168 ldr r1, [r4] 3654 .LVL321: 3655 .LBB384: 3656 .LBI384: 3303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3657 .loc 2 3303 26 is_stmt 1 view .LVU1159 3658 .LBB385: 3305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3659 .loc 2 3305 3 view .LVU1160 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3660 .loc 2 3307 3 view .LVU1161 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3661 .loc 2 3307 10 is_stmt 0 view .LVU1162 3662 0268 4B6E ldr r3, [r1, #100] 3663 .LVL322: 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3664 .loc 2 3307 10 view .LVU1163 3665 .LBE385: 3666 .LBE384: 3667 .LBB386: 3668 .LBI386: 3303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3669 .loc 2 3303 26 is_stmt 1 view .LVU1164 3670 .LBB387: 3305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3671 .loc 2 3305 3 view .LVU1165 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3672 .loc 2 3307 3 view .LVU1166 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3673 .loc 2 3307 10 is_stmt 0 view .LVU1167 3674 026a 4A6E ldr r2, [r1, #100] 3675 .LVL323: 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3676 .loc 2 3307 10 view .LVU1168 3677 .LBE387: 3678 .LBE386: ARM GAS /tmp/cc3JIfda.s page 232 3679 .loc 1 1985 11 view .LVU1169 3680 026c C2F38462 ubfx r2, r2, #26, #5 1986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3681 .loc 1 1986 14 view .LVU1170 3682 0270 2B68 ldr r3, [r5] 3683 0272 C3F31200 ubfx r0, r3, #0, #19 3684 0276 78BB cbnz r0, .L263 3685 .loc 1 1986 14 discriminator 1 view .LVU1171 3686 0278 C3F38463 ubfx r3, r3, #26, #5 3687 .L264: 1985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3688 .loc 1 1985 10 view .LVU1172 3689 027c 9A42 cmp r2, r3 3690 027e 33D0 beq .L329 3691 .L266: 1987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_2, LL_ADC_OFFSET_DISABLE); 1989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_3)) 3692 .loc 1 1990 7 is_stmt 1 view .LVU1173 3693 .loc 1 1990 11 is_stmt 0 view .LVU1174 3694 0280 2168 ldr r1, [r4] 3695 .LVL324: 3696 .LBB388: 3697 .LBI388: 3303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3698 .loc 2 3303 26 is_stmt 1 view .LVU1175 3699 .LBB389: 3305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3700 .loc 2 3305 3 view .LVU1176 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3701 .loc 2 3307 3 view .LVU1177 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3702 .loc 2 3307 10 is_stmt 0 view .LVU1178 3703 0282 8B6E ldr r3, [r1, #104] 3704 .LVL325: 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3705 .loc 2 3307 10 view .LVU1179 3706 .LBE389: 3707 .LBE388: 3708 .LBB390: 3709 .LBI390: 3303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3710 .loc 2 3303 26 is_stmt 1 view .LVU1180 3711 .LBB391: 3305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3712 .loc 2 3305 3 view .LVU1181 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3713 .loc 2 3307 3 view .LVU1182 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3714 .loc 2 3307 10 is_stmt 0 view .LVU1183 3715 0284 8A6E ldr r2, [r1, #104] 3716 .LVL326: 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3717 .loc 2 3307 10 view .LVU1184 3718 .LBE391: 3719 .LBE390: ARM GAS /tmp/cc3JIfda.s page 233 3720 .loc 1 1990 11 view .LVU1185 3721 0286 C2F38462 ubfx r2, r2, #26, #5 1991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3722 .loc 1 1991 14 view .LVU1186 3723 028a 2B68 ldr r3, [r5] 3724 028c C3F31200 ubfx r0, r3, #0, #19 3725 0290 78BB cbnz r0, .L267 3726 .loc 1 1991 14 discriminator 1 view .LVU1187 3727 0292 C3F38463 ubfx r3, r3, #26, #5 3728 .L268: 1990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3729 .loc 1 1990 10 view .LVU1188 3730 0296 9A42 cmp r2, r3 3731 0298 33D0 beq .L330 3732 .L270: 1992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_3, LL_ADC_OFFSET_DISABLE); 1994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 1995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_4)) 3733 .loc 1 1995 7 is_stmt 1 view .LVU1189 3734 .loc 1 1995 11 is_stmt 0 view .LVU1190 3735 029a 2168 ldr r1, [r4] 3736 .LVL327: 3737 .LBB392: 3738 .LBI392: 3303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3739 .loc 2 3303 26 is_stmt 1 view .LVU1191 3740 .LBB393: 3305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3741 .loc 2 3305 3 view .LVU1192 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3742 .loc 2 3307 3 view .LVU1193 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3743 .loc 2 3307 10 is_stmt 0 view .LVU1194 3744 029c CB6E ldr r3, [r1, #108] 3745 .LVL328: 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3746 .loc 2 3307 10 view .LVU1195 3747 .LBE393: 3748 .LBE392: 3749 .LBB394: 3750 .LBI394: 3303:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3751 .loc 2 3303 26 is_stmt 1 view .LVU1196 3752 .LBB395: 3305:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3753 .loc 2 3305 3 view .LVU1197 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3754 .loc 2 3307 3 view .LVU1198 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3755 .loc 2 3307 10 is_stmt 0 view .LVU1199 3756 029e CA6E ldr r2, [r1, #108] 3757 .LVL329: 3307:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 3758 .loc 2 3307 10 view .LVU1200 3759 .LBE395: 3760 .LBE394: ARM GAS /tmp/cc3JIfda.s page 234 3761 .loc 1 1995 11 view .LVU1201 3762 02a0 C2F38462 ubfx r2, r2, #26, #5 1996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3763 .loc 1 1996 14 view .LVU1202 3764 02a4 2B68 ldr r3, [r5] 3765 02a6 C3F31200 ubfx r0, r3, #0, #19 3766 02aa 78BB cbnz r0, .L271 3767 .loc 1 1996 14 discriminator 1 view .LVU1203 3768 02ac C3F38463 ubfx r3, r3, #26, #5 3769 .L272: 1995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel)) 3770 .loc 1 1995 10 view .LVU1204 3771 02b0 9A42 cmp r2, r3 3772 02b2 34D1 bne .L247 1997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 1998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_4, LL_ADC_OFFSET_DISABLE); 3773 .loc 1 1998 9 is_stmt 1 view .LVU1205 3774 .LVL330: 3775 .LBB396: 3776 .LBI396: 3362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3777 .loc 2 3362 22 view .LVU1206 3778 .LBB397: 3364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3779 .loc 2 3364 3 view .LVU1207 3366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3780 .loc 2 3366 3 view .LVU1208 3781 02b4 CB6E ldr r3, [r1, #108] 3782 02b6 23F00043 bic r3, r3, #-2147483648 3783 02ba CB66 str r3, [r1, #108] 3369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3784 .loc 2 3369 1 is_stmt 0 view .LVU1209 3785 02bc 2FE0 b .L247 3786 .LVL331: 3787 .L259: 3369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3788 .loc 2 3369 1 view .LVU1210 3789 .LBE397: 3790 .LBE396: 3791 .LBB398: 3792 .LBI398: 3793 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2019 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * ARM GAS /tmp/cc3JIfda.s page 235 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" ARM GAS /tmp/cc3JIfda.s page 236 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __COMPILER_BARRIER 117:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __COMPILER_BARRIER() __ASM volatile("":::"memory") 118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 119:Drivers/CMSIS/Include/cmsis_gcc.h **** 120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */ 121:Drivers/CMSIS/Include/cmsis_gcc.h **** 122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss 127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly 128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script. 129:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/cc3JIfda.s page 237 130:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) 132:Drivers/CMSIS/Include/cmsis_gcc.h **** { 133:Drivers/CMSIS/Include/cmsis_gcc.h **** extern void _start(void) __NO_RETURN; 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src; 137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t; 140:Drivers/CMSIS/Include/cmsis_gcc.h **** 141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 143:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 144:Drivers/CMSIS/Include/cmsis_gcc.h **** } __zero_table_t; 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_start__; 147:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_end__; 148:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_start__; 149:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_end__; 150:Drivers/CMSIS/Include/cmsis_gcc.h **** 151:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable 152:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = pTable->src[i]; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** } 155:Drivers/CMSIS/Include/cmsis_gcc.h **** } 156:Drivers/CMSIS/Include/cmsis_gcc.h **** 157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable 158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u; 160:Drivers/CMSIS/Include/cmsis_gcc.h **** } 161:Drivers/CMSIS/Include/cmsis_gcc.h **** } 162:Drivers/CMSIS/Include/cmsis_gcc.h **** 163:Drivers/CMSIS/Include/cmsis_gcc.h **** _start(); 164:Drivers/CMSIS/Include/cmsis_gcc.h **** } 165:Drivers/CMSIS/Include/cmsis_gcc.h **** 166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START __cmsis_start 167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 168:Drivers/CMSIS/Include/cmsis_gcc.h **** 169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP 170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP __StackTop 171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 172:Drivers/CMSIS/Include/cmsis_gcc.h **** 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT 174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT __StackLimit 175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 176:Drivers/CMSIS/Include/cmsis_gcc.h **** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE 178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors 179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 180:Drivers/CMSIS/Include/cmsis_gcc.h **** 181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE 182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors"))) 183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 184:Drivers/CMSIS/Include/cmsis_gcc.h **** 185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface ARM GAS /tmp/cc3JIfda.s page 238 187:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 188:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 189:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 190:Drivers/CMSIS/Include/cmsis_gcc.h **** 191:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 192:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 193:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 194:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 195:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 197:Drivers/CMSIS/Include/cmsis_gcc.h **** { 198:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 199:Drivers/CMSIS/Include/cmsis_gcc.h **** } 200:Drivers/CMSIS/Include/cmsis_gcc.h **** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** 202:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 204:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 205:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 206:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 208:Drivers/CMSIS/Include/cmsis_gcc.h **** { 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** } 211:Drivers/CMSIS/Include/cmsis_gcc.h **** 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 214:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 217:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 218:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 219:Drivers/CMSIS/Include/cmsis_gcc.h **** { 220:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 221:Drivers/CMSIS/Include/cmsis_gcc.h **** 222:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 223:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** } 225:Drivers/CMSIS/Include/cmsis_gcc.h **** 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** /** ARM GAS /tmp/cc3JIfda.s page 239 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 246:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 247:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 248:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 249:Drivers/CMSIS/Include/cmsis_gcc.h **** { 250:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 251:Drivers/CMSIS/Include/cmsis_gcc.h **** } 252:Drivers/CMSIS/Include/cmsis_gcc.h **** 253:Drivers/CMSIS/Include/cmsis_gcc.h **** 254:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 255:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 259:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 260:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 261:Drivers/CMSIS/Include/cmsis_gcc.h **** { 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 263:Drivers/CMSIS/Include/cmsis_gcc.h **** } 264:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** 267:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 268:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 269:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 270:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 271:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 272:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 273:Drivers/CMSIS/Include/cmsis_gcc.h **** { 274:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 275:Drivers/CMSIS/Include/cmsis_gcc.h **** 276:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 277:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 278:Drivers/CMSIS/Include/cmsis_gcc.h **** } 279:Drivers/CMSIS/Include/cmsis_gcc.h **** 280:Drivers/CMSIS/Include/cmsis_gcc.h **** 281:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register 283:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 284:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 285:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 286:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 287:Drivers/CMSIS/Include/cmsis_gcc.h **** { 288:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 289:Drivers/CMSIS/Include/cmsis_gcc.h **** 290:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 291:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 299:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 300:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) ARM GAS /tmp/cc3JIfda.s page 240 301:Drivers/CMSIS/Include/cmsis_gcc.h **** { 302:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 303:Drivers/CMSIS/Include/cmsis_gcc.h **** 304:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 305:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** } 307:Drivers/CMSIS/Include/cmsis_gcc.h **** 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 311:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 313:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 314:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 315:Drivers/CMSIS/Include/cmsis_gcc.h **** { 316:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 317:Drivers/CMSIS/Include/cmsis_gcc.h **** 318:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 319:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 320:Drivers/CMSIS/Include/cmsis_gcc.h **** } 321:Drivers/CMSIS/Include/cmsis_gcc.h **** 322:Drivers/CMSIS/Include/cmsis_gcc.h **** 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 324:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 326:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 328:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 329:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 330:Drivers/CMSIS/Include/cmsis_gcc.h **** { 331:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 332:Drivers/CMSIS/Include/cmsis_gcc.h **** 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 334:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 335:Drivers/CMSIS/Include/cmsis_gcc.h **** } 336:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 337:Drivers/CMSIS/Include/cmsis_gcc.h **** 338:Drivers/CMSIS/Include/cmsis_gcc.h **** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 342:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 343:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 344:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 345:Drivers/CMSIS/Include/cmsis_gcc.h **** { 346:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 347:Drivers/CMSIS/Include/cmsis_gcc.h **** } 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS /tmp/cc3JIfda.s page 241 358:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 359:Drivers/CMSIS/Include/cmsis_gcc.h **** } 360:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 361:Drivers/CMSIS/Include/cmsis_gcc.h **** 362:Drivers/CMSIS/Include/cmsis_gcc.h **** 363:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 364:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 365:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 367:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 368:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 369:Drivers/CMSIS/Include/cmsis_gcc.h **** { 370:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 371:Drivers/CMSIS/Include/cmsis_gcc.h **** 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 374:Drivers/CMSIS/Include/cmsis_gcc.h **** } 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 377:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 378:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 381:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 382:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 383:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 384:Drivers/CMSIS/Include/cmsis_gcc.h **** { 385:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 386:Drivers/CMSIS/Include/cmsis_gcc.h **** 387:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 388:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 389:Drivers/CMSIS/Include/cmsis_gcc.h **** } 390:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 391:Drivers/CMSIS/Include/cmsis_gcc.h **** 392:Drivers/CMSIS/Include/cmsis_gcc.h **** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 396:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 397:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 398:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 399:Drivers/CMSIS/Include/cmsis_gcc.h **** { 400:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 401:Drivers/CMSIS/Include/cmsis_gcc.h **** } 402:Drivers/CMSIS/Include/cmsis_gcc.h **** 403:Drivers/CMSIS/Include/cmsis_gcc.h **** 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 405:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 406:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 407:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 409:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 410:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 411:Drivers/CMSIS/Include/cmsis_gcc.h **** { 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 413:Drivers/CMSIS/Include/cmsis_gcc.h **** } 414:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/cc3JIfda.s page 242 415:Drivers/CMSIS/Include/cmsis_gcc.h **** 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 417:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 418:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 419:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 422:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 423:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 424:Drivers/CMSIS/Include/cmsis_gcc.h **** { 425:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 426:Drivers/CMSIS/Include/cmsis_gcc.h **** 427:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); 428:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 429:Drivers/CMSIS/Include/cmsis_gcc.h **** } 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** 432:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 433:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) 434:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set 436:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 438:Drivers/CMSIS/Include/cmsis_gcc.h **** { 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 440:Drivers/CMSIS/Include/cmsis_gcc.h **** } 441:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 442:Drivers/CMSIS/Include/cmsis_gcc.h **** 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 444:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 445:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 448:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 449:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 450:Drivers/CMSIS/Include/cmsis_gcc.h **** { 451:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 452:Drivers/CMSIS/Include/cmsis_gcc.h **** 453:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 454:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 455:Drivers/CMSIS/Include/cmsis_gcc.h **** } 456:Drivers/CMSIS/Include/cmsis_gcc.h **** 457:Drivers/CMSIS/Include/cmsis_gcc.h **** 458:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 459:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 460:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 461:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 462:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 463:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 464:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) 465:Drivers/CMSIS/Include/cmsis_gcc.h **** { 466:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 467:Drivers/CMSIS/Include/cmsis_gcc.h **** 468:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 469:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 470:Drivers/CMSIS/Include/cmsis_gcc.h **** } 471:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/cc3JIfda.s page 243 472:Drivers/CMSIS/Include/cmsis_gcc.h **** 473:Drivers/CMSIS/Include/cmsis_gcc.h **** 474:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 475:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 476:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 477:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 478:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 479:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 480:Drivers/CMSIS/Include/cmsis_gcc.h **** { 481:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** 498:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 499:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 500:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 501:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 502:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 503:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 504:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 505:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 507:Drivers/CMSIS/Include/cmsis_gcc.h **** { 508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); 509:Drivers/CMSIS/Include/cmsis_gcc.h **** } 510:Drivers/CMSIS/Include/cmsis_gcc.h **** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** 512:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. 515:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 516:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 517:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 518:Drivers/CMSIS/Include/cmsis_gcc.h **** { 519:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 520:Drivers/CMSIS/Include/cmsis_gcc.h **** } 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 526:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 527:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 528:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) ARM GAS /tmp/cc3JIfda.s page 244 529:Drivers/CMSIS/Include/cmsis_gcc.h **** { 530:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 531:Drivers/CMSIS/Include/cmsis_gcc.h **** 532:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 534:Drivers/CMSIS/Include/cmsis_gcc.h **** } 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** 537:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 538:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. 541:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 542:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 543:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 544:Drivers/CMSIS/Include/cmsis_gcc.h **** { 545:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 546:Drivers/CMSIS/Include/cmsis_gcc.h **** 547:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); 548:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 549:Drivers/CMSIS/Include/cmsis_gcc.h **** } 550:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 556:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 557:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 558:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 559:Drivers/CMSIS/Include/cmsis_gcc.h **** { 560:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 561:Drivers/CMSIS/Include/cmsis_gcc.h **** } 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 563:Drivers/CMSIS/Include/cmsis_gcc.h **** 564:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 565:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. 568:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 569:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 570:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) 571:Drivers/CMSIS/Include/cmsis_gcc.h **** { 572:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); 573:Drivers/CMSIS/Include/cmsis_gcc.h **** } 574:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 575:Drivers/CMSIS/Include/cmsis_gcc.h **** 576:Drivers/CMSIS/Include/cmsis_gcc.h **** 577:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 578:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition 579:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 580:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. 581:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 582:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 583:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 584:Drivers/CMSIS/Include/cmsis_gcc.h **** { 585:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); ARM GAS /tmp/cc3JIfda.s page 245 586:Drivers/CMSIS/Include/cmsis_gcc.h **** } 587:Drivers/CMSIS/Include/cmsis_gcc.h **** 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 589:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 591:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 592:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 593:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 594:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 595:Drivers/CMSIS/Include/cmsis_gcc.h **** { 596:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 597:Drivers/CMSIS/Include/cmsis_gcc.h **** 598:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); 599:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 600:Drivers/CMSIS/Include/cmsis_gcc.h **** } 601:Drivers/CMSIS/Include/cmsis_gcc.h **** 602:Drivers/CMSIS/Include/cmsis_gcc.h **** 603:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 604:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 605:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 608:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 609:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 610:Drivers/CMSIS/Include/cmsis_gcc.h **** { 611:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 612:Drivers/CMSIS/Include/cmsis_gcc.h **** 613:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); 614:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 615:Drivers/CMSIS/Include/cmsis_gcc.h **** } 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 617:Drivers/CMSIS/Include/cmsis_gcc.h **** 618:Drivers/CMSIS/Include/cmsis_gcc.h **** 619:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 620:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 621:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 622:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 623:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 624:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) 625:Drivers/CMSIS/Include/cmsis_gcc.h **** { 626:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); 627:Drivers/CMSIS/Include/cmsis_gcc.h **** } 628:Drivers/CMSIS/Include/cmsis_gcc.h **** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** 630:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 631:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 632:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 633:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 635:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 636:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 637:Drivers/CMSIS/Include/cmsis_gcc.h **** { 638:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 639:Drivers/CMSIS/Include/cmsis_gcc.h **** } 640:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 641:Drivers/CMSIS/Include/cmsis_gcc.h **** 642:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ ARM GAS /tmp/cc3JIfda.s page 246 643:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 644:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 645:Drivers/CMSIS/Include/cmsis_gcc.h **** 646:Drivers/CMSIS/Include/cmsis_gcc.h **** 647:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 648:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 649:Drivers/CMSIS/Include/cmsis_gcc.h **** 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 654:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 655:Drivers/CMSIS/Include/cmsis_gcc.h **** 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 657:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 658:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 659:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 660:Drivers/CMSIS/Include/cmsis_gcc.h **** { 661:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 663:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 664:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 666:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 667:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 668:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 669:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 670:Drivers/CMSIS/Include/cmsis_gcc.h **** } 671:Drivers/CMSIS/Include/cmsis_gcc.h **** 672:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 673:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 674:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 675:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 676:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 677:Drivers/CMSIS/Include/cmsis_gcc.h **** 678:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 679:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 680:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 681:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) 682:Drivers/CMSIS/Include/cmsis_gcc.h **** { 683:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 684:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 685:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 686:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 687:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 688:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 689:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 690:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 691:Drivers/CMSIS/Include/cmsis_gcc.h **** } 692:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 693:Drivers/CMSIS/Include/cmsis_gcc.h **** 694:Drivers/CMSIS/Include/cmsis_gcc.h **** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 696:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 698:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 699:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. ARM GAS /tmp/cc3JIfda.s page 247 700:Drivers/CMSIS/Include/cmsis_gcc.h **** 701:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 702:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 703:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 704:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** { 706:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 707:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 708:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 709:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 710:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 711:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); 712:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 713:Drivers/CMSIS/Include/cmsis_gcc.h **** } 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 717:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 718:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 728:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 729:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 730:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 732:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 733:Drivers/CMSIS/Include/cmsis_gcc.h **** } 734:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 738:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit 739:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 749:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 750:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 751:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 752:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 754:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 755:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 756:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/cc3JIfda.s page 248 757:Drivers/CMSIS/Include/cmsis_gcc.h **** } 758:Drivers/CMSIS/Include/cmsis_gcc.h **** 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 760:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 763:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 764:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 765:Drivers/CMSIS/Include/cmsis_gcc.h **** 766:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 767:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 768:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** { 771:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 773:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 774:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 775:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 776:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); 777:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 778:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 779:Drivers/CMSIS/Include/cmsis_gcc.h **** } 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** 782:Drivers/CMSIS/Include/cmsis_gcc.h **** 783:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 784:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit 785:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 786:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 787:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 788:Drivers/CMSIS/Include/cmsis_gcc.h **** 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 797:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 798:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 799:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); 800:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 801:Drivers/CMSIS/Include/cmsis_gcc.h **** } 802:Drivers/CMSIS/Include/cmsis_gcc.h **** 803:Drivers/CMSIS/Include/cmsis_gcc.h **** 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 805:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 806:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) 807:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 808:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 811:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 812:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 813:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) ARM GAS /tmp/cc3JIfda.s page 249 814:Drivers/CMSIS/Include/cmsis_gcc.h **** { 815:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 816:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 817:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 818:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 820:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 821:Drivers/CMSIS/Include/cmsis_gcc.h **** } 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 823:Drivers/CMSIS/Include/cmsis_gcc.h **** 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 825:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 826:Drivers/CMSIS/Include/cmsis_gcc.h **** 827:Drivers/CMSIS/Include/cmsis_gcc.h **** 828:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 829:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR 830:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 831:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 832:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 833:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) 834:Drivers/CMSIS/Include/cmsis_gcc.h **** { 835:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 837:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 838:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 839:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 840:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 841:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 843:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 845:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 846:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 847:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 848:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 849:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 851:Drivers/CMSIS/Include/cmsis_gcc.h **** } 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR 856:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. 857:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set 858:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 859:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 860:Drivers/CMSIS/Include/cmsis_gcc.h **** { 861:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 862:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 863:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) 864:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 865:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 866:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 867:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 868:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 869:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 870:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/cc3JIfda.s page 250 871:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 872:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 873:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 874:Drivers/CMSIS/Include/cmsis_gcc.h **** } 875:Drivers/CMSIS/Include/cmsis_gcc.h **** 876:Drivers/CMSIS/Include/cmsis_gcc.h **** 877:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 878:Drivers/CMSIS/Include/cmsis_gcc.h **** 879:Drivers/CMSIS/Include/cmsis_gcc.h **** 880:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 881:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 882:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions 883:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 884:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 885:Drivers/CMSIS/Include/cmsis_gcc.h **** 886:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 888:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 889:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 890:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 891:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 892:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 893:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 894:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 895:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 896:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 897:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 898:Drivers/CMSIS/Include/cmsis_gcc.h **** 899:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 900:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 901:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 902:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 903:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 904:Drivers/CMSIS/Include/cmsis_gcc.h **** 905:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 906:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 907:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o 908:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") 910:Drivers/CMSIS/Include/cmsis_gcc.h **** 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 912:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 913:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter 915:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 916:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 917:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 918:Drivers/CMSIS/Include/cmsis_gcc.h **** 919:Drivers/CMSIS/Include/cmsis_gcc.h **** 920:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 921:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 922:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. 923:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 924:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 925:Drivers/CMSIS/Include/cmsis_gcc.h **** 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** /** ARM GAS /tmp/cc3JIfda.s page 251 928:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 930:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 931:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 932:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 933:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 934:Drivers/CMSIS/Include/cmsis_gcc.h **** { 935:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 936:Drivers/CMSIS/Include/cmsis_gcc.h **** } 937:Drivers/CMSIS/Include/cmsis_gcc.h **** 938:Drivers/CMSIS/Include/cmsis_gcc.h **** 939:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 940:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier 941:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 942:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 943:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 944:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 945:Drivers/CMSIS/Include/cmsis_gcc.h **** { 946:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 947:Drivers/CMSIS/Include/cmsis_gcc.h **** } 948:Drivers/CMSIS/Include/cmsis_gcc.h **** 949:Drivers/CMSIS/Include/cmsis_gcc.h **** 950:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before 953:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 954:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 955:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) 956:Drivers/CMSIS/Include/cmsis_gcc.h **** { 957:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 958:Drivers/CMSIS/Include/cmsis_gcc.h **** } 959:Drivers/CMSIS/Include/cmsis_gcc.h **** 960:Drivers/CMSIS/Include/cmsis_gcc.h **** 961:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 962:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) 963:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 964:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 965:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 966:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 967:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) 968:Drivers/CMSIS/Include/cmsis_gcc.h **** { 969:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 970:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); 971:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 972:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 974:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 975:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 976:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 977:Drivers/CMSIS/Include/cmsis_gcc.h **** } 978:Drivers/CMSIS/Include/cmsis_gcc.h **** 979:Drivers/CMSIS/Include/cmsis_gcc.h **** 980:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 981:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 982:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 983:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 984:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value ARM GAS /tmp/cc3JIfda.s page 252 985:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 986:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 987:Drivers/CMSIS/Include/cmsis_gcc.h **** { 988:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 989:Drivers/CMSIS/Include/cmsis_gcc.h **** 990:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 991:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 992:Drivers/CMSIS/Include/cmsis_gcc.h **** } 993:Drivers/CMSIS/Include/cmsis_gcc.h **** 994:Drivers/CMSIS/Include/cmsis_gcc.h **** 995:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 996:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 997:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam 998:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 999:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 1002:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1003:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1004:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); 1005:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1006:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 1007:Drivers/CMSIS/Include/cmsis_gcc.h **** 1008:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 1009:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1010:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1011:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1012:Drivers/CMSIS/Include/cmsis_gcc.h **** 1013:Drivers/CMSIS/Include/cmsis_gcc.h **** 1014:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1015:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 1016:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 1017:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 1018:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 1020:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1021:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) 1022:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1023:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; 1024:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) 1025:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1026:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 1027:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1028:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); 1029:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1030:Drivers/CMSIS/Include/cmsis_gcc.h **** 1031:Drivers/CMSIS/Include/cmsis_gcc.h **** 1032:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1033:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 1034:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. 1035:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula 1036:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1039:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) 1040:Drivers/CMSIS/Include/cmsis_gcc.h **** 1041:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/cc3JIfda.s page 253 1042:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. 1045:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 1046:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1047:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) 3794 .loc 3 1048 31 is_stmt 1 discriminator 2 view .LVU1211 3795 .LBB399: 1049:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 3796 .loc 3 1050 3 discriminator 2 view .LVU1212 1051:Drivers/CMSIS/Include/cmsis_gcc.h **** 1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1053:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1054:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 3797 .loc 3 1055 4 discriminator 2 view .LVU1213 3798 .syntax unified 3799 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3800 02be 93FAA3F3 rbit r3, r3 3801 @ 0 "" 2 3802 .LVL332: 1056:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ 1058:Drivers/CMSIS/Include/cmsis_gcc.h **** 1059:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 1060:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) 1061:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1062:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 1063:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 1064:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 1065:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 3803 .loc 3 1068 3 discriminator 2 view .LVU1214 3804 .loc 3 1068 3 is_stmt 0 discriminator 2 view .LVU1215 3805 .thumb 3806 .syntax unified 3807 .LBE399: 3808 .LBE398: 3809 .LBB400: 3810 .LBI400: 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value 1077:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) 3811 .loc 3 1078 30 is_stmt 1 discriminator 2 view .LVU1216 3812 .LBB401: 1079:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS /tmp/cc3JIfda.s page 254 1080:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Even though __builtin_clz produces a CLZ instruction on ARM, formally 1081:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_clz(0) is undefined behaviour, so handle this case specially. 1082:Drivers/CMSIS/Include/cmsis_gcc.h **** This guarantees ARM-compatible results if happening to compile on a non-ARM 1083:Drivers/CMSIS/Include/cmsis_gcc.h **** target, and ensures the compiler doesn't decide to activate any 1084:Drivers/CMSIS/Include/cmsis_gcc.h **** optimisations using the logic "value was passed to __builtin_clz, so it 1085:Drivers/CMSIS/Include/cmsis_gcc.h **** is non-zero". 1086:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a 1087:Drivers/CMSIS/Include/cmsis_gcc.h **** single CLZ instruction. 1088:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** if (value == 0U) 3813 .loc 3 1089 3 discriminator 2 view .LVU1217 3814 .loc 3 1089 6 is_stmt 0 discriminator 2 view .LVU1218 3815 02c2 13B1 cbz r3, .L310 1090:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** return 32U; 1092:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1093:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_clz(value); 3816 .loc 3 1093 3 is_stmt 1 view .LVU1219 3817 .loc 3 1093 10 is_stmt 0 view .LVU1220 3818 02c4 B3FA83F3 clz r3, r3 3819 .LVL333: 3820 .loc 3 1093 10 view .LVU1221 3821 02c8 CBE7 b .L260 3822 .LVL334: 3823 .L310: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3824 .loc 3 1091 12 view .LVU1222 3825 02ca 2023 movs r3, #32 3826 .LVL335: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3827 .loc 3 1091 12 view .LVU1223 3828 02cc C9E7 b .L260 3829 .L328: 3830 .LBE401: 3831 .LBE400: 1983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3832 .loc 1 1983 9 is_stmt 1 view .LVU1224 3833 .LVL336: 3834 .LBB402: 3835 .LBI402: 3362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3836 .loc 2 3362 22 view .LVU1225 3837 .LBB403: 3364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3838 .loc 2 3364 3 view .LVU1226 3366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3839 .loc 2 3366 3 view .LVU1227 3840 02ce 0B6E ldr r3, [r1, #96] 3841 02d0 23F00043 bic r3, r3, #-2147483648 3842 02d4 0B66 str r3, [r1, #96] 3369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3843 .loc 2 3369 1 is_stmt 0 view .LVU1228 3844 02d6 C6E7 b .L262 3845 .LVL337: 3846 .L263: 3369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3847 .loc 2 3369 1 view .LVU1229 ARM GAS /tmp/cc3JIfda.s page 255 3848 .LBE403: 3849 .LBE402: 3850 .LBB404: 3851 .LBI404: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3852 .loc 3 1048 31 is_stmt 1 discriminator 2 view .LVU1230 3853 .LBB405: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 3854 .loc 3 1050 3 discriminator 2 view .LVU1231 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3855 .loc 3 1055 4 discriminator 2 view .LVU1232 3856 .syntax unified 3857 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3858 02d8 93FAA3F3 rbit r3, r3 3859 @ 0 "" 2 3860 .LVL338: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3861 .loc 3 1068 3 discriminator 2 view .LVU1233 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3862 .loc 3 1068 3 is_stmt 0 discriminator 2 view .LVU1234 3863 .thumb 3864 .syntax unified 3865 .LBE405: 3866 .LBE404: 3867 .LBB406: 3868 .LBI406: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3869 .loc 3 1078 30 is_stmt 1 discriminator 2 view .LVU1235 3870 .LBB407: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3871 .loc 3 1089 3 discriminator 2 view .LVU1236 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3872 .loc 3 1089 6 is_stmt 0 discriminator 2 view .LVU1237 3873 02dc 13B1 cbz r3, .L311 3874 .loc 3 1093 3 is_stmt 1 view .LVU1238 3875 .loc 3 1093 10 is_stmt 0 view .LVU1239 3876 02de B3FA83F3 clz r3, r3 3877 .LVL339: 3878 .loc 3 1093 10 view .LVU1240 3879 02e2 CBE7 b .L264 3880 .LVL340: 3881 .L311: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3882 .loc 3 1091 12 view .LVU1241 3883 02e4 2023 movs r3, #32 3884 .LVL341: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3885 .loc 3 1091 12 view .LVU1242 3886 02e6 C9E7 b .L264 3887 .L329: 3888 .LBE407: 3889 .LBE406: 1988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3890 .loc 1 1988 9 is_stmt 1 view .LVU1243 3891 .LVL342: 3892 .LBB408: 3893 .LBI408: ARM GAS /tmp/cc3JIfda.s page 256 3362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3894 .loc 2 3362 22 view .LVU1244 3895 .LBB409: 3364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3896 .loc 2 3364 3 view .LVU1245 3366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3897 .loc 2 3366 3 view .LVU1246 3898 02e8 4B6E ldr r3, [r1, #100] 3899 02ea 23F00043 bic r3, r3, #-2147483648 3900 02ee 4B66 str r3, [r1, #100] 3369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3901 .loc 2 3369 1 is_stmt 0 view .LVU1247 3902 02f0 C6E7 b .L266 3903 .LVL343: 3904 .L267: 3369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3905 .loc 2 3369 1 view .LVU1248 3906 .LBE409: 3907 .LBE408: 3908 .LBB410: 3909 .LBI410: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3910 .loc 3 1048 31 is_stmt 1 discriminator 2 view .LVU1249 3911 .LBB411: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 3912 .loc 3 1050 3 discriminator 2 view .LVU1250 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3913 .loc 3 1055 4 discriminator 2 view .LVU1251 3914 .syntax unified 3915 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3916 02f2 93FAA3F3 rbit r3, r3 3917 @ 0 "" 2 3918 .LVL344: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3919 .loc 3 1068 3 discriminator 2 view .LVU1252 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3920 .loc 3 1068 3 is_stmt 0 discriminator 2 view .LVU1253 3921 .thumb 3922 .syntax unified 3923 .LBE411: 3924 .LBE410: 3925 .LBB412: 3926 .LBI412: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3927 .loc 3 1078 30 is_stmt 1 discriminator 2 view .LVU1254 3928 .LBB413: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3929 .loc 3 1089 3 discriminator 2 view .LVU1255 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3930 .loc 3 1089 6 is_stmt 0 discriminator 2 view .LVU1256 3931 02f6 13B1 cbz r3, .L312 3932 .loc 3 1093 3 is_stmt 1 view .LVU1257 3933 .loc 3 1093 10 is_stmt 0 view .LVU1258 3934 02f8 B3FA83F3 clz r3, r3 3935 .LVL345: 3936 .loc 3 1093 10 view .LVU1259 3937 02fc CBE7 b .L268 ARM GAS /tmp/cc3JIfda.s page 257 3938 .LVL346: 3939 .L312: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3940 .loc 3 1091 12 view .LVU1260 3941 02fe 2023 movs r3, #32 3942 .LVL347: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3943 .loc 3 1091 12 view .LVU1261 3944 0300 C9E7 b .L268 3945 .L330: 3946 .LBE413: 3947 .LBE412: 1993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 3948 .loc 1 1993 9 is_stmt 1 view .LVU1262 3949 .LVL348: 3950 .LBB414: 3951 .LBI414: 3362:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 3952 .loc 2 3362 22 view .LVU1263 3953 .LBB415: 3364:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3954 .loc 2 3364 3 view .LVU1264 3366:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_OFR1_OFFSET1_EN, 3955 .loc 2 3366 3 view .LVU1265 3956 0302 8B6E ldr r3, [r1, #104] 3957 0304 23F00043 bic r3, r3, #-2147483648 3958 0308 8B66 str r3, [r1, #104] 3369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3959 .loc 2 3369 1 is_stmt 0 view .LVU1266 3960 030a C6E7 b .L270 3961 .LVL349: 3962 .L271: 3369:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 3963 .loc 2 3369 1 view .LVU1267 3964 .LBE415: 3965 .LBE414: 3966 .LBB416: 3967 .LBI416: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3968 .loc 3 1048 31 is_stmt 1 discriminator 2 view .LVU1268 3969 .LBB417: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 3970 .loc 3 1050 3 discriminator 2 view .LVU1269 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 3971 .loc 3 1055 4 discriminator 2 view .LVU1270 3972 .syntax unified 3973 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3974 030c 93FAA3F3 rbit r3, r3 3975 @ 0 "" 2 3976 .LVL350: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3977 .loc 3 1068 3 discriminator 2 view .LVU1271 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3978 .loc 3 1068 3 is_stmt 0 discriminator 2 view .LVU1272 3979 .thumb 3980 .syntax unified 3981 .LBE417: ARM GAS /tmp/cc3JIfda.s page 258 3982 .LBE416: 3983 .LBB418: 3984 .LBI418: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3985 .loc 3 1078 30 is_stmt 1 discriminator 2 view .LVU1273 3986 .LBB419: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3987 .loc 3 1089 3 discriminator 2 view .LVU1274 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 3988 .loc 3 1089 6 is_stmt 0 discriminator 2 view .LVU1275 3989 0310 13B1 cbz r3, .L313 3990 .loc 3 1093 3 is_stmt 1 view .LVU1276 3991 .loc 3 1093 10 is_stmt 0 view .LVU1277 3992 0312 B3FA83F3 clz r3, r3 3993 .LVL351: 3994 .loc 3 1093 10 view .LVU1278 3995 0316 CBE7 b .L272 3996 .LVL352: 3997 .L313: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 3998 .loc 3 1091 12 view .LVU1279 3999 0318 2023 movs r3, #32 4000 .LVL353: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4001 .loc 3 1091 12 view .LVU1280 4002 031a C9E7 b .L272 4003 .LVL354: 4004 .L308: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4005 .loc 3 1091 12 view .LVU1281 4006 .LBE419: 4007 .LBE418: 1660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted; 4008 .loc 1 1660 21 view .LVU1282 4009 031c 0027 movs r7, #0 4010 .LVL355: 4011 .L247: 1999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */ 2005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated only when ADC is disabled: */ 2006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Single or differential mode */ 2007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) 4012 .loc 1 2007 3 is_stmt 1 view .LVU1283 4013 .loc 1 2007 7 is_stmt 0 view .LVU1284 4014 031e 2368 ldr r3, [r4] 4015 .LVL356: 4016 .LBB420: 4017 .LBI420: 6729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4018 .loc 2 6729 26 is_stmt 1 view .LVU1285 4019 .LBB421: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4020 .loc 2 6731 3 view .LVU1286 ARM GAS /tmp/cc3JIfda.s page 259 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4021 .loc 2 6731 12 is_stmt 0 view .LVU1287 4022 0320 9A68 ldr r2, [r3, #8] 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4023 .loc 2 6731 68 view .LVU1288 4024 0322 12F0010F tst r2, #1 4025 0326 10D1 bne .L274 4026 .LVL357: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4027 .loc 2 6731 68 view .LVU1289 4028 .LBE421: 4029 .LBE420: 2008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set mode single-ended or differential input of the selected ADC channel */ 2010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetChannelSingleDiff(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected-> 4030 .loc 1 2010 5 is_stmt 1 view .LVU1290 4031 0328 2A68 ldr r2, [r5] 4032 032a E868 ldr r0, [r5, #12] 4033 .LVL358: 4034 .LBB422: 4035 .LBI422: 5495:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4036 .loc 2 5495 22 view .LVU1291 4037 .LBB423: 5501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4038 .loc 2 5501 3 view .LVU1292 5501:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4039 .loc 2 5501 6 is_stmt 0 view .LVU1293 4040 032c 1C49 ldr r1, .L335+4 4041 032e 8842 cmp r0, r1 4042 0330 2BD0 beq .L331 5508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK); 4043 .loc 2 5508 5 is_stmt 1 view .LVU1294 4044 0332 D3F8B010 ldr r1, [r3, #176] 4045 0336 C2F31202 ubfx r2, r2, #0, #19 4046 .LVL359: 5508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK); 4047 .loc 2 5508 5 is_stmt 0 view .LVU1295 4048 033a 21EA0202 bic r2, r1, r2 4049 033e C3F8B020 str r2, [r3, #176] 4050 .LVL360: 4051 .L276: 5508:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK); 4052 .loc 2 5508 5 view .LVU1296 4053 .LBE423: 4054 .LBE422: 2011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Configuration of differential mode */ 2013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: ADC channel number masked with value "0x1F" to ensure shift value within 32 bits range 2014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (sConfigInjected->InjectedSingleDiff == ADC_DIFFERENTIAL_ENDED) 4055 .loc 1 2014 5 is_stmt 1 view .LVU1297 4056 .loc 1 2014 24 is_stmt 0 view .LVU1298 4057 0342 EA68 ldr r2, [r5, #12] 4058 .loc 1 2014 8 view .LVU1299 4059 0344 164B ldr r3, .L335+4 4060 0346 9A42 cmp r2, r3 4061 0348 38D0 beq .L332 ARM GAS /tmp/cc3JIfda.s page 260 4062 .L274: 2015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Set sampling time of the selected ADC channel */ 2017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetChannelSamplingTime(hadc->Instance, 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_ 2019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 2020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */ 2025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* internal measurement paths enable: If internal channel selected, */ 2026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* enable dedicated internal buffers and path. */ 2027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: these internal measurement paths can be disabled using */ 2028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* HAL_ADC_DeInit(). */ 2029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_IS_CHANNEL_INTERNAL(sConfigInjected->InjectedChannel)) 4063 .loc 1 2030 3 is_stmt 1 view .LVU1300 4064 .loc 1 2030 7 is_stmt 0 view .LVU1301 4065 034a 2B68 ldr r3, [r5] 4066 .loc 1 2030 6 view .LVU1302 4067 034c 154A ldr r2, .L335+8 4068 034e 1342 tst r3, r2 4069 0350 13D0 beq .L300 2031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Ins 4070 .loc 1 2032 5 is_stmt 1 view .LVU1303 4071 .LVL361: 4072 .LBB425: 4073 .LBI425: 2877:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4074 .loc 2 2877 26 view .LVU1304 4075 .LBB426: 2879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4076 .loc 2 2879 3 view .LVU1305 2879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4077 .loc 2 2879 21 is_stmt 0 view .LVU1306 4078 0352 154A ldr r2, .L335+12 4079 0354 9268 ldr r2, [r2, #8] 2879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4080 .loc 2 2879 10 view .LVU1307 4081 0356 02F0E071 and r1, r2, #29360128 4082 .LVL362: 2879:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4083 .loc 2 2879 10 view .LVU1308 4084 .LBE426: 4085 .LBE425: 2033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If the requested internal measurement path has already been enabled, */ 2035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* bypass the configuration processing. */ 2036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR_ADC1) 4086 .loc 1 2036 5 is_stmt 1 view .LVU1309 4087 .loc 1 2036 8 is_stmt 0 view .LVU1310 4088 035a 1448 ldr r0, .L335+16 4089 035c 8342 cmp r3, r0 4090 035e 00F0DC80 beq .L301 2037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** || (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR_ADC5)) ARM GAS /tmp/cc3JIfda.s page 261 4091 .loc 1 2037 10 view .LVU1311 4092 0362 1348 ldr r0, .L335+20 4093 0364 8342 cmp r3, r0 4094 0366 00F0D880 beq .L301 4095 .L302: 2038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL)) 2039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc)) 2041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), 2043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_channe 2044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Delay for temperature sensor stabilization time */ 2046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Wait loop initialization and execution */ 2047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: Variable divided by 2 to compensate partially */ 2048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* CPU processing cycles, scaling in us split to not */ 2049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* exceed 32 bits register capacity and handle low frequency. */ 2050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * (((SystemCoreClock / (100000U 2051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while (wait_loop_index != 0UL) 2052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** wait_loop_index--; 2054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT) 4096 .loc 1 2057 10 is_stmt 1 view .LVU1312 4097 .loc 1 2057 13 is_stmt 0 view .LVU1313 4098 036a 1248 ldr r0, .L335+24 4099 036c 8342 cmp r3, r0 4100 036e 00F0F980 beq .L333 4101 .L305: 2058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VBAT) == 0UL)) 2059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc)) 2061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), 2063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel); 2064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) 4102 .loc 1 2066 10 is_stmt 1 view .LVU1314 4103 .loc 1 2066 13 is_stmt 0 view .LVU1315 4104 0372 1148 ldr r0, .L335+28 4105 0374 8342 cmp r3, r0 4106 0376 00F00781 beq .L334 4107 .LVL363: 4108 .L300: 2067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL)) 2068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (ADC_VREFINT_INSTANCE(hadc)) 2070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), 2072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel); 2073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/cc3JIfda.s page 262 2077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* nothing to do */ 2078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4109 .loc 1 2078 5 is_stmt 1 view .LVU1316 2079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 2082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 4110 .loc 1 2082 3 view .LVU1317 4111 .loc 1 2082 3 view .LVU1318 4112 037a 0023 movs r3, #0 4113 037c 84F85830 strb r3, [r4, #88] 4114 .loc 1 2082 3 view .LVU1319 2083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 2085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 4115 .loc 1 2085 3 view .LVU1320 4116 .LVL364: 4117 .L235: 2086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4118 .loc 1 2086 1 is_stmt 0 view .LVU1321 4119 0380 3846 mov r0, r7 4120 0382 03B0 add sp, sp, #12 4121 .LCFI34: 4122 .cfi_remember_state 4123 .cfi_def_cfa_offset 20 4124 @ sp needed 4125 0384 F0BD pop {r4, r5, r6, r7, pc} 4126 .LVL365: 4127 .L309: 4128 .LCFI35: 4129 .cfi_restore_state 1660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmpOffsetShifted; 4130 .loc 1 1660 21 view .LVU1322 4131 0386 0027 movs r7, #0 4132 0388 C9E7 b .L247 4133 .LVL366: 4134 .L331: 4135 .LBB427: 4136 .LBB424: 5503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK); 4137 .loc 2 5503 5 is_stmt 1 view .LVU1323 4138 038a D3F8B010 ldr r1, [r3, #176] 4139 038e C2F31202 ubfx r2, r2, #0, #19 4140 .LVL367: 5503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK); 4141 .loc 2 5503 5 is_stmt 0 view .LVU1324 4142 0392 0A43 orrs r2, r2, r1 4143 0394 C3F8B020 str r2, [r3, #176] 4144 .LVL368: 5503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK); 4145 .loc 2 5503 5 view .LVU1325 4146 0398 D3E7 b .L276 4147 .L336: 4148 039a 00BF .align 2 4149 .L335: 4150 039c 00F0FF03 .word 67104768 4151 03a0 00007F40 .word 1082064896 ARM GAS /tmp/cc3JIfda.s page 263 4152 03a4 00000880 .word -2146959360 4153 03a8 00030050 .word 1342178048 4154 03ac 000021C3 .word -1021247488 4155 03b0 1000C090 .word -1866465264 4156 03b4 000052C7 .word -950927360 4157 03b8 000084CB .word -880541696 4158 .LVL369: 4159 .L332: 5503:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** Channel & ADC_SINGLEDIFF_CHANNEL_MASK); 4160 .loc 2 5503 5 view .LVU1326 4161 .LBE424: 4162 .LBE427: 2017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_ 4163 .loc 1 2017 7 is_stmt 1 view .LVU1327 4164 03bc 2068 ldr r0, [r4] 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4165 .loc 1 2018 48 is_stmt 0 view .LVU1328 4166 03be 2B68 ldr r3, [r5] 4167 03c0 C3F31206 ubfx r6, r3, #0, #19 4168 03c4 3EBB cbnz r6, .L277 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4169 .loc 1 2018 48 discriminator 1 view .LVU1329 4170 03c6 9A0E lsrs r2, r3, #26 4171 03c8 0132 adds r2, r2, #1 4172 03ca 02F01F02 and r2, r2, #31 4173 03ce 092A cmp r2, #9 4174 03d0 8CBF ite hi 4175 03d2 0022 movhi r2, #0 4176 03d4 0122 movls r2, #1 4177 .L278: 2017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_ 4178 .loc 1 2017 7 view .LVU1330 4179 03d6 002A cmp r2, #0 4180 03d8 55D0 beq .L280 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4181 .loc 1 2018 48 view .LVU1331 4182 03da 5EBB cbnz r6, .L281 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4183 .loc 1 2018 48 discriminator 3 view .LVU1332 4184 03dc 990E lsrs r1, r3, #26 4185 03de 0131 adds r1, r1, #1 4186 03e0 8906 lsls r1, r1, #26 4187 03e2 01F0F841 and r1, r1, #2080374784 4188 .L282: 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4189 .loc 1 2018 48 discriminator 6 view .LVU1333 4190 03e6 8EBB cbnz r6, .L284 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4191 .loc 1 2018 48 discriminator 7 view .LVU1334 4192 03e8 4FEA936C lsr ip, r3, #26 4193 03ec 0CF1010C add ip, ip, #1 4194 03f0 0CF01F0C and ip, ip, #31 4195 03f4 0122 movs r2, #1 4196 03f6 02FA0CF2 lsl r2, r2, ip 4197 .L285: 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4198 .loc 1 2018 48 discriminator 10 view .LVU1335 ARM GAS /tmp/cc3JIfda.s page 264 4199 03fa 1143 orrs r1, r1, r2 4200 03fc AEBB cbnz r6, .L287 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4201 .loc 1 2018 48 discriminator 11 view .LVU1336 4202 03fe 9B0E lsrs r3, r3, #26 4203 0400 0133 adds r3, r3, #1 4204 0402 03F01F03 and r3, r3, #31 4205 0406 03EB4303 add r3, r3, r3, lsl #1 4206 040a 1B05 lsls r3, r3, #20 4207 .L288: 2017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_ 4208 .loc 1 2017 7 view .LVU1337 4209 040c 1943 orrs r1, r1, r3 4210 .L290: 2017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_ 4211 .loc 1 2017 7 discriminator 1 view .LVU1338 4212 040e AA68 ldr r2, [r5, #8] 4213 0410 FFF7FEFF bl LL_ADC_SetChannelSamplingTime 4214 .LVL370: 4215 0414 99E7 b .L274 4216 .L277: 4217 .LVL371: 4218 .LBB428: 4219 .LBI428: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4220 .loc 3 1048 31 is_stmt 1 discriminator 2 view .LVU1339 4221 .LBB429: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 4222 .loc 3 1050 3 discriminator 2 view .LVU1340 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4223 .loc 3 1055 4 discriminator 2 view .LVU1341 4224 .syntax unified 4225 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4226 0416 93FAA3F2 rbit r2, r3 4227 @ 0 "" 2 4228 .LVL372: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4229 .loc 3 1068 3 discriminator 2 view .LVU1342 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4230 .loc 3 1068 3 is_stmt 0 discriminator 2 view .LVU1343 4231 .thumb 4232 .syntax unified 4233 .LBE429: 4234 .LBE428: 4235 .LBB430: 4236 .LBI430: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4237 .loc 3 1078 30 is_stmt 1 discriminator 2 view .LVU1344 4238 .LBB431: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4239 .loc 3 1089 3 discriminator 2 view .LVU1345 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4240 .loc 3 1089 6 is_stmt 0 discriminator 2 view .LVU1346 4241 041a 4AB1 cbz r2, .L314 4242 .loc 3 1093 3 is_stmt 1 view .LVU1347 4243 .loc 3 1093 10 is_stmt 0 view .LVU1348 4244 041c B2FA82F2 clz r2, r2 ARM GAS /tmp/cc3JIfda.s page 265 4245 .LVL373: 4246 .L279: 4247 .loc 3 1093 10 view .LVU1349 4248 .LBE431: 4249 .LBE430: 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4250 .loc 1 2018 48 view .LVU1350 4251 0420 0132 adds r2, r2, #1 4252 0422 02F01F02 and r2, r2, #31 4253 0426 092A cmp r2, #9 4254 0428 8CBF ite hi 4255 042a 0022 movhi r2, #0 4256 042c 0122 movls r2, #1 4257 042e D2E7 b .L278 4258 .LVL374: 4259 .L314: 4260 .LBB433: 4261 .LBB432: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4262 .loc 3 1091 12 view .LVU1351 4263 0430 2022 movs r2, #32 4264 .LVL375: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4265 .loc 3 1091 12 view .LVU1352 4266 0432 F5E7 b .L279 4267 .LVL376: 4268 .L281: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4269 .loc 3 1091 12 view .LVU1353 4270 .LBE432: 4271 .LBE433: 4272 .LBB434: 4273 .LBI434: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4274 .loc 3 1048 31 is_stmt 1 discriminator 4 view .LVU1354 4275 .LBB435: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 4276 .loc 3 1050 3 discriminator 4 view .LVU1355 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4277 .loc 3 1055 4 discriminator 4 view .LVU1356 4278 .syntax unified 4279 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4280 0434 93FAA3F1 rbit r1, r3 4281 @ 0 "" 2 4282 .LVL377: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4283 .loc 3 1068 3 discriminator 4 view .LVU1357 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4284 .loc 3 1068 3 is_stmt 0 discriminator 4 view .LVU1358 4285 .thumb 4286 .syntax unified 4287 .LBE435: 4288 .LBE434: 4289 .LBB436: 4290 .LBI436: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4291 .loc 3 1078 30 is_stmt 1 discriminator 4 view .LVU1359 ARM GAS /tmp/cc3JIfda.s page 266 4292 .LBB437: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4293 .loc 3 1089 3 discriminator 4 view .LVU1360 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4294 .loc 3 1089 6 is_stmt 0 discriminator 4 view .LVU1361 4295 0438 31B1 cbz r1, .L315 4296 .loc 3 1093 3 is_stmt 1 view .LVU1362 4297 .loc 3 1093 10 is_stmt 0 view .LVU1363 4298 043a B1FA81F1 clz r1, r1 4299 .LVL378: 4300 .L283: 4301 .loc 3 1093 10 view .LVU1364 4302 .LBE437: 4303 .LBE436: 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4304 .loc 1 2018 48 view .LVU1365 4305 043e 0131 adds r1, r1, #1 4306 0440 8906 lsls r1, r1, #26 4307 0442 01F0F841 and r1, r1, #2080374784 4308 0446 CEE7 b .L282 4309 .LVL379: 4310 .L315: 4311 .LBB439: 4312 .LBB438: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4313 .loc 3 1091 12 view .LVU1366 4314 0448 2021 movs r1, #32 4315 .LVL380: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4316 .loc 3 1091 12 view .LVU1367 4317 044a F8E7 b .L283 4318 .LVL381: 4319 .L284: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4320 .loc 3 1091 12 view .LVU1368 4321 .LBE438: 4322 .LBE439: 4323 .LBB440: 4324 .LBI440: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4325 .loc 3 1048 31 is_stmt 1 discriminator 8 view .LVU1369 4326 .LBB441: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 4327 .loc 3 1050 3 discriminator 8 view .LVU1370 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4328 .loc 3 1055 4 discriminator 8 view .LVU1371 4329 .syntax unified 4330 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4331 044c 93FAA3F2 rbit r2, r3 4332 @ 0 "" 2 4333 .LVL382: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4334 .loc 3 1068 3 discriminator 8 view .LVU1372 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4335 .loc 3 1068 3 is_stmt 0 discriminator 8 view .LVU1373 4336 .thumb 4337 .syntax unified ARM GAS /tmp/cc3JIfda.s page 267 4338 .LBE441: 4339 .LBE440: 4340 .LBB442: 4341 .LBI442: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4342 .loc 3 1078 30 is_stmt 1 discriminator 8 view .LVU1374 4343 .LBB443: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4344 .loc 3 1089 3 discriminator 8 view .LVU1375 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4345 .loc 3 1089 6 is_stmt 0 discriminator 8 view .LVU1376 4346 0450 4AB1 cbz r2, .L316 4347 .loc 3 1093 3 is_stmt 1 view .LVU1377 4348 .loc 3 1093 10 is_stmt 0 view .LVU1378 4349 0452 B2FA82F2 clz r2, r2 4350 .LVL383: 4351 .L286: 4352 .loc 3 1093 10 view .LVU1379 4353 .LBE443: 4354 .LBE442: 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4355 .loc 1 2018 48 view .LVU1380 4356 0456 0132 adds r2, r2, #1 4357 0458 02F01F02 and r2, r2, #31 4358 045c 4FF0010C mov ip, #1 4359 0460 0CFA02F2 lsl r2, ip, r2 4360 0464 C9E7 b .L285 4361 .LVL384: 4362 .L316: 4363 .LBB445: 4364 .LBB444: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4365 .loc 3 1091 12 view .LVU1381 4366 0466 2022 movs r2, #32 4367 .LVL385: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4368 .loc 3 1091 12 view .LVU1382 4369 0468 F5E7 b .L286 4370 .LVL386: 4371 .L287: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4372 .loc 3 1091 12 view .LVU1383 4373 .LBE444: 4374 .LBE445: 4375 .LBB446: 4376 .LBI446: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4377 .loc 3 1048 31 is_stmt 1 discriminator 12 view .LVU1384 4378 .LBB447: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 4379 .loc 3 1050 3 discriminator 12 view .LVU1385 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4380 .loc 3 1055 4 discriminator 12 view .LVU1386 4381 .syntax unified 4382 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4383 046a 93FAA3F3 rbit r3, r3 4384 @ 0 "" 2 ARM GAS /tmp/cc3JIfda.s page 268 4385 .LVL387: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4386 .loc 3 1068 3 discriminator 12 view .LVU1387 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4387 .loc 3 1068 3 is_stmt 0 discriminator 12 view .LVU1388 4388 .thumb 4389 .syntax unified 4390 .LBE447: 4391 .LBE446: 4392 .LBB448: 4393 .LBI448: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4394 .loc 3 1078 30 is_stmt 1 discriminator 12 view .LVU1389 4395 .LBB449: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4396 .loc 3 1089 3 discriminator 12 view .LVU1390 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4397 .loc 3 1089 6 is_stmt 0 discriminator 12 view .LVU1391 4398 046e 43B1 cbz r3, .L317 4399 .loc 3 1093 3 is_stmt 1 view .LVU1392 4400 .loc 3 1093 10 is_stmt 0 view .LVU1393 4401 0470 B3FA83F3 clz r3, r3 4402 .LVL388: 4403 .L289: 4404 .loc 3 1093 10 view .LVU1394 4405 .LBE449: 4406 .LBE448: 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4407 .loc 1 2018 48 view .LVU1395 4408 0474 0133 adds r3, r3, #1 4409 0476 03F01F03 and r3, r3, #31 4410 047a 03EB4303 add r3, r3, r3, lsl #1 4411 047e 1B05 lsls r3, r3, #20 4412 0480 C4E7 b .L288 4413 .LVL389: 4414 .L317: 4415 .LBB451: 4416 .LBB450: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4417 .loc 3 1091 12 view .LVU1396 4418 0482 2023 movs r3, #32 4419 .LVL390: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4420 .loc 3 1091 12 view .LVU1397 4421 0484 F6E7 b .L289 4422 .LVL391: 4423 .L280: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4424 .loc 3 1091 12 view .LVU1398 4425 .LBE450: 4426 .LBE451: 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4427 .loc 1 2018 48 view .LVU1399 4428 0486 E6B9 cbnz r6, .L291 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4429 .loc 1 2018 48 discriminator 13 view .LVU1400 4430 0488 990E lsrs r1, r3, #26 ARM GAS /tmp/cc3JIfda.s page 269 4431 048a 0131 adds r1, r1, #1 4432 048c 8906 lsls r1, r1, #26 4433 048e 01F0F841 and r1, r1, #2080374784 4434 .L292: 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4435 .loc 1 2018 48 discriminator 16 view .LVU1401 4436 0492 16BB cbnz r6, .L294 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4437 .loc 1 2018 48 discriminator 17 view .LVU1402 4438 0494 4FEA936C lsr ip, r3, #26 4439 0498 0CF1010C add ip, ip, #1 4440 049c 0CF01F0C and ip, ip, #31 4441 04a0 0122 movs r2, #1 4442 04a2 02FA0CF2 lsl r2, r2, ip 4443 .L295: 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4444 .loc 1 2018 48 discriminator 20 view .LVU1403 4445 04a6 1143 orrs r1, r1, r2 4446 04a8 36BB cbnz r6, .L297 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4447 .loc 1 2018 48 discriminator 21 view .LVU1404 4448 04aa 9B0E lsrs r3, r3, #26 4449 04ac 0133 adds r3, r3, #1 4450 04ae 03F01F03 and r3, r3, #31 4451 04b2 03EB4303 add r3, r3, r3, lsl #1 4452 04b6 1E3B subs r3, r3, #30 4453 04b8 1B05 lsls r3, r3, #20 4454 04ba 43F00073 orr r3, r3, #33554432 4455 .L298: 2017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_ 4456 .loc 1 2017 7 discriminator 2 view .LVU1405 4457 04be 1943 orrs r1, r1, r3 4458 04c0 A5E7 b .L290 4459 .L291: 4460 .LVL392: 4461 .LBB452: 4462 .LBI452: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4463 .loc 3 1048 31 is_stmt 1 discriminator 14 view .LVU1406 4464 .LBB453: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 4465 .loc 3 1050 3 discriminator 14 view .LVU1407 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4466 .loc 3 1055 4 discriminator 14 view .LVU1408 4467 .syntax unified 4468 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4469 04c2 93FAA3F1 rbit r1, r3 4470 @ 0 "" 2 4471 .LVL393: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4472 .loc 3 1068 3 discriminator 14 view .LVU1409 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4473 .loc 3 1068 3 is_stmt 0 discriminator 14 view .LVU1410 4474 .thumb 4475 .syntax unified 4476 .LBE453: 4477 .LBE452: ARM GAS /tmp/cc3JIfda.s page 270 4478 .LBB454: 4479 .LBI454: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4480 .loc 3 1078 30 is_stmt 1 discriminator 14 view .LVU1411 4481 .LBB455: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4482 .loc 3 1089 3 discriminator 14 view .LVU1412 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4483 .loc 3 1089 6 is_stmt 0 discriminator 14 view .LVU1413 4484 04c6 31B1 cbz r1, .L318 4485 .loc 3 1093 3 is_stmt 1 view .LVU1414 4486 .loc 3 1093 10 is_stmt 0 view .LVU1415 4487 04c8 B1FA81F1 clz r1, r1 4488 .LVL394: 4489 .L293: 4490 .loc 3 1093 10 view .LVU1416 4491 .LBE455: 4492 .LBE454: 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4493 .loc 1 2018 48 view .LVU1417 4494 04cc 0131 adds r1, r1, #1 4495 04ce 8906 lsls r1, r1, #26 4496 04d0 01F0F841 and r1, r1, #2080374784 4497 04d4 DDE7 b .L292 4498 .LVL395: 4499 .L318: 4500 .LBB457: 4501 .LBB456: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4502 .loc 3 1091 12 view .LVU1418 4503 04d6 2021 movs r1, #32 4504 .LVL396: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4505 .loc 3 1091 12 view .LVU1419 4506 04d8 F8E7 b .L293 4507 .LVL397: 4508 .L294: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4509 .loc 3 1091 12 view .LVU1420 4510 .LBE456: 4511 .LBE457: 4512 .LBB458: 4513 .LBI458: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4514 .loc 3 1048 31 is_stmt 1 discriminator 18 view .LVU1421 4515 .LBB459: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 4516 .loc 3 1050 3 discriminator 18 view .LVU1422 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4517 .loc 3 1055 4 discriminator 18 view .LVU1423 4518 .syntax unified 4519 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4520 04da 93FAA3F2 rbit r2, r3 4521 @ 0 "" 2 4522 .LVL398: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4523 .loc 3 1068 3 discriminator 18 view .LVU1424 ARM GAS /tmp/cc3JIfda.s page 271 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4524 .loc 3 1068 3 is_stmt 0 discriminator 18 view .LVU1425 4525 .thumb 4526 .syntax unified 4527 .LBE459: 4528 .LBE458: 4529 .LBB460: 4530 .LBI460: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4531 .loc 3 1078 30 is_stmt 1 discriminator 18 view .LVU1426 4532 .LBB461: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4533 .loc 3 1089 3 discriminator 18 view .LVU1427 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4534 .loc 3 1089 6 is_stmt 0 discriminator 18 view .LVU1428 4535 04de 4AB1 cbz r2, .L319 4536 .loc 3 1093 3 is_stmt 1 view .LVU1429 4537 .loc 3 1093 10 is_stmt 0 view .LVU1430 4538 04e0 B2FA82F2 clz r2, r2 4539 .LVL399: 4540 .L296: 4541 .loc 3 1093 10 view .LVU1431 4542 .LBE461: 4543 .LBE460: 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4544 .loc 1 2018 48 view .LVU1432 4545 04e4 0132 adds r2, r2, #1 4546 04e6 02F01F02 and r2, r2, #31 4547 04ea 4FF0010C mov ip, #1 4548 04ee 0CFA02F2 lsl r2, ip, r2 4549 04f2 D8E7 b .L295 4550 .LVL400: 4551 .L319: 4552 .LBB463: 4553 .LBB462: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4554 .loc 3 1091 12 view .LVU1433 4555 04f4 2022 movs r2, #32 4556 .LVL401: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4557 .loc 3 1091 12 view .LVU1434 4558 04f6 F5E7 b .L296 4559 .LVL402: 4560 .L297: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4561 .loc 3 1091 12 view .LVU1435 4562 .LBE462: 4563 .LBE463: 4564 .LBB464: 4565 .LBI464: 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4566 .loc 3 1048 31 is_stmt 1 discriminator 22 view .LVU1436 4567 .LBB465: 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** 4568 .loc 3 1050 3 discriminator 22 view .LVU1437 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 4569 .loc 3 1055 4 discriminator 22 view .LVU1438 ARM GAS /tmp/cc3JIfda.s page 272 4570 .syntax unified 4571 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4572 04f8 93FAA3F3 rbit r3, r3 4573 @ 0 "" 2 4574 .LVL403: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4575 .loc 3 1068 3 discriminator 22 view .LVU1439 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4576 .loc 3 1068 3 is_stmt 0 discriminator 22 view .LVU1440 4577 .thumb 4578 .syntax unified 4579 .LBE465: 4580 .LBE464: 4581 .LBB466: 4582 .LBI466: 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4583 .loc 3 1078 30 is_stmt 1 discriminator 22 view .LVU1441 4584 .LBB467: 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4585 .loc 3 1089 3 discriminator 22 view .LVU1442 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** { 4586 .loc 3 1089 6 is_stmt 0 discriminator 22 view .LVU1443 4587 04fc 5BB1 cbz r3, .L320 4588 .loc 3 1093 3 is_stmt 1 view .LVU1444 4589 .loc 3 1093 10 is_stmt 0 view .LVU1445 4590 04fe B3FA83F3 clz r3, r3 4591 .LVL404: 4592 .L299: 4593 .loc 3 1093 10 view .LVU1446 4594 .LBE467: 4595 .LBE466: 2018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** + 1UL) & 0x1FUL)), s 4596 .loc 1 2018 48 view .LVU1447 4597 0502 0133 adds r3, r3, #1 4598 0504 03F01F03 and r3, r3, #31 4599 0508 03EB4303 add r3, r3, r3, lsl #1 4600 050c 1E3B subs r3, r3, #30 4601 050e 1B05 lsls r3, r3, #20 4602 0510 43F00073 orr r3, r3, #33554432 4603 0514 D3E7 b .L298 4604 .LVL405: 4605 .L320: 4606 .LBB469: 4607 .LBB468: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4608 .loc 3 1091 12 view .LVU1448 4609 0516 2023 movs r3, #32 4610 .LVL406: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4611 .loc 3 1091 12 view .LVU1449 4612 0518 F3E7 b .L299 4613 .LVL407: 4614 .L301: 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4615 .loc 3 1091 12 view .LVU1450 4616 .LBE468: 4617 .LBE469: ARM GAS /tmp/cc3JIfda.s page 273 2038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4618 .loc 1 2038 9 view .LVU1451 4619 051a 12F4000F tst r2, #8388608 4620 051e 7FF424AF bne .L302 2040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4621 .loc 1 2040 7 is_stmt 1 view .LVU1452 2040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4622 .loc 1 2040 11 is_stmt 0 view .LVU1453 4623 0522 2368 ldr r3, [r4] 2040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4624 .loc 1 2040 10 view .LVU1454 4625 0524 B3F1A04F cmp r3, #1342177280 4626 0528 7FF427AF bne .L300 2042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_channe 4627 .loc 1 2042 9 is_stmt 1 view .LVU1455 4628 052c 41F40001 orr r1, r1, #8388608 4629 .LVL408: 4630 .LBB470: 4631 .LBI470: 2796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4632 .loc 2 2796 22 view .LVU1456 4633 .LBB471: 2798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4634 .loc 2 2798 3 view .LVU1457 4635 0530 1F4A ldr r2, .L337 4636 .LVL409: 2798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4637 .loc 2 2798 3 is_stmt 0 view .LVU1458 4638 0532 9368 ldr r3, [r2, #8] 4639 0534 23F0E073 bic r3, r3, #29360128 4640 0538 1943 orrs r1, r1, r3 4641 .LVL410: 2798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4642 .loc 2 2798 3 view .LVU1459 4643 053a 9160 str r1, [r2, #8] 4644 .LVL411: 2798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4645 .loc 2 2798 3 view .LVU1460 4646 .LBE471: 4647 .LBE470: 2050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while (wait_loop_index != 0UL) 4648 .loc 1 2050 9 is_stmt 1 view .LVU1461 2050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while (wait_loop_index != 0UL) 4649 .loc 1 2050 90 is_stmt 0 view .LVU1462 4650 053c 1D4B ldr r3, .L337+4 4651 053e 1B68 ldr r3, [r3] 4652 0540 9B09 lsrs r3, r3, #6 4653 0542 1D4A ldr r2, .L337+8 4654 0544 A2FB0323 umull r2, r3, r2, r3 4655 0548 9B09 lsrs r3, r3, #6 2050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while (wait_loop_index != 0UL) 4656 .loc 1 2050 69 view .LVU1463 4657 054a 03EB4303 add r3, r3, r3, lsl #1 4658 054e 9B00 lsls r3, r3, #2 4659 0550 1833 adds r3, r3, #24 2050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** while (wait_loop_index != 0UL) 4660 .loc 1 2050 25 view .LVU1464 ARM GAS /tmp/cc3JIfda.s page 274 4661 0552 0193 str r3, [sp, #4] 2051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4662 .loc 1 2051 9 is_stmt 1 view .LVU1465 2051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4663 .loc 1 2051 15 is_stmt 0 view .LVU1466 4664 0554 02E0 b .L303 4665 .L304: 2053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4666 .loc 1 2053 11 is_stmt 1 view .LVU1467 2053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4667 .loc 1 2053 26 is_stmt 0 view .LVU1468 4668 0556 019B ldr r3, [sp, #4] 4669 0558 013B subs r3, r3, #1 4670 055a 0193 str r3, [sp, #4] 4671 .L303: 2051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4672 .loc 1 2051 32 is_stmt 1 view .LVU1469 4673 055c 019B ldr r3, [sp, #4] 4674 055e 002B cmp r3, #0 4675 0560 F9D1 bne .L304 4676 0562 0AE7 b .L300 4677 .LVL412: 4678 .L333: 2058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4679 .loc 1 2058 14 is_stmt 0 view .LVU1470 4680 0564 12F0807F tst r2, #16777216 4681 0568 7FF403AF bne .L305 2060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4682 .loc 1 2060 7 is_stmt 1 view .LVU1471 2060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4683 .loc 1 2060 11 is_stmt 0 view .LVU1472 4684 056c 2268 ldr r2, [r4] 2060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4685 .loc 1 2060 10 view .LVU1473 4686 056e 134B ldr r3, .L337+12 4687 0570 9A42 cmp r2, r3 4688 0572 3FF402AF beq .L300 2062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel); 4689 .loc 1 2062 9 is_stmt 1 view .LVU1474 4690 0576 41F08071 orr r1, r1, #16777216 4691 .LVL413: 4692 .LBB472: 4693 .LBI472: 2796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4694 .loc 2 2796 22 view .LVU1475 4695 .LBB473: 2798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4696 .loc 2 2798 3 view .LVU1476 4697 057a 0D4A ldr r2, .L337 4698 057c 9368 ldr r3, [r2, #8] 4699 057e 23F0E073 bic r3, r3, #29360128 4700 0582 1943 orrs r1, r1, r3 4701 .LVL414: 2798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4702 .loc 2 2798 3 is_stmt 0 view .LVU1477 4703 0584 9160 str r1, [r2, #8] 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ARM GAS /tmp/cc3JIfda.s page 275 4704 .loc 2 2799 1 view .LVU1478 4705 0586 F8E6 b .L300 4706 .LVL415: 4707 .L334: 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4708 .loc 2 2799 1 view .LVU1479 4709 .LBE473: 4710 .LBE472: 2067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4711 .loc 1 2067 14 view .LVU1480 4712 0588 12F4800F tst r2, #4194304 4713 058c 7FF4F5AE bne .L300 2069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4714 .loc 1 2069 7 is_stmt 1 view .LVU1481 2069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4715 .loc 1 2069 11 is_stmt 0 view .LVU1482 4716 0590 2268 ldr r2, [r4] 2069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4717 .loc 1 2069 10 view .LVU1483 4718 0592 0A4B ldr r3, .L337+12 4719 0594 9A42 cmp r2, r3 4720 0596 3FF4F0AE beq .L300 2071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel); 4721 .loc 1 2071 9 is_stmt 1 view .LVU1484 4722 059a 41F48001 orr r1, r1, #4194304 4723 .LVL416: 4724 .LBB474: 4725 .LBI474: 2796:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4726 .loc 2 2796 22 view .LVU1485 4727 .LBB475: 2798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4728 .loc 2 2798 3 view .LVU1486 4729 059e 044A ldr r2, .L337 4730 05a0 9368 ldr r3, [r2, #8] 4731 05a2 23F0E073 bic r3, r3, #29360128 4732 05a6 1943 orrs r1, r1, r3 4733 .LVL417: 2798:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4734 .loc 2 2798 3 is_stmt 0 view .LVU1487 4735 05a8 9160 str r1, [r2, #8] 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4736 .loc 2 2799 1 view .LVU1488 4737 05aa E6E6 b .L300 4738 .LVL418: 4739 .L306: 2799:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** 4740 .loc 2 2799 1 view .LVU1489 4741 .LBE475: 4742 .LBE474: 1712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4743 .loc 1 1712 3 view .LVU1490 4744 05ac 0227 movs r7, #2 4745 05ae E7E6 b .L235 4746 .L338: 4747 .align 2 4748 .L337: ARM GAS /tmp/cc3JIfda.s page 276 4749 05b0 00030050 .word 1342178048 4750 05b4 00000000 .word SystemCoreClock 4751 05b8 632D3E05 .word 87960931 4752 05bc 00010050 .word 1342177536 4753 .cfi_endproc 4754 .LFE350: 4756 .section .text.HAL_ADCEx_MultiModeConfigChannel,"ax",%progbits 4757 .align 1 4758 .global HAL_ADCEx_MultiModeConfigChannel 4759 .syntax unified 4760 .thumb 4761 .thumb_func 4763 HAL_ADCEx_MultiModeConfigChannel: 4764 .LVL419: 4765 .LFB351: 2087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #if defined(ADC_MULTIMODE_SUPPORT) 2089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable ADC multimode and configure multimode parameters 2091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Possibility to update parameters on the fly: 2092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * This function initializes multimode parameters, following 2093:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * calls to this function can be used to reconfigure some parameters 2094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * of structure "ADC_MultiModeTypeDef" on the fly, without resetting 2095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * the ADCs. 2096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * The setting of these parameters is conditioned to ADC state. 2097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * For parameters constraints, see comments of structure 2098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * "ADC_MultiModeTypeDef". 2099:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note To move back configuration from multimode to single mode, ADC must 2100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * be reset (using function HAL_ADC_Init() ). 2101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc Master ADC handle 2102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param multimode Structure of ADC multimode configuration 2103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *m 2106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 4766 .loc 1 2106 1 is_stmt 1 view -0 4767 .cfi_startproc 4768 @ args = 0, pretend = 0, frame = 112 4769 @ frame_needed = 0, uses_anonymous_args = 0 4770 @ link register save eliminated. 2107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 4771 .loc 1 2107 3 view .LVU1492 2108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 4772 .loc 1 2108 3 view .LVU1493 2109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_HandleTypeDef tmphadcSlave; 4773 .loc 1 2109 3 view .LVU1494 2110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmphadcSlave_conversion_on_going; 4774 .loc 1 2110 3 view .LVU1495 2111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 2113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); 4775 .loc 1 2113 3 view .LVU1496 2114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_MULTIMODE(multimode->Mode)); 4776 .loc 1 2114 3 view .LVU1497 2115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (multimode->Mode != ADC_MODE_INDEPENDENT) 4777 .loc 1 2115 3 view .LVU1498 2116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { ARM GAS /tmp/cc3JIfda.s page 277 2117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_DMA_ACCESS_MULTIMODE(multimode->DMAAccessMode)); 4778 .loc 1 2117 5 view .LVU1499 2118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay)); 4779 .loc 1 2118 5 view .LVU1500 2119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process locked */ 2122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_LOCK(hadc); 4780 .loc 1 2122 3 view .LVU1501 4781 .loc 1 2122 3 view .LVU1502 4782 0000 90F85820 ldrb r2, [r0, #88] @ zero_extendqisi2 4783 0004 012A cmp r2, #1 4784 0006 7FD0 beq .L352 2106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 4785 .loc 1 2106 1 is_stmt 0 discriminator 2 view .LVU1503 4786 0008 10B4 push {r4} 4787 .LCFI36: 4788 .cfi_def_cfa_offset 4 4789 .cfi_offset 4, -4 4790 000a 9DB0 sub sp, sp, #116 4791 .LCFI37: 4792 .cfi_def_cfa_offset 120 4793 000c 0346 mov r3, r0 4794 .loc 1 2122 3 is_stmt 1 discriminator 2 view .LVU1504 4795 000e 0122 movs r2, #1 4796 0010 80F85820 strb r2, [r0, #88] 4797 .loc 1 2122 3 discriminator 2 view .LVU1505 2123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Temporary handle minimum initialization */ 2125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_ADC_RESET_HANDLE_STATE(&tmphadcSlave); 4798 .loc 1 2125 3 discriminator 2 view .LVU1506 4799 0014 0022 movs r2, #0 4800 0016 1892 str r2, [sp, #96] 2126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CLEAR_ERRORCODE(&tmphadcSlave); 4801 .loc 1 2126 3 discriminator 2 view .LVU1507 4802 0018 1992 str r2, [sp, #100] 2127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_MULTI_SLAVE(hadc, &tmphadcSlave); 4803 .loc 1 2128 3 discriminator 2 view .LVU1508 4804 001a 0068 ldr r0, [r0] 4805 .LVL420: 4806 .loc 1 2128 3 is_stmt 0 discriminator 2 view .LVU1509 4807 001c B0F1A04F cmp r0, #1342177280 4808 0020 39D0 beq .L359 4809 0022 0022 movs r2, #0 4810 0024 0192 str r2, [sp, #4] 4811 .L342: 2129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (tmphadcSlave.Instance == NULL) 4812 .loc 1 2130 3 is_stmt 1 view .LVU1510 4813 .loc 1 2130 19 is_stmt 0 view .LVU1511 4814 0026 019A ldr r2, [sp, #4] 4815 .loc 1 2130 6 view .LVU1512 4816 0028 002A cmp r2, #0 4817 002a 37D0 beq .L360 2131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ ARM GAS /tmp/cc3JIfda.s page 278 2133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 2134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 2136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 2137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return HAL_ERROR; 2139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters update conditioned to ADC state: */ 2142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ 2143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* conversion on going on regular group: */ 2144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode DMA configuration */ 2145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode DMA mode */ 2146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance); 4818 .loc 1 2146 3 is_stmt 1 view .LVU1513 4819 .LVL421: 4820 .LBB476: 4821 .LBI476: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4822 .loc 2 6851 26 view .LVU1514 4823 .LBB477: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4824 .loc 2 6853 3 view .LVU1515 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4825 .loc 2 6853 12 is_stmt 0 view .LVU1516 4826 002c 9268 ldr r2, [r2, #8] 4827 .LVL422: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4828 .loc 2 6853 74 view .LVU1517 4829 002e 12F00402 ands r2, r2, #4 4830 0032 00D0 beq .L344 4831 0034 0122 movs r2, #1 4832 .L344: 4833 .LVL423: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4834 .loc 2 6853 74 view .LVU1518 4835 .LBE477: 4836 .LBE476: 2147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) 4837 .loc 1 2147 3 is_stmt 1 view .LVU1519 4838 .LBB478: 4839 .LBI478: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4840 .loc 2 6851 26 view .LVU1520 4841 .LBB479: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4842 .loc 2 6853 3 view .LVU1521 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4843 .loc 2 6853 12 is_stmt 0 view .LVU1522 4844 0036 8068 ldr r0, [r0, #8] 4845 .LVL424: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4846 .loc 2 6853 74 view .LVU1523 4847 0038 10F0040F tst r0, #4 4848 003c 54D1 bne .L345 4849 .LVL425: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/cc3JIfda.s page 279 4850 .loc 2 6853 74 view .LVU1524 4851 .LBE479: 4852 .LBE478: 2148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmphadcSlave_conversion_on_going == 0UL)) 4853 .loc 1 2148 7 view .LVU1525 4854 003e 002A cmp r2, #0 4855 0040 52D1 bne .L345 2149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Pointer to the common control register */ 2151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance); 4856 .loc 1 2151 5 is_stmt 1 view .LVU1526 4857 .LVL426: 2152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If multimode is selected, configure all multimode parameters. */ 2154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Otherwise, reset multimode parameters (can be used in case of */ 2155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* transition from multimode to independent mode). */ 2156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (multimode->Mode != ADC_MODE_INDEPENDENT) 4858 .loc 1 2156 5 view .LVU1527 4859 .loc 1 2156 18 is_stmt 0 view .LVU1528 4860 0042 0A68 ldr r2, [r1] 4861 .LVL427: 4862 .loc 1 2156 8 view .LVU1529 4863 0044 002A cmp r2, #0 4864 0046 32D0 beq .L346 2157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG, 4865 .loc 1 2158 7 is_stmt 1 view .LVU1530 4866 0048 304C ldr r4, .L361 4867 004a A268 ldr r2, [r4, #8] 4868 004c 22F46042 bic r2, r2, #57344 4869 0050 4868 ldr r0, [r1, #4] 4870 0052 93F838C0 ldrb ip, [r3, #56] @ zero_extendqisi2 4871 0056 40EA4C30 orr r0, r0, ip, lsl #13 4872 005a 0243 orrs r2, r2, r0 4873 005c A260 str r2, [r4, #8] 2159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** multimode->DMAAccessMode | 2160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CCR_MULTI_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests)); 2161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated only when ADC is disabled: */ 2163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode mode selection */ 2164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode delay */ 2165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Note: Delay range depends on selected resolution: */ 2166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from 1 to 12 clock cycles for 12 bits */ 2167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from 1 to 10 clock cycles for 10 bits, */ 2168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from 1 to 8 clock cycles for 8 bits */ 2169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* from 1 to 6 clock cycles for 6 bits */ 2170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If a higher delay is selected, it will be clipped to maximum delay */ 2171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* range */ 2172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL) 4874 .loc 1 2172 7 view .LVU1531 4875 .LVL428: 4876 .LBB480: 4877 .LBI480: 6729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4878 .loc 2 6729 26 view .LVU1532 4879 .LBB481: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } ARM GAS /tmp/cc3JIfda.s page 280 4880 .loc 2 6731 3 view .LVU1533 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4881 .loc 2 6731 12 is_stmt 0 view .LVU1534 4882 005e 4FF0A042 mov r2, #1342177280 4883 0062 9068 ldr r0, [r2, #8] 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4884 .loc 2 6731 68 view .LVU1535 4885 0064 10F00100 ands r0, r0, #1 4886 0068 00D0 beq .L347 4887 006a 0120 movs r0, #1 4888 .L347: 4889 .LVL429: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4890 .loc 2 6731 68 view .LVU1536 4891 .LBE481: 4892 .LBE480: 4893 .LBB482: 4894 .LBI482: 6729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4895 .loc 2 6729 26 is_stmt 1 view .LVU1537 4896 .LBB483: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4897 .loc 2 6731 3 view .LVU1538 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4898 .loc 2 6731 12 is_stmt 0 view .LVU1539 4899 006c 284A ldr r2, .L361+4 4900 006e 9268 ldr r2, [r2, #8] 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4901 .loc 2 6731 68 view .LVU1540 4902 0070 12F00102 ands r2, r2, #1 4903 0074 00D0 beq .L348 4904 0076 0122 movs r2, #1 4905 .L348: 4906 .LVL430: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4907 .loc 2 6731 68 view .LVU1541 4908 .LBE483: 4909 .LBE482: 4910 .loc 1 2172 10 view .LVU1542 4911 0078 0243 orrs r2, r2, r0 4912 007a 41D1 bne .L353 2173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** MODIFY_REG(tmpADC_Common->CCR, 4913 .loc 1 2174 9 is_stmt 1 view .LVU1543 4914 007c 234C ldr r4, .L361 4915 007e A268 ldr r2, [r4, #8] 4916 0080 22F47162 bic r2, r2, #3856 4917 0084 22F00F02 bic r2, r2, #15 4918 0088 0868 ldr r0, [r1] 4919 008a 8968 ldr r1, [r1, #8] 4920 .LVL431: 4921 .loc 1 2174 9 is_stmt 0 view .LVU1544 4922 008c 0143 orrs r1, r1, r0 4923 008e 0A43 orrs r2, r2, r1 4924 0090 A260 str r2, [r4, #8] 2107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 4925 .loc 1 2107 21 view .LVU1545 ARM GAS /tmp/cc3JIfda.s page 281 4926 0092 0020 movs r0, #0 4927 0094 2DE0 b .L349 4928 .LVL432: 4929 .L359: 2128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4930 .loc 1 2128 3 discriminator 1 view .LVU1546 4931 0096 1E4A ldr r2, .L361+4 4932 0098 0192 str r2, [sp, #4] 4933 009a C4E7 b .L342 4934 .L360: 2133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4935 .loc 1 2133 5 is_stmt 1 view .LVU1547 4936 009c DA6D ldr r2, [r3, #92] 4937 009e 42F02002 orr r2, r2, #32 4938 00a2 DA65 str r2, [r3, #92] 2136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4939 .loc 1 2136 5 view .LVU1548 2136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4940 .loc 1 2136 5 view .LVU1549 4941 00a4 0022 movs r2, #0 4942 00a6 83F85820 strb r2, [r3, #88] 2136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 4943 .loc 1 2136 5 view .LVU1550 2138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4944 .loc 1 2138 5 view .LVU1551 2138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 4945 .loc 1 2138 12 is_stmt 0 view .LVU1552 4946 00aa 0120 movs r0, #1 4947 00ac 24E0 b .L340 4948 .LVL433: 4949 .L346: 2175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CCR_DUAL | 2176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_CCR_DELAY, 2177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** multimode->Mode | 2178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** multimode->TwoSamplingDelay 2179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ); 2180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else /* ADC_MODE_INDEPENDENT */ 2183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG); 4950 .loc 1 2184 7 is_stmt 1 view .LVU1553 4951 00ae 1749 ldr r1, .L361 4952 .LVL434: 4953 .loc 1 2184 7 is_stmt 0 view .LVU1554 4954 00b0 8A68 ldr r2, [r1, #8] 4955 00b2 22F46042 bic r2, r2, #57344 4956 00b6 8A60 str r2, [r1, #8] 2185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameters that can be updated only when ADC is disabled: */ 2187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode mode selection */ 2188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* - Multimode delay */ 2189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL) 4957 .loc 1 2189 7 is_stmt 1 view .LVU1555 4958 .LVL435: 4959 .LBB484: 4960 .LBI484: ARM GAS /tmp/cc3JIfda.s page 282 6729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4961 .loc 2 6729 26 view .LVU1556 4962 .LBB485: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4963 .loc 2 6731 3 view .LVU1557 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4964 .loc 2 6731 12 is_stmt 0 view .LVU1558 4965 00b8 4FF0A042 mov r2, #1342177280 4966 00bc 9168 ldr r1, [r2, #8] 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4967 .loc 2 6731 68 view .LVU1559 4968 00be 11F00101 ands r1, r1, #1 4969 00c2 00D0 beq .L350 4970 00c4 0121 movs r1, #1 4971 .L350: 4972 .LVL436: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4973 .loc 2 6731 68 view .LVU1560 4974 .LBE485: 4975 .LBE484: 4976 .LBB486: 4977 .LBI486: 6729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 4978 .loc 2 6729 26 is_stmt 1 view .LVU1561 4979 .LBB487: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4980 .loc 2 6731 3 view .LVU1562 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4981 .loc 2 6731 12 is_stmt 0 view .LVU1563 4982 00c6 124A ldr r2, .L361+4 4983 00c8 9268 ldr r2, [r2, #8] 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4984 .loc 2 6731 68 view .LVU1564 4985 00ca 12F00102 ands r2, r2, #1 4986 00ce 00D0 beq .L351 4987 00d0 0122 movs r2, #1 4988 .L351: 4989 .LVL437: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 4990 .loc 2 6731 68 view .LVU1565 4991 .LBE487: 4992 .LBE486: 4993 .loc 1 2189 10 view .LVU1566 4994 00d2 0A43 orrs r2, r2, r1 4995 00d4 16D1 bne .L354 2190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_DUAL | ADC_CCR_DELAY); 4996 .loc 1 2191 9 is_stmt 1 view .LVU1567 4997 00d6 0D49 ldr r1, .L361 4998 00d8 8A68 ldr r2, [r1, #8] 4999 00da 22F47162 bic r2, r2, #3856 5000 00de 22F00F02 bic r2, r2, #15 5001 00e2 8A60 str r2, [r1, #8] 2107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 5002 .loc 1 2107 21 is_stmt 0 view .LVU1568 5003 00e4 0020 movs r0, #0 5004 00e6 04E0 b .L349 ARM GAS /tmp/cc3JIfda.s page 283 5005 .LVL438: 5006 .L345: 2192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* If one of the ADC sharing the same common group is enabled, no update */ 2196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* could be done on neither of the multimode structure parameters. */ 2197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update ADC state machine to error */ 2200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 5007 .loc 1 2200 5 is_stmt 1 view .LVU1569 5008 00e8 DA6D ldr r2, [r3, #92] 5009 .LVL439: 5010 .loc 1 2200 5 is_stmt 0 view .LVU1570 5011 00ea 42F02002 orr r2, r2, #32 5012 00ee DA65 str r2, [r3, #92] 2201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 5013 .loc 1 2202 5 is_stmt 1 view .LVU1571 5014 .LVL440: 5015 .loc 1 2202 20 is_stmt 0 view .LVU1572 5016 00f0 0120 movs r0, #1 5017 .LVL441: 5018 .L349: 2203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Process unlocked */ 2206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); 5019 .loc 1 2206 3 is_stmt 1 view .LVU1573 5020 .loc 1 2206 3 view .LVU1574 5021 00f2 0022 movs r2, #0 5022 00f4 83F85820 strb r2, [r3, #88] 5023 .loc 1 2206 3 view .LVU1575 2207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Return function status */ 2209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 5024 .loc 1 2209 3 view .LVU1576 5025 .LVL442: 5026 .L340: 2210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 5027 .loc 1 2210 1 is_stmt 0 view .LVU1577 5028 00f8 1DB0 add sp, sp, #116 5029 .LCFI38: 5030 .cfi_remember_state 5031 .cfi_def_cfa_offset 4 5032 @ sp needed 5033 00fa 5DF8044B ldr r4, [sp], #4 5034 .LCFI39: 5035 .cfi_restore 4 5036 .cfi_def_cfa_offset 0 5037 00fe 7047 bx lr 5038 .LVL443: 5039 .L353: 5040 .LCFI40: 5041 .cfi_restore_state 2107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; ARM GAS /tmp/cc3JIfda.s page 284 5042 .loc 1 2107 21 view .LVU1578 5043 0100 0020 movs r0, #0 5044 0102 F6E7 b .L349 5045 .LVL444: 5046 .L354: 2107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ADC_Common_TypeDef *tmpADC_Common; 5047 .loc 1 2107 21 view .LVU1579 5048 0104 0020 movs r0, #0 5049 0106 F4E7 b .L349 5050 .LVL445: 5051 .L352: 5052 .LCFI41: 5053 .cfi_def_cfa_offset 0 5054 .cfi_restore 4 2122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 5055 .loc 1 2122 3 view .LVU1580 5056 0108 0220 movs r0, #2 5057 .LVL446: 5058 .loc 1 2210 1 view .LVU1581 5059 010a 7047 bx lr 5060 .L362: 5061 .align 2 5062 .L361: 5063 010c 00030050 .word 1342178048 5064 0110 00010050 .word 1342177536 5065 .cfi_endproc 5066 .LFE351: 5068 .section .text.HAL_ADCEx_EnableInjectedQueue,"ax",%progbits 5069 .align 1 5070 .global HAL_ADCEx_EnableInjectedQueue 5071 .syntax unified 5072 .thumb 5073 .thumb_func 5075 HAL_ADCEx_EnableInjectedQueue: 5076 .LVL447: 5077 .LFB352: 2211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** #endif /* ADC_MULTIMODE_SUPPORT */ 2212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enable Injected Queue 2215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This function resets CFGR register JQDIS bit in order to enable the 2216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Injected Queue. JQDIS can be written only when ADSTART and JDSTART 2217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * are both equal to 0 to ensure that no regular nor injected 2218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * conversion is ongoing. 2219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 2220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef *hadc) 2223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 5078 .loc 1 2223 1 is_stmt 1 view -0 5079 .cfi_startproc 5080 @ args = 0, pretend = 0, frame = 0 5081 @ frame_needed = 0, uses_anonymous_args = 0 5082 @ link register save eliminated. 2224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 5083 .loc 1 2224 3 view .LVU1583 2225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular; ARM GAS /tmp/cc3JIfda.s page 285 5084 .loc 1 2225 3 view .LVU1584 2226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 5085 .loc 1 2226 3 view .LVU1585 2227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 2229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 5086 .loc 1 2229 3 view .LVU1586 2230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 5087 .loc 1 2231 3 view .LVU1587 5088 .loc 1 2231 44 is_stmt 0 view .LVU1588 5089 0000 0168 ldr r1, [r0] 5090 .LVL448: 5091 .LBB488: 5092 .LBI488: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5093 .loc 2 6851 26 is_stmt 1 view .LVU1589 5094 .LBB489: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5095 .loc 2 6853 3 view .LVU1590 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5096 .loc 2 6853 12 is_stmt 0 view .LVU1591 5097 0002 8B68 ldr r3, [r1, #8] 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5098 .loc 2 6853 74 view .LVU1592 5099 0004 13F00403 ands r3, r3, #4 5100 0008 00D0 beq .L364 5101 000a 0123 movs r3, #1 5102 .L364: 5103 .LVL449: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5104 .loc 2 6853 74 view .LVU1593 5105 .LBE489: 5106 .LBE488: 2232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 5107 .loc 1 2232 3 is_stmt 1 view .LVU1594 5108 .LBB490: 5109 .LBI490: 7076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5110 .loc 2 7076 26 view .LVU1595 5111 .LBB491: 5112 .loc 2 7078 3 view .LVU1596 5113 .loc 2 7078 12 is_stmt 0 view .LVU1597 5114 000c 8A68 ldr r2, [r1, #8] 5115 .loc 2 7078 76 view .LVU1598 5116 000e 12F00802 ands r2, r2, #8 5117 0012 00D0 beq .L365 5118 0014 0122 movs r2, #1 5119 .L365: 5120 .LVL450: 5121 .loc 2 7078 76 view .LVU1599 5122 .LBE491: 5123 .LBE490: 2233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameter can be set only if no conversion is on-going */ 2235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL) 5124 .loc 1 2235 3 is_stmt 1 view .LVU1600 ARM GAS /tmp/cc3JIfda.s page 286 5125 .loc 1 2235 6 is_stmt 0 view .LVU1601 5126 0016 53B9 cbnz r3, .L367 2236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 5127 .loc 1 2236 7 view .LVU1602 5128 0018 5AB9 cbnz r2, .L368 2237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 2238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); 5129 .loc 1 2239 5 is_stmt 1 view .LVU1603 5130 001a CB68 ldr r3, [r1, #12] 5131 .LVL451: 5132 .loc 1 2239 5 is_stmt 0 view .LVU1604 5133 001c 23F00043 bic r3, r3, #-2147483648 5134 0020 CB60 str r3, [r1, #12] 2240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Update state, clear previous result related to injected queue overflow */ 2242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF); 5135 .loc 1 2242 5 is_stmt 1 view .LVU1605 5136 0022 C36D ldr r3, [r0, #92] 5137 0024 23F48043 bic r3, r3, #16384 5138 0028 C365 str r3, [r0, #92] 2243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 5139 .loc 1 2244 5 view .LVU1606 5140 .LVL452: 5141 .loc 1 2244 20 is_stmt 0 view .LVU1607 5142 002a 0020 movs r0, #0 5143 .LVL453: 5144 .loc 1 2244 20 view .LVU1608 5145 002c 7047 bx lr 5146 .LVL454: 5147 .L367: 2245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 5148 .loc 1 2248 20 view .LVU1609 5149 002e 0120 movs r0, #1 5150 .LVL455: 5151 .loc 1 2248 20 view .LVU1610 5152 0030 7047 bx lr 5153 .LVL456: 5154 .L368: 5155 .loc 1 2248 20 view .LVU1611 5156 0032 0120 movs r0, #1 5157 .LVL457: 2249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 5158 .loc 1 2251 3 is_stmt 1 view .LVU1612 2252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 5159 .loc 1 2252 1 is_stmt 0 view .LVU1613 5160 0034 7047 bx lr 5161 .cfi_endproc 5162 .LFE352: 5164 .section .text.HAL_ADCEx_DisableInjectedQueue,"ax",%progbits 5165 .align 1 ARM GAS /tmp/cc3JIfda.s page 287 5166 .global HAL_ADCEx_DisableInjectedQueue 5167 .syntax unified 5168 .thumb 5169 .thumb_func 5171 HAL_ADCEx_DisableInjectedQueue: 5172 .LVL458: 5173 .LFB353: 2253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Disable Injected Queue 2256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This function sets CFGR register JQDIS bit in order to disable the 2257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * Injected Queue. JQDIS can be written only when ADSTART and JDSTART 2258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * are both equal to 0 to ensure that no regular nor injected 2259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * conversion is ongoing. 2260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 2261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef *hadc) 2264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 5174 .loc 1 2264 1 is_stmt 1 view -0 5175 .cfi_startproc 5176 @ args = 0, pretend = 0, frame = 0 5177 @ frame_needed = 0, uses_anonymous_args = 0 5178 @ link register save eliminated. 2265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 5179 .loc 1 2265 3 view .LVU1615 2266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_regular; 5180 .loc 1 2266 3 view .LVU1616 2267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** uint32_t tmp_adc_is_conversion_on_going_injected; 5181 .loc 1 2267 3 view .LVU1617 2268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 2270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 5182 .loc 1 2270 3 view .LVU1618 2271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); 5183 .loc 1 2272 3 view .LVU1619 5184 .loc 1 2272 44 is_stmt 0 view .LVU1620 5185 0000 0168 ldr r1, [r0] 5186 .LVL459: 5187 .LBB492: 5188 .LBI492: 6851:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5189 .loc 2 6851 26 is_stmt 1 view .LVU1621 5190 .LBB493: 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5191 .loc 2 6853 3 view .LVU1622 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5192 .loc 2 6853 12 is_stmt 0 view .LVU1623 5193 0002 8B68 ldr r3, [r1, #8] 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5194 .loc 2 6853 74 view .LVU1624 5195 0004 13F00403 ands r3, r3, #4 5196 0008 00D0 beq .L370 5197 000a 0123 movs r3, #1 5198 .L370: 5199 .LVL460: ARM GAS /tmp/cc3JIfda.s page 288 6853:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5200 .loc 2 6853 74 view .LVU1625 5201 .LBE493: 5202 .LBE492: 2273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); 5203 .loc 1 2273 3 is_stmt 1 view .LVU1626 5204 .LBB494: 5205 .LBI494: 7076:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5206 .loc 2 7076 26 view .LVU1627 5207 .LBB495: 5208 .loc 2 7078 3 view .LVU1628 5209 .loc 2 7078 12 is_stmt 0 view .LVU1629 5210 000c 8A68 ldr r2, [r1, #8] 5211 .loc 2 7078 76 view .LVU1630 5212 000e 12F00802 ands r2, r2, #8 5213 0012 00D0 beq .L371 5214 0014 0122 movs r2, #1 5215 .L371: 5216 .LVL461: 5217 .loc 2 7078 76 view .LVU1631 5218 .LBE495: 5219 .LBE494: 2274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Parameter can be set only if no conversion is on-going */ 2276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if ((tmp_adc_is_conversion_on_going_regular == 0UL) 5220 .loc 1 2276 3 is_stmt 1 view .LVU1632 5221 .loc 1 2276 6 is_stmt 0 view .LVU1633 5222 0016 53B9 cbnz r3, .L373 2277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** && (tmp_adc_is_conversion_on_going_injected == 0UL) 5223 .loc 1 2277 7 view .LVU1634 5224 0018 5AB9 cbnz r2, .L374 2278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** ) 2279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_INJ_SetQueueMode(hadc->Instance, LL_ADC_INJ_QUEUE_DISABLE); 5225 .loc 1 2280 5 is_stmt 1 view .LVU1635 5226 .LVL462: 5227 .LBB496: 5228 .LBI496: 4904:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5229 .loc 2 4904 22 view .LVU1636 5230 .LBB497: 4906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5231 .loc 2 4906 3 view .LVU1637 5232 001a CB68 ldr r3, [r1, #12] 5233 .LVL463: 4906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5234 .loc 2 4906 3 is_stmt 0 view .LVU1638 5235 001c 23F00043 bic r3, r3, #-2147483648 5236 0020 23F40013 bic r3, r3, #2097152 5237 0024 43F00043 orr r3, r3, #-2147483648 5238 0028 CB60 str r3, [r1, #12] 5239 .LVL464: 4906:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5240 .loc 2 4906 3 view .LVU1639 5241 .LBE497: 5242 .LBE496: ARM GAS /tmp/cc3JIfda.s page 289 2281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 5243 .loc 1 2281 5 is_stmt 1 view .LVU1640 5244 .loc 1 2281 20 is_stmt 0 view .LVU1641 5245 002a 0020 movs r0, #0 5246 .LVL465: 5247 .loc 1 2281 20 view .LVU1642 5248 002c 7047 bx lr 5249 .LVL466: 5250 .L373: 2282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 5251 .loc 1 2285 20 view .LVU1643 5252 002e 0120 movs r0, #1 5253 .LVL467: 5254 .loc 1 2285 20 view .LVU1644 5255 0030 7047 bx lr 5256 .LVL468: 5257 .L374: 5258 .loc 1 2285 20 view .LVU1645 5259 0032 0120 movs r0, #1 5260 .LVL469: 2286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 5261 .loc 1 2288 3 is_stmt 1 view .LVU1646 2289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 5262 .loc 1 2289 1 is_stmt 0 view .LVU1647 5263 0034 7047 bx lr 5264 .cfi_endproc 5265 .LFE353: 5267 .section .text.HAL_ADCEx_DisableVoltageRegulator,"ax",%progbits 5268 .align 1 5269 .global HAL_ADCEx_DisableVoltageRegulator 5270 .syntax unified 5271 .thumb 5272 .thumb_func 5274 HAL_ADCEx_DisableVoltageRegulator: 5275 .LVL470: 5276 .LFB354: 2290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Disable ADC voltage regulator. 2293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Disabling voltage regulator allows to save power. This operation can 2294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * be carried out only when ADC is disabled. 2295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note To enable again the voltage regulator, the user is expected to 2296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * resort to HAL_ADC_Init() API. 2297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 2298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef *hadc) 2301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 5277 .loc 1 2301 1 is_stmt 1 view -0 5278 .cfi_startproc 5279 @ args = 0, pretend = 0, frame = 0 5280 @ frame_needed = 0, uses_anonymous_args = 0 ARM GAS /tmp/cc3JIfda.s page 290 5281 @ link register save eliminated. 2302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 5282 .loc 1 2302 3 view .LVU1649 2303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ 2305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 5283 .loc 1 2305 3 view .LVU1650 2306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */ 2308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) 5284 .loc 1 2308 3 view .LVU1651 5285 .loc 1 2308 7 is_stmt 0 view .LVU1652 5286 0000 0368 ldr r3, [r0] 5287 .LVL471: 5288 .LBB498: 5289 .LBI498: 6729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5290 .loc 2 6729 26 is_stmt 1 view .LVU1653 5291 .LBB499: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5292 .loc 2 6731 3 view .LVU1654 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5293 .loc 2 6731 12 is_stmt 0 view .LVU1655 5294 0002 9A68 ldr r2, [r3, #8] 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5295 .loc 2 6731 68 view .LVU1656 5296 0004 12F0010F tst r2, #1 5297 0008 07D1 bne .L377 5298 .LVL472: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5299 .loc 2 6731 68 view .LVU1657 5300 .LBE499: 5301 .LBE498: 2309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_DisableInternalRegulator(hadc->Instance); 5302 .loc 1 2310 5 is_stmt 1 view .LVU1658 5303 .LBB500: 5304 .LBI500: 6658:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5305 .loc 2 6658 22 view .LVU1659 5306 .LBB501: 6660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5307 .loc 2 6660 3 view .LVU1660 5308 000a 9A68 ldr r2, [r3, #8] 5309 000c 22F01042 bic r2, r2, #-1879048192 5310 0010 22F03F02 bic r2, r2, #63 5311 0014 9A60 str r2, [r3, #8] 5312 .LVL473: 6660:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5313 .loc 2 6660 3 is_stmt 0 view .LVU1661 5314 .LBE501: 5315 .LBE500: 2311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 5316 .loc 1 2311 5 is_stmt 1 view .LVU1662 5317 .loc 1 2311 20 is_stmt 0 view .LVU1663 5318 0016 0020 movs r0, #0 5319 .LVL474: ARM GAS /tmp/cc3JIfda.s page 291 5320 .loc 1 2311 20 view .LVU1664 5321 0018 7047 bx lr 5322 .LVL475: 5323 .L377: 2312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 5324 .loc 1 2315 20 view .LVU1665 5325 001a 0120 movs r0, #1 5326 .LVL476: 2316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 5327 .loc 1 2318 3 is_stmt 1 view .LVU1666 2319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 5328 .loc 1 2319 1 is_stmt 0 view .LVU1667 5329 001c 7047 bx lr 5330 .cfi_endproc 5331 .LFE354: 5333 .section .text.HAL_ADCEx_EnterADCDeepPowerDownMode,"ax",%progbits 5334 .align 1 5335 .global HAL_ADCEx_EnterADCDeepPowerDownMode 5336 .syntax unified 5337 .thumb 5338 .thumb_func 5340 HAL_ADCEx_EnterADCDeepPowerDownMode: 5341 .LVL477: 5342 .LFB355: 2320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /** 2322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @brief Enter ADC deep-power-down mode 2323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note This mode is achieved in setting DEEPPWD bit and allows to save power 2324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * in reducing leakage currents. It is particularly interesting before 2325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * entering stop modes. 2326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note Setting DEEPPWD automatically clears ADVREGEN bit and disables the 2327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * ADC voltage regulator. This means that this API encompasses 2328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * HAL_ADCEx_DisableVoltageRegulator(). Additionally, the internal 2329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * calibration is lost. 2330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @note To exit the ADC deep-power-down mode, the user is expected to 2331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * resort to HAL_ADC_Init() API as well as to relaunch a calibration 2332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * with HAL_ADCEx_Calibration_Start() API or to re-apply a previously 2333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * saved calibration factor. 2334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @param hadc ADC handle 2335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** * @retval HAL status 2336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** */ 2337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef *hadc) 2338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 5343 .loc 1 2338 1 is_stmt 1 view -0 5344 .cfi_startproc 5345 @ args = 0, pretend = 0, frame = 0 5346 @ frame_needed = 0, uses_anonymous_args = 0 5347 @ link register save eliminated. 2339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status; 5348 .loc 1 2339 3 view .LVU1669 2340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Check the parameters */ ARM GAS /tmp/cc3JIfda.s page 292 2342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 5349 .loc 1 2342 3 view .LVU1670 2343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */ 2345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) 5350 .loc 1 2345 3 view .LVU1671 5351 .loc 1 2345 7 is_stmt 0 view .LVU1672 5352 0000 0268 ldr r2, [r0] 5353 .LVL478: 5354 .LBB502: 5355 .LBI502: 6729:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5356 .loc 2 6729 26 is_stmt 1 view .LVU1673 5357 .LBB503: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5358 .loc 2 6731 3 view .LVU1674 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5359 .loc 2 6731 12 is_stmt 0 view .LVU1675 5360 0002 9368 ldr r3, [r2, #8] 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5361 .loc 2 6731 68 view .LVU1676 5362 0004 13F0010F tst r3, #1 5363 0008 09D1 bne .L380 5364 .LVL479: 6731:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** } 5365 .loc 2 6731 68 view .LVU1677 5366 .LBE503: 5367 .LBE502: 2346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** LL_ADC_EnableDeepPowerDown(hadc->Instance); 5368 .loc 1 2347 5 is_stmt 1 view .LVU1678 5369 .LBB504: 5370 .LBI504: 6583:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** { 5371 .loc 2 6583 22 view .LVU1679 5372 .LBB505: 6588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 5373 .loc 2 6588 3 view .LVU1680 5374 000a 9368 ldr r3, [r2, #8] 5375 000c 23F02043 bic r3, r3, #-1610612736 5376 0010 23F03F03 bic r3, r3, #63 5377 0014 43F00053 orr r3, r3, #536870912 5378 0018 9360 str r3, [r2, #8] 5379 .LVL480: 6588:Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h **** ADC_CR_BITS_PROPERTY_RS, 5380 .loc 2 6588 3 is_stmt 0 view .LVU1681 5381 .LBE505: 5382 .LBE504: 2348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_OK; 5383 .loc 1 2348 5 is_stmt 1 view .LVU1682 5384 .loc 1 2348 20 is_stmt 0 view .LVU1683 5385 001a 0020 movs r0, #0 5386 .LVL481: 5387 .loc 1 2348 20 view .LVU1684 5388 001c 7047 bx lr 5389 .LVL482: 5390 .L380: ARM GAS /tmp/cc3JIfda.s page 293 2349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** else 2351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** { 2352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; 5391 .loc 1 2352 20 view .LVU1685 5392 001e 0120 movs r0, #1 5393 .LVL483: 2353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 2354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** 2355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** return tmp_hal_status; 5394 .loc 1 2355 3 is_stmt 1 view .LVU1686 2356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c **** } 5395 .loc 1 2356 1 is_stmt 0 view .LVU1687 5396 0020 7047 bx lr 5397 .cfi_endproc 5398 .LFE355: 5400 .text 5401 .Letext0: 5402 .file 4 "/usr/lib/gcc/arm-none-eabi/12.2.1/include/stdint.h" 5403 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h" 5404 .file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h" 5405 .file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h" 5406 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h" 5407 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h" 5408 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h" 5409 .file 11 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h" 5410 .file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h" ARM GAS /tmp/cc3JIfda.s page 294 DEFINED SYMBOLS *ABS*:00000000 stm32g4xx_hal_adc_ex.c /tmp/cc3JIfda.s:21 .text.LL_ADC_SetCalibrationFactor:00000000 $t /tmp/cc3JIfda.s:26 .text.LL_ADC_SetCalibrationFactor:00000000 LL_ADC_SetCalibrationFactor /tmp/cc3JIfda.s:54 .text.LL_ADC_SetChannelSamplingTime:00000000 $t /tmp/cc3JIfda.s:59 .text.LL_ADC_SetChannelSamplingTime:00000000 LL_ADC_SetChannelSamplingTime /tmp/cc3JIfda.s:104 .text.HAL_ADCEx_Calibration_Start:00000000 $t /tmp/cc3JIfda.s:110 .text.HAL_ADCEx_Calibration_Start:00000000 HAL_ADCEx_Calibration_Start /tmp/cc3JIfda.s:270 .text.HAL_ADCEx_Calibration_Start:00000098 $d /tmp/cc3JIfda.s:275 .text.HAL_ADCEx_Calibration_GetValue:00000000 $t /tmp/cc3JIfda.s:281 .text.HAL_ADCEx_Calibration_GetValue:00000000 HAL_ADCEx_Calibration_GetValue /tmp/cc3JIfda.s:322 .text.HAL_ADCEx_Calibration_SetValue:00000000 $t /tmp/cc3JIfda.s:328 .text.HAL_ADCEx_Calibration_SetValue:00000000 HAL_ADCEx_Calibration_SetValue /tmp/cc3JIfda.s:467 .text.HAL_ADCEx_InjectedStart:00000000 $t /tmp/cc3JIfda.s:473 .text.HAL_ADCEx_InjectedStart:00000000 HAL_ADCEx_InjectedStart /tmp/cc3JIfda.s:715 .text.HAL_ADCEx_InjectedStart:000000e8 $d /tmp/cc3JIfda.s:721 .text.HAL_ADCEx_InjectedStop:00000000 $t /tmp/cc3JIfda.s:727 .text.HAL_ADCEx_InjectedStop:00000000 HAL_ADCEx_InjectedStop /tmp/cc3JIfda.s:827 .text.HAL_ADCEx_InjectedPollForConversion:00000000 $t /tmp/cc3JIfda.s:833 .text.HAL_ADCEx_InjectedPollForConversion:00000000 HAL_ADCEx_InjectedPollForConversion /tmp/cc3JIfda.s:1118 .text.HAL_ADCEx_InjectedPollForConversion:000000f8 $d /tmp/cc3JIfda.s:1124 .text.HAL_ADCEx_InjectedStart_IT:00000000 $t /tmp/cc3JIfda.s:1130 .text.HAL_ADCEx_InjectedStart_IT:00000000 HAL_ADCEx_InjectedStart_IT /tmp/cc3JIfda.s:1416 .text.HAL_ADCEx_InjectedStart_IT:0000012c $d /tmp/cc3JIfda.s:1422 .text.HAL_ADCEx_InjectedStop_IT:00000000 $t /tmp/cc3JIfda.s:1428 .text.HAL_ADCEx_InjectedStop_IT:00000000 HAL_ADCEx_InjectedStop_IT /tmp/cc3JIfda.s:1533 .text.HAL_ADCEx_MultiModeStart_DMA:00000000 $t /tmp/cc3JIfda.s:1539 .text.HAL_ADCEx_MultiModeStart_DMA:00000000 HAL_ADCEx_MultiModeStart_DMA /tmp/cc3JIfda.s:1757 .text.HAL_ADCEx_MultiModeStart_DMA:000000d0 $d /tmp/cc3JIfda.s:1765 .text.HAL_ADCEx_MultiModeStop_DMA:00000000 $t /tmp/cc3JIfda.s:1771 .text.HAL_ADCEx_MultiModeStop_DMA:00000000 HAL_ADCEx_MultiModeStop_DMA /tmp/cc3JIfda.s:2105 .text.HAL_ADCEx_MultiModeGetValue:00000000 $t /tmp/cc3JIfda.s:2111 .text.HAL_ADCEx_MultiModeGetValue:00000000 HAL_ADCEx_MultiModeGetValue /tmp/cc3JIfda.s:2133 .text.HAL_ADCEx_MultiModeGetValue:00000008 $d /tmp/cc3JIfda.s:2138 .text.HAL_ADCEx_InjectedGetValue:00000000 $t /tmp/cc3JIfda.s:2144 .text.HAL_ADCEx_InjectedGetValue:00000000 HAL_ADCEx_InjectedGetValue /tmp/cc3JIfda.s:2209 .text.HAL_ADCEx_InjectedConvCpltCallback:00000000 $t /tmp/cc3JIfda.s:2215 .text.HAL_ADCEx_InjectedConvCpltCallback:00000000 HAL_ADCEx_InjectedConvCpltCallback /tmp/cc3JIfda.s:2230 .text.HAL_ADCEx_InjectedQueueOverflowCallback:00000000 $t /tmp/cc3JIfda.s:2236 .text.HAL_ADCEx_InjectedQueueOverflowCallback:00000000 HAL_ADCEx_InjectedQueueOverflowCallback /tmp/cc3JIfda.s:2251 .text.HAL_ADCEx_LevelOutOfWindow2Callback:00000000 $t /tmp/cc3JIfda.s:2257 .text.HAL_ADCEx_LevelOutOfWindow2Callback:00000000 HAL_ADCEx_LevelOutOfWindow2Callback /tmp/cc3JIfda.s:2272 .text.HAL_ADCEx_LevelOutOfWindow3Callback:00000000 $t /tmp/cc3JIfda.s:2278 .text.HAL_ADCEx_LevelOutOfWindow3Callback:00000000 HAL_ADCEx_LevelOutOfWindow3Callback /tmp/cc3JIfda.s:2293 .text.HAL_ADCEx_EndOfSamplingCallback:00000000 $t /tmp/cc3JIfda.s:2299 .text.HAL_ADCEx_EndOfSamplingCallback:00000000 HAL_ADCEx_EndOfSamplingCallback /tmp/cc3JIfda.s:2314 .text.HAL_ADCEx_RegularStop:00000000 $t /tmp/cc3JIfda.s:2320 .text.HAL_ADCEx_RegularStop:00000000 HAL_ADCEx_RegularStop /tmp/cc3JIfda.s:2423 .text.HAL_ADCEx_RegularStop_IT:00000000 $t /tmp/cc3JIfda.s:2429 .text.HAL_ADCEx_RegularStop_IT:00000000 HAL_ADCEx_RegularStop_IT /tmp/cc3JIfda.s:2537 .text.HAL_ADCEx_RegularStop_DMA:00000000 $t /tmp/cc3JIfda.s:2543 .text.HAL_ADCEx_RegularStop_DMA:00000000 HAL_ADCEx_RegularStop_DMA /tmp/cc3JIfda.s:2692 .text.HAL_ADCEx_RegularMultiModeStop_DMA:00000000 $t /tmp/cc3JIfda.s:2698 .text.HAL_ADCEx_RegularMultiModeStop_DMA:00000000 HAL_ADCEx_RegularMultiModeStop_DMA /tmp/cc3JIfda.s:3053 .text.HAL_ADCEx_InjectedConfigChannel:00000000 $t /tmp/cc3JIfda.s:3059 .text.HAL_ADCEx_InjectedConfigChannel:00000000 HAL_ADCEx_InjectedConfigChannel /tmp/cc3JIfda.s:4150 .text.HAL_ADCEx_InjectedConfigChannel:0000039c $d ARM GAS /tmp/cc3JIfda.s page 295 /tmp/cc3JIfda.s:4164 .text.HAL_ADCEx_InjectedConfigChannel:000003bc $t /tmp/cc3JIfda.s:4749 .text.HAL_ADCEx_InjectedConfigChannel:000005b0 $d /tmp/cc3JIfda.s:4757 .text.HAL_ADCEx_MultiModeConfigChannel:00000000 $t /tmp/cc3JIfda.s:4763 .text.HAL_ADCEx_MultiModeConfigChannel:00000000 HAL_ADCEx_MultiModeConfigChannel /tmp/cc3JIfda.s:5063 .text.HAL_ADCEx_MultiModeConfigChannel:0000010c $d /tmp/cc3JIfda.s:5069 .text.HAL_ADCEx_EnableInjectedQueue:00000000 $t /tmp/cc3JIfda.s:5075 .text.HAL_ADCEx_EnableInjectedQueue:00000000 HAL_ADCEx_EnableInjectedQueue /tmp/cc3JIfda.s:5165 .text.HAL_ADCEx_DisableInjectedQueue:00000000 $t /tmp/cc3JIfda.s:5171 .text.HAL_ADCEx_DisableInjectedQueue:00000000 HAL_ADCEx_DisableInjectedQueue /tmp/cc3JIfda.s:5268 .text.HAL_ADCEx_DisableVoltageRegulator:00000000 $t /tmp/cc3JIfda.s:5274 .text.HAL_ADCEx_DisableVoltageRegulator:00000000 HAL_ADCEx_DisableVoltageRegulator /tmp/cc3JIfda.s:5334 .text.HAL_ADCEx_EnterADCDeepPowerDownMode:00000000 $t /tmp/cc3JIfda.s:5340 .text.HAL_ADCEx_EnterADCDeepPowerDownMode:00000000 HAL_ADCEx_EnterADCDeepPowerDownMode UNDEFINED SYMBOLS ADC_Disable ADC_Enable ADC_ConversionStop HAL_GetTick HAL_DMA_Start_IT ADC_DMAConvCplt ADC_DMAHalfConvCplt ADC_DMAError HAL_DMA_Abort SystemCoreClock