ARM GAS /tmp/cchjGo05.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32g4xx_hal_pwr_ex.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .file 1 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 20 .section .text.HAL_PWREx_GetVoltageRange,"ax",%progbits 21 .align 1 22 .global HAL_PWREx_GetVoltageRange 23 .syntax unified 24 .thumb 25 .thumb_func 27 HAL_PWREx_GetVoltageRange: 28 .LFB329: 1:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 2:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ****************************************************************************** 3:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @file stm32g4xx_hal_pwr_ex.c 4:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @author MCD Application Team 5:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver. 6:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * functionalities of the Power Controller (PWR) peripheral: 8:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * + Extended Initialization and de-initialization functions 9:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * + Extended Peripheral Control functions 10:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * 11:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ****************************************************************************** 12:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @attention 13:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * 14:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * Copyright (c) 2019 STMicroelectronics. 15:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * All rights reserved. 16:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * 17:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This software is licensed under terms that can be found in the LICENSE file 18:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * in the root directory of this software component. 19:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 20:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * 21:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ****************************************************************************** 22:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 23:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 24:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/ 25:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #include "stm32g4xx_hal.h" 26:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 27:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @addtogroup STM32G4xx_HAL_Driver 28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{ 29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ARM GAS /tmp/cchjGo05.s page 2 31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx 32:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief PWR Extended HAL module driver 33:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{ 34:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 35:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 36:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED 37:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 38:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/ 39:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/ 40:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 41:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 42:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined (STM32G471xx) || defined (STM32G473xx) || defined (STM32G474xx) || defined (STM32G483xx 43:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PWR_PORTF_AVAILABLE_PINS 0x0000FFFFU /* PF0..PF15 */ 44:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PWR_PORTG_AVAILABLE_PINS 0x000007FFU /* PG0..PG10 */ 45:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #elif defined (STM32G431xx) || defined (STM32G441xx) || defined (STM32GBK1CB) || defined (STM32G491 46:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PWR_PORTF_AVAILABLE_PINS 0x00000607U /* PF0..PF2 and PF9 and PF10 */ 47:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PWR_PORTG_AVAILABLE_PINS 0x00000400U /* PG10 */ 48:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif 49:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 50:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @defgroup PWR_Extended_Private_Defines PWR Extended Private Defines 51:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{ 52:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 53:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 54:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @defgroup PWREx_PVM_Mode_Mask PWR PVM Mode Mask 55:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{ 56:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 57:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PVM_MODE_IT 0x00010000U /*!< Mask for interruption yielded by PVM threshol 58:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PVM_MODE_EVT 0x00020000U /*!< Mask for event yielded by PVM threshold cross 59:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PVM_RISING_EDGE 0x00000001U /*!< Mask for rising edge set as PVM trigger 60:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PVM_FALLING_EDGE 0x00000002U /*!< Mask for falling edge set as PVM trigger 61:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 62:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @} 63:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 64:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 65:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @defgroup PWREx_TimeOut_Value PWR Extended Flag Setting Time Out Value 66:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{ 67:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 68:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PWR_FLAG_SETTING_DELAY_US 50UL /*!< Time out value for REGLPF and VO 69:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 70:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @} 71:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 72:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 73:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 74:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 75:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 76:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @} 77:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 78:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 79:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 80:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 81:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/ 82:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/ 83:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/ 84:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Exported functions --------------------------------------------------------*/ 85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions 87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{ ARM GAS /tmp/cchjGo05.s page 3 88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 89:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 90:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Extended Peripheral Control functions 91:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Extended Peripheral Control functions 92:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * 93:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** @verbatim 94:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** =============================================================================== 95:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ##### Extended Peripheral Initialization and de-initialization functions ##### 96:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** =============================================================================== 97:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** [..] 98:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 99:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** @endverbatim 100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{ 101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Return Voltage Scaling Range. 106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval VOS bit field (PWR_REGULATOR_VOLTAGE_SCALE1 or PWR_REGULATOR_VOLTAGE_SCALE2 107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * or PWR_REGULATOR_VOLTAGE_SCALE1_BOOST when applicable) 108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** uint32_t HAL_PWREx_GetVoltageRange(void) 110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 29 .loc 1 110 1 view -0 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 0 32 @ frame_needed = 0, uses_anonymous_args = 0 33 @ link register save eliminated. 111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2) 34 .loc 1 111 3 view .LVU1 35 .loc 1 111 7 is_stmt 0 view .LVU2 36 0000 074B ldr r3, .L4 37 0002 1868 ldr r0, [r3] 38 0004 00F4C060 and r0, r0, #1536 39 .loc 1 111 6 view .LVU3 40 0008 B0F5806F cmp r0, #1024 41 000c 04D0 beq .L1 112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return PWR_REGULATOR_VOLTAGE_SCALE2; 114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else if (READ_BIT(PWR->CR5, PWR_CR5_R1MODE) == PWR_CR5_R1MODE) 42 .loc 1 115 8 is_stmt 1 view .LVU4 43 .loc 1 115 12 is_stmt 0 view .LVU5 44 000e D3F88000 ldr r0, [r3, #128] 45 .loc 1 115 11 view .LVU6 46 0012 10F48070 ands r0, r0, #256 47 0016 00D1 bne .L3 48 .L1: 116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* PWR_CR5_R1MODE bit set means that Range 1 Boost is disabled */ 118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return PWR_REGULATOR_VOLTAGE_SCALE1; 119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else 121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return PWR_REGULATOR_VOLTAGE_SCALE1_BOOST; 123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } ARM GAS /tmp/cchjGo05.s page 4 49 .loc 1 124 1 view .LVU7 50 0018 7047 bx lr 51 .L3: 118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 52 .loc 1 118 12 view .LVU8 53 001a 4FF40070 mov r0, #512 54 001e FBE7 b .L1 55 .L5: 56 .align 2 57 .L4: 58 0020 00700040 .word 1073770496 59 .cfi_endproc 60 .LFE329: 62 .section .text.HAL_PWREx_ControlVoltageScaling,"ax",%progbits 63 .align 1 64 .global HAL_PWREx_ControlVoltageScaling 65 .syntax unified 66 .thumb 67 .thumb_func 69 HAL_PWREx_ControlVoltageScaling: 70 .LVL0: 71 .LFB330: 125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Configure the main internal regulator output voltage. 130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param VoltageScaling: specifies the regulator output voltage to achieve 131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * a tradeoff between performance and power consumption. 132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values: 133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1_BOOST when available, Regulator voltage outpu 134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * typical output voltage at 1.28 V, 135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * system frequency up to 170 MHz. 136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 Regulator voltage output range 1 mode, 137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * typical output voltage at 1.2 V, 138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * system frequency up to 150 MHz. 139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 Regulator voltage output range 2 mode, 140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * typical output voltage at 1.0 V, 141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * system frequency up to 26 MHz. 142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When moving from Range 1 to Range 2, the system frequency must be decreased to 143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * a value below 26 MHz before calling HAL_PWREx_ControlVoltageScaling() API. 144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * When moving from Range 2 to Range 1, the system frequency can be increased to 145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * a value up to 150 MHz after calling HAL_PWREx_ControlVoltageScaling() API. 146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * When moving from Range 1 to Boost Mode Range 1, the system frequency can be increased to 147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * a value up to 170 MHz after calling HAL_PWREx_ControlVoltageScaling() API. 148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When moving from Range 2 to Range 1, the API waits for VOSF flag to be 149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * cleared before returning the status. If the flag is not cleared within 150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * 50 microseconds, HAL_TIMEOUT status is reported. 151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL Status 152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) 154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 72 .loc 1 154 1 is_stmt 1 view -0 73 .cfi_startproc 74 @ args = 0, pretend = 0, frame = 0 75 @ frame_needed = 0, uses_anonymous_args = 0 76 @ link register save eliminated. ARM GAS /tmp/cchjGo05.s page 5 155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** uint32_t wait_loop_index; 77 .loc 1 155 3 view .LVU10 156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling)); 78 .loc 1 157 3 view .LVU11 158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) 79 .loc 1 159 3 view .LVU12 80 .loc 1 159 6 is_stmt 0 view .LVU13 81 0000 0028 cmp r0, #0 82 0002 36D1 bne .L7 160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* If current range is range 2 */ 162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2) 83 .loc 1 162 5 is_stmt 1 view .LVU14 84 .loc 1 162 9 is_stmt 0 view .LVU15 85 0004 3E4B ldr r3, .L23 86 0006 1B68 ldr r3, [r3] 87 0008 03F4C063 and r3, r3, #1536 88 .loc 1 162 8 view .LVU16 89 000c B3F5806F cmp r3, #1024 90 0010 08D0 beq .L20 163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Make sure Range 1 Boost is enabled */ 165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); 166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set Range 1 */ 168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1); 169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Wait until VOSF is cleared */ 171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** wait_loop_index = ((PWR_FLAG_SETTING_DELAY_US * SystemCoreClock) / 1000000U) + 1U; 172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) 173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** wait_loop_index--; 175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) 177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* If current range is range 1 normal or boost mode */ 182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else 183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Enable Range 1 Boost (no issue if bit already reset) */ 185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); 91 .loc 1 185 7 is_stmt 1 view .LVU17 92 0012 3B4A ldr r2, .L23 93 0014 D2F88030 ldr r3, [r2, #128] 94 0018 23F48073 bic r3, r3, #256 95 001c C2F88030 str r3, [r2, #128] 186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1) 189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* If current range is range 2 */ 191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2) 192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { ARM GAS /tmp/cchjGo05.s page 6 193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Make sure Range 1 Boost is disabled */ 194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR5, PWR_CR5_R1MODE); 195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set Range 1 */ 197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1); 198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Wait until VOSF is cleared */ 200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** wait_loop_index = ((PWR_FLAG_SETTING_DELAY_US * SystemCoreClock) / 1000000U) + 1U; 201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) 202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** wait_loop_index--; 204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) 206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* If current range is range 1 normal or boost mode */ 211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else 212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Disable Range 1 Boost (no issue if bit already set) */ 214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR5, PWR_CR5_R1MODE); 215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else 218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set Range 2 */ 220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE2); 221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* No need to wait for VOSF to be cleared for this transition */ 222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* PWR_CR5_R1MODE bit setting has no effect in Range 2 */ 223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return HAL_OK; 96 .loc 1 225 10 is_stmt 0 view .LVU18 97 0020 0020 movs r0, #0 98 .LVL1: 99 .loc 1 225 10 view .LVU19 100 0022 7047 bx lr 101 .LVL2: 102 .L20: 165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 103 .loc 1 165 7 is_stmt 1 view .LVU20 104 0024 364A ldr r2, .L23 105 0026 D2F88030 ldr r3, [r2, #128] 106 002a 23F48073 bic r3, r3, #256 107 002e C2F88030 str r3, [r2, #128] 168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 108 .loc 1 168 7 view .LVU21 109 0032 1368 ldr r3, [r2] 110 0034 23F4C063 bic r3, r3, #1536 111 0038 43F40073 orr r3, r3, #512 112 003c 1360 str r3, [r2] 171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) 113 .loc 1 171 7 view .LVU22 171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) 114 .loc 1 171 53 is_stmt 0 view .LVU23 115 003e 314B ldr r3, .L23+4 ARM GAS /tmp/cchjGo05.s page 7 116 0040 1B68 ldr r3, [r3] 117 0042 3222 movs r2, #50 118 0044 02FB03F3 mul r3, r2, r3 171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) 119 .loc 1 171 72 view .LVU24 120 0048 2F4A ldr r2, .L23+8 121 004a A2FB0323 umull r2, r3, r2, r3 122 004e 9B0C lsrs r3, r3, #18 171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) 123 .loc 1 171 23 view .LVU25 124 0050 0133 adds r3, r3, #1 125 .LVL3: 172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 126 .loc 1 172 7 is_stmt 1 view .LVU26 172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 127 .loc 1 172 13 is_stmt 0 view .LVU27 128 0052 00E0 b .L9 129 .L11: 174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 130 .loc 1 174 9 is_stmt 1 view .LVU28 174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 131 .loc 1 174 24 is_stmt 0 view .LVU29 132 0054 013B subs r3, r3, #1 133 .LVL4: 134 .L9: 172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 135 .loc 1 172 55 is_stmt 1 view .LVU30 172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 136 .loc 1 172 15 is_stmt 0 view .LVU31 137 0056 2A4A ldr r2, .L23 138 0058 5269 ldr r2, [r2, #20] 172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 139 .loc 1 172 55 view .LVU32 140 005a 12F4806F tst r2, #1024 141 005e 01D0 beq .L10 172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 142 .loc 1 172 55 discriminator 1 view .LVU33 143 0060 002B cmp r3, #0 144 0062 F7D1 bne .L11 145 .L10: 176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 146 .loc 1 176 7 is_stmt 1 view .LVU34 176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 147 .loc 1 176 11 is_stmt 0 view .LVU35 148 0064 264B ldr r3, .L23 149 .LVL5: 176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 150 .loc 1 176 11 view .LVU36 151 0066 5B69 ldr r3, [r3, #20] 176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 152 .loc 1 176 10 view .LVU37 153 0068 13F4806F tst r3, #1024 154 006c 44D1 bne .L18 155 .loc 1 225 10 view .LVU38 156 006e 0020 movs r0, #0 157 .LVL6: 158 .loc 1 225 10 view .LVU39 ARM GAS /tmp/cchjGo05.s page 8 159 0070 7047 bx lr 160 .LVL7: 161 .L7: 188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 162 .loc 1 188 8 is_stmt 1 view .LVU40 188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 163 .loc 1 188 11 is_stmt 0 view .LVU41 164 0072 B0F5007F cmp r0, #512 165 0076 08D0 beq .L21 220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* No need to wait for VOSF to be cleared for this transition */ 166 .loc 1 220 5 is_stmt 1 view .LVU42 167 0078 214A ldr r2, .L23 168 007a 1368 ldr r3, [r2] 169 007c 23F4C063 bic r3, r3, #1536 170 0080 43F48063 orr r3, r3, #1024 171 0084 1360 str r3, [r2] 172 .loc 1 225 10 is_stmt 0 view .LVU43 173 0086 0020 movs r0, #0 174 .LVL8: 175 .loc 1 225 10 view .LVU44 176 0088 7047 bx lr 177 .LVL9: 178 .L21: 191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 179 .loc 1 191 5 is_stmt 1 view .LVU45 191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 180 .loc 1 191 9 is_stmt 0 view .LVU46 181 008a 1D4B ldr r3, .L23 182 008c 1B68 ldr r3, [r3] 183 008e 03F4C063 and r3, r3, #1536 191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 184 .loc 1 191 8 view .LVU47 185 0092 B3F5806F cmp r3, #1024 186 0096 08D0 beq .L22 214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 187 .loc 1 214 7 is_stmt 1 view .LVU48 188 0098 194A ldr r2, .L23 189 009a D2F88030 ldr r3, [r2, #128] 190 009e 43F48073 orr r3, r3, #256 191 00a2 C2F88030 str r3, [r2, #128] 192 .loc 1 225 10 is_stmt 0 view .LVU49 193 00a6 0020 movs r0, #0 194 .LVL10: 195 .loc 1 225 10 view .LVU50 196 00a8 7047 bx lr 197 .LVL11: 198 .L22: 194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 199 .loc 1 194 7 is_stmt 1 view .LVU51 200 00aa 154A ldr r2, .L23 201 00ac D2F88030 ldr r3, [r2, #128] 202 00b0 43F48073 orr r3, r3, #256 203 00b4 C2F88030 str r3, [r2, #128] 197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 204 .loc 1 197 7 view .LVU52 205 00b8 1368 ldr r3, [r2] 206 00ba 23F4C063 bic r3, r3, #1536 ARM GAS /tmp/cchjGo05.s page 9 207 00be 43F40073 orr r3, r3, #512 208 00c2 1360 str r3, [r2] 200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) 209 .loc 1 200 7 view .LVU53 200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) 210 .loc 1 200 53 is_stmt 0 view .LVU54 211 00c4 0F4B ldr r3, .L23+4 212 00c6 1B68 ldr r3, [r3] 213 00c8 3222 movs r2, #50 214 00ca 02FB03F3 mul r3, r2, r3 200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) 215 .loc 1 200 72 view .LVU55 216 00ce 0E4A ldr r2, .L23+8 217 00d0 A2FB0323 umull r2, r3, r2, r3 218 00d4 9B0C lsrs r3, r3, #18 200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) 219 .loc 1 200 23 view .LVU56 220 00d6 0133 adds r3, r3, #1 221 .LVL12: 201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 222 .loc 1 201 7 is_stmt 1 view .LVU57 201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 223 .loc 1 201 13 is_stmt 0 view .LVU58 224 00d8 00E0 b .L15 225 .L17: 203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 226 .loc 1 203 9 is_stmt 1 view .LVU59 203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 227 .loc 1 203 24 is_stmt 0 view .LVU60 228 00da 013B subs r3, r3, #1 229 .LVL13: 230 .L15: 201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 231 .loc 1 201 55 is_stmt 1 view .LVU61 201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 232 .loc 1 201 15 is_stmt 0 view .LVU62 233 00dc 084A ldr r2, .L23 234 00de 5269 ldr r2, [r2, #20] 201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 235 .loc 1 201 55 view .LVU63 236 00e0 12F4806F tst r2, #1024 237 00e4 01D0 beq .L16 201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 238 .loc 1 201 55 discriminator 1 view .LVU64 239 00e6 002B cmp r3, #0 240 00e8 F7D1 bne .L17 241 .L16: 205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 242 .loc 1 205 7 is_stmt 1 view .LVU65 205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 243 .loc 1 205 11 is_stmt 0 view .LVU66 244 00ea 054B ldr r3, .L23 245 .LVL14: 205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 246 .loc 1 205 11 view .LVU67 247 00ec 5B69 ldr r3, [r3, #20] 205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { ARM GAS /tmp/cchjGo05.s page 10 248 .loc 1 205 10 view .LVU68 249 00ee 13F4806F tst r3, #1024 250 00f2 03D1 bne .L19 251 .loc 1 225 10 view .LVU69 252 00f4 0020 movs r0, #0 253 .LVL15: 254 .loc 1 225 10 view .LVU70 255 00f6 7047 bx lr 256 .LVL16: 257 .L18: 178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 258 .loc 1 178 16 view .LVU71 259 00f8 0320 movs r0, #3 260 .LVL17: 178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 261 .loc 1 178 16 view .LVU72 262 00fa 7047 bx lr 263 .LVL18: 264 .L19: 207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 265 .loc 1 207 16 view .LVU73 266 00fc 0320 movs r0, #3 267 .LVL19: 226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 268 .loc 1 226 1 view .LVU74 269 00fe 7047 bx lr 270 .L24: 271 .align 2 272 .L23: 273 0100 00700040 .word 1073770496 274 0104 00000000 .word SystemCoreClock 275 0108 83DE1B43 .word 1125899907 276 .cfi_endproc 277 .LFE330: 279 .section .text.HAL_PWREx_EnableBatteryCharging,"ax",%progbits 280 .align 1 281 .global HAL_PWREx_EnableBatteryCharging 282 .syntax unified 283 .thumb 284 .thumb_func 286 HAL_PWREx_EnableBatteryCharging: 287 .LVL20: 288 .LFB331: 227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable battery charging. 231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * When VDD is present, charge the external battery on VBAT through an internal resistor. 232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param ResistorSelection: specifies the resistor impedance. 233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values: 234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_BATTERY_CHARGING_RESISTOR_5 5 kOhms resistor 235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_BATTERY_CHARGING_RESISTOR_1_5 1.5 kOhms resistor 236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection) 239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 289 .loc 1 239 1 is_stmt 1 view -0 ARM GAS /tmp/cchjGo05.s page 11 290 .cfi_startproc 291 @ args = 0, pretend = 0, frame = 0 292 @ frame_needed = 0, uses_anonymous_args = 0 293 @ link register save eliminated. 240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_BATTERY_RESISTOR_SELECT(ResistorSelection)); 294 .loc 1 240 3 view .LVU76 241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Specify resistor selection */ 243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR4, PWR_CR4_VBRS, ResistorSelection); 295 .loc 1 243 3 view .LVU77 296 0000 054A ldr r2, .L26 297 0002 D368 ldr r3, [r2, #12] 298 0004 23F40073 bic r3, r3, #512 299 0008 0343 orrs r3, r3, r0 300 000a D360 str r3, [r2, #12] 244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Enable battery charging */ 246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR4, PWR_CR4_VBE); 301 .loc 1 246 3 view .LVU78 302 000c D368 ldr r3, [r2, #12] 303 000e 43F48073 orr r3, r3, #256 304 0012 D360 str r3, [r2, #12] 247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 305 .loc 1 247 1 is_stmt 0 view .LVU79 306 0014 7047 bx lr 307 .L27: 308 0016 00BF .align 2 309 .L26: 310 0018 00700040 .word 1073770496 311 .cfi_endproc 312 .LFE331: 314 .section .text.HAL_PWREx_DisableBatteryCharging,"ax",%progbits 315 .align 1 316 .global HAL_PWREx_DisableBatteryCharging 317 .syntax unified 318 .thumb 319 .thumb_func 321 HAL_PWREx_DisableBatteryCharging: 322 .LFB332: 248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable battery charging. 252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableBatteryCharging(void) 255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 323 .loc 1 255 1 is_stmt 1 view -0 324 .cfi_startproc 325 @ args = 0, pretend = 0, frame = 0 326 @ frame_needed = 0, uses_anonymous_args = 0 327 @ link register save eliminated. 256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR4, PWR_CR4_VBE); 328 .loc 1 256 3 view .LVU81 329 0000 024A ldr r2, .L29 330 0002 D368 ldr r3, [r2, #12] 331 0004 23F48073 bic r3, r3, #256 ARM GAS /tmp/cchjGo05.s page 12 332 0008 D360 str r3, [r2, #12] 257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 333 .loc 1 257 1 is_stmt 0 view .LVU82 334 000a 7047 bx lr 335 .L30: 336 .align 2 337 .L29: 338 000c 00700040 .word 1073770496 339 .cfi_endproc 340 .LFE332: 342 .section .text.HAL_PWREx_EnableInternalWakeUpLine,"ax",%progbits 343 .align 1 344 .global HAL_PWREx_EnableInternalWakeUpLine 345 .syntax unified 346 .thumb 347 .thumb_func 349 HAL_PWREx_EnableInternalWakeUpLine: 350 .LFB333: 258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable Internal Wake-up Line. 262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableInternalWakeUpLine(void) 265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 351 .loc 1 265 1 is_stmt 1 view -0 352 .cfi_startproc 353 @ args = 0, pretend = 0, frame = 0 354 @ frame_needed = 0, uses_anonymous_args = 0 355 @ link register save eliminated. 266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR3, PWR_CR3_EIWF); 356 .loc 1 266 3 view .LVU84 357 0000 024A ldr r2, .L32 358 0002 9368 ldr r3, [r2, #8] 359 0004 43F40043 orr r3, r3, #32768 360 0008 9360 str r3, [r2, #8] 267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 361 .loc 1 267 1 is_stmt 0 view .LVU85 362 000a 7047 bx lr 363 .L33: 364 .align 2 365 .L32: 366 000c 00700040 .word 1073770496 367 .cfi_endproc 368 .LFE333: 370 .section .text.HAL_PWREx_DisableInternalWakeUpLine,"ax",%progbits 371 .align 1 372 .global HAL_PWREx_DisableInternalWakeUpLine 373 .syntax unified 374 .thumb 375 .thumb_func 377 HAL_PWREx_DisableInternalWakeUpLine: 378 .LFB334: 268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** ARM GAS /tmp/cchjGo05.s page 13 271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable Internal Wake-up Line. 272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableInternalWakeUpLine(void) 275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 379 .loc 1 275 1 is_stmt 1 view -0 380 .cfi_startproc 381 @ args = 0, pretend = 0, frame = 0 382 @ frame_needed = 0, uses_anonymous_args = 0 383 @ link register save eliminated. 276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR3, PWR_CR3_EIWF); 384 .loc 1 276 3 view .LVU87 385 0000 024A ldr r2, .L35 386 0002 9368 ldr r3, [r2, #8] 387 0004 23F40043 bic r3, r3, #32768 388 0008 9360 str r3, [r2, #8] 277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 389 .loc 1 277 1 is_stmt 0 view .LVU88 390 000a 7047 bx lr 391 .L36: 392 .align 2 393 .L35: 394 000c 00700040 .word 1073770496 395 .cfi_endproc 396 .LFE334: 398 .section .text.HAL_PWREx_EnableGPIOPullUp,"ax",%progbits 399 .align 1 400 .global HAL_PWREx_EnableGPIOPullUp 401 .syntax unified 402 .thumb 403 .thumb_func 405 HAL_PWREx_EnableGPIOPullUp: 406 .LVL21: 407 .LFB335: 278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable GPIO pull-up state in Standby and Shutdown modes. 283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Set the relevant PUy bits of PWR_PUCRx register to configure the I/O in 284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * pull-up state in Standby and Shutdown modes. 285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note This state is effective in Standby and Shutdown modes only if APC bit 286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * is set through HAL_PWREx_EnablePullUpPullDownConfig() API. 287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note The configuration is lost when exiting the Shutdown mode due to the 288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * power-on reset, maintained when exiting the Standby mode. 289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note To avoid any conflict at Standby and Shutdown modes exits, the corresponding 290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PDy bit of PWR_PDCRx register is cleared unless it is reserved. 291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Even if a PUy bit to set is reserved, the other PUy bits entered as input 292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * parameter at the same time are set. 293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIO: Specify the IO port. This parameter can be PWR_GPIO_A, ..., PWR_GPIO_G 294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral. 295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIONumber: Specify the I/O pins numbers. 296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values: 297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less 298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * I/O pins are available) or the logical OR of several of them to set 299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * several bits for a given port in a single API call. 300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL Status ARM GAS /tmp/cchjGo05.s page 14 301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) 303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 408 .loc 1 303 1 is_stmt 1 view -0 409 .cfi_startproc 410 @ args = 0, pretend = 0, frame = 0 411 @ frame_needed = 0, uses_anonymous_args = 0 412 @ link register save eliminated. 304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK; 413 .loc 1 304 3 view .LVU90 305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO(GPIO)); 414 .loc 1 306 3 view .LVU91 307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber)); 415 .loc 1 307 3 view .LVU92 308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** switch (GPIO) 416 .loc 1 309 3 view .LVU93 417 0000 0628 cmp r0, #6 418 0002 55D8 bhi .L47 419 0004 DFE800F0 tbb [pc, r0] 420 .L40: 421 0008 04 .byte (.L46-.L40)/2 422 0009 12 .byte (.L45-.L40)/2 423 000a 1E .byte (.L44-.L40)/2 424 000b 28 .byte (.L43-.L40)/2 425 000c 32 .byte (.L42-.L40)/2 426 000d 3C .byte (.L41-.L40)/2 427 000e 4A .byte (.L39-.L40)/2 428 000f 00 .p2align 1 429 .L46: 310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_A: 312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14)))); 430 .loc 1 312 8 view .LVU94 431 0010 284B ldr r3, .L48 432 0012 1A6A ldr r2, [r3, #32] 433 0014 21F48040 bic r0, r1, #16384 434 .LVL22: 435 .loc 1 312 8 is_stmt 0 view .LVU95 436 0018 0243 orrs r2, r2, r0 437 001a 1A62 str r2, [r3, #32] 313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15)))); 438 .loc 1 313 8 is_stmt 1 view .LVU96 439 001c 5A6A ldr r2, [r3, #36] 440 001e 21F42041 bic r1, r1, #40960 441 .LVL23: 442 .loc 1 313 8 is_stmt 0 view .LVU97 443 0022 22EA0102 bic r2, r2, r1 444 0026 5A62 str r2, [r3, #36] 314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 445 .loc 1 314 8 is_stmt 1 view .LVU98 304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 446 .loc 1 304 21 is_stmt 0 view .LVU99 447 0028 0020 movs r0, #0 448 .loc 1 314 8 view .LVU100 449 002a 7047 bx lr ARM GAS /tmp/cchjGo05.s page 15 450 .LVL24: 451 .L45: 315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_B: 316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PUCRB, GPIONumber); 452 .loc 1 316 8 is_stmt 1 view .LVU101 453 002c 214B ldr r3, .L48 454 002e 9A6A ldr r2, [r3, #40] 455 0030 0A43 orrs r2, r2, r1 456 0032 9A62 str r2, [r3, #40] 317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4)))); 457 .loc 1 317 8 view .LVU102 458 0034 DA6A ldr r2, [r3, #44] 459 0036 21F01001 bic r1, r1, #16 460 .LVL25: 461 .loc 1 317 8 is_stmt 0 view .LVU103 462 003a 22EA0102 bic r2, r2, r1 463 003e DA62 str r2, [r3, #44] 318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 464 .loc 1 318 8 is_stmt 1 view .LVU104 304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 465 .loc 1 304 21 is_stmt 0 view .LVU105 466 0040 0020 movs r0, #0 467 .LVL26: 468 .loc 1 318 8 view .LVU106 469 0042 7047 bx lr 470 .LVL27: 471 .L44: 319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_C: 320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PUCRC, GPIONumber); 472 .loc 1 320 8 is_stmt 1 view .LVU107 473 0044 1B4B ldr r3, .L48 474 0046 1A6B ldr r2, [r3, #48] 475 0048 0A43 orrs r2, r2, r1 476 004a 1A63 str r2, [r3, #48] 321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRC, GPIONumber); 477 .loc 1 321 8 view .LVU108 478 004c 5A6B ldr r2, [r3, #52] 479 004e 22EA0102 bic r2, r2, r1 480 0052 5A63 str r2, [r3, #52] 322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 481 .loc 1 322 8 view .LVU109 304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 482 .loc 1 304 21 is_stmt 0 view .LVU110 483 0054 0020 movs r0, #0 484 .LVL28: 485 .loc 1 322 8 view .LVU111 486 0056 7047 bx lr 487 .LVL29: 488 .L43: 323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_D: 324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PUCRD, GPIONumber); 489 .loc 1 324 8 is_stmt 1 view .LVU112 490 0058 164B ldr r3, .L48 491 005a 9A6B ldr r2, [r3, #56] 492 005c 0A43 orrs r2, r2, r1 493 005e 9A63 str r2, [r3, #56] 325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRD, GPIONumber); ARM GAS /tmp/cchjGo05.s page 16 494 .loc 1 325 8 view .LVU113 495 0060 DA6B ldr r2, [r3, #60] 496 0062 22EA0102 bic r2, r2, r1 497 0066 DA63 str r2, [r3, #60] 326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 498 .loc 1 326 8 view .LVU114 304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 499 .loc 1 304 21 is_stmt 0 view .LVU115 500 0068 0020 movs r0, #0 501 .LVL30: 502 .loc 1 326 8 view .LVU116 503 006a 7047 bx lr 504 .LVL31: 505 .L42: 327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_E: 328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PUCRE, GPIONumber); 506 .loc 1 328 8 is_stmt 1 view .LVU117 507 006c 114B ldr r3, .L48 508 006e 1A6C ldr r2, [r3, #64] 509 0070 0A43 orrs r2, r2, r1 510 0072 1A64 str r2, [r3, #64] 329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRE, GPIONumber); 511 .loc 1 329 8 view .LVU118 512 0074 5A6C ldr r2, [r3, #68] 513 0076 22EA0102 bic r2, r2, r1 514 007a 5A64 str r2, [r3, #68] 330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 515 .loc 1 330 8 view .LVU119 304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 516 .loc 1 304 21 is_stmt 0 view .LVU120 517 007c 0020 movs r0, #0 518 .LVL32: 519 .loc 1 330 8 view .LVU121 520 007e 7047 bx lr 521 .LVL33: 522 .L41: 331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_F: 332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PUCRF, (GPIONumber & PWR_PORTF_AVAILABLE_PINS)); 523 .loc 1 332 8 is_stmt 1 view .LVU122 524 0080 0C4B ldr r3, .L48 525 0082 9A6C ldr r2, [r3, #72] 526 0084 21F4FC71 bic r1, r1, #504 527 .LVL34: 528 .loc 1 332 8 is_stmt 0 view .LVU123 529 0088 4905 lsls r1, r1, #21 530 008a 490D lsrs r1, r1, #21 531 008c 0A43 orrs r2, r2, r1 532 008e 9A64 str r2, [r3, #72] 333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRF, (GPIONumber & PWR_PORTF_AVAILABLE_PINS)); 533 .loc 1 333 8 is_stmt 1 view .LVU124 534 0090 DA6C ldr r2, [r3, #76] 535 0092 22EA0102 bic r2, r2, r1 536 0096 DA64 str r2, [r3, #76] 334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 537 .loc 1 334 8 view .LVU125 304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 538 .loc 1 304 21 is_stmt 0 view .LVU126 ARM GAS /tmp/cchjGo05.s page 17 539 0098 0020 movs r0, #0 540 .LVL35: 541 .loc 1 334 8 view .LVU127 542 009a 7047 bx lr 543 .LVL36: 544 .L39: 335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_G: 336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PUCRG, (GPIONumber & PWR_PORTG_AVAILABLE_PINS)); 545 .loc 1 336 8 is_stmt 1 view .LVU128 546 009c 054B ldr r3, .L48 547 009e 1A6D ldr r2, [r3, #80] 548 00a0 01F48061 and r1, r1, #1024 549 .LVL37: 550 .loc 1 336 8 is_stmt 0 view .LVU129 551 00a4 0A43 orrs r2, r2, r1 552 00a6 1A65 str r2, [r3, #80] 337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRG, ((GPIONumber & PWR_PORTG_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_10)))); 553 .loc 1 337 8 is_stmt 1 view .LVU130 554 00a8 5A6D ldr r2, [r3, #84] 555 00aa 5A65 str r2, [r3, #84] 338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 556 .loc 1 338 8 view .LVU131 304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 557 .loc 1 304 21 is_stmt 0 view .LVU132 558 00ac 0020 movs r0, #0 559 .LVL38: 560 .loc 1 338 8 view .LVU133 561 00ae 7047 bx lr 562 .LVL39: 563 .L47: 309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 564 .loc 1 309 3 view .LVU134 565 00b0 0120 movs r0, #1 566 .LVL40: 339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** default: 340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** status = HAL_ERROR; 341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return status; 567 .loc 1 344 3 is_stmt 1 view .LVU135 345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 568 .loc 1 345 1 is_stmt 0 view .LVU136 569 00b2 7047 bx lr 570 .L49: 571 .align 2 572 .L48: 573 00b4 00700040 .word 1073770496 574 .cfi_endproc 575 .LFE335: 577 .section .text.HAL_PWREx_DisableGPIOPullUp,"ax",%progbits 578 .align 1 579 .global HAL_PWREx_DisableGPIOPullUp 580 .syntax unified 581 .thumb 582 .thumb_func 584 HAL_PWREx_DisableGPIOPullUp: ARM GAS /tmp/cchjGo05.s page 18 585 .LVL41: 586 .LFB336: 346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable GPIO pull-up state in Standby mode and Shutdown modes. 350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Reset the relevant PUy bits of PWR_PUCRx register used to configure the I/O 351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * in pull-up state in Standby and Shutdown modes. 352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Even if a PUy bit to reset is reserved, the other PUy bits entered as input 353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * parameter at the same time are reset. 354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIO: Specifies the IO port. This parameter can be PWR_GPIO_A, ..., PWR_GPIO_G 355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral. 356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIONumber: Specify the I/O pins numbers. 357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values: 358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less 359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * I/O pins are available) or the logical OR of several of them to reset 360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * several bits for a given port in a single API call. 361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL Status 362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) 364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 587 .loc 1 364 1 is_stmt 1 view -0 588 .cfi_startproc 589 @ args = 0, pretend = 0, frame = 0 590 @ frame_needed = 0, uses_anonymous_args = 0 591 @ link register save eliminated. 365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK; 592 .loc 1 365 3 view .LVU138 366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO(GPIO)); 593 .loc 1 367 3 view .LVU139 368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber)); 594 .loc 1 368 3 view .LVU140 369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** switch (GPIO) 595 .loc 1 370 3 view .LVU141 596 0000 0628 cmp r0, #6 597 0002 3ED8 bhi .L60 598 0004 DFE800F0 tbb [pc, r0] 599 .L53: 600 0008 04 .byte (.L59-.L53)/2 601 0009 0D .byte (.L58-.L53)/2 602 000a 14 .byte (.L57-.L53)/2 603 000b 1B .byte (.L56-.L53)/2 604 000c 22 .byte (.L55-.L53)/2 605 000d 29 .byte (.L54-.L53)/2 606 000e 34 .byte (.L52-.L53)/2 607 000f 00 .p2align 1 608 .L59: 371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_A: 373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14)))); 609 .loc 1 373 8 view .LVU142 610 0010 1D4A ldr r2, .L61 611 0012 136A ldr r3, [r2, #32] 612 0014 21F48041 bic r1, r1, #16384 613 .LVL42: ARM GAS /tmp/cchjGo05.s page 19 614 .loc 1 373 8 is_stmt 0 view .LVU143 615 0018 23EA0101 bic r1, r3, r1 616 001c 1162 str r1, [r2, #32] 374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 617 .loc 1 374 8 is_stmt 1 view .LVU144 365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 618 .loc 1 365 21 is_stmt 0 view .LVU145 619 001e 0020 movs r0, #0 620 .LVL43: 621 .loc 1 374 8 view .LVU146 622 0020 7047 bx lr 623 .LVL44: 624 .L58: 375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_B: 376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRB, GPIONumber); 625 .loc 1 376 8 is_stmt 1 view .LVU147 626 0022 194A ldr r2, .L61 627 0024 936A ldr r3, [r2, #40] 628 0026 23EA0103 bic r3, r3, r1 629 002a 9362 str r3, [r2, #40] 377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 630 .loc 1 377 8 view .LVU148 365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 631 .loc 1 365 21 is_stmt 0 view .LVU149 632 002c 0020 movs r0, #0 633 .LVL45: 634 .loc 1 377 8 view .LVU150 635 002e 7047 bx lr 636 .LVL46: 637 .L57: 378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_C: 379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRC, GPIONumber); 638 .loc 1 379 8 is_stmt 1 view .LVU151 639 0030 154A ldr r2, .L61 640 0032 136B ldr r3, [r2, #48] 641 0034 23EA0103 bic r3, r3, r1 642 0038 1363 str r3, [r2, #48] 380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 643 .loc 1 380 8 view .LVU152 365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 644 .loc 1 365 21 is_stmt 0 view .LVU153 645 003a 0020 movs r0, #0 646 .LVL47: 647 .loc 1 380 8 view .LVU154 648 003c 7047 bx lr 649 .LVL48: 650 .L56: 381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_D: 382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRD, GPIONumber); 651 .loc 1 382 8 is_stmt 1 view .LVU155 652 003e 124A ldr r2, .L61 653 0040 936B ldr r3, [r2, #56] 654 0042 23EA0103 bic r3, r3, r1 655 0046 9363 str r3, [r2, #56] 383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 656 .loc 1 383 8 view .LVU156 365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ARM GAS /tmp/cchjGo05.s page 20 657 .loc 1 365 21 is_stmt 0 view .LVU157 658 0048 0020 movs r0, #0 659 .LVL49: 660 .loc 1 383 8 view .LVU158 661 004a 7047 bx lr 662 .LVL50: 663 .L55: 384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_E: 385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRE, GPIONumber); 664 .loc 1 385 8 is_stmt 1 view .LVU159 665 004c 0E4A ldr r2, .L61 666 004e 136C ldr r3, [r2, #64] 667 0050 23EA0103 bic r3, r3, r1 668 0054 1364 str r3, [r2, #64] 386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 669 .loc 1 386 8 view .LVU160 365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 670 .loc 1 365 21 is_stmt 0 view .LVU161 671 0056 0020 movs r0, #0 672 .LVL51: 673 .loc 1 386 8 view .LVU162 674 0058 7047 bx lr 675 .LVL52: 676 .L54: 387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_F: 388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRF, (GPIONumber & PWR_PORTF_AVAILABLE_PINS)); 677 .loc 1 388 8 is_stmt 1 view .LVU163 678 005a 0B4A ldr r2, .L61 679 005c 936C ldr r3, [r2, #72] 680 005e 21F4FC71 bic r1, r1, #504 681 .LVL53: 682 .loc 1 388 8 is_stmt 0 view .LVU164 683 0062 4905 lsls r1, r1, #21 684 0064 490D lsrs r1, r1, #21 685 0066 23EA0101 bic r1, r3, r1 686 006a 9164 str r1, [r2, #72] 389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 687 .loc 1 389 8 is_stmt 1 view .LVU165 365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 688 .loc 1 365 21 is_stmt 0 view .LVU166 689 006c 0020 movs r0, #0 690 .LVL54: 691 .loc 1 389 8 view .LVU167 692 006e 7047 bx lr 693 .LVL55: 694 .L52: 390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_G: 391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRG, (GPIONumber & PWR_PORTG_AVAILABLE_PINS)); 695 .loc 1 391 8 is_stmt 1 view .LVU168 696 0070 054A ldr r2, .L61 697 0072 136D ldr r3, [r2, #80] 698 0074 01F48061 and r1, r1, #1024 699 .LVL56: 700 .loc 1 391 8 is_stmt 0 view .LVU169 701 0078 23EA0103 bic r3, r3, r1 702 007c 1365 str r3, [r2, #80] 392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; ARM GAS /tmp/cchjGo05.s page 21 703 .loc 1 392 8 is_stmt 1 view .LVU170 365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 704 .loc 1 365 21 is_stmt 0 view .LVU171 705 007e 0020 movs r0, #0 706 .LVL57: 707 .loc 1 392 8 view .LVU172 708 0080 7047 bx lr 709 .LVL58: 710 .L60: 370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 711 .loc 1 370 3 view .LVU173 712 0082 0120 movs r0, #1 713 .LVL59: 393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** default: 394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** status = HAL_ERROR; 395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return status; 714 .loc 1 398 3 is_stmt 1 view .LVU174 399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 715 .loc 1 399 1 is_stmt 0 view .LVU175 716 0084 7047 bx lr 717 .L62: 718 0086 00BF .align 2 719 .L61: 720 0088 00700040 .word 1073770496 721 .cfi_endproc 722 .LFE336: 724 .section .text.HAL_PWREx_EnableGPIOPullDown,"ax",%progbits 725 .align 1 726 .global HAL_PWREx_EnableGPIOPullDown 727 .syntax unified 728 .thumb 729 .thumb_func 731 HAL_PWREx_EnableGPIOPullDown: 732 .LVL60: 733 .LFB337: 400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable GPIO pull-down state in Standby and Shutdown modes. 405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Set the relevant PDy bits of PWR_PDCRx register to configure the I/O in 406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * pull-down state in Standby and Shutdown modes. 407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note This state is effective in Standby and Shutdown modes only if APC bit 408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * is set through HAL_PWREx_EnablePullUpPullDownConfig() API. 409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note The configuration is lost when exiting the Shutdown mode due to the 410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * power-on reset, maintained when exiting the Standby mode. 411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note To avoid any conflict at Standby and Shutdown modes exits, the corresponding 412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PUy bit of PWR_PUCRx register is cleared unless it is reserved. 413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Even if a PDy bit to set is reserved, the other PDy bits entered as input 414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * parameter at the same time are set. 415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIO: Specify the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_G 416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral. 417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIONumber: Specify the I/O pins numbers. 418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values: ARM GAS /tmp/cchjGo05.s page 22 419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less 420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * I/O pins are available) or the logical OR of several of them to set 421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * several bits for a given port in a single API call. 422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL Status 423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) 425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 734 .loc 1 425 1 is_stmt 1 view -0 735 .cfi_startproc 736 @ args = 0, pretend = 0, frame = 0 737 @ frame_needed = 0, uses_anonymous_args = 0 738 @ link register save eliminated. 426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK; 739 .loc 1 426 3 view .LVU177 427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO(GPIO)); 740 .loc 1 428 3 view .LVU178 429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber)); 741 .loc 1 429 3 view .LVU179 430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** switch (GPIO) 742 .loc 1 431 3 view .LVU180 743 0000 0628 cmp r0, #6 744 0002 56D8 bhi .L73 745 0004 DFE800F0 tbb [pc, r0] 746 .L66: 747 0008 04 .byte (.L72-.L66)/2 748 0009 12 .byte (.L71-.L66)/2 749 000a 1E .byte (.L70-.L66)/2 750 000b 28 .byte (.L69-.L66)/2 751 000c 32 .byte (.L68-.L66)/2 752 000d 3C .byte (.L67-.L66)/2 753 000e 4A .byte (.L65-.L66)/2 754 000f 00 .p2align 1 755 .L72: 432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_A: 434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15)))); 756 .loc 1 434 8 view .LVU181 757 0010 294B ldr r3, .L74 758 0012 5A6A ldr r2, [r3, #36] 759 0014 21F42040 bic r0, r1, #40960 760 .LVL61: 761 .loc 1 434 8 is_stmt 0 view .LVU182 762 0018 0243 orrs r2, r2, r0 763 001a 5A62 str r2, [r3, #36] 435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14)))); 764 .loc 1 435 8 is_stmt 1 view .LVU183 765 001c 1A6A ldr r2, [r3, #32] 766 001e 21F48041 bic r1, r1, #16384 767 .LVL62: 768 .loc 1 435 8 is_stmt 0 view .LVU184 769 0022 22EA0102 bic r2, r2, r1 770 0026 1A62 str r2, [r3, #32] 436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 771 .loc 1 436 8 is_stmt 1 view .LVU185 426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ARM GAS /tmp/cchjGo05.s page 23 772 .loc 1 426 21 is_stmt 0 view .LVU186 773 0028 0020 movs r0, #0 774 .loc 1 436 8 view .LVU187 775 002a 7047 bx lr 776 .LVL63: 777 .L71: 437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_B: 438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4)))); 778 .loc 1 438 8 is_stmt 1 view .LVU188 779 002c 224B ldr r3, .L74 780 002e DA6A ldr r2, [r3, #44] 781 0030 21F01000 bic r0, r1, #16 782 .LVL64: 783 .loc 1 438 8 is_stmt 0 view .LVU189 784 0034 0243 orrs r2, r2, r0 785 0036 DA62 str r2, [r3, #44] 439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRB, GPIONumber); 786 .loc 1 439 8 is_stmt 1 view .LVU190 787 0038 9A6A ldr r2, [r3, #40] 788 003a 22EA0102 bic r2, r2, r1 789 003e 9A62 str r2, [r3, #40] 440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 790 .loc 1 440 8 view .LVU191 426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 791 .loc 1 426 21 is_stmt 0 view .LVU192 792 0040 0020 movs r0, #0 793 .loc 1 440 8 view .LVU193 794 0042 7047 bx lr 795 .LVL65: 796 .L70: 441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_C: 442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PDCRC, GPIONumber); 797 .loc 1 442 8 is_stmt 1 view .LVU194 798 0044 1C4B ldr r3, .L74 799 0046 5A6B ldr r2, [r3, #52] 800 0048 0A43 orrs r2, r2, r1 801 004a 5A63 str r2, [r3, #52] 443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRC, GPIONumber); 802 .loc 1 443 8 view .LVU195 803 004c 1A6B ldr r2, [r3, #48] 804 004e 22EA0102 bic r2, r2, r1 805 0052 1A63 str r2, [r3, #48] 444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 806 .loc 1 444 8 view .LVU196 426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 807 .loc 1 426 21 is_stmt 0 view .LVU197 808 0054 0020 movs r0, #0 809 .LVL66: 810 .loc 1 444 8 view .LVU198 811 0056 7047 bx lr 812 .LVL67: 813 .L69: 445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_D: 446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PDCRD, GPIONumber); 814 .loc 1 446 8 is_stmt 1 view .LVU199 815 0058 174B ldr r3, .L74 816 005a DA6B ldr r2, [r3, #60] ARM GAS /tmp/cchjGo05.s page 24 817 005c 0A43 orrs r2, r2, r1 818 005e DA63 str r2, [r3, #60] 447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRD, GPIONumber); 819 .loc 1 447 8 view .LVU200 820 0060 9A6B ldr r2, [r3, #56] 821 0062 22EA0102 bic r2, r2, r1 822 0066 9A63 str r2, [r3, #56] 448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 823 .loc 1 448 8 view .LVU201 426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 824 .loc 1 426 21 is_stmt 0 view .LVU202 825 0068 0020 movs r0, #0 826 .LVL68: 827 .loc 1 448 8 view .LVU203 828 006a 7047 bx lr 829 .LVL69: 830 .L68: 449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_E: 450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PDCRE, GPIONumber); 831 .loc 1 450 8 is_stmt 1 view .LVU204 832 006c 124B ldr r3, .L74 833 006e 5A6C ldr r2, [r3, #68] 834 0070 0A43 orrs r2, r2, r1 835 0072 5A64 str r2, [r3, #68] 451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRE, GPIONumber); 836 .loc 1 451 8 view .LVU205 837 0074 1A6C ldr r2, [r3, #64] 838 0076 22EA0102 bic r2, r2, r1 839 007a 1A64 str r2, [r3, #64] 452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 840 .loc 1 452 8 view .LVU206 426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 841 .loc 1 426 21 is_stmt 0 view .LVU207 842 007c 0020 movs r0, #0 843 .LVL70: 844 .loc 1 452 8 view .LVU208 845 007e 7047 bx lr 846 .LVL71: 847 .L67: 453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_F: 454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PDCRF, (GPIONumber & PWR_PORTF_AVAILABLE_PINS)); 848 .loc 1 454 8 is_stmt 1 view .LVU209 849 0080 0D4B ldr r3, .L74 850 0082 DA6C ldr r2, [r3, #76] 851 0084 21F4FC71 bic r1, r1, #504 852 .LVL72: 853 .loc 1 454 8 is_stmt 0 view .LVU210 854 0088 4905 lsls r1, r1, #21 855 008a 490D lsrs r1, r1, #21 856 008c 0A43 orrs r2, r2, r1 857 008e DA64 str r2, [r3, #76] 455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRF, (GPIONumber & PWR_PORTF_AVAILABLE_PINS)); 858 .loc 1 455 8 is_stmt 1 view .LVU211 859 0090 9A6C ldr r2, [r3, #72] 860 0092 22EA0102 bic r2, r2, r1 861 0096 9A64 str r2, [r3, #72] 456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; ARM GAS /tmp/cchjGo05.s page 25 862 .loc 1 456 8 view .LVU212 426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 863 .loc 1 426 21 is_stmt 0 view .LVU213 864 0098 0020 movs r0, #0 865 .LVL73: 866 .loc 1 456 8 view .LVU214 867 009a 7047 bx lr 868 .LVL74: 869 .L65: 457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_G: 458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PDCRG, ((GPIONumber & PWR_PORTG_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_10)))); 870 .loc 1 458 8 is_stmt 1 view .LVU215 871 009c 064B ldr r3, .L74 872 009e 5A6D ldr r2, [r3, #84] 873 00a0 5A65 str r2, [r3, #84] 459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRG, (GPIONumber & PWR_PORTG_AVAILABLE_PINS)); 874 .loc 1 459 8 view .LVU216 875 00a2 1A6D ldr r2, [r3, #80] 876 00a4 01F48061 and r1, r1, #1024 877 .LVL75: 878 .loc 1 459 8 is_stmt 0 view .LVU217 879 00a8 22EA0102 bic r2, r2, r1 880 00ac 1A65 str r2, [r3, #80] 460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 881 .loc 1 460 8 is_stmt 1 view .LVU218 426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 882 .loc 1 426 21 is_stmt 0 view .LVU219 883 00ae 0020 movs r0, #0 884 .LVL76: 885 .loc 1 460 8 view .LVU220 886 00b0 7047 bx lr 887 .LVL77: 888 .L73: 431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 889 .loc 1 431 3 view .LVU221 890 00b2 0120 movs r0, #1 891 .LVL78: 461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** default: 462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** status = HAL_ERROR; 463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return status; 892 .loc 1 466 3 is_stmt 1 view .LVU222 467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 893 .loc 1 467 1 is_stmt 0 view .LVU223 894 00b4 7047 bx lr 895 .L75: 896 00b6 00BF .align 2 897 .L74: 898 00b8 00700040 .word 1073770496 899 .cfi_endproc 900 .LFE337: 902 .section .text.HAL_PWREx_DisableGPIOPullDown,"ax",%progbits 903 .align 1 904 .global HAL_PWREx_DisableGPIOPullDown 905 .syntax unified ARM GAS /tmp/cchjGo05.s page 26 906 .thumb 907 .thumb_func 909 HAL_PWREx_DisableGPIOPullDown: 910 .LVL79: 911 .LFB338: 468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable GPIO pull-down state in Standby and Shutdown modes. 472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Reset the relevant PDy bits of PWR_PDCRx register used to configure the I/O 473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * in pull-down state in Standby and Shutdown modes. 474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Even if a PDy bit to reset is reserved, the other PDy bits entered as input 475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * parameter at the same time are reset. 476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIO: Specifies the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_G 477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral. 478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIONumber: Specify the I/O pins numbers. 479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values: 480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less 481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * I/O pins are available) or the logical OR of several of them to reset 482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * several bits for a given port in a single API call. 483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL Status 484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) 486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 912 .loc 1 486 1 is_stmt 1 view -0 913 .cfi_startproc 914 @ args = 0, pretend = 0, frame = 0 915 @ frame_needed = 0, uses_anonymous_args = 0 916 @ link register save eliminated. 487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK; 917 .loc 1 487 3 view .LVU225 488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO(GPIO)); 918 .loc 1 489 3 view .LVU226 490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber)); 919 .loc 1 490 3 view .LVU227 491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** switch (GPIO) 920 .loc 1 492 3 view .LVU228 921 0000 0628 cmp r0, #6 922 0002 3CD8 bhi .L86 923 0004 DFE800F0 tbb [pc, r0] 924 .L79: 925 0008 04 .byte (.L85-.L79)/2 926 0009 0D .byte (.L84-.L79)/2 927 000a 16 .byte (.L83-.L79)/2 928 000b 1D .byte (.L82-.L79)/2 929 000c 24 .byte (.L81-.L79)/2 930 000d 2B .byte (.L80-.L79)/2 931 000e 36 .byte (.L78-.L79)/2 932 000f 00 .p2align 1 933 .L85: 493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_A: 495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15)))); 934 .loc 1 495 8 view .LVU229 935 0010 1C4A ldr r2, .L87 ARM GAS /tmp/cchjGo05.s page 27 936 0012 536A ldr r3, [r2, #36] 937 0014 21F42041 bic r1, r1, #40960 938 .LVL80: 939 .loc 1 495 8 is_stmt 0 view .LVU230 940 0018 23EA0101 bic r1, r3, r1 941 001c 5162 str r1, [r2, #36] 496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 942 .loc 1 496 8 is_stmt 1 view .LVU231 487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 943 .loc 1 487 21 is_stmt 0 view .LVU232 944 001e 0020 movs r0, #0 945 .LVL81: 946 .loc 1 496 8 view .LVU233 947 0020 7047 bx lr 948 .LVL82: 949 .L84: 497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_B: 498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4)))); 950 .loc 1 498 8 is_stmt 1 view .LVU234 951 0022 184A ldr r2, .L87 952 0024 D36A ldr r3, [r2, #44] 953 0026 21F01001 bic r1, r1, #16 954 .LVL83: 955 .loc 1 498 8 is_stmt 0 view .LVU235 956 002a 23EA0101 bic r1, r3, r1 957 002e D162 str r1, [r2, #44] 499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 958 .loc 1 499 8 is_stmt 1 view .LVU236 487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 959 .loc 1 487 21 is_stmt 0 view .LVU237 960 0030 0020 movs r0, #0 961 .LVL84: 962 .loc 1 499 8 view .LVU238 963 0032 7047 bx lr 964 .LVL85: 965 .L83: 500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_C: 501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRC, GPIONumber); 966 .loc 1 501 8 is_stmt 1 view .LVU239 967 0034 134A ldr r2, .L87 968 0036 536B ldr r3, [r2, #52] 969 0038 23EA0103 bic r3, r3, r1 970 003c 5363 str r3, [r2, #52] 502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 971 .loc 1 502 8 view .LVU240 487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 972 .loc 1 487 21 is_stmt 0 view .LVU241 973 003e 0020 movs r0, #0 974 .LVL86: 975 .loc 1 502 8 view .LVU242 976 0040 7047 bx lr 977 .LVL87: 978 .L82: 503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_D: 504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRD, GPIONumber); 979 .loc 1 504 8 is_stmt 1 view .LVU243 980 0042 104A ldr r2, .L87 ARM GAS /tmp/cchjGo05.s page 28 981 0044 D36B ldr r3, [r2, #60] 982 0046 23EA0103 bic r3, r3, r1 983 004a D363 str r3, [r2, #60] 505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 984 .loc 1 505 8 view .LVU244 487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 985 .loc 1 487 21 is_stmt 0 view .LVU245 986 004c 0020 movs r0, #0 987 .LVL88: 988 .loc 1 505 8 view .LVU246 989 004e 7047 bx lr 990 .LVL89: 991 .L81: 506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_E: 507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRE, GPIONumber); 992 .loc 1 507 8 is_stmt 1 view .LVU247 993 0050 0C4A ldr r2, .L87 994 0052 536C ldr r3, [r2, #68] 995 0054 23EA0103 bic r3, r3, r1 996 0058 5364 str r3, [r2, #68] 508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 997 .loc 1 508 8 view .LVU248 487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 998 .loc 1 487 21 is_stmt 0 view .LVU249 999 005a 0020 movs r0, #0 1000 .LVL90: 1001 .loc 1 508 8 view .LVU250 1002 005c 7047 bx lr 1003 .LVL91: 1004 .L80: 509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_F: 510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRF, (GPIONumber & PWR_PORTF_AVAILABLE_PINS)); 1005 .loc 1 510 8 is_stmt 1 view .LVU251 1006 005e 094A ldr r2, .L87 1007 0060 D36C ldr r3, [r2, #76] 1008 0062 21F4FC71 bic r1, r1, #504 1009 .LVL92: 1010 .loc 1 510 8 is_stmt 0 view .LVU252 1011 0066 4905 lsls r1, r1, #21 1012 0068 490D lsrs r1, r1, #21 1013 006a 23EA0103 bic r3, r3, r1 1014 006e D364 str r3, [r2, #76] 511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 1015 .loc 1 511 8 is_stmt 1 view .LVU253 487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1016 .loc 1 487 21 is_stmt 0 view .LVU254 1017 0070 0020 movs r0, #0 1018 .LVL93: 1019 .loc 1 511 8 view .LVU255 1020 0072 7047 bx lr 1021 .LVL94: 1022 .L78: 512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_G: 513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRG, ((GPIONumber & PWR_PORTG_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_10)))); 1023 .loc 1 513 8 is_stmt 1 view .LVU256 1024 0074 034B ldr r3, .L87 1025 0076 5A6D ldr r2, [r3, #84] ARM GAS /tmp/cchjGo05.s page 29 1026 0078 5A65 str r2, [r3, #84] 514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 1027 .loc 1 514 8 view .LVU257 487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1028 .loc 1 487 21 is_stmt 0 view .LVU258 1029 007a 0020 movs r0, #0 1030 .LVL95: 1031 .loc 1 514 8 view .LVU259 1032 007c 7047 bx lr 1033 .LVL96: 1034 .L86: 492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1035 .loc 1 492 3 view .LVU260 1036 007e 0120 movs r0, #1 1037 .LVL97: 515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** default: 516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** status = HAL_ERROR; 517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return status; 1038 .loc 1 520 3 is_stmt 1 view .LVU261 521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1039 .loc 1 521 1 is_stmt 0 view .LVU262 1040 0080 7047 bx lr 1041 .L88: 1042 0082 00BF .align 2 1043 .L87: 1044 0084 00700040 .word 1073770496 1045 .cfi_endproc 1046 .LFE338: 1048 .section .text.HAL_PWREx_EnablePullUpPullDownConfig,"ax",%progbits 1049 .align 1 1050 .global HAL_PWREx_EnablePullUpPullDownConfig 1051 .syntax unified 1052 .thumb 1053 .thumb_func 1055 HAL_PWREx_EnablePullUpPullDownConfig: 1056 .LFB339: 522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable pull-up and pull-down configuration. 527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When APC bit is set, the I/O pull-up and pull-down configurations defined in 528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PWR_PUCRx and PWR_PDCRx registers are applied in Standby and Shutdown modes. 529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Pull-up set by PUy bit of PWR_PUCRx register is not activated if the corresponding 530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PDy bit of PWR_PDCRx register is also set (pull-down configuration priority is higher). 531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() API's ensure there 532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * is no conflict when setting PUy or PDy bit. 533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnablePullUpPullDownConfig(void) 536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1057 .loc 1 536 1 is_stmt 1 view -0 1058 .cfi_startproc 1059 @ args = 0, pretend = 0, frame = 0 ARM GAS /tmp/cchjGo05.s page 30 1060 @ frame_needed = 0, uses_anonymous_args = 0 1061 @ link register save eliminated. 537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR3, PWR_CR3_APC); 1062 .loc 1 537 3 view .LVU264 1063 0000 024A ldr r2, .L90 1064 0002 9368 ldr r3, [r2, #8] 1065 0004 43F48063 orr r3, r3, #1024 1066 0008 9360 str r3, [r2, #8] 538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1067 .loc 1 538 1 is_stmt 0 view .LVU265 1068 000a 7047 bx lr 1069 .L91: 1070 .align 2 1071 .L90: 1072 000c 00700040 .word 1073770496 1073 .cfi_endproc 1074 .LFE339: 1076 .section .text.HAL_PWREx_DisablePullUpPullDownConfig,"ax",%progbits 1077 .align 1 1078 .global HAL_PWREx_DisablePullUpPullDownConfig 1079 .syntax unified 1080 .thumb 1081 .thumb_func 1083 HAL_PWREx_DisablePullUpPullDownConfig: 1084 .LFB340: 539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable pull-up and pull-down configuration. 543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When APC bit is cleared, the I/O pull-up and pull-down configurations defined in 544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PWR_PUCRx and PWR_PDCRx registers are not applied in Standby and Shutdown modes. 545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisablePullUpPullDownConfig(void) 548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1085 .loc 1 548 1 is_stmt 1 view -0 1086 .cfi_startproc 1087 @ args = 0, pretend = 0, frame = 0 1088 @ frame_needed = 0, uses_anonymous_args = 0 1089 @ link register save eliminated. 549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR3, PWR_CR3_APC); 1090 .loc 1 549 3 view .LVU267 1091 0000 024A ldr r2, .L93 1092 0002 9368 ldr r3, [r2, #8] 1093 0004 23F48063 bic r3, r3, #1024 1094 0008 9360 str r3, [r2, #8] 550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1095 .loc 1 550 1 is_stmt 0 view .LVU268 1096 000a 7047 bx lr 1097 .L94: 1098 .align 2 1099 .L93: 1100 000c 00700040 .word 1073770496 1101 .cfi_endproc 1102 .LFE340: 1104 .section .text.HAL_PWREx_EnableSRAM2ContentRetention,"ax",%progbits 1105 .align 1 ARM GAS /tmp/cchjGo05.s page 31 1106 .global HAL_PWREx_EnableSRAM2ContentRetention 1107 .syntax unified 1108 .thumb 1109 .thumb_func 1111 HAL_PWREx_EnableSRAM2ContentRetention: 1112 .LFB341: 551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable SRAM2 content retention in Standby mode. 556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When RRS bit is set, SRAM2 is powered by the low-power regulator in 557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * Standby mode and its content is kept. 558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableSRAM2ContentRetention(void) 561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1113 .loc 1 561 1 is_stmt 1 view -0 1114 .cfi_startproc 1115 @ args = 0, pretend = 0, frame = 0 1116 @ frame_needed = 0, uses_anonymous_args = 0 1117 @ link register save eliminated. 562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR3, PWR_CR3_RRS); 1118 .loc 1 562 3 view .LVU270 1119 0000 024A ldr r2, .L96 1120 0002 9368 ldr r3, [r2, #8] 1121 0004 43F48073 orr r3, r3, #256 1122 0008 9360 str r3, [r2, #8] 563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1123 .loc 1 563 1 is_stmt 0 view .LVU271 1124 000a 7047 bx lr 1125 .L97: 1126 .align 2 1127 .L96: 1128 000c 00700040 .word 1073770496 1129 .cfi_endproc 1130 .LFE341: 1132 .section .text.HAL_PWREx_DisableSRAM2ContentRetention,"ax",%progbits 1133 .align 1 1134 .global HAL_PWREx_DisableSRAM2ContentRetention 1135 .syntax unified 1136 .thumb 1137 .thumb_func 1139 HAL_PWREx_DisableSRAM2ContentRetention: 1140 .LFB342: 564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable SRAM2 content retention in Standby mode. 568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When RRS bit is reset, SRAM2 is powered off in Standby mode 569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * and its content is lost. 570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableSRAM2ContentRetention(void) 573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1141 .loc 1 573 1 is_stmt 1 view -0 1142 .cfi_startproc ARM GAS /tmp/cchjGo05.s page 32 1143 @ args = 0, pretend = 0, frame = 0 1144 @ frame_needed = 0, uses_anonymous_args = 0 1145 @ link register save eliminated. 574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR3, PWR_CR3_RRS); 1146 .loc 1 574 3 view .LVU273 1147 0000 024A ldr r2, .L99 1148 0002 9368 ldr r3, [r2, #8] 1149 0004 23F48073 bic r3, r3, #256 1150 0008 9360 str r3, [r2, #8] 575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1151 .loc 1 575 1 is_stmt 0 view .LVU274 1152 000a 7047 bx lr 1153 .L100: 1154 .align 2 1155 .L99: 1156 000c 00700040 .word 1073770496 1157 .cfi_endproc 1158 .LFE342: 1160 .section .text.HAL_PWREx_EnablePVM1,"ax",%progbits 1161 .align 1 1162 .global HAL_PWREx_EnablePVM1 1163 .syntax unified 1164 .thumb 1165 .thumb_func 1167 HAL_PWREx_EnablePVM1: 1168 .LFB343: 576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME1) 581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable the Power Voltage Monitoring 1: VDDA versus FASTCOMP minimum voltage. 583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnablePVM1(void) 586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1169 .loc 1 586 1 is_stmt 1 view -0 1170 .cfi_startproc 1171 @ args = 0, pretend = 0, frame = 0 1172 @ frame_needed = 0, uses_anonymous_args = 0 1173 @ link register save eliminated. 587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR2, PWR_PVM_1); 1174 .loc 1 587 3 view .LVU276 1175 0000 024A ldr r2, .L102 1176 0002 5368 ldr r3, [r2, #4] 1177 0004 43F01003 orr r3, r3, #16 1178 0008 5360 str r3, [r2, #4] 588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1179 .loc 1 588 1 is_stmt 0 view .LVU277 1180 000a 7047 bx lr 1181 .L103: 1182 .align 2 1183 .L102: 1184 000c 00700040 .word 1073770496 1185 .cfi_endproc 1186 .LFE343: ARM GAS /tmp/cchjGo05.s page 33 1188 .section .text.HAL_PWREx_DisablePVM1,"ax",%progbits 1189 .align 1 1190 .global HAL_PWREx_DisablePVM1 1191 .syntax unified 1192 .thumb 1193 .thumb_func 1195 HAL_PWREx_DisablePVM1: 1196 .LFB344: 589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable the Power Voltage Monitoring 1: VDDA versus FASTCOMP minimum voltage. 592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisablePVM1(void) 595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1197 .loc 1 595 1 is_stmt 1 view -0 1198 .cfi_startproc 1199 @ args = 0, pretend = 0, frame = 0 1200 @ frame_needed = 0, uses_anonymous_args = 0 1201 @ link register save eliminated. 596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR2, PWR_PVM_1); 1202 .loc 1 596 3 view .LVU279 1203 0000 024A ldr r2, .L105 1204 0002 5368 ldr r3, [r2, #4] 1205 0004 23F01003 bic r3, r3, #16 1206 0008 5360 str r3, [r2, #4] 597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1207 .loc 1 597 1 is_stmt 0 view .LVU280 1208 000a 7047 bx lr 1209 .L106: 1210 .align 2 1211 .L105: 1212 000c 00700040 .word 1073770496 1213 .cfi_endproc 1214 .LFE344: 1216 .section .text.HAL_PWREx_EnablePVM2,"ax",%progbits 1217 .align 1 1218 .global HAL_PWREx_EnablePVM2 1219 .syntax unified 1220 .thumb 1221 .thumb_func 1223 HAL_PWREx_EnablePVM2: 1224 .LFB345: 598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME1 */ 599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME2) 602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable the Power Voltage Monitoring 2: VDDA versus FASTDAC minimum voltage. 604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnablePVM2(void) 607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1225 .loc 1 607 1 is_stmt 1 view -0 1226 .cfi_startproc 1227 @ args = 0, pretend = 0, frame = 0 1228 @ frame_needed = 0, uses_anonymous_args = 0 ARM GAS /tmp/cchjGo05.s page 34 1229 @ link register save eliminated. 608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR2, PWR_PVM_2); 1230 .loc 1 608 3 view .LVU282 1231 0000 024A ldr r2, .L108 1232 0002 5368 ldr r3, [r2, #4] 1233 0004 43F02003 orr r3, r3, #32 1234 0008 5360 str r3, [r2, #4] 609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1235 .loc 1 609 1 is_stmt 0 view .LVU283 1236 000a 7047 bx lr 1237 .L109: 1238 .align 2 1239 .L108: 1240 000c 00700040 .word 1073770496 1241 .cfi_endproc 1242 .LFE345: 1244 .section .text.HAL_PWREx_DisablePVM2,"ax",%progbits 1245 .align 1 1246 .global HAL_PWREx_DisablePVM2 1247 .syntax unified 1248 .thumb 1249 .thumb_func 1251 HAL_PWREx_DisablePVM2: 1252 .LFB346: 610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable the Power Voltage Monitoring 2: VDDA versus FASTDAC minimum voltage. 613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisablePVM2(void) 616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1253 .loc 1 616 1 is_stmt 1 view -0 1254 .cfi_startproc 1255 @ args = 0, pretend = 0, frame = 0 1256 @ frame_needed = 0, uses_anonymous_args = 0 1257 @ link register save eliminated. 617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR2, PWR_PVM_2); 1258 .loc 1 617 3 view .LVU285 1259 0000 024A ldr r2, .L111 1260 0002 5368 ldr r3, [r2, #4] 1261 0004 23F02003 bic r3, r3, #32 1262 0008 5360 str r3, [r2, #4] 618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1263 .loc 1 618 1 is_stmt 0 view .LVU286 1264 000a 7047 bx lr 1265 .L112: 1266 .align 2 1267 .L111: 1268 000c 00700040 .word 1073770496 1269 .cfi_endproc 1270 .LFE346: 1272 .section .text.HAL_PWREx_EnablePVM3,"ax",%progbits 1273 .align 1 1274 .global HAL_PWREx_EnablePVM3 1275 .syntax unified 1276 .thumb 1277 .thumb_func ARM GAS /tmp/cchjGo05.s page 35 1279 HAL_PWREx_EnablePVM3: 1280 .LFB347: 619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME2 */ 620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable the Power Voltage Monitoring 3: VDDA versus ADC minimum voltage 1.62V. 624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnablePVM3(void) 627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1281 .loc 1 627 1 is_stmt 1 view -0 1282 .cfi_startproc 1283 @ args = 0, pretend = 0, frame = 0 1284 @ frame_needed = 0, uses_anonymous_args = 0 1285 @ link register save eliminated. 628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR2, PWR_PVM_3); 1286 .loc 1 628 3 view .LVU288 1287 0000 024A ldr r2, .L114 1288 0002 5368 ldr r3, [r2, #4] 1289 0004 43F04003 orr r3, r3, #64 1290 0008 5360 str r3, [r2, #4] 629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1291 .loc 1 629 1 is_stmt 0 view .LVU289 1292 000a 7047 bx lr 1293 .L115: 1294 .align 2 1295 .L114: 1296 000c 00700040 .word 1073770496 1297 .cfi_endproc 1298 .LFE347: 1300 .section .text.HAL_PWREx_DisablePVM3,"ax",%progbits 1301 .align 1 1302 .global HAL_PWREx_DisablePVM3 1303 .syntax unified 1304 .thumb 1305 .thumb_func 1307 HAL_PWREx_DisablePVM3: 1308 .LFB348: 630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable the Power Voltage Monitoring 3: VDDA versus ADC minimum voltage 1.62V. 633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisablePVM3(void) 636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1309 .loc 1 636 1 is_stmt 1 view -0 1310 .cfi_startproc 1311 @ args = 0, pretend = 0, frame = 0 1312 @ frame_needed = 0, uses_anonymous_args = 0 1313 @ link register save eliminated. 637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR2, PWR_PVM_3); 1314 .loc 1 637 3 view .LVU291 1315 0000 024A ldr r2, .L117 1316 0002 5368 ldr r3, [r2, #4] 1317 0004 23F04003 bic r3, r3, #64 1318 0008 5360 str r3, [r2, #4] ARM GAS /tmp/cchjGo05.s page 36 638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1319 .loc 1 638 1 is_stmt 0 view .LVU292 1320 000a 7047 bx lr 1321 .L118: 1322 .align 2 1323 .L117: 1324 000c 00700040 .word 1073770496 1325 .cfi_endproc 1326 .LFE348: 1328 .section .text.HAL_PWREx_EnablePVM4,"ax",%progbits 1329 .align 1 1330 .global HAL_PWREx_EnablePVM4 1331 .syntax unified 1332 .thumb 1333 .thumb_func 1335 HAL_PWREx_EnablePVM4: 1336 .LFB349: 639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable the Power Voltage Monitoring 4: VDDA versus OPAMP/DAC minimum voltage 1.8V. 643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnablePVM4(void) 646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1337 .loc 1 646 1 is_stmt 1 view -0 1338 .cfi_startproc 1339 @ args = 0, pretend = 0, frame = 0 1340 @ frame_needed = 0, uses_anonymous_args = 0 1341 @ link register save eliminated. 647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR2, PWR_PVM_4); 1342 .loc 1 647 3 view .LVU294 1343 0000 024A ldr r2, .L120 1344 0002 5368 ldr r3, [r2, #4] 1345 0004 43F08003 orr r3, r3, #128 1346 0008 5360 str r3, [r2, #4] 648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1347 .loc 1 648 1 is_stmt 0 view .LVU295 1348 000a 7047 bx lr 1349 .L121: 1350 .align 2 1351 .L120: 1352 000c 00700040 .word 1073770496 1353 .cfi_endproc 1354 .LFE349: 1356 .section .text.HAL_PWREx_DisablePVM4,"ax",%progbits 1357 .align 1 1358 .global HAL_PWREx_DisablePVM4 1359 .syntax unified 1360 .thumb 1361 .thumb_func 1363 HAL_PWREx_DisablePVM4: 1364 .LFB350: 649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable the Power Voltage Monitoring 4: VDDA versus OPAMP/DAC minimum voltage 1.8V. 652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None ARM GAS /tmp/cchjGo05.s page 37 653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisablePVM4(void) 655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1365 .loc 1 655 1 is_stmt 1 view -0 1366 .cfi_startproc 1367 @ args = 0, pretend = 0, frame = 0 1368 @ frame_needed = 0, uses_anonymous_args = 0 1369 @ link register save eliminated. 656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR2, PWR_PVM_4); 1370 .loc 1 656 3 view .LVU297 1371 0000 024A ldr r2, .L123 1372 0002 5368 ldr r3, [r2, #4] 1373 0004 23F08003 bic r3, r3, #128 1374 0008 5360 str r3, [r2, #4] 657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1375 .loc 1 657 1 is_stmt 0 view .LVU298 1376 000a 7047 bx lr 1377 .L124: 1378 .align 2 1379 .L123: 1380 000c 00700040 .word 1073770496 1381 .cfi_endproc 1382 .LFE350: 1384 .section .text.HAL_PWREx_ConfigPVM,"ax",%progbits 1385 .align 1 1386 .global HAL_PWREx_ConfigPVM 1387 .syntax unified 1388 .thumb 1389 .thumb_func 1391 HAL_PWREx_ConfigPVM: 1392 .LVL98: 1393 .LFB351: 658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Configure the Peripheral Voltage Monitoring (PVM). 664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param sConfigPVM: pointer to a PWR_PVMTypeDef structure that contains the 665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PVM configuration information. 666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note The API configures a single PVM according to the information contained 667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * in the input structure. To configure several PVMs, the API must be singly 668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * called for each PVM used. 669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Refer to the electrical characteristics of your device datasheet for 670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * more details about the voltage thresholds corresponding to each 671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * detection level and to each monitored supply. 672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL status 673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM) 675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1394 .loc 1 675 1 is_stmt 1 view -0 1395 .cfi_startproc 1396 @ args = 0, pretend = 0, frame = 0 1397 @ frame_needed = 0, uses_anonymous_args = 0 1398 @ link register save eliminated. 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK; 1399 .loc 1 676 3 view .LVU300 ARM GAS /tmp/cchjGo05.s page 38 677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Check the parameters */ 679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVM_TYPE(sConfigPVM->PVMType)); 1400 .loc 1 679 3 view .LVU301 680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVM_MODE(sConfigPVM->Mode)); 1401 .loc 1 680 3 view .LVU302 681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure EXTI 35 to 38 interrupts if so required: 684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** scan through PVMType to detect which PVMx is set and 685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** configure the corresponding EXTI line accordingly. */ 686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** switch (sConfigPVM->PVMType) 1402 .loc 1 686 3 view .LVU303 1403 .loc 1 686 21 is_stmt 0 view .LVU304 1404 0000 0368 ldr r3, [r0] 1405 .loc 1 686 3 view .LVU305 1406 0002 402B cmp r3, #64 1407 0004 00F0B180 beq .L126 1408 0008 3DD8 bhi .L127 1409 000a 102B cmp r3, #16 1410 000c 76D0 beq .L128 1411 000e 202B cmp r3, #32 1412 0010 37D1 bne .L148 687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME1) 689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_PVM_1: 690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */ 691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_DISABLE_EVENT(); 692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_DISABLE_IT(); 693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE(); 694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE(); 695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure interrupt mode */ 697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT) 698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_ENABLE_IT(); 700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure event mode */ 703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT) 704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_ENABLE_EVENT(); 706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure the edge */ 709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE) 710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE(); 712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE) 715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE(); 717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME1 */ 720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ARM GAS /tmp/cchjGo05.s page 39 721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME2) 722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_PVM_2: 723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */ 724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_DISABLE_EVENT(); 1413 .loc 1 724 7 is_stmt 1 view .LVU306 1414 0012 754B ldr r3, .L150 1415 0014 5A6A ldr r2, [r3, #36] 1416 0016 22F01002 bic r2, r2, #16 1417 001a 5A62 str r2, [r3, #36] 725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_DISABLE_IT(); 1418 .loc 1 725 7 view .LVU307 1419 001c 1A6A ldr r2, [r3, #32] 1420 001e 22F01002 bic r2, r2, #16 1421 0022 1A62 str r2, [r3, #32] 726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE(); 1422 .loc 1 726 7 view .LVU308 1423 0024 DA6A ldr r2, [r3, #44] 1424 0026 22F01002 bic r2, r2, #16 1425 002a DA62 str r2, [r3, #44] 727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE(); 1426 .loc 1 727 7 view .LVU309 1427 002c 9A6A ldr r2, [r3, #40] 1428 002e 22F01002 bic r2, r2, #16 1429 0032 9A62 str r2, [r3, #40] 728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure interrupt mode */ 730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT) 1430 .loc 1 730 7 view .LVU310 1431 .loc 1 730 21 is_stmt 0 view .LVU311 1432 0034 4368 ldr r3, [r0, #4] 1433 .loc 1 730 9 view .LVU312 1434 0036 13F4803F tst r3, #65536 1435 003a 04D0 beq .L135 731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_ENABLE_IT(); 1436 .loc 1 732 9 is_stmt 1 view .LVU313 1437 003c 6A4A ldr r2, .L150 1438 003e 136A ldr r3, [r2, #32] 1439 0040 43F01003 orr r3, r3, #16 1440 0044 1362 str r3, [r2, #32] 1441 .L135: 733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure event mode */ 736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT) 1442 .loc 1 736 7 view .LVU314 1443 .loc 1 736 21 is_stmt 0 view .LVU315 1444 0046 4368 ldr r3, [r0, #4] 1445 .loc 1 736 9 view .LVU316 1446 0048 13F4003F tst r3, #131072 1447 004c 04D0 beq .L136 737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_ENABLE_EVENT(); 1448 .loc 1 738 9 is_stmt 1 view .LVU317 1449 004e 664A ldr r2, .L150 1450 0050 536A ldr r3, [r2, #36] 1451 0052 43F01003 orr r3, r3, #16 ARM GAS /tmp/cchjGo05.s page 40 1452 0056 5362 str r3, [r2, #36] 1453 .L136: 739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure the edge */ 742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE) 1454 .loc 1 742 7 view .LVU318 1455 .loc 1 742 21 is_stmt 0 view .LVU319 1456 0058 4368 ldr r3, [r0, #4] 1457 .loc 1 742 9 view .LVU320 1458 005a 13F0010F tst r3, #1 1459 005e 04D0 beq .L137 743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE(); 1460 .loc 1 744 9 is_stmt 1 view .LVU321 1461 0060 614A ldr r2, .L150 1462 0062 936A ldr r3, [r2, #40] 1463 0064 43F01003 orr r3, r3, #16 1464 0068 9362 str r3, [r2, #40] 1465 .L137: 745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE) 1466 .loc 1 747 7 view .LVU322 1467 .loc 1 747 21 is_stmt 0 view .LVU323 1468 006a 4368 ldr r3, [r0, #4] 1469 .loc 1 747 9 view .LVU324 1470 006c 13F0020F tst r3, #2 1471 0070 00F0B480 beq .L145 748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE(); 1472 .loc 1 749 9 is_stmt 1 view .LVU325 1473 0074 5C4A ldr r2, .L150 1474 0076 D36A ldr r3, [r2, #44] 1475 0078 43F01003 orr r3, r3, #16 1476 007c D362 str r3, [r2, #44] 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1477 .loc 1 676 21 is_stmt 0 view .LVU326 1478 007e 0020 movs r0, #0 1479 .LVL99: 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1480 .loc 1 676 21 view .LVU327 1481 0080 7047 bx lr 1482 .LVL100: 1483 .L148: 686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1484 .loc 1 686 3 view .LVU328 1485 0082 0120 movs r0, #1 1486 .LVL101: 686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1487 .loc 1 686 3 view .LVU329 1488 0084 7047 bx lr 1489 .LVL102: 1490 .L127: 686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1491 .loc 1 686 3 view .LVU330 1492 0086 802B cmp r3, #128 ARM GAS /tmp/cchjGo05.s page 41 1493 0088 36D1 bne .L149 750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME2 */ 753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_PVM_3: 755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */ 756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_DISABLE_EVENT(); 757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_DISABLE_IT(); 758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE(); 759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE(); 760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure interrupt mode */ 762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT) 763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_ENABLE_IT(); 765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure event mode */ 768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT) 769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_ENABLE_EVENT(); 771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure the edge */ 774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE) 775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE(); 777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE) 780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE(); 782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_PVM_4: 786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */ 787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_DISABLE_EVENT(); 1494 .loc 1 787 7 is_stmt 1 view .LVU331 1495 008a 574B ldr r3, .L150 1496 008c 5A6A ldr r2, [r3, #36] 1497 008e 22F04002 bic r2, r2, #64 1498 0092 5A62 str r2, [r3, #36] 788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_DISABLE_IT(); 1499 .loc 1 788 7 view .LVU332 1500 0094 1A6A ldr r2, [r3, #32] 1501 0096 22F04002 bic r2, r2, #64 1502 009a 1A62 str r2, [r3, #32] 789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE(); 1503 .loc 1 789 7 view .LVU333 1504 009c DA6A ldr r2, [r3, #44] 1505 009e 22F04002 bic r2, r2, #64 1506 00a2 DA62 str r2, [r3, #44] 790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE(); 1507 .loc 1 790 7 view .LVU334 1508 00a4 9A6A ldr r2, [r3, #40] ARM GAS /tmp/cchjGo05.s page 42 1509 00a6 22F04002 bic r2, r2, #64 1510 00aa 9A62 str r2, [r3, #40] 791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure interrupt mode */ 793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT) 1511 .loc 1 793 7 view .LVU335 1512 .loc 1 793 21 is_stmt 0 view .LVU336 1513 00ac 4368 ldr r3, [r0, #4] 1514 .loc 1 793 9 view .LVU337 1515 00ae 13F4803F tst r3, #65536 1516 00b2 04D0 beq .L141 794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_ENABLE_IT(); 1517 .loc 1 795 9 is_stmt 1 view .LVU338 1518 00b4 4C4A ldr r2, .L150 1519 00b6 136A ldr r3, [r2, #32] 1520 00b8 43F04003 orr r3, r3, #64 1521 00bc 1362 str r3, [r2, #32] 1522 .L141: 796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure event mode */ 799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT) 1523 .loc 1 799 7 view .LVU339 1524 .loc 1 799 21 is_stmt 0 view .LVU340 1525 00be 4368 ldr r3, [r0, #4] 1526 .loc 1 799 9 view .LVU341 1527 00c0 13F4003F tst r3, #131072 1528 00c4 04D0 beq .L142 800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_ENABLE_EVENT(); 1529 .loc 1 801 9 is_stmt 1 view .LVU342 1530 00c6 484A ldr r2, .L150 1531 00c8 536A ldr r3, [r2, #36] 1532 00ca 43F04003 orr r3, r3, #64 1533 00ce 5362 str r3, [r2, #36] 1534 .L142: 802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure the edge */ 805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE) 1535 .loc 1 805 7 view .LVU343 1536 .loc 1 805 21 is_stmt 0 view .LVU344 1537 00d0 4368 ldr r3, [r0, #4] 1538 .loc 1 805 9 view .LVU345 1539 00d2 13F0010F tst r3, #1 1540 00d6 04D0 beq .L143 806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE(); 1541 .loc 1 807 9 is_stmt 1 view .LVU346 1542 00d8 434A ldr r2, .L150 1543 00da 936A ldr r3, [r2, #40] 1544 00dc 43F04003 orr r3, r3, #64 1545 00e0 9362 str r3, [r2, #40] 1546 .L143: 808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ARM GAS /tmp/cchjGo05.s page 43 810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE) 1547 .loc 1 810 7 view .LVU347 1548 .loc 1 810 21 is_stmt 0 view .LVU348 1549 00e2 4368 ldr r3, [r0, #4] 1550 .loc 1 810 9 view .LVU349 1551 00e4 13F0020F tst r3, #2 1552 00e8 7CD0 beq .L147 811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE(); 1553 .loc 1 812 9 is_stmt 1 view .LVU350 1554 00ea 3F4A ldr r2, .L150 1555 00ec D36A ldr r3, [r2, #44] 1556 00ee 43F04003 orr r3, r3, #64 1557 00f2 D362 str r3, [r2, #44] 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1558 .loc 1 676 21 is_stmt 0 view .LVU351 1559 00f4 0020 movs r0, #0 1560 .LVL103: 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1561 .loc 1 676 21 view .LVU352 1562 00f6 7047 bx lr 1563 .LVL104: 1564 .L149: 686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1565 .loc 1 686 3 view .LVU353 1566 00f8 0120 movs r0, #1 1567 .LVL105: 686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1568 .loc 1 686 3 view .LVU354 1569 00fa 7047 bx lr 1570 .LVL106: 1571 .L128: 691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_DISABLE_IT(); 1572 .loc 1 691 7 is_stmt 1 view .LVU355 1573 00fc 3A4B ldr r3, .L150 1574 00fe 5A6A ldr r2, [r3, #36] 1575 0100 22F00802 bic r2, r2, #8 1576 0104 5A62 str r2, [r3, #36] 692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE(); 1577 .loc 1 692 7 view .LVU356 1578 0106 1A6A ldr r2, [r3, #32] 1579 0108 22F00802 bic r2, r2, #8 1580 010c 1A62 str r2, [r3, #32] 693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE(); 1581 .loc 1 693 7 view .LVU357 1582 010e DA6A ldr r2, [r3, #44] 1583 0110 22F00802 bic r2, r2, #8 1584 0114 DA62 str r2, [r3, #44] 694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1585 .loc 1 694 7 view .LVU358 1586 0116 9A6A ldr r2, [r3, #40] 1587 0118 22F00802 bic r2, r2, #8 1588 011c 9A62 str r2, [r3, #40] 697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1589 .loc 1 697 7 view .LVU359 697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1590 .loc 1 697 21 is_stmt 0 view .LVU360 ARM GAS /tmp/cchjGo05.s page 44 1591 011e 4368 ldr r3, [r0, #4] 697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1592 .loc 1 697 9 view .LVU361 1593 0120 13F4803F tst r3, #65536 1594 0124 04D0 beq .L132 699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1595 .loc 1 699 9 is_stmt 1 view .LVU362 1596 0126 304A ldr r2, .L150 1597 0128 136A ldr r3, [r2, #32] 1598 012a 43F00803 orr r3, r3, #8 1599 012e 1362 str r3, [r2, #32] 1600 .L132: 703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1601 .loc 1 703 7 view .LVU363 703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1602 .loc 1 703 21 is_stmt 0 view .LVU364 1603 0130 4368 ldr r3, [r0, #4] 703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1604 .loc 1 703 9 view .LVU365 1605 0132 13F4003F tst r3, #131072 1606 0136 04D0 beq .L133 705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1607 .loc 1 705 9 is_stmt 1 view .LVU366 1608 0138 2B4A ldr r2, .L150 1609 013a 536A ldr r3, [r2, #36] 1610 013c 43F00803 orr r3, r3, #8 1611 0140 5362 str r3, [r2, #36] 1612 .L133: 709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1613 .loc 1 709 7 view .LVU367 709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1614 .loc 1 709 21 is_stmt 0 view .LVU368 1615 0142 4368 ldr r3, [r0, #4] 709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1616 .loc 1 709 9 view .LVU369 1617 0144 13F0010F tst r3, #1 1618 0148 04D0 beq .L134 711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1619 .loc 1 711 9 is_stmt 1 view .LVU370 1620 014a 274A ldr r2, .L150 1621 014c 936A ldr r3, [r2, #40] 1622 014e 43F00803 orr r3, r3, #8 1623 0152 9362 str r3, [r2, #40] 1624 .L134: 714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1625 .loc 1 714 7 view .LVU371 714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1626 .loc 1 714 21 is_stmt 0 view .LVU372 1627 0154 4368 ldr r3, [r0, #4] 714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1628 .loc 1 714 9 view .LVU373 1629 0156 13F0020F tst r3, #2 1630 015a 3DD0 beq .L144 716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1631 .loc 1 716 9 is_stmt 1 view .LVU374 1632 015c 224A ldr r2, .L150 1633 015e D36A ldr r3, [r2, #44] ARM GAS /tmp/cchjGo05.s page 45 1634 0160 43F00803 orr r3, r3, #8 1635 0164 D362 str r3, [r2, #44] 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1636 .loc 1 676 21 is_stmt 0 view .LVU375 1637 0166 0020 movs r0, #0 1638 .LVL107: 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1639 .loc 1 676 21 view .LVU376 1640 0168 7047 bx lr 1641 .LVL108: 1642 .L126: 756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_DISABLE_IT(); 1643 .loc 1 756 7 is_stmt 1 view .LVU377 1644 016a 1F4B ldr r3, .L150 1645 016c 5A6A ldr r2, [r3, #36] 1646 016e 22F02002 bic r2, r2, #32 1647 0172 5A62 str r2, [r3, #36] 757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE(); 1648 .loc 1 757 7 view .LVU378 1649 0174 1A6A ldr r2, [r3, #32] 1650 0176 22F02002 bic r2, r2, #32 1651 017a 1A62 str r2, [r3, #32] 758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE(); 1652 .loc 1 758 7 view .LVU379 1653 017c DA6A ldr r2, [r3, #44] 1654 017e 22F02002 bic r2, r2, #32 1655 0182 DA62 str r2, [r3, #44] 759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1656 .loc 1 759 7 view .LVU380 1657 0184 9A6A ldr r2, [r3, #40] 1658 0186 22F02002 bic r2, r2, #32 1659 018a 9A62 str r2, [r3, #40] 762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1660 .loc 1 762 7 view .LVU381 762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1661 .loc 1 762 21 is_stmt 0 view .LVU382 1662 018c 4368 ldr r3, [r0, #4] 762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1663 .loc 1 762 9 view .LVU383 1664 018e 13F4803F tst r3, #65536 1665 0192 04D0 beq .L138 764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1666 .loc 1 764 9 is_stmt 1 view .LVU384 1667 0194 144A ldr r2, .L150 1668 0196 136A ldr r3, [r2, #32] 1669 0198 43F02003 orr r3, r3, #32 1670 019c 1362 str r3, [r2, #32] 1671 .L138: 768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1672 .loc 1 768 7 view .LVU385 768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1673 .loc 1 768 21 is_stmt 0 view .LVU386 1674 019e 4368 ldr r3, [r0, #4] 768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1675 .loc 1 768 9 view .LVU387 1676 01a0 13F4003F tst r3, #131072 1677 01a4 04D0 beq .L139 ARM GAS /tmp/cchjGo05.s page 46 770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1678 .loc 1 770 9 is_stmt 1 view .LVU388 1679 01a6 104A ldr r2, .L150 1680 01a8 536A ldr r3, [r2, #36] 1681 01aa 43F02003 orr r3, r3, #32 1682 01ae 5362 str r3, [r2, #36] 1683 .L139: 774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1684 .loc 1 774 7 view .LVU389 774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1685 .loc 1 774 21 is_stmt 0 view .LVU390 1686 01b0 4368 ldr r3, [r0, #4] 774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1687 .loc 1 774 9 view .LVU391 1688 01b2 13F0010F tst r3, #1 1689 01b6 04D0 beq .L140 776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1690 .loc 1 776 9 is_stmt 1 view .LVU392 1691 01b8 0B4A ldr r2, .L150 1692 01ba 936A ldr r3, [r2, #40] 1693 01bc 43F02003 orr r3, r3, #32 1694 01c0 9362 str r3, [r2, #40] 1695 .L140: 779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1696 .loc 1 779 7 view .LVU393 779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1697 .loc 1 779 21 is_stmt 0 view .LVU394 1698 01c2 4368 ldr r3, [r0, #4] 779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1699 .loc 1 779 9 view .LVU395 1700 01c4 13F0020F tst r3, #2 1701 01c8 0AD0 beq .L146 781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1702 .loc 1 781 9 is_stmt 1 view .LVU396 1703 01ca 074A ldr r2, .L150 1704 01cc D36A ldr r3, [r2, #44] 1705 01ce 43F02003 orr r3, r3, #32 1706 01d2 D362 str r3, [r2, #44] 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1707 .loc 1 676 21 is_stmt 0 view .LVU397 1708 01d4 0020 movs r0, #0 1709 .LVL109: 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1710 .loc 1 676 21 view .LVU398 1711 01d6 7047 bx lr 1712 .LVL110: 1713 .L144: 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1714 .loc 1 676 21 view .LVU399 1715 01d8 0020 movs r0, #0 1716 .LVL111: 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1717 .loc 1 676 21 view .LVU400 1718 01da 7047 bx lr 1719 .LVL112: 1720 .L145: 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ARM GAS /tmp/cchjGo05.s page 47 1721 .loc 1 676 21 view .LVU401 1722 01dc 0020 movs r0, #0 1723 .LVL113: 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1724 .loc 1 676 21 view .LVU402 1725 01de 7047 bx lr 1726 .LVL114: 1727 .L146: 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1728 .loc 1 676 21 view .LVU403 1729 01e0 0020 movs r0, #0 1730 .LVL115: 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1731 .loc 1 676 21 view .LVU404 1732 01e2 7047 bx lr 1733 .LVL116: 1734 .L147: 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1735 .loc 1 676 21 view .LVU405 1736 01e4 0020 movs r0, #0 1737 .LVL117: 813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** default: 817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** status = HAL_ERROR; 818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break; 819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return status; 1738 .loc 1 821 3 is_stmt 1 view .LVU406 822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1739 .loc 1 822 1 is_stmt 0 view .LVU407 1740 01e6 7047 bx lr 1741 .L151: 1742 .align 2 1743 .L150: 1744 01e8 00040140 .word 1073808384 1745 .cfi_endproc 1746 .LFE351: 1748 .section .text.HAL_PWREx_EnableLowPowerRunMode,"ax",%progbits 1749 .align 1 1750 .global HAL_PWREx_EnableLowPowerRunMode 1751 .syntax unified 1752 .thumb 1753 .thumb_func 1755 HAL_PWREx_EnableLowPowerRunMode: 1756 .LFB352: 823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enter Low-power Run mode 827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note In Low-power Run mode, all I/O pins keep the same state as in Run mode. 828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When Regulator is set to PWR_LOWPOWERREGULATOR_ON, the user can optionally configure the 829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * Flash in power-down monde in setting the RUN_PD bit in FLASH_ACR register. 830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * Additionally, the clock frequency must be reduced below 2 MHz. 831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * Setting RUN_PD in FLASH_ACR then appropriately reducing the clock frequency must ARM GAS /tmp/cchjGo05.s page 48 832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * be done before calling HAL_PWREx_EnableLowPowerRunMode() API. 833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableLowPowerRunMode(void) 836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1757 .loc 1 836 1 is_stmt 1 view -0 1758 .cfi_startproc 1759 @ args = 0, pretend = 0, frame = 0 1760 @ frame_needed = 0, uses_anonymous_args = 0 1761 @ link register save eliminated. 837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set Regulator parameter */ 838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR1, PWR_CR1_LPR); 1762 .loc 1 838 3 view .LVU409 1763 0000 024A ldr r2, .L153 1764 0002 1368 ldr r3, [r2] 1765 0004 43F48043 orr r3, r3, #16384 1766 0008 1360 str r3, [r2] 839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1767 .loc 1 839 1 is_stmt 0 view .LVU410 1768 000a 7047 bx lr 1769 .L154: 1770 .align 2 1771 .L153: 1772 000c 00700040 .word 1073770496 1773 .cfi_endproc 1774 .LFE352: 1776 .section .text.HAL_PWREx_DisableLowPowerRunMode,"ax",%progbits 1777 .align 1 1778 .global HAL_PWREx_DisableLowPowerRunMode 1779 .syntax unified 1780 .thumb 1781 .thumb_func 1783 HAL_PWREx_DisableLowPowerRunMode: 1784 .LFB353: 840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Exit Low-power Run mode. 844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Before HAL_PWREx_DisableLowPowerRunMode() completion, the function checks that 845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * REGLPF has been properly reset (otherwise, HAL_PWREx_DisableLowPowerRunMode 846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * returns HAL_TIMEOUT status). The system clock frequency can then be 847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * increased above 2 MHz. 848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL Status 849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void) 851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1785 .loc 1 851 1 is_stmt 1 view -0 1786 .cfi_startproc 1787 @ args = 0, pretend = 0, frame = 0 1788 @ frame_needed = 0, uses_anonymous_args = 0 1789 @ link register save eliminated. 852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** uint32_t wait_loop_index; 1790 .loc 1 852 3 view .LVU412 853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear LPR bit */ 855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR1, PWR_CR1_LPR); 1791 .loc 1 855 3 view .LVU413 ARM GAS /tmp/cchjGo05.s page 49 1792 0000 124A ldr r2, .L161 1793 0002 1368 ldr r3, [r2] 1794 0004 23F48043 bic r3, r3, #16384 1795 0008 1360 str r3, [r2] 856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Wait until REGLPF is reset */ 858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000U)); 1796 .loc 1 858 3 view .LVU414 1797 .loc 1 858 67 is_stmt 0 view .LVU415 1798 000a 114B ldr r3, .L161+4 1799 000c 1B68 ldr r3, [r3] 1800 000e 02F14672 add r2, r2, #51904512 1801 0012 02F55B32 add r2, r2, #224256 1802 0016 02F28322 addw r2, r2, #643 1803 001a A2FB0323 umull r2, r3, r2, r3 1804 001e 9B0C lsrs r3, r3, #18 1805 .loc 1 858 19 view .LVU416 1806 0020 3222 movs r2, #50 1807 0022 02FB03F3 mul r3, r2, r3 1808 .LVL118: 859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) && (wait_loop_index != 0U)) 1809 .loc 1 859 3 is_stmt 1 view .LVU417 1810 .loc 1 859 9 is_stmt 0 view .LVU418 1811 0026 00E0 b .L156 1812 .L158: 860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** wait_loop_index--; 1813 .loc 1 861 5 is_stmt 1 view .LVU419 1814 .loc 1 861 20 is_stmt 0 view .LVU420 1815 0028 013B subs r3, r3, #1 1816 .LVL119: 1817 .L156: 859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) && (wait_loop_index != 0U)) 1818 .loc 1 859 53 is_stmt 1 view .LVU421 859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) && (wait_loop_index != 0U)) 1819 .loc 1 859 11 is_stmt 0 view .LVU422 1820 002a 084A ldr r2, .L161 1821 002c 5269 ldr r2, [r2, #20] 859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) && (wait_loop_index != 0U)) 1822 .loc 1 859 53 view .LVU423 1823 002e 12F4007F tst r2, #512 1824 0032 01D0 beq .L157 859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) && (wait_loop_index != 0U)) 1825 .loc 1 859 53 discriminator 1 view .LVU424 1826 0034 002B cmp r3, #0 1827 0036 F7D1 bne .L158 1828 .L157: 862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) 1829 .loc 1 863 3 is_stmt 1 view .LVU425 1830 .loc 1 863 7 is_stmt 0 view .LVU426 1831 0038 044B ldr r3, .L161 1832 .LVL120: 1833 .loc 1 863 7 view .LVU427 1834 003a 5B69 ldr r3, [r3, #20] 1835 .loc 1 863 6 view .LVU428 1836 003c 13F4007F tst r3, #512 ARM GAS /tmp/cchjGo05.s page 50 1837 0040 01D1 bne .L160 864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return HAL_OK; 1838 .loc 1 868 10 view .LVU429 1839 0042 0020 movs r0, #0 1840 0044 7047 bx lr 1841 .L160: 865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1842 .loc 1 865 12 view .LVU430 1843 0046 0320 movs r0, #3 869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1844 .loc 1 869 1 view .LVU431 1845 0048 7047 bx lr 1846 .L162: 1847 004a 00BF .align 2 1848 .L161: 1849 004c 00700040 .word 1073770496 1850 0050 00000000 .word SystemCoreClock 1851 .cfi_endproc 1852 .LFE353: 1854 .section .text.HAL_PWREx_EnterSTOP0Mode,"ax",%progbits 1855 .align 1 1856 .global HAL_PWREx_EnterSTOP0Mode 1857 .syntax unified 1858 .thumb 1859 .thumb_func 1861 HAL_PWREx_EnterSTOP0Mode: 1862 .LVL121: 1863 .LFB354: 870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enter Stop 0 mode. 874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note In Stop 0 mode, main and low voltage regulators are ON. 875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note In Stop 0 mode, all I/O pins keep the same state as in Run mode. 876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note All clocks in the VCORE domain are stopped; the PLL, the HSI 877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * and the HSE oscillators are disabled. Some peripherals with the wakeup capability 878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the H 879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is pr 880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * only to the peripheral requesting it. 881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * SRAM1, SRAM2 and register contents are preserved. 882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * The BOR is available. 883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When exiting Stop 0 mode by issuing an interrupt or a wakeup event, 884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register 885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * is set; the HSI oscillator is selected if STOPWUCK is cleared. 886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note By keeping the internal regulator ON during Stop 0 mode, the consumption 887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * is higher although the startup time is reduced. 888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param STOPEntry specifies if Stop mode in entered with WFI or WFE instruction. 889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values: 890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_STOPENTRY_WFI Enter Stop mode with WFI instruction 891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_STOPENTRY_WFE Enter Stop mode with WFE instruction 892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnterSTOP0Mode(uint8_t STOPEntry) ARM GAS /tmp/cchjGo05.s page 51 895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1864 .loc 1 895 1 is_stmt 1 view -0 1865 .cfi_startproc 1866 @ args = 0, pretend = 0, frame = 0 1867 @ frame_needed = 0, uses_anonymous_args = 0 1868 @ link register save eliminated. 896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Check the parameters */ 897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); 1869 .loc 1 897 3 view .LVU433 898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Stop 0 mode with Main Regulator */ 900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STOP0); 1870 .loc 1 900 3 view .LVU434 1871 0000 0B4A ldr r2, .L167 1872 0002 1368 ldr r3, [r2] 1873 0004 23F00703 bic r3, r3, #7 1874 0008 1360 str r3, [r2] 901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ 903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 1875 .loc 1 903 3 view .LVU435 1876 000a 0A4A ldr r2, .L167+4 1877 000c 1369 ldr r3, [r2, #16] 1878 000e 43F00403 orr r3, r3, #4 1879 0012 1361 str r3, [r2, #16] 904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Select Stop mode entry --------------------------------------------------*/ 906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if(STOPEntry == PWR_STOPENTRY_WFI) 1880 .loc 1 906 3 view .LVU436 1881 .loc 1 906 5 is_stmt 0 view .LVU437 1882 0014 0128 cmp r0, #1 1883 0016 08D0 beq .L166 907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Request Wait For Interrupt */ 909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFI(); 910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else 912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Request Wait For Event */ 914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __SEV(); 1884 .loc 1 914 5 is_stmt 1 view .LVU438 1885 .syntax unified 1886 @ 914 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 1887 0018 40BF sev 1888 @ 0 "" 2 915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFE(); 1889 .loc 1 915 5 view .LVU439 1890 @ 915 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 1891 001a 20BF wfe 1892 @ 0 "" 2 916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFE(); 1893 .loc 1 916 5 view .LVU440 1894 @ 916 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 1895 001c 20BF wfe 1896 @ 0 "" 2 1897 .thumb 1898 .syntax unified ARM GAS /tmp/cchjGo05.s page 52 1899 .L165: 917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Reset SLEEPDEEP bit of Cortex System Control Register */ 920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 1900 .loc 1 920 3 view .LVU441 1901 001e 054A ldr r2, .L167+4 1902 0020 1369 ldr r3, [r2, #16] 1903 0022 23F00403 bic r3, r3, #4 1904 0026 1361 str r3, [r2, #16] 921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1905 .loc 1 921 1 is_stmt 0 view .LVU442 1906 0028 7047 bx lr 1907 .L166: 909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1908 .loc 1 909 5 is_stmt 1 view .LVU443 1909 .syntax unified 1910 @ 909 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 1911 002a 30BF wfi 1912 @ 0 "" 2 1913 .thumb 1914 .syntax unified 1915 002c F7E7 b .L165 1916 .L168: 1917 002e 00BF .align 2 1918 .L167: 1919 0030 00700040 .word 1073770496 1920 0034 00ED00E0 .word -536810240 1921 .cfi_endproc 1922 .LFE354: 1924 .section .text.HAL_PWREx_EnterSTOP1Mode,"ax",%progbits 1925 .align 1 1926 .global HAL_PWREx_EnterSTOP1Mode 1927 .syntax unified 1928 .thumb 1929 .thumb_func 1931 HAL_PWREx_EnterSTOP1Mode: 1932 .LVL122: 1933 .LFB355: 922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enter Stop 1 mode. 926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note In Stop 1 mode, only low power voltage regulator is ON. 927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note In Stop 1 mode, all I/O pins keep the same state as in Run mode. 928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note All clocks in the VCORE domain are stopped; the PLL, the HSI 929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * and the HSE oscillators are disabled. Some peripherals with the wakeup capability 930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the H 931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is pr 932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * only to the peripheral requesting it. 933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * SRAM1, SRAM2 and register contents are preserved. 934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * The BOR is available. 935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When exiting Stop 1 mode by issuing an interrupt or a wakeup event, 936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register 937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * is set. 938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Due to low power mode, an additional startup delay is incurred when waking up from Stop 939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param STOPEntry specifies if Stop mode in entered with WFI or WFE instruction. ARM GAS /tmp/cchjGo05.s page 53 940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values: 941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_STOPENTRY_WFI Enter Stop mode with WFI instruction 942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_STOPENTRY_WFE Enter Stop mode with WFE instruction 943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnterSTOP1Mode(uint8_t STOPEntry) 946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1934 .loc 1 946 1 view -0 1935 .cfi_startproc 1936 @ args = 0, pretend = 0, frame = 0 1937 @ frame_needed = 0, uses_anonymous_args = 0 1938 @ link register save eliminated. 947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Check the parameters */ 948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); 1939 .loc 1 948 3 view .LVU445 949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Stop 1 mode with Low-Power Regulator */ 951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STOP1); 1940 .loc 1 951 3 view .LVU446 1941 0000 0C4A ldr r2, .L173 1942 0002 1368 ldr r3, [r2] 1943 0004 23F00703 bic r3, r3, #7 1944 0008 43F00103 orr r3, r3, #1 1945 000c 1360 str r3, [r2] 952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ 954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 1946 .loc 1 954 3 view .LVU447 1947 000e 0A4A ldr r2, .L173+4 1948 0010 1369 ldr r3, [r2, #16] 1949 0012 43F00403 orr r3, r3, #4 1950 0016 1361 str r3, [r2, #16] 955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Select Stop mode entry --------------------------------------------------*/ 957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if(STOPEntry == PWR_STOPENTRY_WFI) 1951 .loc 1 957 3 view .LVU448 1952 .loc 1 957 5 is_stmt 0 view .LVU449 1953 0018 0128 cmp r0, #1 1954 001a 08D0 beq .L172 958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Request Wait For Interrupt */ 960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFI(); 961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else 963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Request Wait For Event */ 965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __SEV(); 1955 .loc 1 965 5 is_stmt 1 view .LVU450 1956 .syntax unified 1957 @ 965 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 1958 001c 40BF sev 1959 @ 0 "" 2 966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFE(); 1960 .loc 1 966 5 view .LVU451 1961 @ 966 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 1962 001e 20BF wfe 1963 @ 0 "" 2 ARM GAS /tmp/cchjGo05.s page 54 967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFE(); 1964 .loc 1 967 5 view .LVU452 1965 @ 967 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 1966 0020 20BF wfe 1967 @ 0 "" 2 1968 .thumb 1969 .syntax unified 1970 .L171: 968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Reset SLEEPDEEP bit of Cortex System Control Register */ 971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 1971 .loc 1 971 3 view .LVU453 1972 0022 054A ldr r2, .L173+4 1973 0024 1369 ldr r3, [r2, #16] 1974 0026 23F00403 bic r3, r3, #4 1975 002a 1361 str r3, [r2, #16] 972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1976 .loc 1 972 1 is_stmt 0 view .LVU454 1977 002c 7047 bx lr 1978 .L172: 960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1979 .loc 1 960 5 is_stmt 1 view .LVU455 1980 .syntax unified 1981 @ 960 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 1982 002e 30BF wfi 1983 @ 0 "" 2 1984 .thumb 1985 .syntax unified 1986 0030 F7E7 b .L171 1987 .L174: 1988 0032 00BF .align 2 1989 .L173: 1990 0034 00700040 .word 1073770496 1991 0038 00ED00E0 .word -536810240 1992 .cfi_endproc 1993 .LFE355: 1995 .section .text.HAL_PWREx_EnterSHUTDOWNMode,"ax",%progbits 1996 .align 1 1997 .global HAL_PWREx_EnterSHUTDOWNMode 1998 .syntax unified 1999 .thumb 2000 .thumb_func 2002 HAL_PWREx_EnterSHUTDOWNMode: 2003 .LFB356: 973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enter Shutdown mode. 979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note In Shutdown mode, the PLL, the HSI, the LSI and the HSE oscillators are switched 980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * off. The voltage regulator is disabled and Vcore domain is powered off. 981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * SRAM1, SRAM2 and registers contents are lost except for registers in the Backup domain. 982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * The BOR is not available. 983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note The I/Os can be configured either with a pull-up or pull-down or can be kept in analog s 984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None ARM GAS /tmp/cchjGo05.s page 55 985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnterSHUTDOWNMode(void) 987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2004 .loc 1 987 1 view -0 2005 .cfi_startproc 2006 @ args = 0, pretend = 0, frame = 0 2007 @ frame_needed = 0, uses_anonymous_args = 0 2008 @ link register save eliminated. 988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set Shutdown mode */ 990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_SHUTDOWN); 2009 .loc 1 990 3 view .LVU457 2010 0000 064A ldr r2, .L176 2011 0002 1368 ldr r3, [r2] 2012 0004 23F00703 bic r3, r3, #7 2013 0008 43F00403 orr r3, r3, #4 2014 000c 1360 str r3, [r2] 991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ 993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 2015 .loc 1 993 3 view .LVU458 2016 000e 044A ldr r2, .L176+4 2017 0010 1369 ldr r3, [r2, #16] 2018 0012 43F00403 orr r3, r3, #4 2019 0016 1361 str r3, [r2, #16] 994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* This option is used to ensure that store operations are completed */ 996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined ( __CC_ARM) 997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __force_stores(); 998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif 999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Request Wait For Interrupt */ 1000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFI(); 2020 .loc 1 1000 3 view .LVU459 2021 .syntax unified 2022 @ 1000 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 2023 0018 30BF wfi 2024 @ 0 "" 2 1001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 2025 .loc 1 1001 1 is_stmt 0 view .LVU460 2026 .thumb 2027 .syntax unified 2028 001a 7047 bx lr 2029 .L177: 2030 .align 2 2031 .L176: 2032 001c 00700040 .word 1073770496 2033 0020 00ED00E0 .word -536810240 2034 .cfi_endproc 2035 .LFE356: 2037 .section .text.HAL_PWREx_PVM1Callback,"ax",%progbits 2038 .align 1 2039 .weak HAL_PWREx_PVM1Callback 2040 .syntax unified 2041 .thumb 2042 .thumb_func 2044 HAL_PWREx_PVM1Callback: 2045 .LFB358: ARM GAS /tmp/cchjGo05.s page 56 1002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 1007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief This function handles the PWR PVD/PVMx interrupt request. 1008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note This API should be called under the PVD_PVM_IRQHandler(). 1009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 1010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 1011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_PVD_PVM_IRQHandler(void) 1012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Check PWR exti flag */ 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if(__HAL_PWR_PVD_EXTI_GET_FLAG() != 0U) 1015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* PWR PVD interrupt user callback */ 1017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWR_PVDCallback(); 1018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear PVD exti pending bit */ 1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); 1021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Next, successively check PVMx exti flags */ 1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME1) 1024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if(__HAL_PWR_PVM1_EXTI_GET_FLAG() != 0U) 1025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* PWR PVM1 interrupt user callback */ 1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM1Callback(); 1028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear PVM1 exti pending bit */ 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_CLEAR_FLAG(); 1031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME1 */ 1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME2) 1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if(__HAL_PWR_PVM2_EXTI_GET_FLAG() != 0U) 1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* PWR PVM2 interrupt user callback */ 1037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM2Callback(); 1038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear PVM2 exti pending bit */ 1040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_CLEAR_FLAG(); 1041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME2 */ 1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if(__HAL_PWR_PVM3_EXTI_GET_FLAG() != 0U) 1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* PWR PVM3 interrupt user callback */ 1046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM3Callback(); 1047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear PVM3 exti pending bit */ 1049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_CLEAR_FLAG(); 1050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if(__HAL_PWR_PVM4_EXTI_GET_FLAG() != 0U) 1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 1053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* PWR PVM4 interrupt user callback */ 1054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM4Callback(); 1055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear PVM4 exti pending bit */ 1057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_CLEAR_FLAG(); 1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } ARM GAS /tmp/cchjGo05.s page 57 1059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME1) 1063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief PWR PVM1 interrupt callback 1065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 1066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __weak void HAL_PWREx_PVM1Callback(void) 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2046 .loc 1 1068 1 is_stmt 1 view -0 2047 .cfi_startproc 2048 @ args = 0, pretend = 0, frame = 0 2049 @ frame_needed = 0, uses_anonymous_args = 0 2050 @ link register save eliminated. 1069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* NOTE : This function should not be modified; when the callback is needed, 1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM1Callback() API can be implemented in the user file 1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 1072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 2051 .loc 1 1072 1 view .LVU462 2052 0000 7047 bx lr 2053 .cfi_endproc 2054 .LFE358: 2056 .section .text.HAL_PWREx_PVM2Callback,"ax",%progbits 2057 .align 1 2058 .weak HAL_PWREx_PVM2Callback 2059 .syntax unified 2060 .thumb 2061 .thumb_func 2063 HAL_PWREx_PVM2Callback: 2064 .LFB359: 1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME1 */ 1074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME2) 1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 1077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief PWR PVM2 interrupt callback 1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 1079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 1080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __weak void HAL_PWREx_PVM2Callback(void) 1081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2065 .loc 1 1081 1 view -0 2066 .cfi_startproc 2067 @ args = 0, pretend = 0, frame = 0 2068 @ frame_needed = 0, uses_anonymous_args = 0 2069 @ link register save eliminated. 1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* NOTE : This function should not be modified; when the callback is needed, 1083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM2Callback() API can be implemented in the user file 1084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 1085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 2070 .loc 1 1085 1 view .LVU464 2071 0000 7047 bx lr 2072 .cfi_endproc 2073 .LFE359: 2075 .section .text.HAL_PWREx_PVM3Callback,"ax",%progbits 2076 .align 1 2077 .weak HAL_PWREx_PVM3Callback 2078 .syntax unified ARM GAS /tmp/cchjGo05.s page 58 2079 .thumb 2080 .thumb_func 2082 HAL_PWREx_PVM3Callback: 2083 .LFB360: 1086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME2 */ 1087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 1089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief PWR PVM3 interrupt callback 1090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 1091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 1092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __weak void HAL_PWREx_PVM3Callback(void) 1093:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2084 .loc 1 1093 1 view -0 2085 .cfi_startproc 2086 @ args = 0, pretend = 0, frame = 0 2087 @ frame_needed = 0, uses_anonymous_args = 0 2088 @ link register save eliminated. 1094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* NOTE : This function should not be modified; when the callback is needed, 1095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM3Callback() API can be implemented in the user file 1096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 1097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 2089 .loc 1 1097 1 view .LVU466 2090 0000 7047 bx lr 2091 .cfi_endproc 2092 .LFE360: 2094 .section .text.HAL_PWREx_PVM4Callback,"ax",%progbits 2095 .align 1 2096 .weak HAL_PWREx_PVM4Callback 2097 .syntax unified 2098 .thumb 2099 .thumb_func 2101 HAL_PWREx_PVM4Callback: 2102 .LFB361: 1098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1099:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 1100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief PWR PVM4 interrupt callback 1101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 1102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 1103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __weak void HAL_PWREx_PVM4Callback(void) 1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2103 .loc 1 1104 1 view -0 2104 .cfi_startproc 2105 @ args = 0, pretend = 0, frame = 0 2106 @ frame_needed = 0, uses_anonymous_args = 0 2107 @ link register save eliminated. 1105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* NOTE : This function should not be modified; when the callback is needed, 1106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM4Callback() API can be implemented in the user file 1107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 1108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 2108 .loc 1 1108 1 view .LVU468 2109 0000 7047 bx lr 2110 .cfi_endproc 2111 .LFE361: 2113 .section .text.HAL_PWREx_PVD_PVM_IRQHandler,"ax",%progbits 2114 .align 1 2115 .global HAL_PWREx_PVD_PVM_IRQHandler 2116 .syntax unified ARM GAS /tmp/cchjGo05.s page 59 2117 .thumb 2118 .thumb_func 2120 HAL_PWREx_PVD_PVM_IRQHandler: 2121 .LFB357: 1012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Check PWR exti flag */ 2122 .loc 1 1012 1 view -0 2123 .cfi_startproc 2124 @ args = 0, pretend = 0, frame = 0 2125 @ frame_needed = 0, uses_anonymous_args = 0 2126 0000 08B5 push {r3, lr} 2127 .LCFI0: 2128 .cfi_def_cfa_offset 8 2129 .cfi_offset 3, -8 2130 .cfi_offset 14, -4 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2131 .loc 1 1014 3 view .LVU470 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2132 .loc 1 1014 6 is_stmt 0 view .LVU471 2133 0002 1C4B ldr r3, .L194 2134 0004 5B69 ldr r3, [r3, #20] 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2135 .loc 1 1014 5 view .LVU472 2136 0006 13F4803F tst r3, #65536 2137 000a 14D1 bne .L189 2138 .L183: 1024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2139 .loc 1 1024 3 is_stmt 1 view .LVU473 1024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2140 .loc 1 1024 6 is_stmt 0 view .LVU474 2141 000c 194B ldr r3, .L194 2142 000e 5B6B ldr r3, [r3, #52] 1024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2143 .loc 1 1024 5 view .LVU475 2144 0010 13F0080F tst r3, #8 2145 0014 16D1 bne .L190 2146 .L184: 1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2147 .loc 1 1034 3 is_stmt 1 view .LVU476 1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2148 .loc 1 1034 6 is_stmt 0 view .LVU477 2149 0016 174B ldr r3, .L194 2150 0018 5B6B ldr r3, [r3, #52] 1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2151 .loc 1 1034 5 view .LVU478 2152 001a 13F0100F tst r3, #16 2153 001e 17D1 bne .L191 2154 .L185: 1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2155 .loc 1 1043 3 is_stmt 1 view .LVU479 1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2156 .loc 1 1043 6 is_stmt 0 view .LVU480 2157 0020 144B ldr r3, .L194 2158 0022 5B6B ldr r3, [r3, #52] 1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2159 .loc 1 1043 5 view .LVU481 2160 0024 13F0200F tst r3, #32 2161 0028 18D1 bne .L192 ARM GAS /tmp/cchjGo05.s page 60 2162 .L186: 1051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2163 .loc 1 1051 3 is_stmt 1 view .LVU482 1051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2164 .loc 1 1051 6 is_stmt 0 view .LVU483 2165 002a 124B ldr r3, .L194 2166 002c 5B6B ldr r3, [r3, #52] 1051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2167 .loc 1 1051 5 view .LVU484 2168 002e 13F0400F tst r3, #64 2169 0032 19D1 bne .L193 2170 .L182: 1059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 2171 .loc 1 1059 1 view .LVU485 2172 0034 08BD pop {r3, pc} 2173 .L189: 1017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 2174 .loc 1 1017 5 is_stmt 1 view .LVU486 2175 0036 FFF7FEFF bl HAL_PWR_PVDCallback 2176 .LVL123: 1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 2177 .loc 1 1020 5 view .LVU487 2178 003a 0E4B ldr r3, .L194 2179 003c 4FF48032 mov r2, #65536 2180 0040 5A61 str r2, [r3, #20] 2181 0042 E3E7 b .L183 2182 .L190: 1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 2183 .loc 1 1027 5 view .LVU488 2184 0044 FFF7FEFF bl HAL_PWREx_PVM1Callback 2185 .LVL124: 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 2186 .loc 1 1030 5 view .LVU489 2187 0048 0A4B ldr r3, .L194 2188 004a 0822 movs r2, #8 2189 004c 5A63 str r2, [r3, #52] 2190 004e E2E7 b .L184 2191 .L191: 1037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 2192 .loc 1 1037 5 view .LVU490 2193 0050 FFF7FEFF bl HAL_PWREx_PVM2Callback 2194 .LVL125: 1040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 2195 .loc 1 1040 5 view .LVU491 2196 0054 074B ldr r3, .L194 2197 0056 1022 movs r2, #16 2198 0058 5A63 str r2, [r3, #52] 2199 005a E1E7 b .L185 2200 .L192: 1046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 2201 .loc 1 1046 5 view .LVU492 2202 005c FFF7FEFF bl HAL_PWREx_PVM3Callback 2203 .LVL126: 1049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 2204 .loc 1 1049 5 view .LVU493 2205 0060 044B ldr r3, .L194 2206 0062 2022 movs r2, #32 ARM GAS /tmp/cchjGo05.s page 61 2207 0064 5A63 str r2, [r3, #52] 2208 0066 E0E7 b .L186 2209 .L193: 1054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 2210 .loc 1 1054 5 view .LVU494 2211 0068 FFF7FEFF bl HAL_PWREx_PVM4Callback 2212 .LVL127: 1057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 2213 .loc 1 1057 5 view .LVU495 2214 006c 014B ldr r3, .L194 2215 006e 4022 movs r2, #64 2216 0070 5A63 str r2, [r3, #52] 1059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 2217 .loc 1 1059 1 is_stmt 0 view .LVU496 2218 0072 DFE7 b .L182 2219 .L195: 2220 .align 2 2221 .L194: 2222 0074 00040140 .word 1073808384 2223 .cfi_endproc 2224 .LFE357: 2226 .section .text.HAL_PWREx_EnableUCPDStandbyMode,"ax",%progbits 2227 .align 1 2228 .global HAL_PWREx_EnableUCPDStandbyMode 2229 .syntax unified 2230 .thumb 2231 .thumb_func 2233 HAL_PWREx_EnableUCPDStandbyMode: 2234 .LFB362: 1109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR3_UCPD_STDBY) 1111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 1112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable UCPD configuration memorization in Standby. 1113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 1114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 1115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableUCPDStandbyMode(void) 1116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2235 .loc 1 1116 1 is_stmt 1 view -0 2236 .cfi_startproc 2237 @ args = 0, pretend = 0, frame = 0 2238 @ frame_needed = 0, uses_anonymous_args = 0 2239 @ link register save eliminated. 1117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Memorize UCPD configuration when entering standby mode */ 1118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR3, PWR_CR3_UCPD_STDBY); 2240 .loc 1 1118 3 view .LVU498 2241 0000 024A ldr r2, .L197 2242 0002 9368 ldr r3, [r2, #8] 2243 0004 43F40053 orr r3, r3, #8192 2244 0008 9360 str r3, [r2, #8] 1119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 2245 .loc 1 1119 1 is_stmt 0 view .LVU499 2246 000a 7047 bx lr 2247 .L198: 2248 .align 2 2249 .L197: 2250 000c 00700040 .word 1073770496 2251 .cfi_endproc ARM GAS /tmp/cchjGo05.s page 62 2252 .LFE362: 2254 .section .text.HAL_PWREx_DisableUCPDStandbyMode,"ax",%progbits 2255 .align 1 2256 .global HAL_PWREx_DisableUCPDStandbyMode 2257 .syntax unified 2258 .thumb 2259 .thumb_func 2261 HAL_PWREx_DisableUCPDStandbyMode: 2262 .LFB363: 1120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 1122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable UCPD configuration memorization in Standby. 1123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note This function must be called on exiting the Standby mode and before any UCPD 1124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * configuration update. 1125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 1126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 1127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableUCPDStandbyMode(void) 1128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2263 .loc 1 1128 1 is_stmt 1 view -0 2264 .cfi_startproc 2265 @ args = 0, pretend = 0, frame = 0 2266 @ frame_needed = 0, uses_anonymous_args = 0 2267 @ link register save eliminated. 1129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Write 0 immediately after Standby exit when using UCPD, 1130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** and before writing any UCPD registers */ 1131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR3, PWR_CR3_UCPD_STDBY); 2268 .loc 1 1131 3 view .LVU501 2269 0000 024A ldr r2, .L200 2270 0002 9368 ldr r3, [r2, #8] 2271 0004 23F40053 bic r3, r3, #8192 2272 0008 9360 str r3, [r2, #8] 1132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 2273 .loc 1 1132 1 is_stmt 0 view .LVU502 2274 000a 7047 bx lr 2275 .L201: 2276 .align 2 2277 .L200: 2278 000c 00700040 .word 1073770496 2279 .cfi_endproc 2280 .LFE363: 2282 .section .text.HAL_PWREx_EnableUCPDDeadBattery,"ax",%progbits 2283 .align 1 2284 .global HAL_PWREx_EnableUCPDDeadBattery 2285 .syntax unified 2286 .thumb 2287 .thumb_func 2289 HAL_PWREx_EnableUCPDDeadBattery: 2290 .LFB364: 1133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR3_UCPD_STDBY */ 1134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR3_UCPD_DBDIS) 1136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 1137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable the USB Type-C dead battery pull-down behavior 1138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * on UCPDx_CC1 and UCPDx_CC2 pins 1139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 1140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 1141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableUCPDDeadBattery(void) ARM GAS /tmp/cchjGo05.s page 63 1142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2291 .loc 1 1142 1 is_stmt 1 view -0 2292 .cfi_startproc 2293 @ args = 0, pretend = 0, frame = 0 2294 @ frame_needed = 0, uses_anonymous_args = 0 2295 @ link register save eliminated. 1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Write 0 to enable the USB Type-C dead battery pull-down behavior */ 1144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR3, PWR_CR3_UCPD_DBDIS); 2296 .loc 1 1144 3 view .LVU504 2297 0000 024A ldr r2, .L203 2298 0002 9368 ldr r3, [r2, #8] 2299 0004 23F48043 bic r3, r3, #16384 2300 0008 9360 str r3, [r2, #8] 1145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 2301 .loc 1 1145 1 is_stmt 0 view .LVU505 2302 000a 7047 bx lr 2303 .L204: 2304 .align 2 2305 .L203: 2306 000c 00700040 .word 1073770496 2307 .cfi_endproc 2308 .LFE364: 2310 .section .text.HAL_PWREx_DisableUCPDDeadBattery,"ax",%progbits 2311 .align 1 2312 .global HAL_PWREx_DisableUCPDDeadBattery 2313 .syntax unified 2314 .thumb 2315 .thumb_func 2317 HAL_PWREx_DisableUCPDDeadBattery: 2318 .LFB365: 1146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** 1147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** 1148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable the USB Type-C dead battery pull-down behavior 1149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * on UCPDx_CC1 and UCPDx_CC2 pins 1150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note After exiting reset, the USB Type-C dead battery behavior will be enabled, 1151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * which may have a pull-down effect on CC1 and CC2 pins. 1152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * It is recommended to disable it in all cases, either to stop this pull-down 1153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * or to hand over control to the UCPD (which should therefore be 1154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * initialized before doing the disable). 1155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None 1156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */ 1157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableUCPDDeadBattery(void) 1158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** { 2319 .loc 1 1158 1 is_stmt 1 view -0 2320 .cfi_startproc 2321 @ args = 0, pretend = 0, frame = 0 2322 @ frame_needed = 0, uses_anonymous_args = 0 2323 @ link register save eliminated. 1159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Write 1 to disable the USB Type-C dead battery pull-down behavior */ 1160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR3, PWR_CR3_UCPD_DBDIS); 2324 .loc 1 1160 3 view .LVU507 2325 0000 024A ldr r2, .L206 2326 0002 9368 ldr r3, [r2, #8] 2327 0004 43F48043 orr r3, r3, #16384 2328 0008 9360 str r3, [r2, #8] 1161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** } 2329 .loc 1 1161 1 is_stmt 0 view .LVU508 ARM GAS /tmp/cchjGo05.s page 64 2330 000a 7047 bx lr 2331 .L207: 2332 .align 2 2333 .L206: 2334 000c 00700040 .word 1073770496 2335 .cfi_endproc 2336 .LFE365: 2338 .text 2339 .Letext0: 2340 .file 2 "/usr/lib/gcc/arm-none-eabi/12.2.1/include/stdint.h" 2341 .file 3 "Drivers/CMSIS/Include/core_cm4.h" 2342 .file 4 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h" 2343 .file 5 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h" 2344 .file 6 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h" 2345 .file 7 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h" 2346 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h" ARM GAS /tmp/cchjGo05.s page 65 DEFINED SYMBOLS *ABS*:00000000 stm32g4xx_hal_pwr_ex.c /tmp/cchjGo05.s:21 .text.HAL_PWREx_GetVoltageRange:00000000 $t /tmp/cchjGo05.s:27 .text.HAL_PWREx_GetVoltageRange:00000000 HAL_PWREx_GetVoltageRange /tmp/cchjGo05.s:58 .text.HAL_PWREx_GetVoltageRange:00000020 $d /tmp/cchjGo05.s:63 .text.HAL_PWREx_ControlVoltageScaling:00000000 $t /tmp/cchjGo05.s:69 .text.HAL_PWREx_ControlVoltageScaling:00000000 HAL_PWREx_ControlVoltageScaling /tmp/cchjGo05.s:273 .text.HAL_PWREx_ControlVoltageScaling:00000100 $d /tmp/cchjGo05.s:280 .text.HAL_PWREx_EnableBatteryCharging:00000000 $t /tmp/cchjGo05.s:286 .text.HAL_PWREx_EnableBatteryCharging:00000000 HAL_PWREx_EnableBatteryCharging /tmp/cchjGo05.s:310 .text.HAL_PWREx_EnableBatteryCharging:00000018 $d /tmp/cchjGo05.s:315 .text.HAL_PWREx_DisableBatteryCharging:00000000 $t /tmp/cchjGo05.s:321 .text.HAL_PWREx_DisableBatteryCharging:00000000 HAL_PWREx_DisableBatteryCharging /tmp/cchjGo05.s:338 .text.HAL_PWREx_DisableBatteryCharging:0000000c $d /tmp/cchjGo05.s:343 .text.HAL_PWREx_EnableInternalWakeUpLine:00000000 $t /tmp/cchjGo05.s:349 .text.HAL_PWREx_EnableInternalWakeUpLine:00000000 HAL_PWREx_EnableInternalWakeUpLine /tmp/cchjGo05.s:366 .text.HAL_PWREx_EnableInternalWakeUpLine:0000000c $d /tmp/cchjGo05.s:371 .text.HAL_PWREx_DisableInternalWakeUpLine:00000000 $t /tmp/cchjGo05.s:377 .text.HAL_PWREx_DisableInternalWakeUpLine:00000000 HAL_PWREx_DisableInternalWakeUpLine /tmp/cchjGo05.s:394 .text.HAL_PWREx_DisableInternalWakeUpLine:0000000c $d /tmp/cchjGo05.s:399 .text.HAL_PWREx_EnableGPIOPullUp:00000000 $t /tmp/cchjGo05.s:405 .text.HAL_PWREx_EnableGPIOPullUp:00000000 HAL_PWREx_EnableGPIOPullUp /tmp/cchjGo05.s:421 .text.HAL_PWREx_EnableGPIOPullUp:00000008 $d /tmp/cchjGo05.s:573 .text.HAL_PWREx_EnableGPIOPullUp:000000b4 $d /tmp/cchjGo05.s:578 .text.HAL_PWREx_DisableGPIOPullUp:00000000 $t /tmp/cchjGo05.s:584 .text.HAL_PWREx_DisableGPIOPullUp:00000000 HAL_PWREx_DisableGPIOPullUp /tmp/cchjGo05.s:600 .text.HAL_PWREx_DisableGPIOPullUp:00000008 $d /tmp/cchjGo05.s:720 .text.HAL_PWREx_DisableGPIOPullUp:00000088 $d /tmp/cchjGo05.s:725 .text.HAL_PWREx_EnableGPIOPullDown:00000000 $t /tmp/cchjGo05.s:731 .text.HAL_PWREx_EnableGPIOPullDown:00000000 HAL_PWREx_EnableGPIOPullDown /tmp/cchjGo05.s:747 .text.HAL_PWREx_EnableGPIOPullDown:00000008 $d /tmp/cchjGo05.s:898 .text.HAL_PWREx_EnableGPIOPullDown:000000b8 $d /tmp/cchjGo05.s:903 .text.HAL_PWREx_DisableGPIOPullDown:00000000 $t /tmp/cchjGo05.s:909 .text.HAL_PWREx_DisableGPIOPullDown:00000000 HAL_PWREx_DisableGPIOPullDown /tmp/cchjGo05.s:925 .text.HAL_PWREx_DisableGPIOPullDown:00000008 $d /tmp/cchjGo05.s:1044 .text.HAL_PWREx_DisableGPIOPullDown:00000084 $d /tmp/cchjGo05.s:1049 .text.HAL_PWREx_EnablePullUpPullDownConfig:00000000 $t /tmp/cchjGo05.s:1055 .text.HAL_PWREx_EnablePullUpPullDownConfig:00000000 HAL_PWREx_EnablePullUpPullDownConfig /tmp/cchjGo05.s:1072 .text.HAL_PWREx_EnablePullUpPullDownConfig:0000000c $d /tmp/cchjGo05.s:1077 .text.HAL_PWREx_DisablePullUpPullDownConfig:00000000 $t /tmp/cchjGo05.s:1083 .text.HAL_PWREx_DisablePullUpPullDownConfig:00000000 HAL_PWREx_DisablePullUpPullDownConfig /tmp/cchjGo05.s:1100 .text.HAL_PWREx_DisablePullUpPullDownConfig:0000000c $d /tmp/cchjGo05.s:1105 .text.HAL_PWREx_EnableSRAM2ContentRetention:00000000 $t /tmp/cchjGo05.s:1111 .text.HAL_PWREx_EnableSRAM2ContentRetention:00000000 HAL_PWREx_EnableSRAM2ContentRetention /tmp/cchjGo05.s:1128 .text.HAL_PWREx_EnableSRAM2ContentRetention:0000000c $d /tmp/cchjGo05.s:1133 .text.HAL_PWREx_DisableSRAM2ContentRetention:00000000 $t /tmp/cchjGo05.s:1139 .text.HAL_PWREx_DisableSRAM2ContentRetention:00000000 HAL_PWREx_DisableSRAM2ContentRetention /tmp/cchjGo05.s:1156 .text.HAL_PWREx_DisableSRAM2ContentRetention:0000000c $d /tmp/cchjGo05.s:1161 .text.HAL_PWREx_EnablePVM1:00000000 $t /tmp/cchjGo05.s:1167 .text.HAL_PWREx_EnablePVM1:00000000 HAL_PWREx_EnablePVM1 /tmp/cchjGo05.s:1184 .text.HAL_PWREx_EnablePVM1:0000000c $d /tmp/cchjGo05.s:1189 .text.HAL_PWREx_DisablePVM1:00000000 $t /tmp/cchjGo05.s:1195 .text.HAL_PWREx_DisablePVM1:00000000 HAL_PWREx_DisablePVM1 /tmp/cchjGo05.s:1212 .text.HAL_PWREx_DisablePVM1:0000000c $d /tmp/cchjGo05.s:1217 .text.HAL_PWREx_EnablePVM2:00000000 $t /tmp/cchjGo05.s:1223 .text.HAL_PWREx_EnablePVM2:00000000 HAL_PWREx_EnablePVM2 /tmp/cchjGo05.s:1240 .text.HAL_PWREx_EnablePVM2:0000000c $d ARM GAS /tmp/cchjGo05.s page 66 /tmp/cchjGo05.s:1245 .text.HAL_PWREx_DisablePVM2:00000000 $t /tmp/cchjGo05.s:1251 .text.HAL_PWREx_DisablePVM2:00000000 HAL_PWREx_DisablePVM2 /tmp/cchjGo05.s:1268 .text.HAL_PWREx_DisablePVM2:0000000c $d /tmp/cchjGo05.s:1273 .text.HAL_PWREx_EnablePVM3:00000000 $t /tmp/cchjGo05.s:1279 .text.HAL_PWREx_EnablePVM3:00000000 HAL_PWREx_EnablePVM3 /tmp/cchjGo05.s:1296 .text.HAL_PWREx_EnablePVM3:0000000c $d /tmp/cchjGo05.s:1301 .text.HAL_PWREx_DisablePVM3:00000000 $t /tmp/cchjGo05.s:1307 .text.HAL_PWREx_DisablePVM3:00000000 HAL_PWREx_DisablePVM3 /tmp/cchjGo05.s:1324 .text.HAL_PWREx_DisablePVM3:0000000c $d /tmp/cchjGo05.s:1329 .text.HAL_PWREx_EnablePVM4:00000000 $t /tmp/cchjGo05.s:1335 .text.HAL_PWREx_EnablePVM4:00000000 HAL_PWREx_EnablePVM4 /tmp/cchjGo05.s:1352 .text.HAL_PWREx_EnablePVM4:0000000c $d /tmp/cchjGo05.s:1357 .text.HAL_PWREx_DisablePVM4:00000000 $t /tmp/cchjGo05.s:1363 .text.HAL_PWREx_DisablePVM4:00000000 HAL_PWREx_DisablePVM4 /tmp/cchjGo05.s:1380 .text.HAL_PWREx_DisablePVM4:0000000c $d /tmp/cchjGo05.s:1385 .text.HAL_PWREx_ConfigPVM:00000000 $t /tmp/cchjGo05.s:1391 .text.HAL_PWREx_ConfigPVM:00000000 HAL_PWREx_ConfigPVM /tmp/cchjGo05.s:1744 .text.HAL_PWREx_ConfigPVM:000001e8 $d /tmp/cchjGo05.s:1749 .text.HAL_PWREx_EnableLowPowerRunMode:00000000 $t /tmp/cchjGo05.s:1755 .text.HAL_PWREx_EnableLowPowerRunMode:00000000 HAL_PWREx_EnableLowPowerRunMode /tmp/cchjGo05.s:1772 .text.HAL_PWREx_EnableLowPowerRunMode:0000000c $d /tmp/cchjGo05.s:1777 .text.HAL_PWREx_DisableLowPowerRunMode:00000000 $t /tmp/cchjGo05.s:1783 .text.HAL_PWREx_DisableLowPowerRunMode:00000000 HAL_PWREx_DisableLowPowerRunMode /tmp/cchjGo05.s:1849 .text.HAL_PWREx_DisableLowPowerRunMode:0000004c $d /tmp/cchjGo05.s:1855 .text.HAL_PWREx_EnterSTOP0Mode:00000000 $t /tmp/cchjGo05.s:1861 .text.HAL_PWREx_EnterSTOP0Mode:00000000 HAL_PWREx_EnterSTOP0Mode /tmp/cchjGo05.s:1919 .text.HAL_PWREx_EnterSTOP0Mode:00000030 $d /tmp/cchjGo05.s:1925 .text.HAL_PWREx_EnterSTOP1Mode:00000000 $t /tmp/cchjGo05.s:1931 .text.HAL_PWREx_EnterSTOP1Mode:00000000 HAL_PWREx_EnterSTOP1Mode /tmp/cchjGo05.s:1990 .text.HAL_PWREx_EnterSTOP1Mode:00000034 $d /tmp/cchjGo05.s:1996 .text.HAL_PWREx_EnterSHUTDOWNMode:00000000 $t /tmp/cchjGo05.s:2002 .text.HAL_PWREx_EnterSHUTDOWNMode:00000000 HAL_PWREx_EnterSHUTDOWNMode /tmp/cchjGo05.s:2032 .text.HAL_PWREx_EnterSHUTDOWNMode:0000001c $d /tmp/cchjGo05.s:2038 .text.HAL_PWREx_PVM1Callback:00000000 $t /tmp/cchjGo05.s:2044 .text.HAL_PWREx_PVM1Callback:00000000 HAL_PWREx_PVM1Callback /tmp/cchjGo05.s:2057 .text.HAL_PWREx_PVM2Callback:00000000 $t /tmp/cchjGo05.s:2063 .text.HAL_PWREx_PVM2Callback:00000000 HAL_PWREx_PVM2Callback /tmp/cchjGo05.s:2076 .text.HAL_PWREx_PVM3Callback:00000000 $t /tmp/cchjGo05.s:2082 .text.HAL_PWREx_PVM3Callback:00000000 HAL_PWREx_PVM3Callback /tmp/cchjGo05.s:2095 .text.HAL_PWREx_PVM4Callback:00000000 $t /tmp/cchjGo05.s:2101 .text.HAL_PWREx_PVM4Callback:00000000 HAL_PWREx_PVM4Callback /tmp/cchjGo05.s:2114 .text.HAL_PWREx_PVD_PVM_IRQHandler:00000000 $t /tmp/cchjGo05.s:2120 .text.HAL_PWREx_PVD_PVM_IRQHandler:00000000 HAL_PWREx_PVD_PVM_IRQHandler /tmp/cchjGo05.s:2222 .text.HAL_PWREx_PVD_PVM_IRQHandler:00000074 $d /tmp/cchjGo05.s:2227 .text.HAL_PWREx_EnableUCPDStandbyMode:00000000 $t /tmp/cchjGo05.s:2233 .text.HAL_PWREx_EnableUCPDStandbyMode:00000000 HAL_PWREx_EnableUCPDStandbyMode /tmp/cchjGo05.s:2250 .text.HAL_PWREx_EnableUCPDStandbyMode:0000000c $d /tmp/cchjGo05.s:2255 .text.HAL_PWREx_DisableUCPDStandbyMode:00000000 $t /tmp/cchjGo05.s:2261 .text.HAL_PWREx_DisableUCPDStandbyMode:00000000 HAL_PWREx_DisableUCPDStandbyMode /tmp/cchjGo05.s:2278 .text.HAL_PWREx_DisableUCPDStandbyMode:0000000c $d /tmp/cchjGo05.s:2283 .text.HAL_PWREx_EnableUCPDDeadBattery:00000000 $t /tmp/cchjGo05.s:2289 .text.HAL_PWREx_EnableUCPDDeadBattery:00000000 HAL_PWREx_EnableUCPDDeadBattery /tmp/cchjGo05.s:2306 .text.HAL_PWREx_EnableUCPDDeadBattery:0000000c $d /tmp/cchjGo05.s:2311 .text.HAL_PWREx_DisableUCPDDeadBattery:00000000 $t /tmp/cchjGo05.s:2317 .text.HAL_PWREx_DisableUCPDDeadBattery:00000000 HAL_PWREx_DisableUCPDDeadBattery /tmp/cchjGo05.s:2334 .text.HAL_PWREx_DisableUCPDDeadBattery:0000000c $d /tmp/cchjGo05.s:428 .text.HAL_PWREx_EnableGPIOPullUp:0000000f $d ARM GAS /tmp/cchjGo05.s page 67 /tmp/cchjGo05.s:428 .text.HAL_PWREx_EnableGPIOPullUp:00000010 $t /tmp/cchjGo05.s:607 .text.HAL_PWREx_DisableGPIOPullUp:0000000f $d /tmp/cchjGo05.s:607 .text.HAL_PWREx_DisableGPIOPullUp:00000010 $t /tmp/cchjGo05.s:754 .text.HAL_PWREx_EnableGPIOPullDown:0000000f $d /tmp/cchjGo05.s:754 .text.HAL_PWREx_EnableGPIOPullDown:00000010 $t /tmp/cchjGo05.s:932 .text.HAL_PWREx_DisableGPIOPullDown:0000000f $d /tmp/cchjGo05.s:932 .text.HAL_PWREx_DisableGPIOPullDown:00000010 $t UNDEFINED SYMBOLS SystemCoreClock HAL_PWR_PVDCallback