ARM GAS  /tmp/ccBwposX.s 			page 1


   1              		.cpu cortex-m0plus
   2              		.eabi_attribute 20, 1
   3              		.eabi_attribute 21, 1
   4              		.eabi_attribute 23, 3
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 1
   9              		.eabi_attribute 34, 0
  10              		.eabi_attribute 18, 4
  11              		.file	"stm32g0xx_hal_rcc.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.section	.text.HAL_RCC_DeInit,"ax",%progbits
  16              		.align	1
  17              		.global	HAL_RCC_DeInit
  18              		.arch armv6s-m
  19              		.syntax unified
  20              		.code	16
  21              		.thumb_func
  22              		.fpu softvfp
  24              	HAL_RCC_DeInit:
  25              	.LFB297:
  26              		.file 1 "Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c"
   1:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
   2:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   ******************************************************************************
   3:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @file    stm32g0xx_hal_rcc.c
   4:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @author  MCD Application Team
   5:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief   RCC HAL module driver.
   6:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *          This file provides firmware functions to manage the following
   7:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *          functionalities of the Reset and Clock Control (RCC) peripheral:
   8:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *           + Initialization and de-initialization functions
   9:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *           + Peripheral Control functions
  10:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
  11:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   @verbatim
  12:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   ==============================================================================
  13:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                       ##### RCC specific features #####
  14:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   ==============================================================================
  15:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     [..]
  16:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       After reset the device is running from High Speed Internal oscillator
  17:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       (from 8 MHz to reach 16MHz) with Flash 0 wait state. Flash prefetch buffer,
  18:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       D-Cache and I-Cache are disabled, and all peripherals are off except internal
  19:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       SRAM, Flash and JTAG.
  20:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  21:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       (+) There is no prescaler on High speed (AHB) and Low speed (APB) buses:
  22:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           all peripherals mapped on these buses are running at HSI speed.
  23:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
  24:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       (+) All GPIOs are in analog mode, except the JTAG pins which
  25:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           are assigned to be used for debug purpose.
  26:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  27:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     [..]
  28:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       Once the device started from reset, the user application has to:
  29:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       (+) Configure the clock source to be used to drive the System clock
  30:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           (if the application needs higher frequency/performance)
  31:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       (+) Configure the System clock frequency and Flash settings
  32:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       (+) Configure the AHB and APB buses prescalers
ARM GAS  /tmp/ccBwposX.s 			page 2


  33:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       (+) Enable the clock for the peripheral(s) to be used
  34:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       (+) Configure the clock source(s) for peripherals which clocks are not
  35:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           derived from the System clock (RTC, ADC, RNG, HSTIM)
  36:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  37:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   @endverbatim
  38:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   ******************************************************************************
  39:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @attention
  40:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
  41:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
  42:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * All rights reserved.</center></h2>
  43:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
  44:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * This software component is licensed by ST under BSD 3-Clause license,
  45:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * the "License"; You may not use this file except in compliance with the
  46:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * License. You may obtain a copy of the License at:
  47:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *                        opensource.org/licenses/BSD-3-Clause
  48:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
  49:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   ******************************************************************************
  50:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
  51:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  52:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/
  53:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #include "stm32g0xx_hal.h"
  54:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  55:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /** @addtogroup STM32G0xx_HAL_Driver
  56:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @{
  57:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
  58:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  59:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /** @defgroup RCC RCC
  60:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief RCC HAL module driver
  61:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @{
  62:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
  63:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  64:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED
  65:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  66:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/
  67:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/
  68:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /** @defgroup RCC_Private_Constants RCC Private Constants
  69:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @{
  70:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
  71:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #define HSE_TIMEOUT_VALUE          HSE_STARTUP_TIMEOUT
  72:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #define HSI_TIMEOUT_VALUE          (2U)    /* 2 ms (minimum Tick + 1) */
  73:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #define LSI_TIMEOUT_VALUE          (2U)    /* 2 ms (minimum Tick + 1) */
  74:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #define PLL_TIMEOUT_VALUE          (2U)    /* 2 ms (minimum Tick + 1) */
  75:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  76:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT)
  77:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #define HSI48_TIMEOUT_VALUE        (2U)    /* 2 ms (minimum Tick + 1) */
  78:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */
  79:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #define CLOCKSWITCH_TIMEOUT_VALUE  (5000U) /* 5 s    */
  80:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  81:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #define PLLSOURCE_NONE             (0U)
  82:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
  83:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @}
  84:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
  85:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  86:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/
  87:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /** @defgroup RCC_Private_Macros RCC Private Macros
  88:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @{
  89:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
ARM GAS  /tmp/ccBwposX.s 			page 3


  90:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #define MCO1_CLK_ENABLE()     __HAL_RCC_GPIOA_CLK_ENABLE()
  91:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #define MCO1_GPIO_PORT        GPIOA
  92:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #define MCO1_PIN              GPIO_PIN_8
  93:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  94:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #if defined(RCC_MCO2_SUPPORT)
  95:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #define MCO2_CLK_ENABLE()    __HAL_RCC_GPIOA_CLK_ENABLE()
  96:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #define MCO2_GPIO_PORT        GPIOA
  97:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #define MCO2_PIN              GPIO_PIN_10
  98:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #endif /* RCC_MCO2_SUPPORT */
  99:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 100:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #define RCC_PLL_OSCSOURCE_CONFIG(__HAL_RCC_PLLSOURCE__) \
 101:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   (MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (uint32_t)(__HAL_RCC_PLLSOURCE__)))
 102:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
 103:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @}
 104:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
 105:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 106:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/
 107:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables
 108:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @{
 109:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
 110:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 111:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
 112:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @}
 113:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
 114:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 115:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/
 116:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /* Exported functions --------------------------------------------------------*/
 117:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 118:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions
 119:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @{
 120:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
 121:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 122:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions
 123:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *  @brief    Initialization and Configuration functions
 124:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
 125:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   @verbatim
 126:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****  ===============================================================================
 127:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****            ##### Initialization and de-initialization functions #####
 128:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****  ===============================================================================
 129:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     [..]
 130:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       This section provides functions allowing to configure the internal and external oscillators
 131:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System buses clocks (SYSCLK, AHB, APB)
 132:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 133:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     [..] Internal/external clock and PLL configuration
 134:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****          (+) HSI (high-speed internal): 16 MHz factory-trimmed RC used directly or through
 135:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              the PLL as System clock source.
 136:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 137:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****          (+) LSI (low-speed internal): 32 KHz low consumption RC used as IWDG and/or RTC
 138:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              clock source.
 139:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 140:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****          (+) HSE (high-speed external): 4 to 48 MHz crystal oscillator used directly or
 141:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              through the PLL as System clock source. Can be used also optionally as RTC clock sourc
 142:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 143:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****          (+) LSE (low-speed external): 32.768 KHz oscillator used optionally as RTC clock source.
 144:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 145:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****          (+) PLL (clocked by HSI, HSE) providing up to three independent output clocks:
 146:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****            (++) The first output (R) is used to generate the high speed system clock (up to 64MHz).
ARM GAS  /tmp/ccBwposX.s 			page 4


 147:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****            (++) The second output(Q) is used to generate the clock for the random analog generator 
 148:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****            (++) The Third output (P) is used to generate the clock for the Analog to Digital Conver
 149:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 150:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****          (+) CSS (Clock security system): once enabled, if a HSE or LSE clock failure occurs
 151:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (HSE used directly or through PLL as System clock source), the System clock
 152:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              is automatically switched respectively to HSI or LSI and an interrupt is generated
 153:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              if enabled. The interrupt is linked to the Cortex-M0+ NMI (Non-Maskable Interrupt)
 154:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              exception vector.
 155:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 156:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****          (+) MCOx (microcontroller clock output):
 157:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              (++) MCO1 used to output LSI, HSI48(*), HSI, LSE, HSE or main PLL clock (through a con
 158:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              (++) MCO2(*) used to output LSI, HSI48(*), HSI, LSE, HSE, main PLLR clock, PLLQ clock,
 159:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                  (*) available on certain devices only
 160:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 161:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     [..] System, AHB and APB buses clocks configuration
 162:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****          (+) Several clock sources can be used to drive the System clock (SYSCLK): HSI,
 163:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              HSE, LSI, LSE and main PLL.
 164:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              The AHB clock (HCLK) is derived from System clock through configurable
 165:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              prescaler and used to clock the CPU, memory and peripherals mapped
 166:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              on AHB bus (DMA, GPIO...).and APB (PCLK1) clock is derived
 167:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              from AHB clock through configurable prescalers and used to clock
 168:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              the peripherals mapped on these buses. You can use
 169:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              "@ref HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
 170:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 171:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****          -@- All the peripheral clocks are derived from the System clock (SYSCLK) except:
 172:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 173:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (+@) RTC: the RTC clock can be derived either from the LSI, LSE or HSE clock
 174:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                 divided by 2 to 31.
 175:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                 You have to use @ref __HAL_RCC_RTC_ENABLE() and @ref HAL_RCCEx_PeriphCLKConfig() fu
 176:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                  to configure this clock.
 177:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 178:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (+@) RNG(*) requires a frequency equal or lower than 48 MHz.
 179:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                  This clock is derived from the main PLL or HSI or System clock.
 180:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                  (*) available on certain devices only
 181:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 182:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (+@) IWDG clock which is always the LSI clock.
 183:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 184:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 185:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****          (+) The maximum frequency of the SYSCLK, HCLK, PCLK is 64 MHz.
 186:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              Depending on the device voltage range, the maximum frequency should be
 187:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****              adapted accordingly.
 188:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 189:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   @endverbatim
 190:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 191:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****      (++)  Table 1. HCLK clock frequency.
 192:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****      (++)  +-------------------------------------------------------+
 193:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****      (++)  | Latency         |    HCLK clock frequency (MHz)       |
 194:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****      (++)  |                 |-------------------------------------|
 195:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****      (++)  |                 | voltage range 1  | voltage range 2  |
 196:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****      (++)  |                 |      1.2 V       |     1.0 V        |
 197:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****      (++)  |-----------------|------------------|------------------|
 198:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****      (++)  |0WS(1 CPU cycles)|  HCLK <= 24      |  HCLK <= 8       |
 199:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****      (++)  |-----------------|------------------|------------------|
 200:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****      (++)  |1WS(2 CPU cycles)|  HCLK <= 48      |  HCLK <= 16      |
 201:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****      (++)  |-----------------|------------------|------------------|
 202:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****      (++)  |2WS(3 CPU cycles)|  HCLK <= 64      |           -      |
 203:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****      (++)  |-----------------|------------------|------------------|
ARM GAS  /tmp/ccBwposX.s 			page 5


 204:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****    * @{
 205:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
 206:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 207:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
 208:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief  Reset the RCC clock configuration to the default reset state.
 209:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   The default reset state of the clock configuration is given below:
 210:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            - HSI ON and used as system clock source
 211:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            - HSE, PLL OFF
 212:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            - AHB and APB prescaler set to 1.
 213:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            - CSS, MCO1 OFF
 214:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            - All interrupts disabled
 215:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   This function does not modify the configuration of the
 216:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            - Peripheral clocks
 217:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            - LSI, LSE and RTC clocks
 218:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval HAL status
 219:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
 220:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_DeInit(void)
 221:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
  27              		.loc 1 221 1 view -0
  28              		.cfi_startproc
  29              		@ args = 0, pretend = 0, frame = 0
  30              		@ frame_needed = 0, uses_anonymous_args = 0
  31 0000 70B5     		push	{r4, r5, r6, lr}
  32              	.LCFI0:
  33              		.cfi_def_cfa_offset 16
  34              		.cfi_offset 4, -16
  35              		.cfi_offset 5, -12
  36              		.cfi_offset 6, -8
  37              		.cfi_offset 14, -4
 222:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   uint32_t tickstart;
  38              		.loc 1 222 3 view .LVU1
 223:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 224:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get Start Tick*/
 225:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   tickstart = HAL_GetTick();
  39              		.loc 1 225 3 view .LVU2
  40              		.loc 1 225 15 is_stmt 0 view .LVU3
  41 0002 FFF7FEFF 		bl	HAL_GetTick
  42              	.LVL0:
  43 0006 0400     		movs	r4, r0
  44              	.LVL1:
 226:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 227:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Set HSION bit to the reset value */
 228:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   SET_BIT(RCC->CR, RCC_CR_HSION);
  45              		.loc 1 228 3 is_stmt 1 view .LVU4
  46 0008 254A     		ldr	r2, .L15
  47 000a 1168     		ldr	r1, [r2]
  48 000c 8023     		movs	r3, #128
  49 000e 5B00     		lsls	r3, r3, #1
  50 0010 0B43     		orrs	r3, r1
  51 0012 1360     		str	r3, [r2]
 229:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 230:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Wait till HSI is ready */
 231:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U)
  52              		.loc 1 231 3 view .LVU5
  53              	.LVL2:
  54              	.L2:
  55              		.loc 1 231 9 view .LVU6
ARM GAS  /tmp/ccBwposX.s 			page 6


  56              		.loc 1 231 10 is_stmt 0 view .LVU7
  57 0014 224B     		ldr	r3, .L15
  58 0016 1B68     		ldr	r3, [r3]
  59              		.loc 1 231 9 view .LVU8
  60 0018 5B05     		lsls	r3, r3, #21
  61 001a 06D4     		bmi	.L12
 232:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 233:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
  62              		.loc 1 233 5 is_stmt 1 view .LVU9
  63              		.loc 1 233 10 is_stmt 0 view .LVU10
  64 001c FFF7FEFF 		bl	HAL_GetTick
  65              	.LVL3:
  66              		.loc 1 233 24 view .LVU11
  67 0020 001B     		subs	r0, r0, r4
  68              		.loc 1 233 8 view .LVU12
  69 0022 0228     		cmp	r0, #2
  70 0024 F6D9     		bls	.L2
 234:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 235:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       return HAL_TIMEOUT;
  71              		.loc 1 235 14 view .LVU13
  72 0026 0320     		movs	r0, #3
  73              	.L3:
 236:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 237:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 238:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 239:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Set HSITRIM[6:0] bits to the reset value */
 240:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC->ICSCR = RCC_ICSCR_HSITRIM_6;
 241:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 242:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get Start Tick*/
 243:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   tickstart = HAL_GetTick();
 244:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 245:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Reset CFGR register (HSI is selected as system clock source) */
 246:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC->CFGR = 0x00000000u;
 247:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 248:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Wait till HSI is ready */
 249:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != 0U)
 250:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 251:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 252:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 253:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       return HAL_TIMEOUT;
 254:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 255:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 256:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 257:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Clear CR register in 2 steps: first to clear HSEON in case bypass was enabled */
 258:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC->CR = RCC_CR_HSION;
 259:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 260:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Then again to HSEBYP in case bypass was enabled */
 261:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC->CR = RCC_CR_HSION;
 262:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 263:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get Start Tick*/
 264:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   tickstart = HAL_GetTick();
 265:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 266:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Wait till PLL is ready */
 267:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U)
 268:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 269:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 270:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
ARM GAS  /tmp/ccBwposX.s 			page 7


 271:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       return HAL_TIMEOUT;
 272:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 273:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 274:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 275:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* once PLL is OFF, reset PLLCFGR register to default value */
 276:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC->PLLCFGR = RCC_PLLCFGR_PLLN_4;
 277:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 278:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Disable all interrupts */
 279:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC->CIER = 0x00000000u;
 280:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 281:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Clear all flags */
 282:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC->CICR = 0xFFFFFFFFu;
 283:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 284:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Update the SystemCoreClock global variable */
 285:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   SystemCoreClock = HSI_VALUE;
 286:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 287:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Adapt Systick interrupt period */
 288:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (HAL_InitTick(uwTickPrio) != HAL_OK)
 289:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 290:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     return HAL_ERROR;
 291:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 292:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else
 293:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 294:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     return HAL_OK;
 295:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 296:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
  74              		.loc 1 296 1 view .LVU14
  75              		@ sp needed
  76              	.LVL4:
  77              		.loc 1 296 1 view .LVU15
  78 0028 70BD     		pop	{r4, r5, r6, pc}
  79              	.LVL5:
  80              	.L12:
 240:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  81              		.loc 1 240 3 is_stmt 1 view .LVU16
 240:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  82              		.loc 1 240 14 is_stmt 0 view .LVU17
  83 002a 1D4D     		ldr	r5, .L15
  84 002c 8023     		movs	r3, #128
  85 002e DB01     		lsls	r3, r3, #7
  86 0030 6B60     		str	r3, [r5, #4]
 243:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  87              		.loc 1 243 3 is_stmt 1 view .LVU18
 243:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  88              		.loc 1 243 15 is_stmt 0 view .LVU19
  89 0032 FFF7FEFF 		bl	HAL_GetTick
  90              	.LVL6:
  91 0036 0400     		movs	r4, r0
  92              	.LVL7:
 246:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  93              		.loc 1 246 3 is_stmt 1 view .LVU20
 246:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
  94              		.loc 1 246 13 is_stmt 0 view .LVU21
  95 0038 0023     		movs	r3, #0
  96 003a AB60     		str	r3, [r5, #8]
 249:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
  97              		.loc 1 249 3 is_stmt 1 view .LVU22
ARM GAS  /tmp/ccBwposX.s 			page 8


  98              	.LVL8:
  99              	.L5:
 249:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 100              		.loc 1 249 9 view .LVU23
 249:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 101              		.loc 1 249 10 is_stmt 0 view .LVU24
 102 003c 184B     		ldr	r3, .L15
 103 003e 9B68     		ldr	r3, [r3, #8]
 104 0040 3822     		movs	r2, #56
 249:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 105              		.loc 1 249 9 view .LVU25
 106 0042 1A42     		tst	r2, r3
 107 0044 07D0     		beq	.L13
 251:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 108              		.loc 1 251 5 is_stmt 1 view .LVU26
 251:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 109              		.loc 1 251 10 is_stmt 0 view .LVU27
 110 0046 FFF7FEFF 		bl	HAL_GetTick
 111              	.LVL9:
 251:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 112              		.loc 1 251 24 view .LVU28
 113 004a 001B     		subs	r0, r0, r4
 251:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 114              		.loc 1 251 8 view .LVU29
 115 004c 154B     		ldr	r3, .L15+4
 116 004e 9842     		cmp	r0, r3
 117 0050 F4D9     		bls	.L5
 253:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 118              		.loc 1 253 14 view .LVU30
 119 0052 0320     		movs	r0, #3
 120 0054 E8E7     		b	.L3
 121              	.L13:
 258:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 122              		.loc 1 258 3 is_stmt 1 view .LVU31
 258:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 123              		.loc 1 258 11 is_stmt 0 view .LVU32
 124 0056 124B     		ldr	r3, .L15
 125 0058 C832     		adds	r2, r2, #200
 126 005a 1A60     		str	r2, [r3]
 261:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 127              		.loc 1 261 3 is_stmt 1 view .LVU33
 261:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 128              		.loc 1 261 11 is_stmt 0 view .LVU34
 129 005c 1A60     		str	r2, [r3]
 264:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 130              		.loc 1 264 3 is_stmt 1 view .LVU35
 264:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 131              		.loc 1 264 15 is_stmt 0 view .LVU36
 132 005e FFF7FEFF 		bl	HAL_GetTick
 133              	.LVL10:
 134 0062 0400     		movs	r4, r0
 135              	.LVL11:
 267:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 136              		.loc 1 267 3 is_stmt 1 view .LVU37
 137              	.L7:
 267:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 138              		.loc 1 267 9 view .LVU38
ARM GAS  /tmp/ccBwposX.s 			page 9


 267:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 139              		.loc 1 267 10 is_stmt 0 view .LVU39
 140 0064 0E4B     		ldr	r3, .L15
 141 0066 1B68     		ldr	r3, [r3]
 267:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 142              		.loc 1 267 9 view .LVU40
 143 0068 9B01     		lsls	r3, r3, #6
 144 006a 06D5     		bpl	.L14
 269:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 145              		.loc 1 269 5 is_stmt 1 view .LVU41
 269:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 146              		.loc 1 269 10 is_stmt 0 view .LVU42
 147 006c FFF7FEFF 		bl	HAL_GetTick
 148              	.LVL12:
 269:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 149              		.loc 1 269 24 view .LVU43
 150 0070 001B     		subs	r0, r0, r4
 269:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 151              		.loc 1 269 8 view .LVU44
 152 0072 0228     		cmp	r0, #2
 153 0074 F6D9     		bls	.L7
 271:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 154              		.loc 1 271 14 view .LVU45
 155 0076 0320     		movs	r0, #3
 156 0078 D6E7     		b	.L3
 157              	.L14:
 276:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 158              		.loc 1 276 3 is_stmt 1 view .LVU46
 276:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 159              		.loc 1 276 16 is_stmt 0 view .LVU47
 160 007a 094B     		ldr	r3, .L15
 161 007c 8022     		movs	r2, #128
 162 007e 5201     		lsls	r2, r2, #5
 163 0080 DA60     		str	r2, [r3, #12]
 279:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 164              		.loc 1 279 3 is_stmt 1 view .LVU48
 279:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 165              		.loc 1 279 13 is_stmt 0 view .LVU49
 166 0082 0022     		movs	r2, #0
 167 0084 9A61     		str	r2, [r3, #24]
 282:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 168              		.loc 1 282 3 is_stmt 1 view .LVU50
 282:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 169              		.loc 1 282 13 is_stmt 0 view .LVU51
 170 0086 013A     		subs	r2, r2, #1
 171 0088 1A62     		str	r2, [r3, #32]
 285:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 172              		.loc 1 285 3 is_stmt 1 view .LVU52
 285:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 173              		.loc 1 285 19 is_stmt 0 view .LVU53
 174 008a 074B     		ldr	r3, .L15+8
 175 008c 074A     		ldr	r2, .L15+12
 176 008e 1A60     		str	r2, [r3]
 288:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 177              		.loc 1 288 3 is_stmt 1 view .LVU54
 288:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 178              		.loc 1 288 7 is_stmt 0 view .LVU55
ARM GAS  /tmp/ccBwposX.s 			page 10


 179 0090 074B     		ldr	r3, .L15+16
 180 0092 1868     		ldr	r0, [r3]
 181 0094 FFF7FEFF 		bl	HAL_InitTick
 182              	.LVL13:
 288:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 183              		.loc 1 288 6 view .LVU56
 184 0098 0028     		cmp	r0, #0
 185 009a C5D0     		beq	.L3
 290:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 186              		.loc 1 290 12 view .LVU57
 187 009c 0120     		movs	r0, #1
 188 009e C3E7     		b	.L3
 189              	.L16:
 190              		.align	2
 191              	.L15:
 192 00a0 00100240 		.word	1073876992
 193 00a4 88130000 		.word	5000
 194 00a8 00000000 		.word	SystemCoreClock
 195 00ac 0024F400 		.word	16000000
 196 00b0 00000000 		.word	uwTickPrio
 197              		.cfi_endproc
 198              	.LFE297:
 200              		.section	.text.HAL_RCC_OscConfig,"ax",%progbits
 201              		.align	1
 202              		.global	HAL_RCC_OscConfig
 203              		.syntax unified
 204              		.code	16
 205              		.thumb_func
 206              		.fpu softvfp
 208              	HAL_RCC_OscConfig:
 209              	.LVL14:
 210              	.LFB298:
 297:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 298:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
 299:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief  Initialize the RCC Oscillators according to the specified parameters in the
 300:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         @ref RCC_OscInitTypeDef.
 301:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @param  RCC_OscInitStruct pointer to a @ref RCC_OscInitTypeDef structure that
 302:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         contains the configuration information for the RCC Oscillators.
 303:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   The PLL is not disabled when used as system clock.
 304:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
 305:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         supported by this function. User should request a transition to HSE Off
 306:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         first and then to HSE On or HSE Bypass.
 307:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   Transition LSE Bypass to LSE On and LSE On to LSE Bypass are not
 308:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         supported by this function. User should request a transition to LSE Off
 309:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         first and then to LSE On or LSE Bypass.
 310:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval HAL status
 311:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
 312:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
 313:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
 211              		.loc 1 313 1 is_stmt 1 view -0
 212              		.cfi_startproc
 213              		@ args = 0, pretend = 0, frame = 8
 214              		@ frame_needed = 0, uses_anonymous_args = 0
 215              		.loc 1 313 1 is_stmt 0 view .LVU59
 216 0000 70B5     		push	{r4, r5, r6, lr}
 217              	.LCFI1:
 218              		.cfi_def_cfa_offset 16
ARM GAS  /tmp/ccBwposX.s 			page 11


 219              		.cfi_offset 4, -16
 220              		.cfi_offset 5, -12
 221              		.cfi_offset 6, -8
 222              		.cfi_offset 14, -4
 223 0002 82B0     		sub	sp, sp, #8
 224              	.LCFI2:
 225              		.cfi_def_cfa_offset 24
 226 0004 041E     		subs	r4, r0, #0
 314:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   uint32_t tickstart;
 227              		.loc 1 314 3 is_stmt 1 view .LVU60
 315:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   uint32_t temp_sysclksrc;
 228              		.loc 1 315 3 view .LVU61
 316:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   uint32_t temp_pllckcfg;
 229              		.loc 1 316 3 view .LVU62
 317:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 318:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Check Null pointer */
 319:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (RCC_OscInitStruct == NULL)
 230              		.loc 1 319 3 view .LVU63
 231              		.loc 1 319 6 is_stmt 0 view .LVU64
 232 0006 00D1     		bne	.LCB183
 233 0008 34E2     		b	.L72	@long jump
 234              	.LCB183:
 320:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 321:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     return HAL_ERROR;
 322:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 323:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 324:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Check the parameters */
 325:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
 235              		.loc 1 325 3 is_stmt 1 view .LVU65
 326:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 327:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /*------------------------------- HSE Configuration ------------------------*/
 328:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 236              		.loc 1 328 3 view .LVU66
 237              		.loc 1 328 6 is_stmt 0 view .LVU67
 238 000a 0368     		ldr	r3, [r0]
 239 000c DB07     		lsls	r3, r3, #31
 240 000e 39D5     		bpl	.L19
 329:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 330:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Check the parameters */
 331:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
 241              		.loc 1 331 5 is_stmt 1 view .LVU68
 332:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 333:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 242              		.loc 1 333 5 view .LVU69
 243              		.loc 1 333 22 is_stmt 0 view .LVU70
 244 0010 C14A     		ldr	r2, .L117
 245 0012 9168     		ldr	r1, [r2, #8]
 246              		.loc 1 333 20 view .LVU71
 247 0014 3823     		movs	r3, #56
 248 0016 0B40     		ands	r3, r1
 249              	.LVL15:
 334:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     temp_pllckcfg = __HAL_RCC_GET_PLL_OSCSOURCE();
 250              		.loc 1 334 5 is_stmt 1 view .LVU72
 251              		.loc 1 334 21 is_stmt 0 view .LVU73
 252 0018 D168     		ldr	r1, [r2, #12]
 253              		.loc 1 334 19 view .LVU74
 254 001a 0322     		movs	r2, #3
ARM GAS  /tmp/ccBwposX.s 			page 12


 255 001c 0A40     		ands	r2, r1
 256              	.LVL16:
 335:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 336:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowe
 337:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     if (((temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (temp_pllckcfg == RCC_PLLSOURCE_HSE)
 257              		.loc 1 337 5 is_stmt 1 view .LVU75
 258              		.loc 1 337 8 is_stmt 0 view .LVU76
 259 001e 102B     		cmp	r3, #16
 260 0020 26D0     		beq	.L99
 261              	.L20:
 338:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         || (temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_HSE))
 262              		.loc 1 338 9 view .LVU77
 263 0022 082B     		cmp	r3, #8
 264 0024 26D0     		beq	.L21
 339:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 340:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if ((READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 341:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 342:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         return HAL_ERROR;
 343:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 344:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 345:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     else
 346:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 347:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Set the new HSE configuration ---------------------------------------*/
 348:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 265              		.loc 1 348 7 is_stmt 1 view .LVU78
 266              		.loc 1 348 7 view .LVU79
 267 0026 6368     		ldr	r3, [r4, #4]
 268              	.LVL17:
 269              		.loc 1 348 7 is_stmt 0 view .LVU80
 270 0028 8022     		movs	r2, #128
 271              	.LVL18:
 272              		.loc 1 348 7 view .LVU81
 273 002a 5202     		lsls	r2, r2, #9
 274 002c 9342     		cmp	r3, r2
 275 002e 7FD0     		beq	.L100
 276              		.loc 1 348 7 is_stmt 1 discriminator 2 view .LVU82
 277 0030 A022     		movs	r2, #160
 278 0032 D202     		lsls	r2, r2, #11
 279 0034 9342     		cmp	r3, r2
 280 0036 00D1     		bne	.LCB223
 281 0038 81E0     		b	.L101	@long jump
 282              	.LCB223:
 283              		.loc 1 348 7 discriminator 5 view .LVU83
 284 003a B74B     		ldr	r3, .L117
 285 003c 1A68     		ldr	r2, [r3]
 286 003e B749     		ldr	r1, .L117+4
 287              	.LVL19:
 288              		.loc 1 348 7 is_stmt 0 discriminator 5 view .LVU84
 289 0040 0A40     		ands	r2, r1
 290 0042 1A60     		str	r2, [r3]
 291              		.loc 1 348 7 is_stmt 1 discriminator 5 view .LVU85
 292 0044 1A68     		ldr	r2, [r3]
 293 0046 B649     		ldr	r1, .L117+8
 294 0048 0A40     		ands	r2, r1
 295 004a 1A60     		str	r2, [r3]
 296              	.L24:
 297              		.loc 1 348 7 discriminator 7 view .LVU86
ARM GAS  /tmp/ccBwposX.s 			page 13


 349:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 350:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Check the HSE State */
 351:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
 298              		.loc 1 351 7 discriminator 7 view .LVU87
 299              		.loc 1 351 10 is_stmt 0 discriminator 7 view .LVU88
 300 004c 6368     		ldr	r3, [r4, #4]
 301 004e 002B     		cmp	r3, #0
 302 0050 00D1     		bne	.LCB243
 303 0052 80E0     		b	.L26	@long jump
 304              	.LCB243:
 352:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 353:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Get Start Tick*/
 354:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 305              		.loc 1 354 9 is_stmt 1 view .LVU89
 306              		.loc 1 354 21 is_stmt 0 view .LVU90
 307 0054 FFF7FEFF 		bl	HAL_GetTick
 308              	.LVL20:
 309              		.loc 1 354 21 view .LVU91
 310 0058 0500     		movs	r5, r0
 311              	.LVL21:
 355:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 356:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Wait till HSE is ready */
 357:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         while (READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U)
 312              		.loc 1 357 9 is_stmt 1 view .LVU92
 313              	.L27:
 314              		.loc 1 357 15 view .LVU93
 315              		.loc 1 357 16 is_stmt 0 view .LVU94
 316 005a AF4B     		ldr	r3, .L117
 317 005c 1B68     		ldr	r3, [r3]
 318              		.loc 1 357 15 view .LVU95
 319 005e 9B03     		lsls	r3, r3, #14
 320 0060 10D4     		bmi	.L19
 358:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 359:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 321              		.loc 1 359 11 is_stmt 1 view .LVU96
 322              		.loc 1 359 16 is_stmt 0 view .LVU97
 323 0062 FFF7FEFF 		bl	HAL_GetTick
 324              	.LVL22:
 325              		.loc 1 359 30 view .LVU98
 326 0066 401B     		subs	r0, r0, r5
 327              		.loc 1 359 14 view .LVU99
 328 0068 6428     		cmp	r0, #100
 329 006a F6D9     		bls	.L27
 360:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 361:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 330              		.loc 1 361 20 view .LVU100
 331 006c 0320     		movs	r0, #3
 332              		.loc 1 361 20 view .LVU101
 333 006e 02E2     		b	.L18
 334              	.LVL23:
 335              	.L99:
 337:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         || (temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_HSE))
 336              		.loc 1 337 61 discriminator 1 view .LVU102
 337 0070 032A     		cmp	r2, #3
 338 0072 D6D1     		bne	.L20
 339              	.L21:
 340:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
ARM GAS  /tmp/ccBwposX.s 			page 14


 340              		.loc 1 340 7 is_stmt 1 view .LVU103
 340:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 341              		.loc 1 340 12 is_stmt 0 view .LVU104
 342 0074 A84B     		ldr	r3, .L117
 343              	.LVL24:
 340:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 344              		.loc 1 340 12 view .LVU105
 345 0076 1B68     		ldr	r3, [r3]
 340:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 346              		.loc 1 340 10 view .LVU106
 347 0078 9B03     		lsls	r3, r3, #14
 348 007a 03D5     		bpl	.L19
 340:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 349              		.loc 1 340 52 discriminator 1 view .LVU107
 350 007c 6368     		ldr	r3, [r4, #4]
 351 007e 002B     		cmp	r3, #0
 352 0080 00D1     		bne	.LCB290
 353 0082 FAE1     		b	.L102	@long jump
 354              	.LCB290:
 355              	.LVL25:
 356              	.L19:
 362:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 363:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 364:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 365:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       else
 366:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 367:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Get Start Tick*/
 368:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 369:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 370:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Wait till HSE is disabled */
 371:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U)
 372:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 373:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 374:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 375:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 376:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 377:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 378:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 379:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 380:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 381:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /*----------------------------- HSI Configuration --------------------------*/
 382:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 357              		.loc 1 382 3 is_stmt 1 view .LVU108
 358              		.loc 1 382 6 is_stmt 0 view .LVU109
 359 0084 2368     		ldr	r3, [r4]
 360 0086 9B07     		lsls	r3, r3, #30
 361 0088 31D5     		bpl	.L31
 383:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 384:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Check the parameters */
 385:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
 362              		.loc 1 385 5 is_stmt 1 view .LVU110
 386:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_HSI_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
 363              		.loc 1 386 5 view .LVU111
 387:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_HSIDIV(RCC_OscInitStruct->HSIDiv));
 364              		.loc 1 387 5 view .LVU112
 388:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 389:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Check if HSI16 is used as system clock or as PLL source when PLL is selected as system clock
ARM GAS  /tmp/ccBwposX.s 			page 15


 390:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 365              		.loc 1 390 5 view .LVU113
 366              		.loc 1 390 22 is_stmt 0 view .LVU114
 367 008a A34A     		ldr	r2, .L117
 368 008c 9368     		ldr	r3, [r2, #8]
 369              		.loc 1 390 20 view .LVU115
 370 008e 3821     		movs	r1, #56
 371 0090 0B40     		ands	r3, r1
 372              	.LVL26:
 391:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     temp_pllckcfg = __HAL_RCC_GET_PLL_OSCSOURCE();
 373              		.loc 1 391 5 is_stmt 1 view .LVU116
 374              		.loc 1 391 21 is_stmt 0 view .LVU117
 375 0092 D168     		ldr	r1, [r2, #12]
 376              		.loc 1 391 19 view .LVU118
 377 0094 0322     		movs	r2, #3
 378 0096 0A40     		ands	r2, r1
 379              	.LVL27:
 392:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     if (((temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (temp_pllckcfg == RCC_PLLSOURCE_HSI)
 380              		.loc 1 392 5 is_stmt 1 view .LVU119
 381              		.loc 1 392 8 is_stmt 0 view .LVU120
 382 0098 102B     		cmp	r3, #16
 383 009a 6AD0     		beq	.L103
 384              	.L32:
 393:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         || (temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_HSI))
 385              		.loc 1 393 9 view .LVU121
 386 009c 002B     		cmp	r3, #0
 387 009e 6BD1     		bne	.L34
 388              	.L33:
 394:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 395:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* When HSI is used as system clock or as PLL input clock it can not be disabled */
 396:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 389              		.loc 1 396 7 is_stmt 1 view .LVU122
 390              		.loc 1 396 12 is_stmt 0 view .LVU123
 391 00a0 9D4A     		ldr	r2, .L117
 392              	.LVL28:
 393              		.loc 1 396 12 view .LVU124
 394 00a2 1268     		ldr	r2, [r2]
 395              		.loc 1 396 10 view .LVU125
 396 00a4 5205     		lsls	r2, r2, #21
 397 00a6 03D5     		bpl	.L35
 398              		.loc 1 396 52 discriminator 1 view .LVU126
 399 00a8 E268     		ldr	r2, [r4, #12]
 400 00aa 002A     		cmp	r2, #0
 401 00ac 00D1     		bne	.LCB334
 402 00ae E6E1     		b	.L76	@long jump
 403              	.LCB334:
 404              	.L35:
 397:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 398:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         return HAL_ERROR;
 399:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 400:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Otherwise, just the calibration is allowed */
 401:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       else
 402:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 403:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
 404:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 405              		.loc 1 404 9 is_stmt 1 view .LVU127
 406 00b0 9948     		ldr	r0, .L117
ARM GAS  /tmp/ccBwposX.s 			page 16


 407 00b2 4268     		ldr	r2, [r0, #4]
 408 00b4 9B49     		ldr	r1, .L117+12
 409              	.LVL29:
 410              		.loc 1 404 9 is_stmt 0 view .LVU128
 411 00b6 0A40     		ands	r2, r1
 412 00b8 6169     		ldr	r1, [r4, #20]
 413 00ba 0902     		lsls	r1, r1, #8
 414 00bc 0A43     		orrs	r2, r1
 415 00be 4260     		str	r2, [r0, #4]
 405:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 406:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         if (temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_HSI)
 416              		.loc 1 406 9 is_stmt 1 view .LVU129
 417              		.loc 1 406 12 is_stmt 0 view .LVU130
 418 00c0 002B     		cmp	r3, #0
 419 00c2 0DD1     		bne	.L36
 407:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 408:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           /* Adjust the HSI16 division factor */
 409:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIDiv);
 420              		.loc 1 409 11 is_stmt 1 view .LVU131
 421 00c4 0368     		ldr	r3, [r0]
 422              	.LVL30:
 423              		.loc 1 409 11 is_stmt 0 view .LVU132
 424 00c6 9849     		ldr	r1, .L117+16
 425 00c8 0B40     		ands	r3, r1
 426 00ca 2169     		ldr	r1, [r4, #16]
 427 00cc 0B43     		orrs	r3, r1
 428 00ce 0360     		str	r3, [r0]
 410:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 411:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           /* Update the SystemCoreClock global variable with HSISYS value  */
 412:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           SystemCoreClock = (HSI_VALUE / (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV)) >> RCC_CR_HSID
 429              		.loc 1 412 11 is_stmt 1 view .LVU133
 430              		.loc 1 412 52 is_stmt 0 view .LVU134
 431 00d0 0368     		ldr	r3, [r0]
 432              		.loc 1 412 86 view .LVU135
 433 00d2 DB0A     		lsrs	r3, r3, #11
 434 00d4 0722     		movs	r2, #7
 435 00d6 1A40     		ands	r2, r3
 436              		.loc 1 412 40 view .LVU136
 437 00d8 944B     		ldr	r3, .L117+20
 438 00da D340     		lsrs	r3, r3, r2
 439              		.loc 1 412 27 view .LVU137
 440 00dc 944A     		ldr	r2, .L117+24
 441 00de 1360     		str	r3, [r2]
 442              	.L36:
 413:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 414:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 415:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Adapt Systick interrupt period */
 416:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         if (HAL_InitTick(uwTickPrio) != HAL_OK)
 443              		.loc 1 416 9 is_stmt 1 view .LVU138
 444              		.loc 1 416 13 is_stmt 0 view .LVU139
 445 00e0 944B     		ldr	r3, .L117+28
 446 00e2 1868     		ldr	r0, [r3]
 447 00e4 FFF7FEFF 		bl	HAL_InitTick
 448              	.LVL31:
 449              		.loc 1 416 12 view .LVU140
 450 00e8 0028     		cmp	r0, #0
 451 00ea 00D0     		beq	.LCB377
ARM GAS  /tmp/ccBwposX.s 			page 17


 452 00ec C9E1     		b	.L104	@long jump
 453              	.LCB377:
 454              	.L31:
 417:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 418:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           return HAL_ERROR;
 419:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 420:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 421:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 422:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     else
 423:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 424:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Check the HSI State */
 425:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
 426:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 427:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Configure the HSI16 division factor */
 428:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIDiv);
 429:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 430:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Enable the Internal High Speed oscillator (HSI16). */
 431:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_HSI_ENABLE();
 432:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 433:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Get Start Tick*/
 434:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 435:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 436:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Wait till HSI is ready */
 437:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U)
 438:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 439:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 440:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 441:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 442:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 443:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 444:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 445:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
 446:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 447:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 448:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       else
 449:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 450:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Disable the Internal High Speed oscillator (HSI16). */
 451:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_HSI_DISABLE();
 452:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 453:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Get Start Tick*/
 454:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 455:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 456:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Wait till HSI is disabled */
 457:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U)
 458:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 459:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 460:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 461:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 462:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 463:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 464:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 465:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 466:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 467:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /*------------------------------ LSI Configuration -------------------------*/
 468:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 455              		.loc 1 468 3 is_stmt 1 view .LVU141
 456              		.loc 1 468 6 is_stmt 0 view .LVU142
ARM GAS  /tmp/ccBwposX.s 			page 18


 457 00ee 2368     		ldr	r3, [r4]
 458 00f0 1B07     		lsls	r3, r3, #28
 459 00f2 00D4     		bmi	.LCB388
 460 00f4 81E0     		b	.L42	@long jump
 461              	.LCB388:
 469:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 470:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Check the parameters */
 471:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
 462              		.loc 1 471 5 is_stmt 1 view .LVU143
 472:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 473:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Check if LSI is used as system clock */
 474:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_LSI)
 463              		.loc 1 474 5 view .LVU144
 464              		.loc 1 474 9 is_stmt 0 view .LVU145
 465 00f6 884B     		ldr	r3, .L117
 466 00f8 9A68     		ldr	r2, [r3, #8]
 467 00fa 3823     		movs	r3, #56
 468 00fc 1340     		ands	r3, r2
 469              		.loc 1 474 8 view .LVU146
 470 00fe 182B     		cmp	r3, #24
 471 0100 73D0     		beq	.L105
 475:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 476:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* When LSI is used as system clock it will not be disabled */
 477:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if ((((RCC->CSR) & RCC_CSR_LSIRDY) != 0U) && (RCC_OscInitStruct->LSIState == RCC_LSI_OFF))
 478:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 479:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         return HAL_ERROR;
 480:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 481:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 482:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     else
 483:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 484:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Check the LSI State */
 485:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
 472              		.loc 1 485 7 is_stmt 1 view .LVU147
 473              		.loc 1 485 10 is_stmt 0 view .LVU148
 474 0102 A369     		ldr	r3, [r4, #24]
 475 0104 002B     		cmp	r3, #0
 476 0106 00D1     		bne	.LCB401
 477 0108 B4E0     		b	.L44	@long jump
 478              	.LCB401:
 486:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 487:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Enable the Internal Low Speed oscillator (LSI). */
 488:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_LSI_ENABLE();
 479              		.loc 1 488 9 is_stmt 1 view .LVU149
 480 010a 834A     		ldr	r2, .L117
 481 010c 136E     		ldr	r3, [r2, #96]
 482 010e 0121     		movs	r1, #1
 483 0110 0B43     		orrs	r3, r1
 484 0112 1366     		str	r3, [r2, #96]
 489:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 490:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Get Start Tick*/
 491:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 485              		.loc 1 491 9 view .LVU150
 486              		.loc 1 491 21 is_stmt 0 view .LVU151
 487 0114 FFF7FEFF 		bl	HAL_GetTick
 488              	.LVL32:
 489 0118 0500     		movs	r5, r0
 490              	.LVL33:
ARM GAS  /tmp/ccBwposX.s 			page 19


 492:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 493:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Wait till LSI is ready */
 494:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         while (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == 0U)
 491              		.loc 1 494 9 is_stmt 1 view .LVU152
 492              	.L45:
 493              		.loc 1 494 15 view .LVU153
 494              		.loc 1 494 16 is_stmt 0 view .LVU154
 495 011a 7F4B     		ldr	r3, .L117
 496 011c 1B6E     		ldr	r3, [r3, #96]
 497              		.loc 1 494 15 view .LVU155
 498 011e 9B07     		lsls	r3, r3, #30
 499 0120 6BD4     		bmi	.L42
 495:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 496:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 500              		.loc 1 496 11 is_stmt 1 view .LVU156
 501              		.loc 1 496 16 is_stmt 0 view .LVU157
 502 0122 FFF7FEFF 		bl	HAL_GetTick
 503              	.LVL34:
 504              		.loc 1 496 30 view .LVU158
 505 0126 401B     		subs	r0, r0, r5
 506              		.loc 1 496 14 view .LVU159
 507 0128 0228     		cmp	r0, #2
 508 012a F6D9     		bls	.L45
 497:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 498:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 509              		.loc 1 498 20 view .LVU160
 510 012c 0320     		movs	r0, #3
 511 012e A2E1     		b	.L18
 512              	.LVL35:
 513              	.L100:
 348:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 514              		.loc 1 348 7 is_stmt 1 discriminator 1 view .LVU161
 515 0130 794A     		ldr	r2, .L117
 516 0132 1168     		ldr	r1, [r2]
 517              	.LVL36:
 348:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 518              		.loc 1 348 7 is_stmt 0 discriminator 1 view .LVU162
 519 0134 8023     		movs	r3, #128
 520 0136 5B02     		lsls	r3, r3, #9
 521 0138 0B43     		orrs	r3, r1
 522 013a 1360     		str	r3, [r2]
 523 013c 86E7     		b	.L24
 524              	.LVL37:
 525              	.L101:
 348:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 526              		.loc 1 348 7 is_stmt 1 discriminator 4 view .LVU163
 527 013e 764B     		ldr	r3, .L117
 528 0140 1968     		ldr	r1, [r3]
 529              	.LVL38:
 348:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 530              		.loc 1 348 7 is_stmt 0 discriminator 4 view .LVU164
 531 0142 8022     		movs	r2, #128
 532 0144 D202     		lsls	r2, r2, #11
 533 0146 0A43     		orrs	r2, r1
 534 0148 1A60     		str	r2, [r3]
 348:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 535              		.loc 1 348 7 is_stmt 1 discriminator 4 view .LVU165
ARM GAS  /tmp/ccBwposX.s 			page 20


 536 014a 1968     		ldr	r1, [r3]
 537 014c 8022     		movs	r2, #128
 538 014e 5202     		lsls	r2, r2, #9
 539 0150 0A43     		orrs	r2, r1
 540 0152 1A60     		str	r2, [r3]
 541 0154 7AE7     		b	.L24
 542              	.L26:
 368:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 543              		.loc 1 368 9 view .LVU166
 368:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 544              		.loc 1 368 21 is_stmt 0 view .LVU167
 545 0156 FFF7FEFF 		bl	HAL_GetTick
 546              	.LVL39:
 368:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 547              		.loc 1 368 21 view .LVU168
 548 015a 0500     		movs	r5, r0
 549              	.LVL40:
 371:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 550              		.loc 1 371 9 is_stmt 1 view .LVU169
 551              	.L29:
 371:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 552              		.loc 1 371 15 view .LVU170
 371:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 553              		.loc 1 371 16 is_stmt 0 view .LVU171
 554 015c 6E4B     		ldr	r3, .L117
 555 015e 1B68     		ldr	r3, [r3]
 371:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 556              		.loc 1 371 15 view .LVU172
 557 0160 9B03     		lsls	r3, r3, #14
 558 0162 8FD5     		bpl	.L19
 373:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 559              		.loc 1 373 11 is_stmt 1 view .LVU173
 373:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 560              		.loc 1 373 16 is_stmt 0 view .LVU174
 561 0164 FFF7FEFF 		bl	HAL_GetTick
 562              	.LVL41:
 373:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 563              		.loc 1 373 30 view .LVU175
 564 0168 401B     		subs	r0, r0, r5
 373:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 565              		.loc 1 373 14 view .LVU176
 566 016a 6428     		cmp	r0, #100
 567 016c F6D9     		bls	.L29
 375:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 568              		.loc 1 375 20 view .LVU177
 569 016e 0320     		movs	r0, #3
 375:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 570              		.loc 1 375 20 view .LVU178
 571 0170 81E1     		b	.L18
 572              	.LVL42:
 573              	.L103:
 392:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         || (temp_sysclksrc == RCC_SYSCLKSOURCE_STATUS_HSI))
 574              		.loc 1 392 61 discriminator 1 view .LVU179
 575 0172 022A     		cmp	r2, #2
 576 0174 92D1     		bne	.L32
 577 0176 93E7     		b	.L33
 578              	.L34:
ARM GAS  /tmp/ccBwposX.s 			page 21


 425:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 579              		.loc 1 425 7 is_stmt 1 view .LVU180
 425:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 580              		.loc 1 425 10 is_stmt 0 view .LVU181
 581 0178 E368     		ldr	r3, [r4, #12]
 582              	.LVL43:
 425:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 583              		.loc 1 425 10 view .LVU182
 584 017a 002B     		cmp	r3, #0
 585 017c 22D0     		beq	.L37
 428:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 586              		.loc 1 428 9 is_stmt 1 view .LVU183
 587 017e 664A     		ldr	r2, .L117
 588              	.LVL44:
 428:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 589              		.loc 1 428 9 is_stmt 0 view .LVU184
 590 0180 1368     		ldr	r3, [r2]
 591 0182 6949     		ldr	r1, .L117+16
 592              	.LVL45:
 428:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 593              		.loc 1 428 9 view .LVU185
 594 0184 0B40     		ands	r3, r1
 595 0186 2169     		ldr	r1, [r4, #16]
 596 0188 0B43     		orrs	r3, r1
 597 018a 1360     		str	r3, [r2]
 431:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 598              		.loc 1 431 9 is_stmt 1 view .LVU186
 599 018c 1168     		ldr	r1, [r2]
 600 018e 8023     		movs	r3, #128
 601 0190 5B00     		lsls	r3, r3, #1
 602 0192 0B43     		orrs	r3, r1
 603 0194 1360     		str	r3, [r2]
 434:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 604              		.loc 1 434 9 view .LVU187
 434:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 605              		.loc 1 434 21 is_stmt 0 view .LVU188
 606 0196 FFF7FEFF 		bl	HAL_GetTick
 607              	.LVL46:
 608 019a 0500     		movs	r5, r0
 609              	.LVL47:
 437:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 610              		.loc 1 437 9 is_stmt 1 view .LVU189
 611              	.L38:
 437:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 612              		.loc 1 437 15 view .LVU190
 437:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 613              		.loc 1 437 16 is_stmt 0 view .LVU191
 614 019c 5E4B     		ldr	r3, .L117
 615 019e 1B68     		ldr	r3, [r3]
 437:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 616              		.loc 1 437 15 view .LVU192
 617 01a0 5B05     		lsls	r3, r3, #21
 618 01a2 06D4     		bmi	.L106
 439:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 619              		.loc 1 439 11 is_stmt 1 view .LVU193
 439:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 620              		.loc 1 439 16 is_stmt 0 view .LVU194
ARM GAS  /tmp/ccBwposX.s 			page 22


 621 01a4 FFF7FEFF 		bl	HAL_GetTick
 622              	.LVL48:
 439:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 623              		.loc 1 439 30 view .LVU195
 624 01a8 401B     		subs	r0, r0, r5
 439:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 625              		.loc 1 439 14 view .LVU196
 626 01aa 0228     		cmp	r0, #2
 627 01ac F6D9     		bls	.L38
 441:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 628              		.loc 1 441 20 view .LVU197
 629 01ae 0320     		movs	r0, #3
 441:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 630              		.loc 1 441 20 view .LVU198
 631 01b0 61E1     		b	.L18
 632              	.L106:
 446:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 633              		.loc 1 446 9 is_stmt 1 view .LVU199
 634 01b2 5949     		ldr	r1, .L117
 635 01b4 4B68     		ldr	r3, [r1, #4]
 636 01b6 5B4A     		ldr	r2, .L117+12
 637 01b8 1340     		ands	r3, r2
 638 01ba 6269     		ldr	r2, [r4, #20]
 639 01bc 1202     		lsls	r2, r2, #8
 640 01be 1343     		orrs	r3, r2
 641 01c0 4B60     		str	r3, [r1, #4]
 642 01c2 94E7     		b	.L31
 643              	.LVL49:
 644              	.L37:
 451:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 645              		.loc 1 451 9 view .LVU200
 646 01c4 544A     		ldr	r2, .L117
 647              	.LVL50:
 451:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 648              		.loc 1 451 9 is_stmt 0 view .LVU201
 649 01c6 1368     		ldr	r3, [r2]
 650 01c8 5B49     		ldr	r1, .L117+32
 651              	.LVL51:
 451:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 652              		.loc 1 451 9 view .LVU202
 653 01ca 0B40     		ands	r3, r1
 654 01cc 1360     		str	r3, [r2]
 454:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 655              		.loc 1 454 9 is_stmt 1 view .LVU203
 454:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 656              		.loc 1 454 21 is_stmt 0 view .LVU204
 657 01ce FFF7FEFF 		bl	HAL_GetTick
 658              	.LVL52:
 659 01d2 0500     		movs	r5, r0
 660              	.LVL53:
 457:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 661              		.loc 1 457 9 is_stmt 1 view .LVU205
 662              	.L40:
 457:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 663              		.loc 1 457 15 view .LVU206
 457:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 664              		.loc 1 457 16 is_stmt 0 view .LVU207
ARM GAS  /tmp/ccBwposX.s 			page 23


 665 01d4 504B     		ldr	r3, .L117
 666 01d6 1B68     		ldr	r3, [r3]
 457:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 667              		.loc 1 457 15 view .LVU208
 668 01d8 5B05     		lsls	r3, r3, #21
 669 01da 88D5     		bpl	.L31
 459:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 670              		.loc 1 459 11 is_stmt 1 view .LVU209
 459:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 671              		.loc 1 459 16 is_stmt 0 view .LVU210
 672 01dc FFF7FEFF 		bl	HAL_GetTick
 673              	.LVL54:
 459:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 674              		.loc 1 459 30 view .LVU211
 675 01e0 401B     		subs	r0, r0, r5
 459:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 676              		.loc 1 459 14 view .LVU212
 677 01e2 0228     		cmp	r0, #2
 678 01e4 F6D9     		bls	.L40
 461:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 679              		.loc 1 461 20 view .LVU213
 680 01e6 0320     		movs	r0, #3
 461:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 681              		.loc 1 461 20 view .LVU214
 682 01e8 45E1     		b	.L18
 683              	.LVL55:
 684              	.L105:
 477:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 685              		.loc 1 477 7 is_stmt 1 view .LVU215
 477:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 686              		.loc 1 477 17 is_stmt 0 view .LVU216
 687 01ea 4B4B     		ldr	r3, .L117
 688 01ec 1B6E     		ldr	r3, [r3, #96]
 477:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 689              		.loc 1 477 10 view .LVU217
 690 01ee 9B07     		lsls	r3, r3, #30
 691 01f0 03D5     		bpl	.L42
 477:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 692              		.loc 1 477 49 discriminator 1 view .LVU218
 693 01f2 A369     		ldr	r3, [r4, #24]
 694 01f4 002B     		cmp	r3, #0
 695 01f6 00D1     		bne	.LCB626
 696 01f8 45E1     		b	.L107	@long jump
 697              	.LCB626:
 698              	.L42:
 499:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 500:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 501:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 502:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       else
 503:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 504:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Disable the Internal Low Speed oscillator (LSI). */
 505:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_LSI_DISABLE();
 506:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 507:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Get Start Tick*/
 508:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 509:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 510:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Wait till LSI is disabled */
ARM GAS  /tmp/ccBwposX.s 			page 24


 511:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         while (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) != 0U)
 512:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 513:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 514:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 515:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 516:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 517:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 518:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 519:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 520:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 521:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /*------------------------------ LSE Configuration -------------------------*/
 522:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 699              		.loc 1 522 3 is_stmt 1 view .LVU219
 700              		.loc 1 522 6 is_stmt 0 view .LVU220
 701 01fa 2368     		ldr	r3, [r4]
 702 01fc 5B07     		lsls	r3, r3, #29
 703 01fe 00D4     		bmi	.LCB635
 704 0200 A2E0     		b	.L49	@long jump
 705              	.LCB635:
 706              	.LBB4:
 523:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 524:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     FlagStatus       pwrclkchanged = RESET;
 707              		.loc 1 524 5 is_stmt 1 view .LVU221
 708              	.LVL56:
 525:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 526:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Check the parameters */
 527:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
 709              		.loc 1 527 5 view .LVU222
 528:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 529:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* When the LSE is used as system clock, it is not allowed disable it */
 530:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_LSE)
 710              		.loc 1 530 5 view .LVU223
 711              		.loc 1 530 9 is_stmt 0 view .LVU224
 712 0202 454B     		ldr	r3, .L117
 713 0204 9A68     		ldr	r2, [r3, #8]
 714 0206 3823     		movs	r3, #56
 715 0208 1340     		ands	r3, r2
 716              		.loc 1 530 8 view .LVU225
 717 020a 202B     		cmp	r3, #32
 718 020c 45D0     		beq	.L108
 531:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 532:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if ((((RCC->BDCR) & RCC_BDCR_LSERDY) != 0U) && (RCC_OscInitStruct->LSEState == RCC_LSE_OFF))
 533:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 534:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         return HAL_ERROR;
 535:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 536:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 537:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     else
 538:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 539:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Update LSE configuration in Backup Domain control register    */
 540:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Requires to enable write access to Backup Domain of necessary */
 541:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if (__HAL_RCC_PWR_IS_CLK_DISABLED() != 0U)
 719              		.loc 1 541 7 is_stmt 1 view .LVU226
 720              		.loc 1 541 11 is_stmt 0 view .LVU227
 721 020e 424B     		ldr	r3, .L117
 722 0210 DB6B     		ldr	r3, [r3, #60]
 723              		.loc 1 541 43 view .LVU228
 724 0212 DB00     		lsls	r3, r3, #3
ARM GAS  /tmp/ccBwposX.s 			page 25


 725 0214 4AD4     		bmi	.L84
 542:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 543:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_PWR_CLK_ENABLE();
 726              		.loc 1 543 9 is_stmt 1 view .LVU229
 727              	.LBB5:
 728              		.loc 1 543 9 view .LVU230
 729              		.loc 1 543 9 view .LVU231
 730 0216 404A     		ldr	r2, .L117
 731 0218 D16B     		ldr	r1, [r2, #60]
 732 021a 8020     		movs	r0, #128
 733 021c 4005     		lsls	r0, r0, #21
 734 021e 0143     		orrs	r1, r0
 735 0220 D163     		str	r1, [r2, #60]
 736              		.loc 1 543 9 view .LVU232
 737 0222 D36B     		ldr	r3, [r2, #60]
 738 0224 0340     		ands	r3, r0
 739 0226 0193     		str	r3, [sp, #4]
 740              		.loc 1 543 9 view .LVU233
 741 0228 019B     		ldr	r3, [sp, #4]
 742              	.LBE5:
 743              		.loc 1 543 9 view .LVU234
 544:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         pwrclkchanged = SET;
 744              		.loc 1 544 9 view .LVU235
 745              	.LVL57:
 746              		.loc 1 544 23 is_stmt 0 view .LVU236
 747 022a 0125     		movs	r5, #1
 748              	.LVL58:
 749              	.L51:
 545:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 546:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 547:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
 750              		.loc 1 547 7 is_stmt 1 view .LVU237
 751              		.loc 1 547 11 is_stmt 0 view .LVU238
 752 022c 434B     		ldr	r3, .L117+36
 753 022e 1B68     		ldr	r3, [r3]
 754              		.loc 1 547 10 view .LVU239
 755 0230 DB05     		lsls	r3, r3, #23
 756 0232 3DD5     		bpl	.L109
 757              	.L52:
 548:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 549:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Enable write access to Backup domain */
 550:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         SET_BIT(PWR->CR1, PWR_CR1_DBP);
 551:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 552:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Wait for Backup domain Write protection disable */
 553:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 554:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 555:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         while (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
 556:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 557:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 558:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 559:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 560:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 561:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 562:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 563:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 564:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Set the new LSE configuration -----------------------------------------*/
 565:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
ARM GAS  /tmp/ccBwposX.s 			page 26


 758              		.loc 1 565 7 is_stmt 1 view .LVU240
 759              		.loc 1 565 7 view .LVU241
 760 0234 A368     		ldr	r3, [r4, #8]
 761 0236 012B     		cmp	r3, #1
 762 0238 4ED0     		beq	.L110
 763              		.loc 1 565 7 discriminator 2 view .LVU242
 764 023a 052B     		cmp	r3, #5
 765 023c 52D0     		beq	.L111
 766              		.loc 1 565 7 discriminator 5 view .LVU243
 767 023e 364B     		ldr	r3, .L117
 768 0240 DA6D     		ldr	r2, [r3, #92]
 769 0242 0121     		movs	r1, #1
 770 0244 8A43     		bics	r2, r1
 771 0246 DA65     		str	r2, [r3, #92]
 772              		.loc 1 565 7 discriminator 5 view .LVU244
 773 0248 DA6D     		ldr	r2, [r3, #92]
 774 024a 0331     		adds	r1, r1, #3
 775 024c 8A43     		bics	r2, r1
 776 024e DA65     		str	r2, [r3, #92]
 777              	.L56:
 778              		.loc 1 565 7 discriminator 7 view .LVU245
 566:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 567:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Check the LSE State */
 568:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
 779              		.loc 1 568 7 discriminator 7 view .LVU246
 780              		.loc 1 568 10 is_stmt 0 discriminator 7 view .LVU247
 781 0250 A368     		ldr	r3, [r4, #8]
 782 0252 002B     		cmp	r3, #0
 783 0254 50D0     		beq	.L58
 569:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 570:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Get Start Tick*/
 571:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 784              		.loc 1 571 9 is_stmt 1 view .LVU248
 785              		.loc 1 571 21 is_stmt 0 view .LVU249
 786 0256 FFF7FEFF 		bl	HAL_GetTick
 787              	.LVL59:
 788 025a 0600     		movs	r6, r0
 789              	.LVL60:
 572:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 573:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Wait till LSE is ready */
 574:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U)
 790              		.loc 1 574 9 is_stmt 1 view .LVU250
 791              	.L59:
 792              		.loc 1 574 15 view .LVU251
 793              		.loc 1 574 16 is_stmt 0 view .LVU252
 794 025c 2E4B     		ldr	r3, .L117
 795 025e DB6D     		ldr	r3, [r3, #92]
 796              		.loc 1 574 15 view .LVU253
 797 0260 9B07     		lsls	r3, r3, #30
 798 0262 6FD4     		bmi	.L61
 575:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 576:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 799              		.loc 1 576 11 is_stmt 1 view .LVU254
 800              		.loc 1 576 16 is_stmt 0 view .LVU255
 801 0264 FFF7FEFF 		bl	HAL_GetTick
 802              	.LVL61:
 803              		.loc 1 576 30 view .LVU256
ARM GAS  /tmp/ccBwposX.s 			page 27


 804 0268 801B     		subs	r0, r0, r6
 805              		.loc 1 576 14 view .LVU257
 806 026a 354B     		ldr	r3, .L117+40
 807 026c 9842     		cmp	r0, r3
 808 026e F5D9     		bls	.L59
 577:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 578:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 809              		.loc 1 578 20 view .LVU258
 810 0270 0320     		movs	r0, #3
 811 0272 00E1     		b	.L18
 812              	.LVL62:
 813              	.L44:
 814              		.loc 1 578 20 view .LVU259
 815              	.LBE4:
 505:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 816              		.loc 1 505 9 is_stmt 1 view .LVU260
 817 0274 284A     		ldr	r2, .L117
 818 0276 136E     		ldr	r3, [r2, #96]
 819 0278 0121     		movs	r1, #1
 820 027a 8B43     		bics	r3, r1
 821 027c 1366     		str	r3, [r2, #96]
 508:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 822              		.loc 1 508 9 view .LVU261
 508:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 823              		.loc 1 508 21 is_stmt 0 view .LVU262
 824 027e FFF7FEFF 		bl	HAL_GetTick
 825              	.LVL63:
 826 0282 0500     		movs	r5, r0
 827              	.LVL64:
 511:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 828              		.loc 1 511 9 is_stmt 1 view .LVU263
 829              	.L47:
 511:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 830              		.loc 1 511 15 view .LVU264
 511:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 831              		.loc 1 511 16 is_stmt 0 view .LVU265
 832 0284 244B     		ldr	r3, .L117
 833 0286 1B6E     		ldr	r3, [r3, #96]
 511:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 834              		.loc 1 511 15 view .LVU266
 835 0288 9B07     		lsls	r3, r3, #30
 836 028a B6D5     		bpl	.L42
 513:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 837              		.loc 1 513 11 is_stmt 1 view .LVU267
 513:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 838              		.loc 1 513 16 is_stmt 0 view .LVU268
 839 028c FFF7FEFF 		bl	HAL_GetTick
 840              	.LVL65:
 513:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 841              		.loc 1 513 30 view .LVU269
 842 0290 401B     		subs	r0, r0, r5
 513:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 843              		.loc 1 513 14 view .LVU270
 844 0292 0228     		cmp	r0, #2
 845 0294 F6D9     		bls	.L47
 515:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 846              		.loc 1 515 20 view .LVU271
ARM GAS  /tmp/ccBwposX.s 			page 28


 847 0296 0320     		movs	r0, #3
 848 0298 EDE0     		b	.L18
 849              	.LVL66:
 850              	.L108:
 851              	.LBB6:
 532:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 852              		.loc 1 532 7 is_stmt 1 view .LVU272
 532:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 853              		.loc 1 532 17 is_stmt 0 view .LVU273
 854 029a 1F4B     		ldr	r3, .L117
 855 029c DB6D     		ldr	r3, [r3, #92]
 532:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 856              		.loc 1 532 10 view .LVU274
 857 029e 9B07     		lsls	r3, r3, #30
 858 02a0 52D5     		bpl	.L49
 532:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 859              		.loc 1 532 51 discriminator 1 view .LVU275
 860 02a2 A368     		ldr	r3, [r4, #8]
 861 02a4 002B     		cmp	r3, #0
 862 02a6 4FD1     		bne	.L49
 534:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 863              		.loc 1 534 16 view .LVU276
 864 02a8 0120     		movs	r0, #1
 865 02aa E4E0     		b	.L18
 866              	.L84:
 524:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 867              		.loc 1 524 22 view .LVU277
 868 02ac 0025     		movs	r5, #0
 869 02ae BDE7     		b	.L51
 870              	.LVL67:
 871              	.L109:
 550:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 872              		.loc 1 550 9 is_stmt 1 view .LVU278
 873 02b0 224A     		ldr	r2, .L117+36
 874 02b2 1168     		ldr	r1, [r2]
 875 02b4 8023     		movs	r3, #128
 876 02b6 5B00     		lsls	r3, r3, #1
 877 02b8 0B43     		orrs	r3, r1
 878 02ba 1360     		str	r3, [r2]
 553:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 879              		.loc 1 553 9 view .LVU279
 553:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 880              		.loc 1 553 21 is_stmt 0 view .LVU280
 881 02bc FFF7FEFF 		bl	HAL_GetTick
 882              	.LVL68:
 883 02c0 0600     		movs	r6, r0
 884              	.LVL69:
 555:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 885              		.loc 1 555 9 is_stmt 1 view .LVU281
 886              	.L53:
 555:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 887              		.loc 1 555 15 view .LVU282
 555:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 888              		.loc 1 555 16 is_stmt 0 view .LVU283
 889 02c2 1E4B     		ldr	r3, .L117+36
 890 02c4 1B68     		ldr	r3, [r3]
 555:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
ARM GAS  /tmp/ccBwposX.s 			page 29


 891              		.loc 1 555 15 view .LVU284
 892 02c6 DB05     		lsls	r3, r3, #23
 893 02c8 B4D4     		bmi	.L52
 557:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 894              		.loc 1 557 11 is_stmt 1 view .LVU285
 557:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 895              		.loc 1 557 16 is_stmt 0 view .LVU286
 896 02ca FFF7FEFF 		bl	HAL_GetTick
 897              	.LVL70:
 557:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 898              		.loc 1 557 30 view .LVU287
 899 02ce 801B     		subs	r0, r0, r6
 557:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 900              		.loc 1 557 14 view .LVU288
 901 02d0 0228     		cmp	r0, #2
 902 02d2 F6D9     		bls	.L53
 559:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 903              		.loc 1 559 20 view .LVU289
 904 02d4 0320     		movs	r0, #3
 905 02d6 CEE0     		b	.L18
 906              	.LVL71:
 907              	.L110:
 565:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 908              		.loc 1 565 7 is_stmt 1 discriminator 1 view .LVU290
 909 02d8 0F4A     		ldr	r2, .L117
 910 02da D36D     		ldr	r3, [r2, #92]
 911 02dc 0121     		movs	r1, #1
 912 02de 0B43     		orrs	r3, r1
 913 02e0 D365     		str	r3, [r2, #92]
 914 02e2 B5E7     		b	.L56
 915              	.L111:
 565:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 916              		.loc 1 565 7 discriminator 4 view .LVU291
 917 02e4 0C4B     		ldr	r3, .L117
 918 02e6 DA6D     		ldr	r2, [r3, #92]
 919 02e8 0421     		movs	r1, #4
 920 02ea 0A43     		orrs	r2, r1
 921 02ec DA65     		str	r2, [r3, #92]
 565:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 922              		.loc 1 565 7 discriminator 4 view .LVU292
 923 02ee DA6D     		ldr	r2, [r3, #92]
 924 02f0 0339     		subs	r1, r1, #3
 925 02f2 0A43     		orrs	r2, r1
 926 02f4 DA65     		str	r2, [r3, #92]
 927 02f6 ABE7     		b	.L56
 928              	.L58:
 579:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 580:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 581:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 582:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       else
 583:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 584:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Get Start Tick*/
 585:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 929              		.loc 1 585 9 view .LVU293
 930              		.loc 1 585 21 is_stmt 0 view .LVU294
 931 02f8 FFF7FEFF 		bl	HAL_GetTick
 932              	.LVL72:
ARM GAS  /tmp/ccBwposX.s 			page 30


 933 02fc 0600     		movs	r6, r0
 934              	.LVL73:
 586:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 587:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Wait till LSE is disabled */
 588:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) != 0U)
 935              		.loc 1 588 9 is_stmt 1 view .LVU295
 936              	.L62:
 937              		.loc 1 588 15 view .LVU296
 938              		.loc 1 588 16 is_stmt 0 view .LVU297
 939 02fe 064B     		ldr	r3, .L117
 940 0300 DB6D     		ldr	r3, [r3, #92]
 941              		.loc 1 588 15 view .LVU298
 942 0302 9B07     		lsls	r3, r3, #30
 943 0304 1ED5     		bpl	.L61
 589:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 590:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 944              		.loc 1 590 11 is_stmt 1 view .LVU299
 945              		.loc 1 590 16 is_stmt 0 view .LVU300
 946 0306 FFF7FEFF 		bl	HAL_GetTick
 947              	.LVL74:
 948              		.loc 1 590 30 view .LVU301
 949 030a 801B     		subs	r0, r0, r6
 950              		.loc 1 590 14 view .LVU302
 951 030c 0C4B     		ldr	r3, .L117+40
 952 030e 9842     		cmp	r0, r3
 953 0310 F5D9     		bls	.L62
 591:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 592:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 954              		.loc 1 592 20 view .LVU303
 955 0312 0320     		movs	r0, #3
 956 0314 AFE0     		b	.L18
 957              	.L118:
 958 0316 C046     		.align	2
 959              	.L117:
 960 0318 00100240 		.word	1073876992
 961 031c FFFFFEFF 		.word	-65537
 962 0320 FFFFFBFF 		.word	-262145
 963 0324 FF80FFFF 		.word	-32513
 964 0328 FFC7FFFF 		.word	-14337
 965 032c 0024F400 		.word	16000000
 966 0330 00000000 		.word	SystemCoreClock
 967 0334 00000000 		.word	uwTickPrio
 968 0338 FFFEFFFF 		.word	-257
 969 033c 00700040 		.word	1073770496
 970 0340 88130000 		.word	5000
 971              	.L61:
 593:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 594:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 595:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 596:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 597:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Restore clock configuration if changed */
 598:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if (pwrclkchanged == SET)
 972              		.loc 1 598 7 is_stmt 1 view .LVU304
 973              		.loc 1 598 10 is_stmt 0 view .LVU305
 974 0344 012D     		cmp	r5, #1
 975 0346 26D0     		beq	.L112
 976              	.LVL75:
ARM GAS  /tmp/ccBwposX.s 			page 31


 977              	.L49:
 978              		.loc 1 598 10 view .LVU306
 979              	.LBE6:
 599:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 600:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_PWR_CLK_DISABLE();
 601:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 602:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 603:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 604:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT)
 605:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /*------------------------------ HSI48 Configuration -----------------------*/
 606:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
 607:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 608:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Check the parameters */
 609:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));
 610:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 611:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Check the LSI State */
 612:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     if (RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF)
 613:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 614:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Enable the Internal Low Speed oscillator (HSI48). */
 615:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       __HAL_RCC_HSI48_ENABLE();
 616:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 617:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Get Start Tick*/
 618:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 619:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 620:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Wait till HSI48 is ready */
 621:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       while (READ_BIT(RCC->CR, RCC_CR_HSI48RDY) == 0U)
 622:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 623:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
 624:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 625:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           return HAL_TIMEOUT;
 626:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 627:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 628:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 629:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     else
 630:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 631:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Disable the Internal Low Speed oscillator (HSI48). */
 632:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       __HAL_RCC_HSI48_DISABLE();
 633:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 634:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Get Start Tick*/
 635:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 636:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 637:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Wait till HSI48 is disabled */
 638:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       while (READ_BIT(RCC->CR, RCC_CR_HSI48RDY) != 0U)
 639:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 640:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
 641:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 642:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           return HAL_TIMEOUT;
 643:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 644:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 645:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 646:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 647:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */
 648:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /*-------------------------------- PLL Configuration -----------------------*/
 649:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Check the parameters */
 650:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
 980              		.loc 1 650 3 is_stmt 1 view .LVU307
 651:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
ARM GAS  /tmp/ccBwposX.s 			page 32


 652:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (RCC_OscInitStruct->PLL.PLLState != RCC_PLL_NONE)
 981              		.loc 1 652 3 view .LVU308
 982              		.loc 1 652 29 is_stmt 0 view .LVU309
 983 0348 E369     		ldr	r3, [r4, #28]
 984              		.loc 1 652 6 view .LVU310
 985 034a 002B     		cmp	r3, #0
 986 034c 00D1     		bne	.LCB921
 987 034e 9CE0     		b	.L88	@long jump
 988              	.LCB921:
 653:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 654:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Check if the PLL is used as system clock or not */
 655:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 989              		.loc 1 655 5 is_stmt 1 view .LVU311
 990              		.loc 1 655 9 is_stmt 0 view .LVU312
 991 0350 564A     		ldr	r2, .L119
 992 0352 9168     		ldr	r1, [r2, #8]
 993 0354 3822     		movs	r2, #56
 994 0356 0A40     		ands	r2, r1
 995              		.loc 1 655 8 view .LVU313
 996 0358 102A     		cmp	r2, #16
 997 035a 63D0     		beq	.L64
 656:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 657:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if (RCC_OscInitStruct->PLL.PLLState == RCC_PLL_ON)
 998              		.loc 1 657 7 is_stmt 1 view .LVU314
 999              		.loc 1 657 10 is_stmt 0 view .LVU315
 1000 035c 022B     		cmp	r3, #2
 1001 035e 20D0     		beq	.L113
 658:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 659:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Check the parameters */
 660:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
 661:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM));
 662:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
 663:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
 664:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #if defined(RCC_PLLQ_SUPPORT)
 665:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
 666:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #endif /* RCC_PLLQ_SUPPORT */
 667:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
 668:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 669:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Disable the main PLL. */
 670:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_PLL_DISABLE();
 671:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 672:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Get Start Tick*/
 673:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 674:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 675:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Wait till PLL is ready */
 676:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U)
 677:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 678:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 679:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 680:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 681:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 682:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 683:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 684:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Configure the main PLL clock source, multiplication and division factors. */
 685:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 686:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                              RCC_OscInitStruct->PLL.PLLM,
 687:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                              RCC_OscInitStruct->PLL.PLLN,
ARM GAS  /tmp/ccBwposX.s 			page 33


 688:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                              RCC_OscInitStruct->PLL.PLLP,
 689:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #if defined(RCC_PLLQ_SUPPORT)
 690:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                              RCC_OscInitStruct->PLL.PLLQ,
 691:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #endif /* RCC_PLLQ_SUPPORT */
 692:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                              RCC_OscInitStruct->PLL.PLLR);
 693:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 694:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Enable the main PLL. */
 695:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_PLL_ENABLE();
 696:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 697:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Enable PLLR Clock output. */
 698:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLLRCLK);
 699:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 700:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Get Start Tick*/
 701:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 702:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 703:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Wait till PLL is ready */
 704:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U)
 705:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 706:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 707:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 708:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 709:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 710:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 711:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 712:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       else
 713:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 714:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Disable the main PLL. */
 715:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_PLL_DISABLE();
 1002              		.loc 1 715 9 is_stmt 1 view .LVU316
 1003 0360 524B     		ldr	r3, .L119
 1004 0362 1A68     		ldr	r2, [r3]
 1005 0364 5249     		ldr	r1, .L119+4
 1006 0366 0A40     		ands	r2, r1
 1007 0368 1A60     		str	r2, [r3]
 716:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 717:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Disable all PLL outputs to save power */
 718:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, PLLSOURCE_NONE);
 1008              		.loc 1 718 9 view .LVU317
 1009 036a DA68     		ldr	r2, [r3, #12]
 1010 036c 0321     		movs	r1, #3
 1011 036e 8A43     		bics	r2, r1
 1012 0370 DA60     		str	r2, [r3, #12]
 719:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 720:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #if defined(RCC_PLLQ_SUPPORT)
 721:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_PLLCLKOUT_DISABLE(RCC_PLLCFGR_PLLPEN | RCC_PLLCFGR_PLLQEN | RCC_PLLCFGR_PLLREN);
 1013              		.loc 1 721 9 view .LVU318
 1014 0372 DA68     		ldr	r2, [r3, #12]
 1015 0374 4F49     		ldr	r1, .L119+8
 1016 0376 0A40     		ands	r2, r1
 1017 0378 DA60     		str	r2, [r3, #12]
 722:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #else
 723:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         __HAL_RCC_PLLCLKOUT_DISABLE(RCC_PLLCFGR_PLLPEN | RCC_PLLCFGR_PLLREN);
 724:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #endif /* RCC_PLLQ_SUPPORT */
 725:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 726:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Get Start Tick*/
 727:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 1018              		.loc 1 727 9 view .LVU319
ARM GAS  /tmp/ccBwposX.s 			page 34


 1019              		.loc 1 727 21 is_stmt 0 view .LVU320
 1020 037a FFF7FEFF 		bl	HAL_GetTick
 1021              	.LVL76:
 1022 037e 0400     		movs	r4, r0
 1023              	.LVL77:
 728:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 729:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Wait till PLL is disabled */
 730:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U)
 1024              		.loc 1 730 9 is_stmt 1 view .LVU321
 1025              	.L70:
 1026              		.loc 1 730 15 view .LVU322
 1027              		.loc 1 730 16 is_stmt 0 view .LVU323
 1028 0380 4A4B     		ldr	r3, .L119
 1029 0382 1B68     		ldr	r3, [r3]
 1030              		.loc 1 730 15 view .LVU324
 1031 0384 9B01     		lsls	r3, r3, #6
 1032 0386 4BD5     		bpl	.L114
 731:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 732:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 1033              		.loc 1 732 11 is_stmt 1 view .LVU325
 1034              		.loc 1 732 16 is_stmt 0 view .LVU326
 1035 0388 FFF7FEFF 		bl	HAL_GetTick
 1036              	.LVL78:
 1037              		.loc 1 732 30 view .LVU327
 1038 038c 001B     		subs	r0, r0, r4
 1039              		.loc 1 732 14 view .LVU328
 1040 038e 0228     		cmp	r0, #2
 1041 0390 F6D9     		bls	.L70
 733:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 734:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 1042              		.loc 1 734 20 view .LVU329
 1043 0392 0320     		movs	r0, #3
 1044 0394 6FE0     		b	.L18
 1045              	.LVL79:
 1046              	.L112:
 1047              	.LBB7:
 600:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 1048              		.loc 1 600 9 is_stmt 1 view .LVU330
 1049 0396 454A     		ldr	r2, .L119
 1050 0398 D36B     		ldr	r3, [r2, #60]
 1051 039a 4749     		ldr	r1, .L119+12
 1052 039c 0B40     		ands	r3, r1
 1053 039e D363     		str	r3, [r2, #60]
 1054 03a0 D2E7     		b	.L49
 1055              	.LVL80:
 1056              	.L113:
 600:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 1057              		.loc 1 600 9 is_stmt 0 view .LVU331
 1058              	.LBE7:
 660:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM));
 1059              		.loc 1 660 9 is_stmt 1 view .LVU332
 661:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
 1060              		.loc 1 661 9 view .LVU333
 662:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
 1061              		.loc 1 662 9 view .LVU334
 663:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #if defined(RCC_PLLQ_SUPPORT)
 1062              		.loc 1 663 9 view .LVU335
ARM GAS  /tmp/ccBwposX.s 			page 35


 665:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #endif /* RCC_PLLQ_SUPPORT */
 1063              		.loc 1 665 9 view .LVU336
 667:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1064              		.loc 1 667 9 view .LVU337
 670:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1065              		.loc 1 670 9 view .LVU338
 1066 03a2 424A     		ldr	r2, .L119
 1067 03a4 1368     		ldr	r3, [r2]
 1068 03a6 4249     		ldr	r1, .L119+4
 1069 03a8 0B40     		ands	r3, r1
 1070 03aa 1360     		str	r3, [r2]
 673:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1071              		.loc 1 673 9 view .LVU339
 673:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1072              		.loc 1 673 21 is_stmt 0 view .LVU340
 1073 03ac FFF7FEFF 		bl	HAL_GetTick
 1074              	.LVL81:
 1075 03b0 0500     		movs	r5, r0
 1076              	.LVL82:
 676:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 1077              		.loc 1 676 9 is_stmt 1 view .LVU341
 1078              	.L66:
 676:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 1079              		.loc 1 676 15 view .LVU342
 676:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 1080              		.loc 1 676 16 is_stmt 0 view .LVU343
 1081 03b2 3E4B     		ldr	r3, .L119
 1082 03b4 1B68     		ldr	r3, [r3]
 676:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 1083              		.loc 1 676 15 view .LVU344
 1084 03b6 9B01     		lsls	r3, r3, #6
 1085 03b8 06D5     		bpl	.L115
 678:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 1086              		.loc 1 678 11 is_stmt 1 view .LVU345
 678:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 1087              		.loc 1 678 16 is_stmt 0 view .LVU346
 1088 03ba FFF7FEFF 		bl	HAL_GetTick
 1089              	.LVL83:
 678:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 1090              		.loc 1 678 30 view .LVU347
 1091 03be 401B     		subs	r0, r0, r5
 678:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 1092              		.loc 1 678 14 view .LVU348
 1093 03c0 0228     		cmp	r0, #2
 1094 03c2 F6D9     		bls	.L66
 680:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 1095              		.loc 1 680 20 view .LVU349
 1096 03c4 0320     		movs	r0, #3
 1097 03c6 56E0     		b	.L18
 1098              	.L115:
 685:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                              RCC_OscInitStruct->PLL.PLLM,
 1099              		.loc 1 685 9 is_stmt 1 view .LVU350
 1100 03c8 384A     		ldr	r2, .L119
 1101 03ca D368     		ldr	r3, [r2, #12]
 1102 03cc 3B49     		ldr	r1, .L119+16
 1103 03ce 1940     		ands	r1, r3
 1104 03d0 236A     		ldr	r3, [r4, #32]
ARM GAS  /tmp/ccBwposX.s 			page 36


 1105 03d2 606A     		ldr	r0, [r4, #36]
 1106 03d4 0343     		orrs	r3, r0
 1107 03d6 A06A     		ldr	r0, [r4, #40]
 1108 03d8 0002     		lsls	r0, r0, #8
 1109 03da 0343     		orrs	r3, r0
 1110 03dc E06A     		ldr	r0, [r4, #44]
 1111 03de 0343     		orrs	r3, r0
 1112 03e0 206B     		ldr	r0, [r4, #48]
 1113 03e2 0343     		orrs	r3, r0
 1114 03e4 606B     		ldr	r0, [r4, #52]
 1115 03e6 0343     		orrs	r3, r0
 1116 03e8 0B43     		orrs	r3, r1
 1117 03ea D360     		str	r3, [r2, #12]
 695:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1118              		.loc 1 695 9 view .LVU351
 1119 03ec 1168     		ldr	r1, [r2]
 1120 03ee 8023     		movs	r3, #128
 1121 03f0 5B04     		lsls	r3, r3, #17
 1122 03f2 0B43     		orrs	r3, r1
 1123 03f4 1360     		str	r3, [r2]
 698:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1124              		.loc 1 698 9 view .LVU352
 1125 03f6 D168     		ldr	r1, [r2, #12]
 1126 03f8 8023     		movs	r3, #128
 1127 03fa 5B05     		lsls	r3, r3, #21
 1128 03fc 0B43     		orrs	r3, r1
 1129 03fe D360     		str	r3, [r2, #12]
 701:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1130              		.loc 1 701 9 view .LVU353
 701:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1131              		.loc 1 701 21 is_stmt 0 view .LVU354
 1132 0400 FFF7FEFF 		bl	HAL_GetTick
 1133              	.LVL84:
 1134 0404 0400     		movs	r4, r0
 1135              	.LVL85:
 704:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 1136              		.loc 1 704 9 is_stmt 1 view .LVU355
 1137              	.L68:
 704:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 1138              		.loc 1 704 15 view .LVU356
 704:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 1139              		.loc 1 704 16 is_stmt 0 view .LVU357
 1140 0406 294B     		ldr	r3, .L119
 1141 0408 1B68     		ldr	r3, [r3]
 704:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 1142              		.loc 1 704 15 view .LVU358
 1143 040a 9B01     		lsls	r3, r3, #6
 1144 040c 06D4     		bmi	.L116
 706:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 1145              		.loc 1 706 11 is_stmt 1 view .LVU359
 706:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 1146              		.loc 1 706 16 is_stmt 0 view .LVU360
 1147 040e FFF7FEFF 		bl	HAL_GetTick
 1148              	.LVL86:
 706:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 1149              		.loc 1 706 30 view .LVU361
 1150 0412 001B     		subs	r0, r0, r4
ARM GAS  /tmp/ccBwposX.s 			page 37


 706:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           {
 1151              		.loc 1 706 14 view .LVU362
 1152 0414 0228     		cmp	r0, #2
 1153 0416 F6D9     		bls	.L68
 708:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 1154              		.loc 1 708 20 view .LVU363
 1155 0418 0320     		movs	r0, #3
 1156 041a 2CE0     		b	.L18
 1157              	.L116:
 735:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           }
 736:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 737:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 738:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 739:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     else
 740:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 741:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Check if there is a request to disable the PLL used as System clock source */
 742:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
 743:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 744:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         return HAL_ERROR;
 745:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 746:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       else
 747:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 748:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         /* Do not return HAL_ERROR if request repeats the current configuration */
 749:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         temp_pllckcfg = RCC->PLLCFGR;
 750:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         if ((READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 751:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
 752:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCF
 753:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
 754:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #if defined (RCC_PLLQ_SUPPORT)
 755:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLQ) != RCC_OscInitStruct->PLL.PLLQ) ||
 756:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #endif /* RCC_PLLQ_SUPPORT */
 757:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLR) != RCC_OscInitStruct->PLL.PLLR))
 758:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 759:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****           return HAL_ERROR;
 760:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 761:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 762:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 763:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 764:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   return HAL_OK;
 1158              		.loc 1 764 10 view .LVU364
 1159 041c 0020     		movs	r0, #0
 1160 041e 2AE0     		b	.L18
 1161              	.L114:
 1162              		.loc 1 764 10 view .LVU365
 1163 0420 0020     		movs	r0, #0
 1164 0422 28E0     		b	.L18
 1165              	.LVL87:
 1166              	.L64:
 742:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1167              		.loc 1 742 7 is_stmt 1 view .LVU366
 742:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1168              		.loc 1 742 10 is_stmt 0 view .LVU367
 1169 0424 012B     		cmp	r3, #1
 1170 0426 32D0     		beq	.L92
 749:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         if ((READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 1171              		.loc 1 749 9 is_stmt 1 view .LVU368
 749:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         if ((READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
ARM GAS  /tmp/ccBwposX.s 			page 38


 1172              		.loc 1 749 23 is_stmt 0 view .LVU369
 1173 0428 204B     		ldr	r3, .L119
 1174 042a DA68     		ldr	r2, [r3, #12]
 1175              	.LVL88:
 750:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
 1176              		.loc 1 750 9 is_stmt 1 view .LVU370
 750:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
 1177              		.loc 1 750 14 is_stmt 0 view .LVU371
 1178 042c 0323     		movs	r3, #3
 1179 042e 1340     		ands	r3, r2
 750:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
 1180              		.loc 1 750 12 view .LVU372
 1181 0430 216A     		ldr	r1, [r4, #32]
 1182 0432 8B42     		cmp	r3, r1
 1183 0434 2DD1     		bne	.L93
 751:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCF
 1184              		.loc 1 751 14 discriminator 1 view .LVU373
 1185 0436 7023     		movs	r3, #112
 1186 0438 1340     		ands	r3, r2
 750:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
 1187              		.loc 1 750 95 discriminator 1 view .LVU374
 1188 043a 616A     		ldr	r1, [r4, #36]
 1189 043c 8B42     		cmp	r3, r1
 1190 043e 2AD1     		bne	.L94
 752:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
 1191              		.loc 1 752 14 view .LVU375
 1192 0440 FE21     		movs	r1, #254
 1193 0442 C901     		lsls	r1, r1, #7
 1194 0444 1140     		ands	r1, r2
 752:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
 1195              		.loc 1 752 88 view .LVU376
 1196 0446 A36A     		ldr	r3, [r4, #40]
 1197 0448 1B02     		lsls	r3, r3, #8
 751:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCF
 1198              		.loc 1 751 88 view .LVU377
 1199 044a 9942     		cmp	r1, r3
 1200 044c 25D1     		bne	.L95
 753:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #if defined (RCC_PLLQ_SUPPORT)
 1201              		.loc 1 753 14 view .LVU378
 1202 044e F823     		movs	r3, #248
 1203 0450 9B03     		lsls	r3, r3, #14
 1204 0452 1340     		ands	r3, r2
 752:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
 1205              		.loc 1 752 114 view .LVU379
 1206 0454 E16A     		ldr	r1, [r4, #44]
 1207 0456 8B42     		cmp	r3, r1
 1208 0458 21D1     		bne	.L96
 755:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #endif /* RCC_PLLQ_SUPPORT */
 1209              		.loc 1 755 14 view .LVU380
 1210 045a E023     		movs	r3, #224
 1211 045c 1B05     		lsls	r3, r3, #20
 1212 045e 1340     		ands	r3, r2
 753:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #if defined (RCC_PLLQ_SUPPORT)
 1213              		.loc 1 753 88 view .LVU381
 1214 0460 216B     		ldr	r1, [r4, #48]
 1215 0462 8B42     		cmp	r3, r1
 1216 0464 1DD1     		bne	.L97
ARM GAS  /tmp/ccBwposX.s 			page 39


 757:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 1217              		.loc 1 757 14 view .LVU382
 1218 0466 520F     		lsrs	r2, r2, #29
 1219              	.LVL89:
 757:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 1220              		.loc 1 757 14 view .LVU383
 1221 0468 5207     		lsls	r2, r2, #29
 757:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         {
 1222              		.loc 1 757 81 view .LVU384
 1223 046a 636B     		ldr	r3, [r4, #52]
 755:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #endif /* RCC_PLLQ_SUPPORT */
 1224              		.loc 1 755 88 view .LVU385
 1225 046c 9A42     		cmp	r2, r3
 1226 046e 1AD1     		bne	.L98
 1227              		.loc 1 764 10 view .LVU386
 1228 0470 0020     		movs	r0, #0
 1229 0472 00E0     		b	.L18
 1230              	.LVL90:
 1231              	.L72:
 321:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 1232              		.loc 1 321 12 view .LVU387
 1233 0474 0120     		movs	r0, #1
 1234              	.LVL91:
 1235              	.L18:
 765:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 1236              		.loc 1 765 1 view .LVU388
 1237 0476 02B0     		add	sp, sp, #8
 1238              		@ sp needed
 1239 0478 70BD     		pop	{r4, r5, r6, pc}
 1240              	.LVL92:
 1241              	.L102:
 342:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 1242              		.loc 1 342 16 view .LVU389
 1243 047a 0120     		movs	r0, #1
 1244              	.LVL93:
 342:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 1245              		.loc 1 342 16 view .LVU390
 1246 047c FBE7     		b	.L18
 1247              	.LVL94:
 1248              	.L76:
 398:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 1249              		.loc 1 398 16 view .LVU391
 1250 047e 0120     		movs	r0, #1
 1251 0480 F9E7     		b	.L18
 1252              	.LVL95:
 1253              	.L104:
 418:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 1254              		.loc 1 418 18 view .LVU392
 1255 0482 0120     		movs	r0, #1
 1256 0484 F7E7     		b	.L18
 1257              	.L107:
 479:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 1258              		.loc 1 479 16 view .LVU393
 1259 0486 0120     		movs	r0, #1
 1260 0488 F5E7     		b	.L18
 1261              	.L88:
 764:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
ARM GAS  /tmp/ccBwposX.s 			page 40


 1262              		.loc 1 764 10 view .LVU394
 1263 048a 0020     		movs	r0, #0
 1264 048c F3E7     		b	.L18
 1265              	.L92:
 744:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 1266              		.loc 1 744 16 view .LVU395
 1267 048e 0120     		movs	r0, #1
 1268 0490 F1E7     		b	.L18
 1269              	.LVL96:
 1270              	.L93:
 759:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 1271              		.loc 1 759 18 view .LVU396
 1272 0492 0120     		movs	r0, #1
 1273 0494 EFE7     		b	.L18
 1274              	.L94:
 1275 0496 0120     		movs	r0, #1
 1276 0498 EDE7     		b	.L18
 1277              	.L95:
 1278 049a 0120     		movs	r0, #1
 1279 049c EBE7     		b	.L18
 1280              	.L96:
 1281 049e 0120     		movs	r0, #1
 1282 04a0 E9E7     		b	.L18
 1283              	.L97:
 1284 04a2 0120     		movs	r0, #1
 1285 04a4 E7E7     		b	.L18
 1286              	.LVL97:
 1287              	.L98:
 759:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         }
 1288              		.loc 1 759 18 view .LVU397
 1289 04a6 0120     		movs	r0, #1
 1290 04a8 E5E7     		b	.L18
 1291              	.L120:
 1292 04aa C046     		.align	2
 1293              	.L119:
 1294 04ac 00100240 		.word	1073876992
 1295 04b0 FFFFFFFE 		.word	-16777217
 1296 04b4 FFFFFEEE 		.word	-285278209
 1297 04b8 FFFFFFEF 		.word	-268435457
 1298 04bc 8C80C111 		.word	297894028
 1299              		.cfi_endproc
 1300              	.LFE298:
 1302              		.section	.text.HAL_RCC_MCOConfig,"ax",%progbits
 1303              		.align	1
 1304              		.global	HAL_RCC_MCOConfig
 1305              		.syntax unified
 1306              		.code	16
 1307              		.thumb_func
 1308              		.fpu softvfp
 1310              	HAL_RCC_MCOConfig:
 1311              	.LVL98:
 1312              	.LFB300:
 766:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 767:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
 768:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief  Initialize the CPU, AHB and APB buses clocks according to the specified
 769:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         parameters in the RCC_ClkInitStruct.
 770:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @param  RCC_ClkInitStruct  pointer to a @ref RCC_ClkInitTypeDef structure that
ARM GAS  /tmp/ccBwposX.s 			page 41


 771:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         contains the configuration information for the RCC peripheral.
 772:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @param  FLatency  FLASH Latency
 773:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *          This parameter can be one of the following values:
 774:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg FLASH_LATENCY_0   FLASH 0 Latency cycle
 775:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg FLASH_LATENCY_1   FLASH 1 Latency cycle
 776:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
 777:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency
 778:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         and updated by @ref HAL_RCC_GetHCLKFreq() function called within this function
 779:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
 780:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   The HSI is used by default as system clock source after
 781:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         startup from Reset, wake-up from STANDBY mode. After restart from Reset,
 782:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         the HSI frequency is set to 8 Mhz, then it reaches its default value 16 MHz.
 783:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
 784:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   The HSI can be selected as system clock source after
 785:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         from STOP modes or in case of failure of the HSE used directly or indirectly
 786:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         as system clock (if the Clock Security System CSS is enabled).
 787:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
 788:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   The LSI can be selected as system clock source after
 789:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         in case of failure of the LSE used directly or indirectly
 790:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         as system clock (if the Clock Security System LSECSS is enabled).
 791:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
 792:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   A switch from one clock source to another occurs only if the target
 793:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         clock source is ready (clock stable after startup delay or PLL locked).
 794:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         If a clock source which is not yet ready is selected, the switch will
 795:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         occur when the clock source is ready.
 796:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
 797:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
 798:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         currently used as system clock source.
 799:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
 800:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   Depending on the device voltage range, the software has to set correctly
 801:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
 802:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         (for more details refer to section above "Initialization/de-initialization functions")
 803:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval None
 804:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
 805:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
 806:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
 807:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   uint32_t tickstart;
 808:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 809:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Check Null pointer */
 810:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (RCC_ClkInitStruct == NULL)
 811:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 812:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     return HAL_ERROR;
 813:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 814:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 815:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Check the parameters */
 816:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
 817:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   assert_param(IS_FLASH_LATENCY(FLatency));
 818:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 819:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
 820:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     must be correctly programmed according to the frequency of the FLASH clock
 821:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     (HCLK) and the supply voltage of the device. */
 822:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 823:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Increasing the number of wait states because of higher CPU frequency */
 824:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (FLatency > __HAL_FLASH_GET_LATENCY())
 825:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 826:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
 827:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     __HAL_FLASH_SET_LATENCY(FLatency);
ARM GAS  /tmp/ccBwposX.s 			page 42


 828:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 829:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Check that the new number of wait states is taken into account to access the Flash
 830:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     memory by polling the FLASH_ACR register */
 831:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     tickstart = HAL_GetTick();
 832:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 833:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     while ((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 834:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 835:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 836:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 837:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         return HAL_TIMEOUT;
 838:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 839:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 840:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 841:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 842:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /*-------------------------- HCLK Configuration --------------------------*/
 843:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 844:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 845:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Set the highest APB divider in order to ensure that we do not go through
 846:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****        a non-spec phase whatever we decrease or increase HCLK. */
 847:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 848:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 849:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16);
 850:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 851:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 852:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Set the new HCLK clock divider */
 853:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
 854:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 855:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 856:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 857:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /*------------------------- SYSCLK Configuration ---------------------------*/
 858:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 859:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 860:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
 861:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 862:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* HSE is selected as System Clock Source */
 863:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 864:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 865:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Check the HSE ready flag */
 866:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if (READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U)
 867:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 868:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         return HAL_ERROR;
 869:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 870:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 871:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* PLL is selected as System Clock Source */
 872:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 873:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 874:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Check the PLL ready flag */
 875:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U)
 876:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 877:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         return HAL_ERROR;
 878:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 879:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 880:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* HSI is selected as System Clock Source */
 881:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
 882:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 883:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Check the HSI ready flag */
 884:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U)
ARM GAS  /tmp/ccBwposX.s 			page 43


 885:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 886:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         return HAL_ERROR;
 887:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 888:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 889:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* LSI is selected as System Clock Source */
 890:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_LSI)
 891:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 892:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Check the LSI ready flag */
 893:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == 0U)
 894:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 895:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         return HAL_ERROR;
 896:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 897:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 898:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* LSE is selected as System Clock Source */
 899:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     else
 900:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 901:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       /* Check the LSE ready flag */
 902:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U)
 903:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 904:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         return HAL_ERROR;
 905:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 906:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 907:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
 908:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 909:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Get Start Tick*/
 910:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     tickstart = HAL_GetTick();
 911:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 912:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 913:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 914:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 915:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 916:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         return HAL_TIMEOUT;
 917:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 918:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 919:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 920:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 921:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Decreasing the number of wait states because of lower CPU frequency */
 922:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (FLatency < __HAL_FLASH_GET_LATENCY())
 923:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 924:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
 925:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     __HAL_FLASH_SET_LATENCY(FLatency);
 926:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 927:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Check that the new number of wait states is taken into account to access the Flash
 928:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     memory by polling the FLASH_ACR register */
 929:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     tickstart = HAL_GetTick();
 930:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 931:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     while ((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 932:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 933:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 934:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 935:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         return HAL_TIMEOUT;
 936:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 937:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 938:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 939:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 940:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /*-------------------------- PCLK1 Configuration ---------------------------*/
 941:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
ARM GAS  /tmp/ccBwposX.s 			page 44


 942:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 943:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
 944:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider);
 945:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 946:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 947:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Update the SystemCoreClock global variable */
 948:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   SystemCoreClock = (HAL_RCC_GetSysClockFreq() >> ((AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RC
 949:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 950:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Configure the source of time base considering new system clocks settings*/
 951:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   return HAL_InitTick(uwTickPrio);
 952:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 953:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 954:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
 955:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @}
 956:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
 957:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 958:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
 959:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *  @brief   RCC clocks control functions
 960:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
 961:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** @verbatim
 962:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****  ===============================================================================
 963:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                       ##### Peripheral Control functions #####
 964:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****  ===============================================================================
 965:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     [..]
 966:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     This subsection provides a set of functions allowing to:
 967:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 968:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     (+) Output clock to MCO pin.
 969:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     (+) Retrieve current clock frequencies.
 970:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     (+) Enable the Clock Security System.
 971:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 972:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** @endverbatim
 973:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @{
 974:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
 975:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 976:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
 977:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief  Select the clock source to output on MCO1 pin(PA8) or MC02 pin (PA10)(*).
 978:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   PA8, PA10(*) should be configured in alternate function mode.
 979:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @param  RCC_MCOx  specifies the output direction for the clock source.
 980:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *          For STM32G0xx family this parameter can have only one value:
 981:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1  Clock source to output on MCO1 pin(PA8).
 982:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2  Clock source to output on MCO2 pin(PA10)(*).
 983:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @param  RCC_MCOSource  specifies the clock source to output.
 984:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *          This parameter can be one of the following values:
 985:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_NOCLOCK  MCO output disabled, no clock on MCO
 986:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_SYSCLK   system  clock selected as MCO source
 987:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSI48    HSI48 clock selected as MCO source for devices wit
 988:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSI      HSI clock selected as MCO source
 989:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSE      HSE clock selected as MCO sourcee
 990:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK   main PLLR clock selected as MCO source
 991:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_LSI      LSI clock selected as MCO source
 992:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_LSE      LSE clock selected as MCO source
 993:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLPCLK  PLLP clock selected as MCO1 source(*)
 994:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLQCLK  PLLQ clock selected as MCO1 source(*)
 995:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_RTCCLK   RTC clock selected as MCO1 source(*)
 996:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_RTC_WKUP RTC_Wakeup selected as MCO1 source(*)
 997:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2SOURCE_NOCLOCK  MCO2 output disabled, no clock on MCO2(*)
 998:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2SOURCE_SYSCLK   system  clock selected as MCO2 source(*)
ARM GAS  /tmp/ccBwposX.s 			page 45


 999:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2SOURCE_HSI48    HSI48 clock selected as MCO2 source for devices wi
1000:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2SOURCE_HSI      HSI clock selected as MCO2 source(*)
1001:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2SOURCE_HSE      HSE clock selected as MCO2 source(*)
1002:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2SOURCE_PLLCLK   main PLLR clock selected as MCO2 source(*)
1003:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2SOURCE_LSI      LSI clock selected as MCO2 source(*)
1004:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2SOURCE_LSE      LSE clock selected as MCO2 source(*)
1005:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2SOURCE_PLLPCLK  PLLP clock selected as MCO2 source(*)
1006:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2SOURCE_PLLQCLK  PLLQ clock selected as MCO2 source(*)
1007:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2SOURCE_RTCCLK   RTC clock selected as MCO2 source(*)
1008:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2SOURCE_RTC_WKUP RTC_Wakeup selected as MCO2 source(*)
1009:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @param  RCC_MCODiv  specifies the MCO prescaler.
1010:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *          This parameter can be one of the following values:
1011:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_1     no division applied to MCO clock
1012:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_2     division by 2 applied to MCO clock
1013:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_4     division by 4 applied to MCO clock
1014:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_8     division by 8 applied to MCO clock
1015:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_16    division by 16 applied to MCO clock
1016:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_32    division by 32 applied to MCO clock
1017:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_64    division by 64 applied to MCO clock
1018:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_128   division by 128 applied to MCO clock
1019:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2DIV_1    no division applied to MCO2 clock(*)
1020:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2DIV_2    division by 2 applied to MCO2 clock(*)
1021:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2DIV_4    division by 4 applied to MCO2 clock(*)
1022:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2DIV_8    division by 8 applied to MCO2 clock(*)
1023:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2DIV_16   division by 16 applied to MCO2 clock(*)
1024:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2DIV_32   division by 32 applied to MCO2 clock(*)
1025:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2DIV_64   division by 64 applied to MCO2 clock(*)
1026:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2DIV_128  division by 128 applied to MCO2 clock(*)
1027:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2DIV_256  division by 256 applied to MCO2 clock(*)
1028:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2DIV_512  division by 512 applied to MCO2 clock(*)
1029:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO2DIV_1024 division by 1024 applied to MCO2 clock(*)
1030:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
1031:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * (*) Feature not available on all devices of the family
1032:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval None
1033:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
1034:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
1035:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
 1313              		.loc 1 1035 1 is_stmt 1 view -0
 1314              		.cfi_startproc
 1315              		@ args = 0, pretend = 0, frame = 24
 1316              		@ frame_needed = 0, uses_anonymous_args = 0
 1317              		.loc 1 1035 1 is_stmt 0 view .LVU399
 1318 0000 70B5     		push	{r4, r5, r6, lr}
 1319              	.LCFI3:
 1320              		.cfi_def_cfa_offset 16
 1321              		.cfi_offset 4, -16
 1322              		.cfi_offset 5, -12
 1323              		.cfi_offset 6, -8
 1324              		.cfi_offset 14, -4
 1325 0002 86B0     		sub	sp, sp, #24
 1326              	.LCFI4:
 1327              		.cfi_def_cfa_offset 40
 1328 0004 0C00     		movs	r4, r1
 1329 0006 1500     		movs	r5, r2
1036:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   GPIO_InitTypeDef GPIO_InitStruct;
 1330              		.loc 1 1036 3 is_stmt 1 view .LVU400
1037:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
ARM GAS  /tmp/ccBwposX.s 			page 46


1038:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Check the parameters */
1039:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   assert_param(IS_RCC_MCO(RCC_MCOx));
 1331              		.loc 1 1039 3 view .LVU401
1040:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1041:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Common GPIO init parameters */
1042:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
 1332              		.loc 1 1042 3 view .LVU402
 1333              		.loc 1 1042 29 is_stmt 0 view .LVU403
 1334 0008 0223     		movs	r3, #2
 1335 000a 0293     		str	r3, [sp, #8]
1043:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_VERY_HIGH;
 1336              		.loc 1 1043 3 is_stmt 1 view .LVU404
 1337              		.loc 1 1043 29 is_stmt 0 view .LVU405
 1338 000c 0133     		adds	r3, r3, #1
 1339 000e 0493     		str	r3, [sp, #16]
1044:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   GPIO_InitStruct.Pull      = GPIO_NOPULL;
 1340              		.loc 1 1044 3 is_stmt 1 view .LVU406
 1341              		.loc 1 1044 29 is_stmt 0 view .LVU407
 1342 0010 0023     		movs	r3, #0
 1343 0012 0393     		str	r3, [sp, #12]
1045:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1046:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (RCC_MCOx == RCC_MCO1)
 1344              		.loc 1 1046 3 is_stmt 1 view .LVU408
 1345              		.loc 1 1046 6 is_stmt 0 view .LVU409
 1346 0014 0028     		cmp	r0, #0
 1347 0016 01D0     		beq	.L123
 1348              	.LVL99:
 1349              	.L121:
1047:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1048:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_MCODIV(RCC_MCODiv));
1049:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
1050:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* MCO1 Clock Enable */
1051:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     MCO1_CLK_ENABLE();
1052:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Configure the MCO1 pin in alternate function mode */
1053:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     GPIO_InitStruct.Pin = MCO1_PIN;
1054:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
1055:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct);
1056:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Mask MCOSEL[] and MCOPRE[] bits then set MCO clock source and prescaler */
1057:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL | RCC_CFGR_MCOPRE), (RCC_MCOSource | RCC_MCODiv));
1058:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1059:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #if defined(RCC_MCO2_SUPPORT)
1060:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else if (RCC_MCOx == RCC_MCO2)
1061:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1062:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_MCO2DIV(RCC_MCODiv));
1063:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_MCO2SOURCE(RCC_MCOSource));
1064:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* MCO2 Clock Enable */
1065:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     MCO2_CLK_ENABLE();
1066:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Configure the MCO2 pin in alternate function mode */
1067:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     GPIO_InitStruct.Pin       = MCO2_PIN;
1068:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     GPIO_InitStruct.Alternate = GPIO_AF3_MCO2;
1069:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct);
1070:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Mask MCOSEL[] and MCOPRE[] bits then set MCO clock source and prescaler */
1071:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2SEL | RCC_CFGR_MCO2PRE), (RCC_MCOSource | RCC_MCODiv));
1072:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1073:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #endif /* RCC_MCO2_SUPPORT */
1074:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 1350              		.loc 1 1074 1 view .LVU410
ARM GAS  /tmp/ccBwposX.s 			page 47


 1351 0018 06B0     		add	sp, sp, #24
 1352              		@ sp needed
 1353              	.LVL100:
 1354              		.loc 1 1074 1 view .LVU411
 1355 001a 70BD     		pop	{r4, r5, r6, pc}
 1356              	.LVL101:
 1357              	.L123:
1048:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
 1358              		.loc 1 1048 5 is_stmt 1 view .LVU412
1049:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* MCO1 Clock Enable */
 1359              		.loc 1 1049 5 view .LVU413
1051:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Configure the MCO1 pin in alternate function mode */
 1360              		.loc 1 1051 5 view .LVU414
 1361              	.LBB8:
1051:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Configure the MCO1 pin in alternate function mode */
 1362              		.loc 1 1051 5 view .LVU415
1051:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Configure the MCO1 pin in alternate function mode */
 1363              		.loc 1 1051 5 view .LVU416
 1364 001c 0C4E     		ldr	r6, .L124
 1365 001e 726B     		ldr	r2, [r6, #52]
 1366              	.LVL102:
1051:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Configure the MCO1 pin in alternate function mode */
 1367              		.loc 1 1051 5 is_stmt 0 view .LVU417
 1368 0020 0133     		adds	r3, r3, #1
 1369 0022 1A43     		orrs	r2, r3
 1370 0024 7263     		str	r2, [r6, #52]
1051:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Configure the MCO1 pin in alternate function mode */
 1371              		.loc 1 1051 5 is_stmt 1 view .LVU418
 1372 0026 726B     		ldr	r2, [r6, #52]
 1373 0028 1340     		ands	r3, r2
 1374 002a 0093     		str	r3, [sp]
1051:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Configure the MCO1 pin in alternate function mode */
 1375              		.loc 1 1051 5 view .LVU419
 1376 002c 009B     		ldr	r3, [sp]
 1377              	.LBE8:
1051:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Configure the MCO1 pin in alternate function mode */
 1378              		.loc 1 1051 5 view .LVU420
1053:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
 1379              		.loc 1 1053 5 view .LVU421
1053:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
 1380              		.loc 1 1053 25 is_stmt 0 view .LVU422
 1381 002e 8023     		movs	r3, #128
 1382 0030 5B00     		lsls	r3, r3, #1
 1383 0032 0193     		str	r3, [sp, #4]
1054:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct);
 1384              		.loc 1 1054 5 is_stmt 1 view .LVU423
1054:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct);
 1385              		.loc 1 1054 31 is_stmt 0 view .LVU424
 1386 0034 0023     		movs	r3, #0
 1387 0036 0593     		str	r3, [sp, #20]
1055:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Mask MCOSEL[] and MCOPRE[] bits then set MCO clock source and prescaler */
 1388              		.loc 1 1055 5 is_stmt 1 view .LVU425
 1389 0038 A030     		adds	r0, r0, #160
 1390              	.LVL103:
1055:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Mask MCOSEL[] and MCOPRE[] bits then set MCO clock source and prescaler */
 1391              		.loc 1 1055 5 is_stmt 0 view .LVU426
 1392 003a 01A9     		add	r1, sp, #4
ARM GAS  /tmp/ccBwposX.s 			page 48


 1393              	.LVL104:
1055:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Mask MCOSEL[] and MCOPRE[] bits then set MCO clock source and prescaler */
 1394              		.loc 1 1055 5 view .LVU427
 1395 003c C005     		lsls	r0, r0, #23
 1396              	.LVL105:
1055:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* Mask MCOSEL[] and MCOPRE[] bits then set MCO clock source and prescaler */
 1397              		.loc 1 1055 5 view .LVU428
 1398 003e FFF7FEFF 		bl	HAL_GPIO_Init
 1399              	.LVL106:
1057:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 1400              		.loc 1 1057 5 is_stmt 1 view .LVU429
 1401 0042 B268     		ldr	r2, [r6, #8]
 1402 0044 0349     		ldr	r1, .L124+4
 1403 0046 0A40     		ands	r2, r1
 1404 0048 2C43     		orrs	r4, r5
 1405              	.LVL107:
1057:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 1406              		.loc 1 1057 5 is_stmt 0 view .LVU430
 1407 004a 1443     		orrs	r4, r2
 1408 004c B460     		str	r4, [r6, #8]
 1409              		.loc 1 1074 1 view .LVU431
 1410 004e E3E7     		b	.L121
 1411              	.L125:
 1412              		.align	2
 1413              	.L124:
 1414 0050 00100240 		.word	1073876992
 1415 0054 FFFFFF88 		.word	-1996488705
 1416              		.cfi_endproc
 1417              	.LFE300:
 1419              		.global	__aeabi_uidiv
 1420              		.section	.text.HAL_RCC_GetSysClockFreq,"ax",%progbits
 1421              		.align	1
 1422              		.global	HAL_RCC_GetSysClockFreq
 1423              		.syntax unified
 1424              		.code	16
 1425              		.thumb_func
 1426              		.fpu softvfp
 1428              	HAL_RCC_GetSysClockFreq:
 1429              	.LFB301:
1075:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1076:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
1077:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief  Return the SYSCLK frequency.
1078:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
1079:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   The system frequency computed by this function is not the real
1080:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         frequency in the chip. It is calculated based on the predefined
1081:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         constant and the selected clock source:
1082:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note     If SYSCLK source is HSI, function returns values based on HSI_VALUE/HSIDIV(*)
1083:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note     If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
1084:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note     If SYSCLK source is PLL, function returns values based on HSE_VALUE(**),
1085:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *           or HSI_VALUE(*) multiplied/divided by the PLL factors.
1086:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note     If SYSCLK source is LSI, function returns values based on LSI_VALUE(***)
1087:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note     If SYSCLK source is LSE, function returns values based on LSE_VALUE(****)
1088:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note     (*) HSI_VALUE is a constant defined in stm32g0xx_hal_conf.h file (default value
1089:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *               16 MHz) but the real value may vary depending on the variations
1090:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *               in voltage and temperature.
1091:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note     (**) HSE_VALUE is a constant defined in stm32g0xx_hal_conf.h file (default value
1092:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *                8 MHz), user has to ensure that HSE_VALUE is same as the real
ARM GAS  /tmp/ccBwposX.s 			page 49


1093:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *                frequency of the crystal used. Otherwise, this function may
1094:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *                have wrong result.
1095:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note     (***) LSE_VALUE is a constant defined in stm32g0xx_hal_conf.h file (default value
1096:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *               32768 Hz).
1097:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note     (****) LSI_VALUE is a constant defined in stm32g0xx_hal_conf.h file (default value
1098:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *               32000 Hz).
1099:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
1100:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   The result of this function could be not correct when using fractional
1101:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         value for HSE crystal.
1102:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
1103:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   This function can be used by the user application to compute the
1104:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         baudrate for the communication peripherals or configure other parameters.
1105:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
1106:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   Each time SYSCLK changes, this function must be called to update the
1107:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         right SYSCLK value. Otherwise, any configuration based on this function will be incorre
1108:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
1109:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
1110:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval SYSCLK frequency
1111:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
1112:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void)
1113:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
 1430              		.loc 1 1113 1 is_stmt 1 view -0
 1431              		.cfi_startproc
 1432              		@ args = 0, pretend = 0, frame = 0
 1433              		@ frame_needed = 0, uses_anonymous_args = 0
 1434 0000 10B5     		push	{r4, lr}
 1435              	.LCFI5:
 1436              		.cfi_def_cfa_offset 8
 1437              		.cfi_offset 4, -8
 1438              		.cfi_offset 14, -4
1114:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   uint32_t pllvco, pllsource, pllr, pllm, hsidiv;
 1439              		.loc 1 1114 3 view .LVU433
1115:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   uint32_t sysclockfreq;
 1440              		.loc 1 1115 3 view .LVU434
1116:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1117:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
 1441              		.loc 1 1117 3 view .LVU435
 1442              		.loc 1 1117 7 is_stmt 0 view .LVU436
 1443 0002 2A4B     		ldr	r3, .L138
 1444 0004 9B68     		ldr	r3, [r3, #8]
 1445 0006 3822     		movs	r2, #56
 1446              		.loc 1 1117 6 view .LVU437
 1447 0008 1A42     		tst	r2, r3
 1448 000a 07D1     		bne	.L127
1118:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1119:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* HSISYS can be derived for HSI16 */
1120:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV)) >> RCC_CR_HSIDIV_Pos));
 1449              		.loc 1 1120 5 is_stmt 1 view .LVU438
 1450              		.loc 1 1120 24 is_stmt 0 view .LVU439
 1451 000c 274B     		ldr	r3, .L138
 1452 000e 1A68     		ldr	r2, [r3]
 1453              		.loc 1 1120 58 view .LVU440
 1454 0010 D20A     		lsrs	r2, r2, #11
 1455 0012 0723     		movs	r3, #7
 1456 0014 1340     		ands	r3, r2
 1457              	.LVL108:
1121:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
ARM GAS  /tmp/ccBwposX.s 			page 50


1122:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* HSI used as system clock source */
1123:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     sysclockfreq = (HSI_VALUE / hsidiv);
 1458              		.loc 1 1123 5 is_stmt 1 view .LVU441
 1459              		.loc 1 1123 18 is_stmt 0 view .LVU442
 1460 0016 2648     		ldr	r0, .L138+4
 1461 0018 D840     		lsrs	r0, r0, r3
 1462              	.LVL109:
 1463              	.L126:
1124:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1125:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
1126:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1127:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* HSE used as system clock source */
1128:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     sysclockfreq = HSE_VALUE;
1129:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1130:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK)
1131:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1132:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* PLL used as system clock  source */
1133:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1134:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* PLL_VCO = ((HSE_VALUE or HSI_VALUE)/ PLLM) * PLLN
1135:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     SYSCLK = PLL_VCO / PLLR
1136:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     */
1137:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
1138:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ;
1139:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1140:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     switch (pllsource)
1141:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
1142:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
1143:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos);
1144:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         break;
1145:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1146:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       case RCC_PLLSOURCE_HSI:  /* HSI16 used as PLL clock source */
1147:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       default:                 /* HSI16 used as PLL clock source */
1148:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos) ;
1149:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         break;
1150:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
1151:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1U);
1152:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     sysclockfreq = pllvco / pllr;
1153:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1154:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_LSE)
1155:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1156:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* LSE used as system clock source */
1157:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     sysclockfreq = LSE_VALUE;
1158:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1159:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_LSI)
1160:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1161:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* LSI used as system clock source */
1162:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     sysclockfreq = LSI_VALUE;
1163:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1164:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else
1165:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1166:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     sysclockfreq = 0U;
1167:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1168:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1169:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   return sysclockfreq;
1170:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 1464              		.loc 1 1170 1 view .LVU443
 1465              		@ sp needed
ARM GAS  /tmp/ccBwposX.s 			page 51


 1466 001a 10BD     		pop	{r4, pc}
 1467              	.L127:
1125:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1468              		.loc 1 1125 8 is_stmt 1 view .LVU444
1125:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1469              		.loc 1 1125 12 is_stmt 0 view .LVU445
 1470 001c 234B     		ldr	r3, .L138
 1471 001e 9A68     		ldr	r2, [r3, #8]
 1472 0020 3823     		movs	r3, #56
 1473 0022 1340     		ands	r3, r2
1125:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1474              		.loc 1 1125 11 view .LVU446
 1475 0024 082B     		cmp	r3, #8
 1476 0026 3BD0     		beq	.L132
1130:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1477              		.loc 1 1130 8 is_stmt 1 view .LVU447
1130:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1478              		.loc 1 1130 12 is_stmt 0 view .LVU448
 1479 0028 204B     		ldr	r3, .L138
 1480 002a 9A68     		ldr	r2, [r3, #8]
 1481 002c 3823     		movs	r3, #56
 1482 002e 1340     		ands	r3, r2
1130:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1483              		.loc 1 1130 11 view .LVU449
 1484 0030 102B     		cmp	r3, #16
 1485 0032 0DD0     		beq	.L135
1154:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1486              		.loc 1 1154 8 is_stmt 1 view .LVU450
1154:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1487              		.loc 1 1154 12 is_stmt 0 view .LVU451
 1488 0034 1D4B     		ldr	r3, .L138
 1489 0036 9A68     		ldr	r2, [r3, #8]
 1490 0038 3823     		movs	r3, #56
 1491 003a 1340     		ands	r3, r2
1154:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1492              		.loc 1 1154 11 view .LVU452
 1493 003c 202B     		cmp	r3, #32
 1494 003e 31D0     		beq	.L133
1159:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1495              		.loc 1 1159 8 is_stmt 1 view .LVU453
1159:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1496              		.loc 1 1159 12 is_stmt 0 view .LVU454
 1497 0040 1A4B     		ldr	r3, .L138
 1498 0042 9A68     		ldr	r2, [r3, #8]
 1499 0044 3823     		movs	r3, #56
 1500 0046 1340     		ands	r3, r2
1159:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1501              		.loc 1 1159 11 view .LVU455
 1502 0048 182B     		cmp	r3, #24
 1503 004a 26D0     		beq	.L136
1166:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 1504              		.loc 1 1166 18 view .LVU456
 1505 004c 0020     		movs	r0, #0
 1506              	.LVL110:
1169:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 1507              		.loc 1 1169 3 is_stmt 1 view .LVU457
1169:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
ARM GAS  /tmp/ccBwposX.s 			page 52


 1508              		.loc 1 1169 10 is_stmt 0 view .LVU458
 1509 004e E4E7     		b	.L126
 1510              	.LVL111:
 1511              	.L135:
1137:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ;
 1512              		.loc 1 1137 5 is_stmt 1 view .LVU459
1137:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ;
 1513              		.loc 1 1137 21 is_stmt 0 view .LVU460
 1514 0050 164A     		ldr	r2, .L138
 1515 0052 D168     		ldr	r1, [r2, #12]
1137:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ;
 1516              		.loc 1 1137 15 view .LVU461
 1517 0054 0D3B     		subs	r3, r3, #13
 1518 0056 0B40     		ands	r3, r1
 1519              	.LVL112:
1138:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1520              		.loc 1 1138 5 is_stmt 1 view .LVU462
1138:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1521              		.loc 1 1138 17 is_stmt 0 view .LVU463
 1522 0058 D268     		ldr	r2, [r2, #12]
1138:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1523              		.loc 1 1138 47 view .LVU464
 1524 005a 1209     		lsrs	r2, r2, #4
 1525 005c 0721     		movs	r1, #7
 1526 005e 1140     		ands	r1, r2
1138:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1527              		.loc 1 1138 10 view .LVU465
 1528 0060 0131     		adds	r1, r1, #1
 1529              	.LVL113:
1140:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1530              		.loc 1 1140 5 is_stmt 1 view .LVU466
 1531 0062 032B     		cmp	r3, #3
 1532 0064 0FD0     		beq	.L137
1148:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         break;
 1533              		.loc 1 1148 9 view .LVU467
1148:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         break;
 1534              		.loc 1 1148 29 is_stmt 0 view .LVU468
 1535 0066 1248     		ldr	r0, .L138+4
 1536 0068 FFF7FEFF 		bl	__aeabi_uidiv
 1537              	.LVL114:
1148:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         break;
 1538              		.loc 1 1148 44 view .LVU469
 1539 006c 0F4B     		ldr	r3, .L138
 1540 006e DA68     		ldr	r2, [r3, #12]
1148:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         break;
 1541              		.loc 1 1148 74 view .LVU470
 1542 0070 120A     		lsrs	r2, r2, #8
 1543 0072 7F23     		movs	r3, #127
 1544 0074 1340     		ands	r3, r2
1148:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         break;
 1545              		.loc 1 1148 16 view .LVU471
 1546 0076 5843     		muls	r0, r3
 1547              	.LVL115:
1149:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 1548              		.loc 1 1149 9 is_stmt 1 view .LVU472
 1549              	.L131:
1151:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     sysclockfreq = pllvco / pllr;
ARM GAS  /tmp/ccBwposX.s 			page 53


 1550              		.loc 1 1151 5 view .LVU473
1151:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     sysclockfreq = pllvco / pllr;
 1551              		.loc 1 1151 18 is_stmt 0 view .LVU474
 1552 0078 0C4B     		ldr	r3, .L138
 1553 007a D968     		ldr	r1, [r3, #12]
1151:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     sysclockfreq = pllvco / pllr;
 1554              		.loc 1 1151 48 view .LVU475
 1555 007c 490F     		lsrs	r1, r1, #29
1151:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     sysclockfreq = pllvco / pllr;
 1556              		.loc 1 1151 10 view .LVU476
 1557 007e 0131     		adds	r1, r1, #1
 1558              	.LVL116:
1152:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 1559              		.loc 1 1152 5 is_stmt 1 view .LVU477
1152:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 1560              		.loc 1 1152 18 is_stmt 0 view .LVU478
 1561 0080 FFF7FEFF 		bl	__aeabi_uidiv
 1562              	.LVL117:
1152:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 1563              		.loc 1 1152 18 view .LVU479
 1564 0084 C9E7     		b	.L126
 1565              	.LVL118:
 1566              	.L137:
1143:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         break;
 1567              		.loc 1 1143 9 is_stmt 1 view .LVU480
1143:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         break;
 1568              		.loc 1 1143 29 is_stmt 0 view .LVU481
 1569 0086 0B48     		ldr	r0, .L138+8
 1570 0088 FFF7FEFF 		bl	__aeabi_uidiv
 1571              	.LVL119:
1143:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         break;
 1572              		.loc 1 1143 44 view .LVU482
 1573 008c 074B     		ldr	r3, .L138
 1574 008e DA68     		ldr	r2, [r3, #12]
1143:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         break;
 1575              		.loc 1 1143 74 view .LVU483
 1576 0090 120A     		lsrs	r2, r2, #8
 1577 0092 7F23     		movs	r3, #127
 1578 0094 1340     		ands	r3, r2
1143:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****         break;
 1579              		.loc 1 1143 16 view .LVU484
 1580 0096 5843     		muls	r0, r3
 1581              	.LVL120:
1144:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1582              		.loc 1 1144 9 is_stmt 1 view .LVU485
 1583 0098 EEE7     		b	.L131
 1584              	.LVL121:
 1585              	.L136:
1162:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 1586              		.loc 1 1162 18 is_stmt 0 view .LVU486
 1587 009a FA20     		movs	r0, #250
 1588 009c C001     		lsls	r0, r0, #7
 1589 009e BCE7     		b	.L126
 1590              	.L132:
1128:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 1591              		.loc 1 1128 18 view .LVU487
 1592 00a0 0448     		ldr	r0, .L138+8
ARM GAS  /tmp/ccBwposX.s 			page 54


 1593 00a2 BAE7     		b	.L126
 1594              	.L133:
1157:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 1595              		.loc 1 1157 18 view .LVU488
 1596 00a4 8020     		movs	r0, #128
 1597 00a6 0002     		lsls	r0, r0, #8
 1598 00a8 B7E7     		b	.L126
 1599              	.L139:
 1600 00aa C046     		.align	2
 1601              	.L138:
 1602 00ac 00100240 		.word	1073876992
 1603 00b0 0024F400 		.word	16000000
 1604 00b4 00127A00 		.word	8000000
 1605              		.cfi_endproc
 1606              	.LFE301:
 1608              		.section	.text.HAL_RCC_ClockConfig,"ax",%progbits
 1609              		.align	1
 1610              		.global	HAL_RCC_ClockConfig
 1611              		.syntax unified
 1612              		.code	16
 1613              		.thumb_func
 1614              		.fpu softvfp
 1616              	HAL_RCC_ClockConfig:
 1617              	.LVL122:
 1618              	.LFB299:
 806:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   uint32_t tickstart;
 1619              		.loc 1 806 1 is_stmt 1 view -0
 1620              		.cfi_startproc
 1621              		@ args = 0, pretend = 0, frame = 0
 1622              		@ frame_needed = 0, uses_anonymous_args = 0
 806:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   uint32_t tickstart;
 1623              		.loc 1 806 1 is_stmt 0 view .LVU490
 1624 0000 70B5     		push	{r4, r5, r6, lr}
 1625              	.LCFI6:
 1626              		.cfi_def_cfa_offset 16
 1627              		.cfi_offset 4, -16
 1628              		.cfi_offset 5, -12
 1629              		.cfi_offset 6, -8
 1630              		.cfi_offset 14, -4
 1631 0002 0400     		movs	r4, r0
 1632 0004 0D00     		movs	r5, r1
 807:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1633              		.loc 1 807 3 is_stmt 1 view .LVU491
 810:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1634              		.loc 1 810 3 view .LVU492
 810:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1635              		.loc 1 810 6 is_stmt 0 view .LVU493
 1636 0006 0028     		cmp	r0, #0
 1637 0008 00D1     		bne	.LCB1569
 1638 000a AAE0     		b	.L159	@long jump
 1639              	.LCB1569:
 816:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   assert_param(IS_FLASH_LATENCY(FLatency));
 1640              		.loc 1 816 3 is_stmt 1 view .LVU494
 817:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1641              		.loc 1 817 3 view .LVU495
 824:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1642              		.loc 1 824 3 view .LVU496
ARM GAS  /tmp/ccBwposX.s 			page 55


 824:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1643              		.loc 1 824 18 is_stmt 0 view .LVU497
 1644 000c 574B     		ldr	r3, .L174
 1645 000e 1A68     		ldr	r2, [r3]
 1646 0010 0723     		movs	r3, #7
 1647 0012 1340     		ands	r3, r2
 824:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1648              		.loc 1 824 6 view .LVU498
 1649 0014 8B42     		cmp	r3, r1
 1650 0016 21D3     		bcc	.L168
 1651              	.LVL123:
 1652              	.L142:
 843:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1653              		.loc 1 843 3 is_stmt 1 view .LVU499
 843:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1654              		.loc 1 843 26 is_stmt 0 view .LVU500
 1655 0018 2368     		ldr	r3, [r4]
 843:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1656              		.loc 1 843 6 view .LVU501
 1657 001a 9A07     		lsls	r2, r3, #30
 1658 001c 0ED5     		bpl	.L145
 847:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1659              		.loc 1 847 5 is_stmt 1 view .LVU502
 847:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1660              		.loc 1 847 8 is_stmt 0 view .LVU503
 1661 001e 5B07     		lsls	r3, r3, #29
 1662 0020 05D5     		bpl	.L146
 849:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     }
 1663              		.loc 1 849 7 is_stmt 1 view .LVU504
 1664 0022 534A     		ldr	r2, .L174+4
 1665 0024 9168     		ldr	r1, [r2, #8]
 1666 0026 E023     		movs	r3, #224
 1667 0028 DB01     		lsls	r3, r3, #7
 1668 002a 0B43     		orrs	r3, r1
 1669 002c 9360     		str	r3, [r2, #8]
 1670              	.L146:
 853:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 1671              		.loc 1 853 5 view .LVU505
 854:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 1672              		.loc 1 854 5 view .LVU506
 1673 002e 504A     		ldr	r2, .L174+4
 1674 0030 9368     		ldr	r3, [r2, #8]
 1675 0032 5049     		ldr	r1, .L174+8
 1676 0034 0B40     		ands	r3, r1
 1677 0036 A168     		ldr	r1, [r4, #8]
 1678 0038 0B43     		orrs	r3, r1
 1679 003a 9360     		str	r3, [r2, #8]
 1680              	.L145:
 858:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1681              		.loc 1 858 3 view .LVU507
 858:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1682              		.loc 1 858 6 is_stmt 0 view .LVU508
 1683 003c 2368     		ldr	r3, [r4]
 1684 003e DB07     		lsls	r3, r3, #31
 1685 0040 54D5     		bpl	.L147
 860:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1686              		.loc 1 860 5 is_stmt 1 view .LVU509
ARM GAS  /tmp/ccBwposX.s 			page 56


 863:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1687              		.loc 1 863 5 view .LVU510
 863:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1688              		.loc 1 863 26 is_stmt 0 view .LVU511
 1689 0042 6368     		ldr	r3, [r4, #4]
 863:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1690              		.loc 1 863 8 view .LVU512
 1691 0044 012B     		cmp	r3, #1
 1692 0046 20D0     		beq	.L169
 872:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1693              		.loc 1 872 10 is_stmt 1 view .LVU513
 872:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1694              		.loc 1 872 13 is_stmt 0 view .LVU514
 1695 0048 022B     		cmp	r3, #2
 1696 004a 3BD0     		beq	.L170
 881:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1697              		.loc 1 881 10 is_stmt 1 view .LVU515
 881:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1698              		.loc 1 881 13 is_stmt 0 view .LVU516
 1699 004c 002B     		cmp	r3, #0
 1700 004e 3FD1     		bne	.L151
 884:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1701              		.loc 1 884 7 is_stmt 1 view .LVU517
 884:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1702              		.loc 1 884 11 is_stmt 0 view .LVU518
 1703 0050 474A     		ldr	r2, .L174+4
 1704 0052 1268     		ldr	r2, [r2]
 884:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1705              		.loc 1 884 10 view .LVU519
 1706 0054 5205     		lsls	r2, r2, #21
 1707 0056 1CD4     		bmi	.L149
 886:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 1708              		.loc 1 886 16 view .LVU520
 1709 0058 0120     		movs	r0, #1
 1710 005a 6AE0     		b	.L141
 1711              	.LVL124:
 1712              	.L168:
 827:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1713              		.loc 1 827 5 is_stmt 1 view .LVU521
 1714 005c 434A     		ldr	r2, .L174
 1715 005e 1368     		ldr	r3, [r2]
 1716 0060 0721     		movs	r1, #7
 1717              	.LVL125:
 827:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1718              		.loc 1 827 5 is_stmt 0 view .LVU522
 1719 0062 8B43     		bics	r3, r1
 1720 0064 2B43     		orrs	r3, r5
 1721 0066 1360     		str	r3, [r2]
 831:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1722              		.loc 1 831 5 is_stmt 1 view .LVU523
 831:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1723              		.loc 1 831 17 is_stmt 0 view .LVU524
 1724 0068 FFF7FEFF 		bl	HAL_GetTick
 1725              	.LVL126:
 831:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1726              		.loc 1 831 17 view .LVU525
 1727 006c 0600     		movs	r6, r0
ARM GAS  /tmp/ccBwposX.s 			page 57


 1728              	.LVL127:
 833:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1729              		.loc 1 833 5 is_stmt 1 view .LVU526
 1730              	.L143:
 833:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1731              		.loc 1 833 11 view .LVU527
 833:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1732              		.loc 1 833 18 is_stmt 0 view .LVU528
 1733 006e 3F4B     		ldr	r3, .L174
 1734 0070 1A68     		ldr	r2, [r3]
 833:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1735              		.loc 1 833 24 view .LVU529
 1736 0072 0723     		movs	r3, #7
 1737 0074 1340     		ands	r3, r2
 833:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1738              		.loc 1 833 11 view .LVU530
 1739 0076 AB42     		cmp	r3, r5
 1740 0078 CED0     		beq	.L142
 835:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1741              		.loc 1 835 7 is_stmt 1 view .LVU531
 835:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1742              		.loc 1 835 12 is_stmt 0 view .LVU532
 1743 007a FFF7FEFF 		bl	HAL_GetTick
 1744              	.LVL128:
 835:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1745              		.loc 1 835 26 view .LVU533
 1746 007e 801B     		subs	r0, r0, r6
 835:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1747              		.loc 1 835 10 view .LVU534
 1748 0080 3D4A     		ldr	r2, .L174+12
 1749 0082 9042     		cmp	r0, r2
 1750 0084 F3D9     		bls	.L143
 837:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 1751              		.loc 1 837 16 view .LVU535
 1752 0086 0320     		movs	r0, #3
 1753 0088 53E0     		b	.L141
 1754              	.LVL129:
 1755              	.L169:
 866:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1756              		.loc 1 866 7 is_stmt 1 view .LVU536
 866:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1757              		.loc 1 866 11 is_stmt 0 view .LVU537
 1758 008a 394A     		ldr	r2, .L174+4
 1759 008c 1268     		ldr	r2, [r2]
 866:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1760              		.loc 1 866 10 view .LVU538
 1761 008e 9203     		lsls	r2, r2, #14
 1762 0090 69D5     		bpl	.L171
 1763              	.L149:
 907:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1764              		.loc 1 907 5 is_stmt 1 view .LVU539
 1765 0092 3749     		ldr	r1, .L174+4
 1766 0094 8A68     		ldr	r2, [r1, #8]
 1767 0096 0720     		movs	r0, #7
 1768 0098 8243     		bics	r2, r0
 1769 009a 1343     		orrs	r3, r2
 1770 009c 8B60     		str	r3, [r1, #8]
ARM GAS  /tmp/ccBwposX.s 			page 58


 910:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1771              		.loc 1 910 5 view .LVU540
 910:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1772              		.loc 1 910 17 is_stmt 0 view .LVU541
 1773 009e FFF7FEFF 		bl	HAL_GetTick
 1774              	.LVL130:
 1775 00a2 0600     		movs	r6, r0
 1776              	.LVL131:
 912:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1777              		.loc 1 912 5 is_stmt 1 view .LVU542
 1778              	.L153:
 912:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1779              		.loc 1 912 11 view .LVU543
 912:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1780              		.loc 1 912 12 is_stmt 0 view .LVU544
 1781 00a4 324B     		ldr	r3, .L174+4
 1782 00a6 9B68     		ldr	r3, [r3, #8]
 1783 00a8 3822     		movs	r2, #56
 1784 00aa 1A40     		ands	r2, r3
 912:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1785              		.loc 1 912 78 view .LVU545
 1786 00ac 6368     		ldr	r3, [r4, #4]
 1787 00ae DB00     		lsls	r3, r3, #3
 912:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1788              		.loc 1 912 11 view .LVU546
 1789 00b0 9A42     		cmp	r2, r3
 1790 00b2 1BD0     		beq	.L147
 914:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1791              		.loc 1 914 7 is_stmt 1 view .LVU547
 914:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1792              		.loc 1 914 12 is_stmt 0 view .LVU548
 1793 00b4 FFF7FEFF 		bl	HAL_GetTick
 1794              	.LVL132:
 914:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1795              		.loc 1 914 26 view .LVU549
 1796 00b8 801B     		subs	r0, r0, r6
 914:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1797              		.loc 1 914 10 view .LVU550
 1798 00ba 2F4B     		ldr	r3, .L174+12
 1799 00bc 9842     		cmp	r0, r3
 1800 00be F1D9     		bls	.L153
 916:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 1801              		.loc 1 916 16 view .LVU551
 1802 00c0 0320     		movs	r0, #3
 1803 00c2 36E0     		b	.L141
 1804              	.LVL133:
 1805              	.L170:
 875:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1806              		.loc 1 875 7 is_stmt 1 view .LVU552
 875:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1807              		.loc 1 875 11 is_stmt 0 view .LVU553
 1808 00c4 2A4A     		ldr	r2, .L174+4
 1809 00c6 1268     		ldr	r2, [r2]
 875:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1810              		.loc 1 875 10 view .LVU554
 1811 00c8 9201     		lsls	r2, r2, #6
 1812 00ca E2D4     		bmi	.L149
ARM GAS  /tmp/ccBwposX.s 			page 59


 877:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 1813              		.loc 1 877 16 view .LVU555
 1814 00cc 0120     		movs	r0, #1
 1815 00ce 30E0     		b	.L141
 1816              	.L151:
 890:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1817              		.loc 1 890 10 is_stmt 1 view .LVU556
 890:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1818              		.loc 1 890 13 is_stmt 0 view .LVU557
 1819 00d0 032B     		cmp	r3, #3
 1820 00d2 05D0     		beq	.L172
 902:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1821              		.loc 1 902 7 is_stmt 1 view .LVU558
 902:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1822              		.loc 1 902 11 is_stmt 0 view .LVU559
 1823 00d4 264A     		ldr	r2, .L174+4
 1824 00d6 D26D     		ldr	r2, [r2, #92]
 902:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1825              		.loc 1 902 10 view .LVU560
 1826 00d8 9207     		lsls	r2, r2, #30
 1827 00da DAD4     		bmi	.L149
 904:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 1828              		.loc 1 904 16 view .LVU561
 1829 00dc 0120     		movs	r0, #1
 1830 00de 28E0     		b	.L141
 1831              	.L172:
 893:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1832              		.loc 1 893 7 is_stmt 1 view .LVU562
 893:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1833              		.loc 1 893 11 is_stmt 0 view .LVU563
 1834 00e0 234A     		ldr	r2, .L174+4
 1835 00e2 126E     		ldr	r2, [r2, #96]
 893:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1836              		.loc 1 893 10 view .LVU564
 1837 00e4 9207     		lsls	r2, r2, #30
 1838 00e6 D4D4     		bmi	.L149
 895:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 1839              		.loc 1 895 16 view .LVU565
 1840 00e8 0120     		movs	r0, #1
 1841 00ea 22E0     		b	.L141
 1842              	.L147:
 922:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1843              		.loc 1 922 3 is_stmt 1 view .LVU566
 922:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1844              		.loc 1 922 18 is_stmt 0 view .LVU567
 1845 00ec 1F4B     		ldr	r3, .L174
 1846 00ee 1A68     		ldr	r2, [r3]
 1847 00f0 0723     		movs	r3, #7
 1848 00f2 1340     		ands	r3, r2
 922:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1849              		.loc 1 922 6 view .LVU568
 1850 00f4 AB42     		cmp	r3, r5
 1851 00f6 1DD8     		bhi	.L173
 1852              	.L155:
 941:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 1853              		.loc 1 941 3 is_stmt 1 view .LVU569
 941:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
ARM GAS  /tmp/ccBwposX.s 			page 60


 1854              		.loc 1 941 6 is_stmt 0 view .LVU570
 1855 00f8 2368     		ldr	r3, [r4]
 1856 00fa 5B07     		lsls	r3, r3, #29
 1857 00fc 06D5     		bpl	.L158
 943:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider);
 1858              		.loc 1 943 5 is_stmt 1 view .LVU571
 944:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 1859              		.loc 1 944 5 view .LVU572
 1860 00fe 1C4A     		ldr	r2, .L174+4
 1861 0100 9368     		ldr	r3, [r2, #8]
 1862 0102 1E49     		ldr	r1, .L174+16
 1863 0104 0B40     		ands	r3, r1
 1864 0106 E168     		ldr	r1, [r4, #12]
 1865 0108 0B43     		orrs	r3, r1
 1866 010a 9360     		str	r3, [r2, #8]
 1867              	.L158:
 948:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1868              		.loc 1 948 3 view .LVU573
 948:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1869              		.loc 1 948 22 is_stmt 0 view .LVU574
 1870 010c FFF7FEFF 		bl	HAL_RCC_GetSysClockFreq
 1871              	.LVL134:
 948:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1872              		.loc 1 948 71 view .LVU575
 1873 0110 174B     		ldr	r3, .L174+4
 1874 0112 9A68     		ldr	r2, [r3, #8]
 948:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1875              		.loc 1 948 95 view .LVU576
 1876 0114 120A     		lsrs	r2, r2, #8
 1877 0116 0F23     		movs	r3, #15
 1878 0118 1340     		ands	r3, r2
 948:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1879              		.loc 1 948 66 view .LVU577
 1880 011a 9B00     		lsls	r3, r3, #2
 1881 011c 184A     		ldr	r2, .L174+20
 1882 011e 9A58     		ldr	r2, [r3, r2]
 948:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1883              		.loc 1 948 118 view .LVU578
 1884 0120 1F23     		movs	r3, #31
 1885 0122 1340     		ands	r3, r2
 948:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1886              		.loc 1 948 48 view .LVU579
 1887 0124 D840     		lsrs	r0, r0, r3
 948:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1888              		.loc 1 948 19 view .LVU580
 1889 0126 174B     		ldr	r3, .L174+24
 1890 0128 1860     		str	r0, [r3]
 951:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 1891              		.loc 1 951 3 is_stmt 1 view .LVU581
 951:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 1892              		.loc 1 951 10 is_stmt 0 view .LVU582
 1893 012a 174B     		ldr	r3, .L174+28
 1894 012c 1868     		ldr	r0, [r3]
 1895 012e FFF7FEFF 		bl	HAL_InitTick
 1896              	.LVL135:
 1897              	.L141:
 952:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
ARM GAS  /tmp/ccBwposX.s 			page 61


 1898              		.loc 1 952 1 view .LVU583
 1899              		@ sp needed
 1900              	.LVL136:
 1901              	.LVL137:
 952:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1902              		.loc 1 952 1 view .LVU584
 1903 0132 70BD     		pop	{r4, r5, r6, pc}
 1904              	.LVL138:
 1905              	.L173:
 925:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1906              		.loc 1 925 5 is_stmt 1 view .LVU585
 1907 0134 0D4A     		ldr	r2, .L174
 1908 0136 1368     		ldr	r3, [r2]
 1909 0138 0721     		movs	r1, #7
 1910 013a 8B43     		bics	r3, r1
 1911 013c 2B43     		orrs	r3, r5
 1912 013e 1360     		str	r3, [r2]
 929:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1913              		.loc 1 929 5 view .LVU586
 929:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 1914              		.loc 1 929 17 is_stmt 0 view .LVU587
 1915 0140 FFF7FEFF 		bl	HAL_GetTick
 1916              	.LVL139:
 1917 0144 0600     		movs	r6, r0
 1918              	.LVL140:
 931:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1919              		.loc 1 931 5 is_stmt 1 view .LVU588
 1920              	.L156:
 931:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1921              		.loc 1 931 11 view .LVU589
 931:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1922              		.loc 1 931 18 is_stmt 0 view .LVU590
 1923 0146 094B     		ldr	r3, .L174
 1924 0148 1A68     		ldr	r2, [r3]
 931:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1925              		.loc 1 931 24 view .LVU591
 1926 014a 0723     		movs	r3, #7
 1927 014c 1340     		ands	r3, r2
 931:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     {
 1928              		.loc 1 931 11 view .LVU592
 1929 014e AB42     		cmp	r3, r5
 1930 0150 D2D0     		beq	.L155
 933:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1931              		.loc 1 933 7 is_stmt 1 view .LVU593
 933:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1932              		.loc 1 933 12 is_stmt 0 view .LVU594
 1933 0152 FFF7FEFF 		bl	HAL_GetTick
 1934              	.LVL141:
 933:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1935              		.loc 1 933 26 view .LVU595
 1936 0156 801B     		subs	r0, r0, r6
 933:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       {
 1937              		.loc 1 933 10 view .LVU596
 1938 0158 074B     		ldr	r3, .L174+12
 1939 015a 9842     		cmp	r0, r3
 1940 015c F3D9     		bls	.L156
 935:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
ARM GAS  /tmp/ccBwposX.s 			page 62


 1941              		.loc 1 935 16 view .LVU597
 1942 015e 0320     		movs	r0, #3
 1943 0160 E7E7     		b	.L141
 1944              	.LVL142:
 1945              	.L159:
 812:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 1946              		.loc 1 812 12 view .LVU598
 1947 0162 0120     		movs	r0, #1
 1948              	.LVL143:
 812:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 1949              		.loc 1 812 12 view .LVU599
 1950 0164 E5E7     		b	.L141
 1951              	.LVL144:
 1952              	.L171:
 868:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****       }
 1953              		.loc 1 868 16 view .LVU600
 1954 0166 0120     		movs	r0, #1
 1955 0168 E3E7     		b	.L141
 1956              	.L175:
 1957 016a C046     		.align	2
 1958              	.L174:
 1959 016c 00200240 		.word	1073881088
 1960 0170 00100240 		.word	1073876992
 1961 0174 FFF0FFFF 		.word	-3841
 1962 0178 88130000 		.word	5000
 1963 017c FF8FFFFF 		.word	-28673
 1964 0180 00000000 		.word	AHBPrescTable
 1965 0184 00000000 		.word	SystemCoreClock
 1966 0188 00000000 		.word	uwTickPrio
 1967              		.cfi_endproc
 1968              	.LFE299:
 1970              		.section	.text.HAL_RCC_GetHCLKFreq,"ax",%progbits
 1971              		.align	1
 1972              		.global	HAL_RCC_GetHCLKFreq
 1973              		.syntax unified
 1974              		.code	16
 1975              		.thumb_func
 1976              		.fpu softvfp
 1978              	HAL_RCC_GetHCLKFreq:
 1979              	.LFB302:
1171:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1172:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
1173:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief  Return the HCLK frequency.
1174:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   Each time HCLK changes, this function must be called to update the
1175:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         right HCLK value. Otherwise, any configuration based on this function will be incorrect
1176:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *
1177:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency.
1178:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval HCLK frequency in Hz
1179:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
1180:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void)
1181:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
 1980              		.loc 1 1181 1 is_stmt 1 view -0
 1981              		.cfi_startproc
 1982              		@ args = 0, pretend = 0, frame = 0
 1983              		@ frame_needed = 0, uses_anonymous_args = 0
 1984              		@ link register save eliminated.
1182:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   return SystemCoreClock;
ARM GAS  /tmp/ccBwposX.s 			page 63


 1985              		.loc 1 1182 3 view .LVU602
 1986              		.loc 1 1182 10 is_stmt 0 view .LVU603
 1987 0000 014B     		ldr	r3, .L177
 1988 0002 1868     		ldr	r0, [r3]
1183:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 1989              		.loc 1 1183 1 view .LVU604
 1990              		@ sp needed
 1991 0004 7047     		bx	lr
 1992              	.L178:
 1993 0006 C046     		.align	2
 1994              	.L177:
 1995 0008 00000000 		.word	SystemCoreClock
 1996              		.cfi_endproc
 1997              	.LFE302:
 1999              		.section	.text.HAL_RCC_GetPCLK1Freq,"ax",%progbits
 2000              		.align	1
 2001              		.global	HAL_RCC_GetPCLK1Freq
 2002              		.syntax unified
 2003              		.code	16
 2004              		.thumb_func
 2005              		.fpu softvfp
 2007              	HAL_RCC_GetPCLK1Freq:
 2008              	.LFB303:
1184:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1185:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
1186:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief  Return the PCLK1 frequency.
1187:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   Each time PCLK1 changes, this function must be called to update the
1188:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrec
1189:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval PCLK1 frequency in Hz
1190:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
1191:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void)
1192:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
 2009              		.loc 1 1192 1 is_stmt 1 view -0
 2010              		.cfi_startproc
 2011              		@ args = 0, pretend = 0, frame = 0
 2012              		@ frame_needed = 0, uses_anonymous_args = 0
 2013 0000 10B5     		push	{r4, lr}
 2014              	.LCFI7:
 2015              		.cfi_def_cfa_offset 8
 2016              		.cfi_offset 4, -8
 2017              		.cfi_offset 14, -4
1193:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
1194:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   return ((uint32_t)(__LL_RCC_CALC_PCLK1_FREQ(HAL_RCC_GetHCLKFreq(), LL_RCC_GetAPB1Prescaler())));
 2018              		.loc 1 1194 3 view .LVU606
 2019              		.loc 1 1194 22 is_stmt 0 view .LVU607
 2020 0002 FFF7FEFF 		bl	HAL_RCC_GetHCLKFreq
 2021              	.LVL145:
 2022              	.LBB9:
 2023              	.LBI9:
 2024              		.file 2 "Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h"
   1:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
   2:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   ******************************************************************************
   3:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @file    stm32g0xx_ll_rcc.h
   4:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @author  MCD Application Team
   5:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief   Header file of RCC LL module.
   6:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   ******************************************************************************
   7:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @attention
ARM GAS  /tmp/ccBwposX.s 			page 64


   8:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *
   9:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
  10:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * All rights reserved.</center></h2>
  11:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *
  12:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * This software component is licensed by ST under BSD 3-Clause license,
  13:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * the "License"; You may not use this file except in compliance with the
  14:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * License. You may obtain a copy of the License at:
  15:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *                        opensource.org/licenses/BSD-3-Clause
  16:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *
  17:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   ******************************************************************************
  18:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
  19:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  20:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /* Define to prevent recursive inclusion -------------------------------------*/
  21:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #ifndef STM32G0xx_LL_RCC_H
  22:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define STM32G0xx_LL_RCC_H
  23:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  24:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #ifdef __cplusplus
  25:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** extern "C" {
  26:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif
  27:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  28:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /* Includes ------------------------------------------------------------------*/
  29:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #include "stm32g0xx.h"
  30:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  31:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @addtogroup STM32G0xx_LL_Driver
  32:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
  33:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
  34:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  35:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC)
  36:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  37:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL RCC
  38:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
  39:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
  40:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  41:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /* Private types -------------------------------------------------------------*/
  42:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /* Private variables ---------------------------------------------------------*/
  43:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_Private_Variables RCC Private Variables
  44:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
  45:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
  46:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  47:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  48:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
  49:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
  50:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
  51:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  52:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /* Private constants ---------------------------------------------------------*/
  53:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /* Private macros ------------------------------------------------------------*/
  54:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(USE_FULL_LL_DRIVER)
  55:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_Private_Macros RCC Private Macros
  56:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
  57:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
  58:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
  59:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
  60:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
  61:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /*USE_FULL_LL_DRIVER*/
  62:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  63:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /* Exported types ------------------------------------------------------------*/
  64:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(USE_FULL_LL_DRIVER)
ARM GAS  /tmp/ccBwposX.s 			page 65


  65:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_Exported_Types RCC Exported Types
  66:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
  67:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
  68:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  69:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup LL_ES_CLOCK_FREQ Clocks Frequency Structure
  70:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
  71:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
  72:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  73:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
  74:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  RCC Clocks Frequency Structure
  75:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
  76:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** typedef struct
  77:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
  78:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   uint32_t SYSCLK_Frequency;        /*!< SYSCLK clock frequency */
  79:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   uint32_t HCLK_Frequency;          /*!< HCLK clock frequency */
  80:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   uint32_t PCLK1_Frequency;         /*!< PCLK1 clock frequency */
  81:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** } LL_RCC_ClocksTypeDef;
  82:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  83:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
  84:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
  85:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
  86:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  87:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
  88:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
  89:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
  90:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* USE_FULL_LL_DRIVER */
  91:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  92:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /* Exported constants --------------------------------------------------------*/
  93:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_Exported_Constants RCC Exported Constants
  94:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
  95:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
  96:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
  97:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_OSC_VALUES Oscillator Values adaptation
  98:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief    Defines used to adapt values of different oscillators
  99:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note     These values could be modified in the user environment according to
 100:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *           HW set-up.
 101:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 102:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 103:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if !defined  (HSE_VALUE)
 104:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define HSE_VALUE    8000000U   /*!< Value of the HSE oscillator in Hz */
 105:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* HSE_VALUE */
 106:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 107:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if !defined  (HSI_VALUE)
 108:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define HSI_VALUE    16000000U  /*!< Value of the HSI oscillator in Hz */
 109:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* HSI_VALUE */
 110:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 111:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if !defined  (LSE_VALUE)
 112:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LSE_VALUE    32768U     /*!< Value of the LSE oscillator in Hz */
 113:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* LSE_VALUE */
 114:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 115:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if !defined  (LSI_VALUE)
 116:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LSI_VALUE    32000U     /*!< Value of the LSI oscillator in Hz */
 117:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* LSI_VALUE */
 118:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if !defined  (EXTERNAL_CLOCK_VALUE)
 119:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define EXTERNAL_CLOCK_VALUE    48000000U /*!< Value of the I2S_CKIN external oscillator in Hz */
 120:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* EXTERNAL_CLOCK_VALUE */
 121:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
ARM GAS  /tmp/ccBwposX.s 			page 66


 122:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_HSI48_SUPPORT)
 123:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if !defined  (HSI48_VALUE)
 124:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define HSI48_VALUE  48000000U  /*!< Value of the HSI48 oscillator in Hz */
 125:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* HSI48_VALUE */
 126:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_HSI48_SUPPORT */
 127:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 128:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 129:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 130:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 131:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_CLEAR_FLAG Clear Flags Defines
 132:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief    Flags defines which can be used with LL_RCC_WriteReg function
 133:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 134:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 135:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CICR_LSIRDYC                RCC_CICR_LSIRDYC     /*!< LSI Ready Interrupt Clear */
 136:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CICR_LSERDYC                RCC_CICR_LSERDYC     /*!< LSE Ready Interrupt Clear */
 137:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CICR_HSIRDYC                RCC_CICR_HSIRDYC     /*!< HSI Ready Interrupt Clear */
 138:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CICR_HSERDYC                RCC_CICR_HSERDYC     /*!< HSE Ready Interrupt Clear */
 139:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CICR_PLLRDYC                RCC_CICR_PLLRDYC     /*!< PLL Ready Interrupt Clear */
 140:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CICR_LSECSSC                RCC_CICR_LSECSSC     /*!< LSE Clock Security System Inte
 141:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CICR_CSSC                   RCC_CICR_CSSC        /*!< Clock Security System Interrup
 142:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_HSI48_SUPPORT)
 143:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CICR_HSI48RDYC              RCC_CICR_HSI48RDYC   /*!< HSI48 Ready Interrupt Clear */
 144:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_HSI48_SUPPORT */
 145:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 146:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 147:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 148:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 149:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_GET_FLAG Get Flags Defines
 150:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief    Flags defines which can be used with LL_RCC_ReadReg function
 151:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 152:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 153:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CIFR_LSIRDYF                RCC_CIFR_LSIRDYF     /*!< LSI Ready Interrupt flag */
 154:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CIFR_LSERDYF                RCC_CIFR_LSERDYF     /*!< LSE Ready Interrupt flag */
 155:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CIFR_HSIRDYF                RCC_CIFR_HSIRDYF     /*!< HSI Ready Interrupt flag */
 156:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_HSI48_SUPPORT)
 157:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CIFR_HSI48RDYF              RCC_CIFR_HSI48RDYF   /*!< HSI48 Ready Interrupt flag */
 158:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_HSI48_SUPPORT */
 159:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CIFR_HSERDYF                RCC_CIFR_HSERDYF     /*!< HSE Ready Interrupt flag */
 160:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CIFR_PLLRDYF                RCC_CIFR_PLLRDYF     /*!< PLL Ready Interrupt flag */
 161:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CIFR_LSECSSF                RCC_CIFR_LSECSSF     /*!< LSE Clock Security System Inte
 162:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CIFR_CSSF                   RCC_CIFR_CSSF        /*!< Clock Security System Interrup
 163:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CSR_LPWRRSTF                RCC_CSR_LPWRRSTF   /*!< Low-Power reset flag */
 164:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CSR_OBLRSTF                 RCC_CSR_OBLRSTF    /*!< OBL reset flag */
 165:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CSR_PINRSTF                 RCC_CSR_PINRSTF    /*!< PIN reset flag */
 166:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CSR_SFTRSTF                 RCC_CSR_SFTRSTF    /*!< Software Reset flag */
 167:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CSR_IWDGRSTF                RCC_CSR_IWDGRSTF   /*!< Independent Watchdog reset flag 
 168:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CSR_WWDGRSTF                RCC_CSR_WWDGRSTF   /*!< Window watchdog reset flag */
 169:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CSR_PWRRSTF                 RCC_CSR_PWRRSTF    /*!< BOR or POR/PDR reset flag */
 170:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 171:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 172:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 173:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 174:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_IT IT Defines
 175:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief    IT defines which can be used with LL_RCC_ReadReg and  LL_RCC_WriteReg functions
 176:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 177:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 178:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CIER_LSIRDYIE               RCC_CIER_LSIRDYIE      /*!< LSI Ready Interrupt Enable *
ARM GAS  /tmp/ccBwposX.s 			page 67


 179:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CIER_LSERDYIE               RCC_CIER_LSERDYIE      /*!< LSE Ready Interrupt Enable *
 180:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CIER_HSIRDYIE               RCC_CIER_HSIRDYIE      /*!< HSI Ready Interrupt Enable *
 181:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CIER_HSERDYIE               RCC_CIER_HSERDYIE      /*!< HSE Ready Interrupt Enable *
 182:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CIER_PLLRDYIE               RCC_CIER_PLLRDYIE      /*!< PLL Ready Interrupt Enable *
 183:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_HSI48_SUPPORT)
 184:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CIER_HSI48RDYIE             RCC_CIER_HSI48RDYIE    /*!< HSI48 Ready Interrupt Enable
 185:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_HSI48_SUPPORT */
 186:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 187:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 188:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 189:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 190:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_LSEDRIVE  LSE oscillator drive capability
 191:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 192:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 193:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LSEDRIVE_LOW                0x00000000U             /*!< Xtal mode lower driving cap
 194:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LSEDRIVE_MEDIUMLOW          RCC_BDCR_LSEDRV_0       /*!< Xtal mode medium low drivin
 195:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LSEDRIVE_MEDIUMHIGH         RCC_BDCR_LSEDRV_1       /*!< Xtal mode medium high drivi
 196:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LSEDRIVE_HIGH               RCC_BDCR_LSEDRV         /*!< Xtal mode higher driving ca
 197:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 198:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 199:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 200:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 201:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_LSCO_CLKSOURCE  LSCO Selection
 202:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 203:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 204:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LSCO_CLKSOURCE_LSI          0x00000000U                 /*!< LSI selection for low s
 205:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LSCO_CLKSOURCE_LSE          RCC_BDCR_LSCOSEL            /*!< LSE selection for low s
 206:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 207:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 208:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 209:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 210:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_SYS_CLKSOURCE  System clock switch
 211:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 212:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 213:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_HSI           0x00000000U                        /*!< HSI selection as
 214:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_HSE           RCC_CFGR_SW_0                      /*!< HSE selection as
 215:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_PLL           RCC_CFGR_SW_1                      /*!< PLL selection as
 216:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_LSI           (RCC_CFGR_SW_1 | RCC_CFGR_SW_0)    /*!< LSI selection us
 217:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_LSE           RCC_CFGR_SW_2                      /*!< LSE selection us
 218:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 219:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 220:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 221:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 222:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_SYS_CLKSOURCE_STATUS  System clock switch status
 223:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 224:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 225:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_STATUS_HSI    0x00000000U                         /*!< HSI used as sys
 226:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_STATUS_HSE    RCC_CFGR_SWS_0                      /*!< HSE used as sys
 227:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_STATUS_PLL    RCC_CFGR_SWS_1                      /*!< PLL used as sys
 228:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_STATUS_LSI    (RCC_CFGR_SWS_1 | RCC_CFGR_SWS_0)   /*!< LSI used as sys
 229:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_STATUS_LSE    RCC_CFGR_SWS_2                      /*!< LSE used as sys
 230:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 231:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 232:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 233:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 234:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_SYSCLK_DIV  AHB prescaler
 235:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
ARM GAS  /tmp/ccBwposX.s 			page 68


 236:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 237:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_1                0x00000000U                                             
 238:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_2                RCC_CFGR_HPRE_3                                         
 239:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_4                (RCC_CFGR_HPRE_3 | RCC_CFGR_HPRE_0)                     
 240:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_8                (RCC_CFGR_HPRE_3 | RCC_CFGR_HPRE_1)                     
 241:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_16               (RCC_CFGR_HPRE_3 | RCC_CFGR_HPRE_1 | RCC_CFGR_HPRE_0)   
 242:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_64               (RCC_CFGR_HPRE_3 | RCC_CFGR_HPRE_2)                     
 243:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_128              (RCC_CFGR_HPRE_3 | RCC_CFGR_HPRE_2 | RCC_CFGR_HPRE_0)   
 244:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_256              (RCC_CFGR_HPRE_3 | RCC_CFGR_HPRE_2 | RCC_CFGR_HPRE_1)   
 245:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_512              (RCC_CFGR_HPRE_3 | RCC_CFGR_HPRE_2 | RCC_CFGR_HPRE_1 | R
 246:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 247:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 248:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 249:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 250:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_APB1_DIV  APB low-speed prescaler (APB1)
 251:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 252:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 253:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_APB1_DIV_1                  0x00000000U                                           /*
 254:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_APB1_DIV_2                  RCC_CFGR_PPRE_2                                       /*
 255:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_APB1_DIV_4                  (RCC_CFGR_PPRE_2 | RCC_CFGR_PPRE_0)                   /*
 256:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_APB1_DIV_8                  (RCC_CFGR_PPRE_2 | RCC_CFGR_PPRE_1)                   /*
 257:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_APB1_DIV_16                 (RCC_CFGR_PPRE_2 | RCC_CFGR_PPRE_1 | RCC_CFGR_PPRE_0) /*
 258:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 259:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 260:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 261:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 262:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_HSI_DIV  HSI division factor
 263:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 264:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 265:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_HSI_DIV_1                  0x00000000U                                /*!< HSI not d
 266:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_HSI_DIV_2                  RCC_CR_HSIDIV_0                            /*!< HSI divid
 267:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_HSI_DIV_4                  RCC_CR_HSIDIV_1                            /*!< HSI divid
 268:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_HSI_DIV_8                  (RCC_CR_HSIDIV_1 | RCC_CR_HSIDIV_0)        /*!< HSI divid
 269:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_HSI_DIV_16                 RCC_CR_HSIDIV_2                            /*!< HSI divid
 270:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_HSI_DIV_32                 (RCC_CR_HSIDIV_2 | RCC_CR_HSIDIV_0)        /*!< HSI divid
 271:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_HSI_DIV_64                 (RCC_CR_HSIDIV_2 | RCC_CR_HSIDIV_1)        /*!< HSI divid
 272:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_HSI_DIV_128                RCC_CR_HSIDIV                              /*!< HSI divid
 273:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 274:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 275:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 276:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 277:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_MCO1SOURCE  MCO1 SOURCE selection
 278:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 279:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 280:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_NOCLOCK          0x00000000U                            /*!< MCO output d
 281:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_SYSCLK           RCC_CFGR_MCOSEL_0                      /*!< SYSCLK selec
 282:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_HSI48_SUPPORT)
 283:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_HSI48            RCC_CFGR_MCOSEL_1                      /*!< HSI48 select
 284:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_HSI48_SUPPORT */
 285:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_HSI              (RCC_CFGR_MCOSEL_0| RCC_CFGR_MCOSEL_1) /*!< HSI16 select
 286:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_HSE              RCC_CFGR_MCOSEL_2                      /*!< HSE selectio
 287:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_PLLCLK           (RCC_CFGR_MCOSEL_0|RCC_CFGR_MCOSEL_2)  /*!< Main PLL sel
 288:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_LSI              (RCC_CFGR_MCOSEL_1|RCC_CFGR_MCOSEL_2)  /*!< LSI selectio
 289:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_LSE              (RCC_CFGR_MCOSEL_0|RCC_CFGR_MCOSEL_1|RCC_CFGR_MCOSEL_2) 
 290:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_CFGR_MCOSEL_3)
 291:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_PLLPCLK         RCC_CFGR_MCOSEL_3                       /*!< PLLPCLK sele
 292:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_PLLQCLK         (RCC_CFGR_MCOSEL_3|RCC_CFGR_MCOSEL_0)   /*!< PLLQCLK sele
ARM GAS  /tmp/ccBwposX.s 			page 69


 293:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_RTCCLK          (RCC_CFGR_MCOSEL_3|RCC_CFGR_MCOSEL_1)   /*!< RTCCLK selec
 294:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_RTC_WKUP        (RCC_CFGR_MCOSEL_3|RCC_CFGR_MCOSEL_1|RCC_CFGR_MCOSEL_0) /
 295:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_CFGR_MCOSEL_3 */
 296:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 297:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 298:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 299:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 300:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_MCO1_DIV  MCO1 prescaler
 301:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 302:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 303:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1_DIV_1                  0x00000000U                                             
 304:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1_DIV_2                  RCC_CFGR_MCOPRE_0                                       
 305:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1_DIV_4                  RCC_CFGR_MCOPRE_1                                       
 306:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1_DIV_8                  (RCC_CFGR_MCOPRE_1 | RCC_CFGR_MCOPRE_0)                 
 307:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1_DIV_16                 RCC_CFGR_MCOPRE_2                                       
 308:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1_DIV_32                 (RCC_CFGR_MCOPRE_2 | RCC_CFGR_MCOPRE_0)                 
 309:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1_DIV_64                 (RCC_CFGR_MCOPRE_2 | RCC_CFGR_MCOPRE_1)                 
 310:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1_DIV_128                (RCC_CFGR_MCOPRE_2 | RCC_CFGR_MCOPRE_1 | RCC_CFGR_MCOPRE
 311:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_CFGR_MCOPRE_3)
 312:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1_DIV_256                 RCC_CFGR_MCOPRE_3                                      
 313:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1_DIV_512                (RCC_CFGR_MCOPRE_3 | RCC_CFGR_MCOPRE_0)                 
 314:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO1_DIV_1024               (RCC_CFGR_MCOPRE_3 | RCC_CFGR_MCOPRE_1)                 
 315:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_CFGR_MCOPRE_3 */
 316:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 317:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 318:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 319:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 320:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_MCO2_SUPPORT)
 321:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_MCO2SOURCE  MCO2 SOURCE selection
 322:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 323:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 324:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2SOURCE_NOCLOCK          0x00000000U                                             
 325:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2SOURCE_SYSCLK           RCC_CFGR_MCO2SEL_0                                      
 326:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_HSI48_SUPPORT)
 327:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2SOURCE_HSI48            RCC_CFGR_MCO2SEL_1                                      
 328:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_HSI48_SUPPORT */
 329:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2SOURCE_HSI              (RCC_CFGR_MCO2SEL_1 | RCC_CFGR_MCO2SEL_0)               
 330:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2SOURCE_HSE              RCC_CFGR_MCO2SEL_2                                      
 331:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2SOURCE_PLLCLK           (RCC_CFGR_MCO2SEL_2 | RCC_CFGR_MCO2SEL_0)               
 332:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2SOURCE_LSI              (RCC_CFGR_MCO2SEL_2 | RCC_CFGR_MCO2SEL_1)               
 333:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2SOURCE_LSE              (RCC_CFGR_MCO2SEL_2 | RCC_CFGR_MCO2SEL_1 | RCC_CFGR_MCO2
 334:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2SOURCE_PLLPCLK          RCC_CFGR_MCO2SEL_3                                      
 335:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2SOURCE_PLLQCLK          (RCC_CFGR_MCO2SEL_3 | RCC_CFGR_MCO2SEL_0)               
 336:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2SOURCE_RTCCLK           (RCC_CFGR_MCO2SEL_3 | RCC_CFGR_MCO2SEL_1)               
 337:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2SOURCE_RTC_WKUP         (RCC_CFGR_MCO2SEL_3 | RCC_CFGR_MCO2SEL_1 | RCC_CFGR_MCO2
 338:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 339:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 340:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 341:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 342:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_MCO2_DIV  MCO2 prescaler
 343:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 344:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 345:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_1                  0x00000000U                                             
 346:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_2                  RCC_CFGR_MCO2PRE_0                                      
 347:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_4                  RCC_CFGR_MCO2PRE_1                                      
 348:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_8                  (RCC_CFGR_MCO2PRE_1 | RCC_CFGR_MCO2PRE_0)               
 349:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_16                 RCC_CFGR_MCO2PRE_2                                      
ARM GAS  /tmp/ccBwposX.s 			page 70


 350:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_32                 (RCC_CFGR_MCO2PRE_2 | RCC_CFGR_MCO2PRE_0)               
 351:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_64                 (RCC_CFGR_MCO2PRE_2 | RCC_CFGR_MCO2PRE_1)               
 352:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_128                (RCC_CFGR_MCO2PRE_2 | RCC_CFGR_MCO2PRE_1 | RCC_CFGR_MCO2
 353:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_256                RCC_CFGR_MCO2PRE_3                                      
 354:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_512                (RCC_CFGR_MCO2PRE_3 | RCC_CFGR_MCO2PRE_0)               
 355:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_1024               (RCC_CFGR_MCO2PRE_3 | RCC_CFGR_MCO2PRE_1)               
 356:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 357:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 358:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 359:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_MCO2_SUPPORT */
 360:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 361:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(USE_FULL_LL_DRIVER)
 362:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_PERIPH_FREQUENCY Peripheral clock frequency
 363:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 364:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 365:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PERIPH_FREQUENCY_NO        0x00000000U                 /*!< No clock enabled for the
 366:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PERIPH_FREQUENCY_NA        0xFFFFFFFFU                 /*!< Frequency cannot be prov
 367:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 368:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 369:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 370:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* USE_FULL_LL_DRIVER */
 371:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 372:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_USARTx_CLKSOURCE  Peripheral USART clock source selection
 373:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 374:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 375:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART1_CLKSOURCE_PCLK1      ((RCC_CCIPR_USART1SEL << 16U) | 0x00000000U)            
 376:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART1_CLKSOURCE_SYSCLK     ((RCC_CCIPR_USART1SEL << 16U) | RCC_CCIPR_USART1SEL_0)  
 377:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART1_CLKSOURCE_HSI        ((RCC_CCIPR_USART1SEL << 16U) | RCC_CCIPR_USART1SEL_1)  
 378:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART1_CLKSOURCE_LSE        ((RCC_CCIPR_USART1SEL << 16U) | RCC_CCIPR_USART1SEL)    
 379:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART2_CLKSOURCE_PCLK1      ((RCC_CCIPR_USART2SEL << 16U) | 0x00000000U)            
 380:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART2_CLKSOURCE_SYSCLK     ((RCC_CCIPR_USART2SEL << 16U) | RCC_CCIPR_USART2SEL_0)  
 381:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART2_CLKSOURCE_HSI        ((RCC_CCIPR_USART2SEL << 16U) | RCC_CCIPR_USART2SEL_1)  
 382:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART2_CLKSOURCE_LSE        ((RCC_CCIPR_USART2SEL << 16U) | RCC_CCIPR_USART2SEL)    
 383:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_CCIPR_USART3SEL)
 384:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART3_CLKSOURCE_PCLK1      ((RCC_CCIPR_USART3SEL << 16U) | 0x00000000U)           /
 385:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART3_CLKSOURCE_SYSCLK     ((RCC_CCIPR_USART3SEL << 16U) | RCC_CCIPR_USART3SEL_0) /
 386:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART3_CLKSOURCE_HSI        ((RCC_CCIPR_USART3SEL << 16U) | RCC_CCIPR_USART3SEL_1) /
 387:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART3_CLKSOURCE_LSE        ((RCC_CCIPR_USART3SEL << 16U) | RCC_CCIPR_USART3SEL)   /
 388:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_CCIPR_USART3SEL */
 389:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 390:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 391:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 392:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 393:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(LPUART1) || defined(LPUART2)
 394:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_LPUARTx_CLKSOURCE Peripheral LPUART clock source selection
 395:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 396:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 397:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(LPUART2)
 398:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPUART2_CLKSOURCE_PCLK1     ((RCC_CCIPR_LPUART2SEL << 16U) | 0x00000000U)           
 399:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPUART2_CLKSOURCE_SYSCLK    ((RCC_CCIPR_LPUART2SEL << 16U) | RCC_CCIPR_LPUART2SEL_0)
 400:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPUART2_CLKSOURCE_HSI       ((RCC_CCIPR_LPUART2SEL << 16U) | RCC_CCIPR_LPUART2SEL_1)
 401:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPUART2_CLKSOURCE_LSE       ((RCC_CCIPR_LPUART2SEL << 16U) | RCC_CCIPR_LPUART2SEL)  
 402:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* LPUART2 */
 403:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPUART1_CLKSOURCE_PCLK1     ((RCC_CCIPR_LPUART1SEL << 16U) | 0x00000000U)           
 404:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPUART1_CLKSOURCE_SYSCLK    ((RCC_CCIPR_LPUART1SEL << 16U) | RCC_CCIPR_LPUART1SEL_0)
 405:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPUART1_CLKSOURCE_HSI       ((RCC_CCIPR_LPUART1SEL << 16U) | RCC_CCIPR_LPUART1SEL_1)
 406:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPUART1_CLKSOURCE_LSE       ((RCC_CCIPR_LPUART1SEL << 16U) | RCC_CCIPR_LPUART1SEL)  
ARM GAS  /tmp/ccBwposX.s 			page 71


 407:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 408:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 409:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 410:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* LPUART1 || LPUART2 */
 411:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 412:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_I2Cx_CLKSOURCE Peripheral I2C clock source selection
 413:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 414:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 415:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2C1_CLKSOURCE_PCLK1        ((RCC_CCIPR_I2C1SEL << 16U) | 0x00000000U)          /*!<
 416:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2C1_CLKSOURCE_SYSCLK       ((RCC_CCIPR_I2C1SEL << 16U) | RCC_CCIPR_I2C1SEL_0)  /*!<
 417:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2C1_CLKSOURCE_HSI          ((RCC_CCIPR_I2C1SEL << 16U) | RCC_CCIPR_I2C1SEL_1)  /*!<
 418:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_CCIPR_I2C2SEL)
 419:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2C2_CLKSOURCE_PCLK1        ((RCC_CCIPR_I2C2SEL << 16U) | 0x00000000U)          /*!<
 420:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2C2_CLKSOURCE_SYSCLK       ((RCC_CCIPR_I2C2SEL << 16U) | RCC_CCIPR_I2C2SEL_0)  /*!<
 421:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2C2_CLKSOURCE_HSI          ((RCC_CCIPR_I2C2SEL << 16U) | RCC_CCIPR_I2C2SEL_1)  /*!<
 422:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_CCIPR_I2C2SEL */
 423:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 424:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 425:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 426:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 427:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_I2Sx_CLKSOURCE Peripheral I2S clock source selection
 428:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 429:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 430:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
 431:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S1_CLKSOURCE_SYSCLK      ((RCC_CCIPR2_I2S1SEL << 16U) | 0x00000000U)          /*!<
 432:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S1_CLKSOURCE_PLL         ((RCC_CCIPR2_I2S1SEL << 16U) | RCC_CCIPR2_I2S1SEL_0)  /*!
 433:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S1_CLKSOURCE_HSI         ((RCC_CCIPR2_I2S1SEL << 16U) | RCC_CCIPR2_I2S1SEL_1)  /*!
 434:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S1_CLKSOURCE_PIN         ((RCC_CCIPR2_I2S1SEL << 16U) | RCC_CCIPR2_I2S1SEL)    /*!
 435:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S2_CLKSOURCE_SYSCLK      ((RCC_CCIPR2_I2S2SEL << 16U) | 0x00000000U)          /*!<
 436:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S2_CLKSOURCE_PLL         ((RCC_CCIPR2_I2S2SEL << 16U) | RCC_CCIPR2_I2S2SEL_0)  /*!
 437:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S2_CLKSOURCE_HSI         ((RCC_CCIPR2_I2S2SEL << 16U) | RCC_CCIPR2_I2S2SEL_1)  /*!
 438:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S2_CLKSOURCE_PIN         ((RCC_CCIPR2_I2S2SEL << 16U) | RCC_CCIPR2_I2S2SEL)    /*!
 439:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #else
 440:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S1_CLKSOURCE_SYSCLK      0x00000000U                  /*!< SYSCLK clock used as I2
 441:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S1_CLKSOURCE_PLL         RCC_CCIPR_I2S1SEL_0          /*!< PLL clock used as I2S1 
 442:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S1_CLKSOURCE_HSI         RCC_CCIPR_I2S1SEL_1          /*!< HSI clock used as I2S1 
 443:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S1_CLKSOURCE_PIN         RCC_CCIPR_I2S1SEL            /*!< External clock used as 
 444:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* STM32G0C1xx || STM32G0B1xx || STM32G0B0xx */
 445:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 446:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 447:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 448:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 449:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 450:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_CCIPR_TIM1SEL)
 451:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_TIMx_CLKSOURCE Peripheral TIM clock source selection
 452:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 453:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 454:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_TIM1_CLKSOURCE_PCLK1        (RCC_CCIPR_TIM1SEL   | (0x00000000U >> 16U))          /*
 455:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_TIM1_CLKSOURCE_PLL          (RCC_CCIPR_TIM1SEL   | (RCC_CCIPR_TIM1SEL >> 16U))    /*
 456:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 457:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 458:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 459:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_CCIPR_TIM1SEL */
 460:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 461:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_CCIPR_TIM15SEL)
 462:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @addtogroup RCC_LL_EC_TIMx_CLKSOURCE
 463:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
ARM GAS  /tmp/ccBwposX.s 			page 72


 464:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 465:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_TIM15_CLKSOURCE_PCLK1       (RCC_CCIPR_TIM15SEL  | (0x00000000U >> 16U))          /*
 466:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_TIM15_CLKSOURCE_PLL         (RCC_CCIPR_TIM15SEL  | (RCC_CCIPR_TIM15SEL >> 16U))   /*
 467:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 468:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 469:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 470:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_CCIPR_TIM15SEL */
 471:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 472:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(LPTIM1) && defined(LPTIM2)
 473:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_LPTIMx_CLKSOURCE Peripheral LPTIM clock source selection
 474:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 475:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 476:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPTIM1_CLKSOURCE_PCLK1      (RCC_CCIPR_LPTIM1SEL | (0x00000000U >> 16U))           /
 477:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPTIM1_CLKSOURCE_LSI        (RCC_CCIPR_LPTIM1SEL | (RCC_CCIPR_LPTIM1SEL_0 >> 16U)) /
 478:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPTIM1_CLKSOURCE_HSI        (RCC_CCIPR_LPTIM1SEL | (RCC_CCIPR_LPTIM1SEL_1 >> 16U)) /
 479:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPTIM1_CLKSOURCE_LSE        (RCC_CCIPR_LPTIM1SEL | (RCC_CCIPR_LPTIM1SEL >> 16U))   /
 480:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPTIM2_CLKSOURCE_PCLK1      (RCC_CCIPR_LPTIM2SEL | (0x00000000U >> 16U))           /
 481:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPTIM2_CLKSOURCE_LSI        (RCC_CCIPR_LPTIM2SEL | (RCC_CCIPR_LPTIM2SEL_0 >> 16U)) /
 482:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPTIM2_CLKSOURCE_HSI        (RCC_CCIPR_LPTIM2SEL | (RCC_CCIPR_LPTIM2SEL_1 >> 16U)) /
 483:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPTIM2_CLKSOURCE_LSE        (RCC_CCIPR_LPTIM2SEL | (RCC_CCIPR_LPTIM2SEL >> 16U))   /
 484:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 485:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 486:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 487:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* LPTIM1 && LPTIM2*/
 488:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 489:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(CEC)
 490:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_CEC_CLKSOURCE_HSI Peripheral CEC clock source selection
 491:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 492:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 493:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CEC_CLKSOURCE_HSI_DIV488    0x00000000U                   /*!< HSI oscillator clock 
 494:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CEC_CLKSOURCE_LSE           RCC_CCIPR_CECSEL              /*!< LSE oscillator clock 
 495:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 496:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 497:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 498:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 499:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* CEC */
 500:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 501:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(FDCAN1) || defined(FDCAN2)
 502:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_FDCAN_CLKSOURCE_HSI Peripheral FDCAN clock source selection
 503:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 504:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 505:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_FDCAN_CLKSOURCE_PCLK1         0x00000000U                   /*!< PCLK1 oscillator cl
 506:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_FDCAN_CLKSOURCE_PLL           RCC_CCIPR2_FDCANSEL_0          /*!< PLL "Q"  oscillato
 507:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_FDCAN_CLKSOURCE_HSE           RCC_CCIPR2_FDCANSEL_1          /*!< HSE oscillator clo
 508:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 509:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 510:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 511:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 512:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* FDCAN1 || FDCAN2 */
 513:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 514:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RNG)
 515:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_RNG_CLKSOURCE Peripheral RNG clock source selection
 516:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 517:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 518:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_RNG_CLKSOURCE_NONE          0x00000000U                   /*!< No clock used as RNG 
 519:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_RNG_CLKSOURCE_HSI_DIV8      RCC_CCIPR_RNGSEL_0            /*!< HSI oscillator clock 
 520:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_RNG_CLKSOURCE_SYSCLK        RCC_CCIPR_RNGSEL_1            /*!< SYSCLK divided by 1 u
ARM GAS  /tmp/ccBwposX.s 			page 73


 521:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_RNG_CLKSOURCE_PLL           RCC_CCIPR_RNGSEL              /*!< PLL used as RNG clock
 522:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 523:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 524:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 525:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RNG */
 526:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 527:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RNG)
 528:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_RNG_CLK_DIV Peripheral RNG clock division factor
 529:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 530:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 531:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_RNG_CLK_DIV1                0x00000000U                    /*!< RNG clock not divide
 532:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_RNG_CLK_DIV2                RCC_CCIPR_RNGDIV_0             /*!< RNG clock divided by
 533:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_RNG_CLK_DIV4                RCC_CCIPR_RNGDIV_1             /*!< RNG clock divided by
 534:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_RNG_CLK_DIV8                RCC_CCIPR_RNGDIV               /*!< RNG clock divided by
 535:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 536:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 537:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 538:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RNG */
 539:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 540:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
 541:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_USB_CLKSOURCE  Peripheral USB clock source selection
 542:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 543:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 544:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_HSI48_SUPPORT)
 545:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USB_CLKSOURCE_HSI48         0x00000000U            /*!< HSI48 clock used as USB cloc
 546:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_HSI48_SUPPORT */
 547:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USB_CLKSOURCE_HSE           RCC_CCIPR2_USBSEL_0  /*!< PLL clock used as USB clock so
 548:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USB_CLKSOURCE_PLL           RCC_CCIPR2_USBSEL_1  /*!< PLL clock used as USB clock so
 549:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 550:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 551:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 552:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* STM32G0C1xx || STM32G0B1xx || STM32G0B0xx */
 553:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 554:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_ADC_CLKSOURCE Peripheral ADC clock source selection
 555:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 556:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 557:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_ADC_CLKSOURCE_SYSCLK        0x00000000U                   /*!< SYSCLK used as ADC cl
 558:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_ADC_CLKSOURCE_PLL           RCC_CCIPR_ADCSEL_0            /*!< PLL used as ADC clock
 559:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_ADC_CLKSOURCE_HSI           RCC_CCIPR_ADCSEL_1            /*!< HSI used as ADC clock
 560:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 561:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 562:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 563:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 564:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_USARTx Peripheral USARTx get clock source
 565:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 566:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 567:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART1_CLKSOURCE            RCC_CCIPR_USART1SEL /*!< USART1 Clock source selection *
 568:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART2_CLKSOURCE            RCC_CCIPR_USART2SEL /*!< USART2 Clock source selection *
 569:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_CCIPR_USART3SEL)
 570:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USART3_CLKSOURCE            RCC_CCIPR_USART3SEL /*!< USART3 Clock source selection *
 571:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_CCIPR_USART3SEL */
 572:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 573:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 574:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 575:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 576:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(LPUART1)
 577:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_LPUART1 Peripheral LPUART get clock source
ARM GAS  /tmp/ccBwposX.s 			page 74


 578:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 579:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 580:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPUART1_CLKSOURCE           RCC_CCIPR_LPUART1SEL /*!< LPUART1 Clock source selection
 581:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(LPUART2)
 582:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPUART2_CLKSOURCE           RCC_CCIPR_LPUART2SEL /*!< LPUART2 Clock source selection
 583:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* LPUART2 */
 584:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 585:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 586:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 587:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* LPUART1 */
 588:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 589:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_I2C1 Peripheral I2C get clock source
 590:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 591:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 592:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2C1_CLKSOURCE              RCC_CCIPR_I2C1SEL /*!< I2C1 Clock source selection */
 593:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_CCIPR_I2C2SEL)
 594:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2C2_CLKSOURCE              RCC_CCIPR_I2C2SEL /*!< I2C2 Clock source selection */
 595:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_CCIPR_I2C2SEL */
 596:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 597:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 598:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 599:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 600:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_I2S1 Peripheral I2S get clock source
 601:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 602:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 603:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
 604:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S1_CLKSOURCE              RCC_CCIPR2_I2S1SEL /*!< I2S1 Clock source selection */
 605:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S2_CLKSOURCE              RCC_CCIPR2_I2S2SEL /*!< I2S2 Clock source selection */
 606:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #else
 607:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_I2S1_CLKSOURCE              RCC_CCIPR_I2S1SEL /*!< I2S1 Clock source selection */
 608:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* STM32G0C1xx || STM32G0B1xx || STM32G0B0xx */
 609:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 610:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 611:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 612:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 613:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_CCIPR_TIM1SEL)
 614:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_TIMx Peripheral TIMx get clock source
 615:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 616:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 617:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_TIM1_CLKSOURCE              RCC_CCIPR_TIM1SEL   /*!< TIM1 Clock source selection */
 618:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_CCIPR_TIM15SEL)
 619:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_TIM15_CLKSOURCE             RCC_CCIPR_TIM15SEL  /*!< TIM15 Clock source selection */
 620:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_CCIPR_TIM15SEL */
 621:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 622:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 623:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 624:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_CCIPR_TIM1SEL */
 625:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 626:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(LPTIM1) && defined(LPTIM2)
 627:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_LPTIM1 Peripheral LPTIM get clock source
 628:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 629:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 630:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPTIM1_CLKSOURCE            RCC_CCIPR_LPTIM1SEL /*!< LPTIM2 Clock source selection *
 631:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_LPTIM2_CLKSOURCE            RCC_CCIPR_LPTIM2SEL /*!< LPTIM2 Clock source selection *
 632:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 633:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 634:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
ARM GAS  /tmp/ccBwposX.s 			page 75


 635:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* LPTIM1 && LPTIM2 */
 636:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 637:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(CEC)
 638:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_CEC Peripheral CEC get clock source
 639:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 640:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 641:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_CEC_CLKSOURCE               RCC_CCIPR_CECSEL        /*!< CEC Clock source selection 
 642:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 643:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 644:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 645:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* CEC */
 646:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 647:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(FDCAN1) || defined(FDCAN2)
 648:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_FDCAN Peripheral FDCAN get clock source
 649:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 650:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 651:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_FDCAN_CLKSOURCE               RCC_CCIPR2_FDCANSEL        /*!< FDCAN Clock source sel
 652:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 653:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 654:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 655:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* FDCAN1 */
 656:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 657:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
 658:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_USB  Peripheral USB get clock source
 659:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 660:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 661:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_USB_CLKSOURCE               RCC_CCIPR2_USBSEL /*!< USB Clock source selection */
 662:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 663:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 664:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 665:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* STM32G0C1xx || STM32G0B1xx || STM32G0B0xx */
 666:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 667:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RNG)
 668:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_RNG Peripheral RNG get clock source
 669:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 670:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 671:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_RNG_CLKSOURCE               RCC_CCIPR_RNGSEL        /*!< RNG Clock source selection 
 672:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 673:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 674:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 675:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 676:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_RNG_DIV Peripheral RNG get clock division factor
 677:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 678:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 679:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_RNG_CLKDIV                  RCC_CCIPR_RNGDIV        /*!< RNG Clock division factor *
 680:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 681:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 682:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 683:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RNG */
 684:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 685:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_ADC Peripheral ADC get clock source
 686:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 687:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 688:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_ADC_CLKSOURCE               RCC_CCIPR_ADCSEL        /*!< ADC Clock source selection 
 689:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 690:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 691:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
ARM GAS  /tmp/ccBwposX.s 			page 76


 692:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 693:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_RTC_CLKSOURCE  RTC clock source selection
 694:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 695:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 696:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_NONE          0x00000000U                   /*!< No clock used as RTC 
 697:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_LSE           RCC_BDCR_RTCSEL_0       /*!< LSE oscillator clock used a
 698:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_LSI           RCC_BDCR_RTCSEL_1       /*!< LSI oscillator clock used a
 699:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_HSE_DIV32     RCC_BDCR_RTCSEL         /*!< HSE oscillator clock divide
 700:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 701:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 702:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 703:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 704:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 705:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_PLLSOURCE  PLL entry clock source
 706:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 707:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 708:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_NONE              0x00000000U             /*!< No clock */
 709:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSI               RCC_PLLCFGR_PLLSRC_HSI  /*!< HSI16 clock selected as PLL
 710:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE               RCC_PLLCFGR_PLLSRC_HSE  /*!< HSE clock selected as PLL e
 711:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 712:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 713:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 714:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 715:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_PLLM_DIV  PLL division factor (PLLM)
 716:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 717:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 718:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_1                  0x00000000U                                 /*!< PLL div
 719:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_2                  (RCC_PLLCFGR_PLLM_0)                        /*!< PLL div
 720:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_3                  (RCC_PLLCFGR_PLLM_1)                        /*!< PLL div
 721:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_4                  ((RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0)) /*!< PLL div
 722:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_5                  (RCC_PLLCFGR_PLLM_2)                        /*!< PLL div
 723:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_6                  ((RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0)) /*!< PLL div
 724:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_7                  ((RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1)) /*!< PLL div
 725:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_8                  (RCC_PLLCFGR_PLLM)                          /*!< PLL div
 726:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 727:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 728:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 729:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 730:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_PLLR_DIV  PLL division factor (PLLR)
 731:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 732:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 733:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLR_DIV_2                  (RCC_PLLCFGR_PLLR_0)                     /*!< Main PLL d
 734:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLR_DIV_3                  (RCC_PLLCFGR_PLLR_1)                     /*!< Main PLL d
 735:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLR_DIV_4                  (RCC_PLLCFGR_PLLR_1|RCC_PLLCFGR_PLLR_0)  /*!< Main PLL d
 736:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLR_DIV_5                  (RCC_PLLCFGR_PLLR_2)                     /*!< Main PLL d
 737:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLR_DIV_6                  (RCC_PLLCFGR_PLLR_2|RCC_PLLCFGR_PLLR_0)  /*!< Main PLL d
 738:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLR_DIV_7                  (RCC_PLLCFGR_PLLR_2|RCC_PLLCFGR_PLLR_1)  /*!< Main PLL d
 739:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLR_DIV_8                  (RCC_PLLCFGR_PLLR)                       /*!< Main PLL d
 740:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 741:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 742:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 743:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 744:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_PLLP_DIV  PLL division factor (PLLP)
 745:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 746:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 747:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_2                  (RCC_PLLCFGR_PLLP_0)                                    
 748:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_3                  (RCC_PLLCFGR_PLLP_1)                                    
ARM GAS  /tmp/ccBwposX.s 			page 77


 749:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_4                  (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_1)                 
 750:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_5                  (RCC_PLLCFGR_PLLP_2)                                    
 751:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_6                  (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_2)                 
 752:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_7                  (RCC_PLLCFGR_PLLP_1|RCC_PLLCFGR_PLLP_2)                 
 753:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_8                  (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_1|RCC_PLLCFGR_PLLP_
 754:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_9                  (RCC_PLLCFGR_PLLP_3)                                    
 755:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_10                 (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_3)                 
 756:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_11                 (RCC_PLLCFGR_PLLP_1|RCC_PLLCFGR_PLLP_3)                 
 757:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_12                 (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_1|RCC_PLLCFGR_PLLP_
 758:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_13                 (RCC_PLLCFGR_PLLP_2|RCC_PLLCFGR_PLLP_3)                 
 759:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_14                 (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_2|RCC_PLLCFGR_PLLP_
 760:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_15                 (RCC_PLLCFGR_PLLP_1|RCC_PLLCFGR_PLLP_2|RCC_PLLCFGR_PLLP_
 761:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_16                 (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_1|RCC_PLLCFGR_PLLP_
 762:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_17                 (RCC_PLLCFGR_PLLP_4)                                    
 763:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_18                 (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_4)                 
 764:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_19                 (RCC_PLLCFGR_PLLP_1|RCC_PLLCFGR_PLLP_4)                 
 765:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_20                 (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_1|RCC_PLLCFGR_PLLP_
 766:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_21                 (RCC_PLLCFGR_PLLP_2|RCC_PLLCFGR_PLLP_4)                 
 767:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_22                 (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_2|RCC_PLLCFGR_PLLP_
 768:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_23                 (RCC_PLLCFGR_PLLP_1|RCC_PLLCFGR_PLLP_2|RCC_PLLCFGR_PLLP_
 769:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_24                 (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_1|RCC_PLLCFGR_PLLP_
 770:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_25                 (RCC_PLLCFGR_PLLP_3|RCC_PLLCFGR_PLLP_4)                 
 771:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_26                 (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_3|RCC_PLLCFGR_PLLP_
 772:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_27                 (RCC_PLLCFGR_PLLP_1|RCC_PLLCFGR_PLLP_3|RCC_PLLCFGR_PLLP_
 773:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_28                 (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_1|RCC_PLLCFGR_PLLP_
 774:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_29                 (RCC_PLLCFGR_PLLP_2|RCC_PLLCFGR_PLLP_3|RCC_PLLCFGR_PLLP_
 775:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_30                 (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_2|RCC_PLLCFGR_PLLP_
 776:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_31                 (RCC_PLLCFGR_PLLP_1|RCC_PLLCFGR_PLLP_2|RCC_PLLCFGR_PLLP_
 777:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_32                 (RCC_PLLCFGR_PLLP_0|RCC_PLLCFGR_PLLP_1|RCC_PLLCFGR_PLLP_
 778:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 779:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 780:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 781:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 782:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_PLLQ_SUPPORT)
 783:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_PLLQ_DIV  PLL division factor (PLLQ)
 784:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 785:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 786:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLQ_DIV_2                  (RCC_PLLCFGR_PLLQ_0)                    /*!< Main PLL di
 787:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLQ_DIV_3                  (RCC_PLLCFGR_PLLQ_1)                    /*!< Main PLL di
 788:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLQ_DIV_4                  (RCC_PLLCFGR_PLLQ_1|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL di
 789:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLQ_DIV_5                  (RCC_PLLCFGR_PLLQ_2)                    /*!< Main PLL di
 790:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLQ_DIV_6                  (RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL di
 791:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLQ_DIV_7                  (RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_1) /*!< Main PLL di
 792:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_PLLQ_DIV_8                  (RCC_PLLCFGR_PLLQ)                      /*!< Main PLL di
 793:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 794:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 795:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 796:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_PLLQ_SUPPORT */
 797:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 798:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 799:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 800:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 801:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 802:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /* Exported macro ------------------------------------------------------------*/
 803:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_Exported_Macros RCC Exported Macros
 804:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 805:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
ARM GAS  /tmp/ccBwposX.s 			page 78


 806:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 807:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EM_WRITE_READ Common Write and read registers Macros
 808:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 809:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 810:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 811:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 812:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Write a value in RCC register
 813:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __REG__ Register to be written
 814:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __VALUE__ Value to be written in the register
 815:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
 816:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 817:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_WriteReg(__REG__, __VALUE__) WRITE_REG((RCC->__REG__), (__VALUE__))
 818:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 819:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 820:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Read a value in RCC register
 821:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __REG__ Register to be read
 822:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval Register value
 823:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 824:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define LL_RCC_ReadReg(__REG__) READ_REG(RCC->__REG__)
 825:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 826:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
 827:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 828:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 829:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EM_CALC_FREQ Calculate frequencies
 830:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
 831:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 832:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 833:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 834:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PLLCLK frequency on system domain
 835:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note ex: @ref __LL_RCC_CALC_PLLCLK_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
 836:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *             @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetR ());
 837:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
 838:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLM__ This parameter can be one of the following values:
 839:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_1
 840:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_2
 841:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_3
 842:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_4
 843:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_5
 844:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_6
 845:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_7
 846:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_8
 847:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLN__ Between Min_Data = 8 and Max_Data = 86
 848:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLR__ This parameter can be one of the following values:
 849:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLR_DIV_2
 850:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLR_DIV_3
 851:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLR_DIV_4
 852:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLR_DIV_5
 853:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLR_DIV_6
 854:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLR_DIV_7
 855:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLR_DIV_8
 856:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval PLL clock frequency (in Hz)
 857:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 858:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLR__)   \
 859:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   ((__INPUTFREQ__) * (__PLLN__) / ((((__PLLM__)>> RCC_PLLCFGR_PLLM_Pos) + 1U)) / \
 860:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****    (((__PLLR__) >> RCC_PLLCFGR_PLLR_Pos) + 1U))
 861:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 862:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
ARM GAS  /tmp/ccBwposX.s 			page 79


 863:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PLLPCLK frequency used on I2S domain
 864:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note ex: @ref __LL_RCC_CALC_PLLCLK_I2S1_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
 865:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *             @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetP ());
 866:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
 867:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLM__ This parameter can be one of the following values:
 868:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_1
 869:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_2
 870:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_3
 871:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_4
 872:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_5
 873:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_6
 874:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_7
 875:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_8
 876:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLN__ Between Min_Data = 8 and Max_Data = 86
 877:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLP__ This parameter can be one of the following values:
 878:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_2
 879:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_3
 880:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_4
 881:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_5
 882:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_6
 883:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_7
 884:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_8
 885:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_9
 886:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_10
 887:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_11
 888:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_12
 889:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_13
 890:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_14
 891:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_15
 892:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_16
 893:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_17
 894:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_18
 895:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_19
 896:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_20
 897:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_21
 898:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_22
 899:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_23
 900:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_24
 901:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_25
 902:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_26
 903:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_27
 904:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_28
 905:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_29
 906:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_30
 907:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_31
 908:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_32
 909:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval PLL clock frequency (in Hz)
 910:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 911:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLCLK_I2S1_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__)  \
 912:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   ((__INPUTFREQ__)  * (__PLLN__) / ((((__PLLM__)>> RCC_PLLCFGR_PLLM_Pos) + 1U)) /    \
 913:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****    (((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos) + 1U))
 914:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 915:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_CCIPR2_I2S2SEL)
 916:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 917:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PLLPCLK frequency used on I2S2 domain
 918:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note ex: @ref __LL_RCC_CALC_PLLCLK_I2S2_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
 919:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *             @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetP ());
ARM GAS  /tmp/ccBwposX.s 			page 80


 920:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
 921:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLM__ This parameter can be one of the following values:
 922:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_1
 923:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_2
 924:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_3
 925:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_4
 926:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_5
 927:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_6
 928:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_7
 929:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_8
 930:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLN__ Between Min_Data = 8 and Max_Data = 86
 931:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLP__ This parameter can be one of the following values:
 932:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_2
 933:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_3
 934:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_4
 935:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_5
 936:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_6
 937:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_7
 938:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_8
 939:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_9
 940:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_10
 941:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_11
 942:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_12
 943:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_13
 944:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_14
 945:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_15
 946:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_16
 947:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_17
 948:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_18
 949:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_19
 950:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_20
 951:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_21
 952:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_22
 953:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_23
 954:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_24
 955:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_25
 956:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_26
 957:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_27
 958:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_28
 959:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_29
 960:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_30
 961:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_31
 962:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_32
 963:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval PLL clock frequency (in Hz)
 964:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
 965:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLCLK_I2S2_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__)  \
 966:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   ((__INPUTFREQ__)  * (__PLLN__) / ((((__PLLM__)>> RCC_PLLCFGR_PLLM_Pos) + 1U)) /    \
 967:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****    (((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos) + 1U))
 968:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_CCIPR2_I2S2SEL */
 969:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
 970:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
 971:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PLLPCLK frequency used on ADC domain
 972:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note ex: @ref __LL_RCC_CALC_PLLCLK_ADC_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
 973:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *             @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetP ());
 974:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
 975:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLM__ This parameter can be one of the following values:
 976:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_1
ARM GAS  /tmp/ccBwposX.s 			page 81


 977:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_2
 978:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_3
 979:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_4
 980:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_5
 981:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_6
 982:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_7
 983:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_8
 984:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLN__ Between Min_Data = 8 and Max_Data = 86
 985:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLP__ This parameter can be one of the following values:
 986:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_2
 987:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_3
 988:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_4
 989:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_5
 990:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_6
 991:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_7
 992:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_8
 993:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_9
 994:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_10
 995:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_11
 996:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_12
 997:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_13
 998:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_14
 999:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_15
1000:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_16
1001:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_17
1002:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_18
1003:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_19
1004:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_20
1005:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_21
1006:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_22
1007:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_23
1008:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_24
1009:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_25
1010:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_26
1011:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_27
1012:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_28
1013:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_29
1014:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_30
1015:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_31
1016:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLP_DIV_32
1017:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval PLL clock frequency (in Hz)
1018:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1019:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLCLK_ADC_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__)  \
1020:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   ((__INPUTFREQ__) * (__PLLN__) / ((((__PLLM__)>> RCC_PLLCFGR_PLLM_Pos) + 1U)) /    \
1021:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****    (((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos) + 1U))
1022:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1023:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RNG)
1024:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1025:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PLLQCLK frequency used on RNG domain
1026:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note ex: @ref __LL_RCC_CALC_PLLCLK_RNG_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
1027:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *             @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetQ ());
1028:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
1029:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLM__ This parameter can be one of the following values:
1030:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_1
1031:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_2
1032:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_3
1033:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_4
ARM GAS  /tmp/ccBwposX.s 			page 82


1034:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_5
1035:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_6
1036:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_7
1037:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_8
1038:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLN__ Between Min_Data = 8 and Max_Data = 86
1039:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLQ__ This parameter can be one of the following values:
1040:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_2
1041:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_3
1042:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_4
1043:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_5
1044:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_6
1045:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_7
1046:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_8
1047:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval PLL clock frequency (in Hz)
1048:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1049:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLCLK_RNG_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLQ__)   \
1050:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   ((__INPUTFREQ__) * (__PLLN__) / ((((__PLLM__)>> RCC_PLLCFGR_PLLM_Pos) + 1U)) /     \
1051:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****    (((__PLLQ__) >> RCC_PLLCFGR_PLLQ_Pos) + 1U))
1052:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RNG */
1053:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1054:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_PLLQ_SUPPORT)
1055:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1056:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PLLQCLK frequency used on TIM1 domain
1057:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note ex: @ref __LL_RCC_CALC_PLLCLK_TIM1_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
1058:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *             @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetQ ());
1059:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
1060:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLM__ This parameter can be one of the following values:
1061:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_1
1062:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_2
1063:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_3
1064:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_4
1065:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_5
1066:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_6
1067:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_7
1068:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_8
1069:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLN__ Between Min_Data = 8 and Max_Data = 86
1070:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLQ__ This parameter can be one of the following values:
1071:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_2
1072:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_3
1073:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_4
1074:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_5
1075:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_6
1076:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_7
1077:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_8
1078:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval PLL clock frequency (in Hz)
1079:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1080:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLCLK_TIM1_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLQ__) \
1081:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   ((__INPUTFREQ__) * (__PLLN__) / ((((__PLLM__)>> RCC_PLLCFGR_PLLM_Pos) + 1U)) /    \
1082:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****    (((__PLLQ__) >> RCC_PLLCFGR_PLLQ_Pos) + 1U))
1083:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(TIM15)
1084:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1085:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PLLQCLK frequency used on TIM15 domain
1086:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note ex: @ref __LL_RCC_CALC_PLLCLK_TIM15_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
1087:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *             @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetQ ());
1088:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
1089:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLM__ This parameter can be one of the following values:
1090:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_1
ARM GAS  /tmp/ccBwposX.s 			page 83


1091:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_2
1092:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_3
1093:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_4
1094:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_5
1095:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_6
1096:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_7
1097:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_8
1098:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLN__ Between Min_Data = 8 and Max_Data = 86
1099:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLQ__ This parameter can be one of the following values:
1100:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_2
1101:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_3
1102:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_4
1103:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_5
1104:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_6
1105:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_7
1106:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_8
1107:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval PLL clock frequency (in Hz)
1108:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1109:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLCLK_TIM15_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLQ__)  \
1110:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   ((__INPUTFREQ__) * (__PLLN__) / ((((__PLLM__)>> RCC_PLLCFGR_PLLM_Pos) + 1U)) /      \
1111:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****    (((__PLLQ__) >> RCC_PLLCFGR_PLLQ_Pos) + 1U))
1112:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* TIM15 */
1113:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_PLLQ_SUPPORT */
1114:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1115:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(FDCAN1) || defined(FDCAN2)
1116:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1117:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PLLQCLK frequency used on FDCAN domain
1118:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note ex: @ref __LL_RCC_CALC_PLLCLK_FDCAN_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
1119:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *             @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetQ ());
1120:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
1121:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLM__ This parameter can be one of the following values:
1122:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_1
1123:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_2
1124:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_3
1125:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_4
1126:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_5
1127:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_6
1128:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_7
1129:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_8
1130:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLN__ Between Min_Data = 8 and Max_Data = 86
1131:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLQ__ This parameter can be one of the following values:
1132:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_2
1133:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_3
1134:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_4
1135:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_5
1136:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_6
1137:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_7
1138:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_8
1139:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval PLL clock frequency (in Hz)
1140:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1141:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLCLK_FDCAN_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLQ__) \
1142:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   ((__INPUTFREQ__) * (__PLLN__) / ((((__PLLM__)>> RCC_PLLCFGR_PLLM_Pos) + 1U)) /     \
1143:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****    (((__PLLQ__) >> RCC_PLLCFGR_PLLQ_Pos) + 1U))
1144:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* FDCAN1 || FDCAN2 */
1145:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1146:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
1147:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
ARM GAS  /tmp/ccBwposX.s 			page 84


1148:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PLLQCLK frequency used on USB domain
1149:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note ex: @ref __LL_RCC_CALC_PLLCLK_USB_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
1150:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *             @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetQ ());
1151:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
1152:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLM__ This parameter can be one of the following values:
1153:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_1
1154:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_2
1155:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_3
1156:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_4
1157:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_5
1158:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_6
1159:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_7
1160:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLM_DIV_8
1161:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLN__ Between Min_Data = 8 and Max_Data = 86
1162:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __PLLQ__ This parameter can be one of the following values:
1163:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_2
1164:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_3
1165:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_4
1166:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_5
1167:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_6
1168:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_7
1169:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLQ_DIV_8
1170:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval PLL clock frequency (in Hz)
1171:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1172:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLCLK_USB_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLQ__) \
1173:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   ((__INPUTFREQ__) * (__PLLN__) / ((((__PLLM__)>> RCC_PLLCFGR_PLLM_Pos) + 1U)) /   \
1174:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****    (((__PLLQ__) >> RCC_PLLCFGR_PLLQ_Pos) + 1U))
1175:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* STM32G0C1xx || STM32G0B1xx || STM32G0B0xx */
1176:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1177:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1178:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Helper macro to calculate the HCLK frequency
1179:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __SYSCLKFREQ__ SYSCLK frequency (based on HSE/HSI/PLLCLK)
1180:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __AHBPRESCALER__ This parameter can be one of the following values:
1181:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_1
1182:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_2
1183:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_4
1184:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_8
1185:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_16
1186:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_64
1187:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_128
1188:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_256
1189:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_512
1190:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval HCLK clock frequency (in Hz)
1191:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1192:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define __LL_RCC_CALC_HCLK_FREQ(__SYSCLKFREQ__,__AHBPRESCALER__)  \
1193:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   ((__SYSCLKFREQ__) >> (AHBPrescTable[((__AHBPRESCALER__) & RCC_CFGR_HPRE) >>  RCC_CFGR_HPRE_Pos] &
1194:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1195:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1196:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PCLK1 frequency (ABP1)
1197:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __HCLKFREQ__ HCLK frequency
1198:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __APB1PRESCALER__ This parameter can be one of the following values:
1199:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_1
1200:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_2
1201:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_4
1202:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_8
1203:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_16
1204:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval PCLK1 clock frequency (in Hz)
ARM GAS  /tmp/ccBwposX.s 			page 85


1205:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1206:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define __LL_RCC_CALC_PCLK1_FREQ(__HCLKFREQ__, __APB1PRESCALER__)  \
1207:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   ((__HCLKFREQ__) >> (APBPrescTable[(__APB1PRESCALER__) >>  RCC_CFGR_PPRE_Pos] & 0x1FU))
1208:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1209:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1210:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Helper macro to calculate the HSISYS frequency
1211:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  __HSIDIV__ This parameter can be one of the following values:
1212:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_1
1213:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_2
1214:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_4
1215:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_8
1216:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_16
1217:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_32
1218:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_64
1219:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_128
1220:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval HSISYS clock frequency (in Hz)
1221:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1222:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #define __LL_RCC_CALC_HSI_FREQ(__HSIDIV__) (HSI_VALUE / (1U << ((__HSIDIV__)>> RCC_CR_HSIDIV_Pos)))
1223:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1224:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1225:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
1226:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1227:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1228:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1229:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
1230:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1231:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1232:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /* Exported functions --------------------------------------------------------*/
1233:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_Exported_Functions RCC Exported Functions
1234:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
1235:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1236:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1237:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_HSE HSE
1238:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
1239:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1240:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1241:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1242:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Enable the Clock Security System.
1243:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR           CSSON         LL_RCC_HSE_EnableCSS
1244:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1245:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1246:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSE_EnableCSS(void)
1247:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1248:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   SET_BIT(RCC->CR, RCC_CR_CSSON);
1249:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1250:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1251:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1252:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Enable HSE external oscillator (HSE Bypass)
1253:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR           HSEBYP        LL_RCC_HSE_EnableBypass
1254:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1255:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1256:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSE_EnableBypass(void)
1257:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1258:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   SET_BIT(RCC->CR, RCC_CR_HSEBYP);
1259:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1260:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1261:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
ARM GAS  /tmp/ccBwposX.s 			page 86


1262:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Disable HSE external oscillator (HSE Bypass)
1263:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR           HSEBYP        LL_RCC_HSE_DisableBypass
1264:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1265:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1266:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSE_DisableBypass(void)
1267:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1268:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
1269:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1270:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1271:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1272:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Enable HSE crystal oscillator (HSE ON)
1273:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR           HSEON         LL_RCC_HSE_Enable
1274:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1275:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1276:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSE_Enable(void)
1277:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1278:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   SET_BIT(RCC->CR, RCC_CR_HSEON);
1279:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1280:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1281:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1282:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Disable HSE crystal oscillator (HSE ON)
1283:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR           HSEON         LL_RCC_HSE_Disable
1284:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1285:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1286:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSE_Disable(void)
1287:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1288:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   CLEAR_BIT(RCC->CR, RCC_CR_HSEON);
1289:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1290:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1291:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1292:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Check if HSE oscillator Ready
1293:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR           HSERDY        LL_RCC_HSE_IsReady
1294:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1295:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1296:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_HSE_IsReady(void)
1297:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1298:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return ((READ_BIT(RCC->CR, RCC_CR_HSERDY) == (RCC_CR_HSERDY)) ? 1UL : 0UL);
1299:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1300:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1301:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1302:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
1303:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1304:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1305:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_HSI HSI
1306:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
1307:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1308:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1309:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1310:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Enable HSI even in stop mode
1311:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note HSI oscillator is forced ON even in Stop mode
1312:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR           HSIKERON      LL_RCC_HSI_EnableInStopMode
1313:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1314:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1315:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSI_EnableInStopMode(void)
1316:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1317:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   SET_BIT(RCC->CR, RCC_CR_HSIKERON);
1318:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
ARM GAS  /tmp/ccBwposX.s 			page 87


1319:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1320:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1321:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Disable HSI in stop mode
1322:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR           HSIKERON      LL_RCC_HSI_DisableInStopMode
1323:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1324:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1325:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSI_DisableInStopMode(void)
1326:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1327:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   CLEAR_BIT(RCC->CR, RCC_CR_HSIKERON);
1328:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1329:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1330:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1331:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Check if HSI in stop mode is enabled
1332:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR           HSIKERON        LL_RCC_HSI_IsEnabledInStopMode
1333:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1334:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1335:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_HSI_IsEnabledInStopMode(void)
1336:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1337:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return ((READ_BIT(RCC->CR, RCC_CR_HSIKERON) == (RCC_CR_HSIKERON)) ? 1UL : 0UL);
1338:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1339:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1340:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1341:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Enable HSI oscillator
1342:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR           HSION         LL_RCC_HSI_Enable
1343:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1344:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1345:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSI_Enable(void)
1346:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1347:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   SET_BIT(RCC->CR, RCC_CR_HSION);
1348:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1349:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1350:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1351:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Disable HSI oscillator
1352:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR           HSION         LL_RCC_HSI_Disable
1353:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1354:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1355:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSI_Disable(void)
1356:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1357:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   CLEAR_BIT(RCC->CR, RCC_CR_HSION);
1358:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1359:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1360:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1361:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Check if HSI clock is ready
1362:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR           HSIRDY        LL_RCC_HSI_IsReady
1363:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1364:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1365:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_HSI_IsReady(void)
1366:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1367:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) == (RCC_CR_HSIRDY)) ? 1UL : 0UL);
1368:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1369:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1370:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1371:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Get HSI Calibration value
1372:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note When HSITRIM is written, HSICAL is updated with the sum of
1373:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *       HSITRIM and the factory trim value
1374:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll ICSCR        HSICAL        LL_RCC_HSI_GetCalibration
1375:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval Between Min_Data = 0x00 and Max_Data = 0xFF
ARM GAS  /tmp/ccBwposX.s 			page 88


1376:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1377:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibration(void)
1378:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1379:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_HSICAL) >> RCC_ICSCR_HSICAL_Pos);
1380:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1381:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1382:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1383:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Set HSI Calibration trimming
1384:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note user-programmable trimming value that is added to the HSICAL
1385:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note Default value is 64, which, when added to the HSICAL value,
1386:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *       should trim the HSI to 16 MHz +/- 1 %
1387:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll ICSCR        HSITRIM       LL_RCC_HSI_SetCalibTrimming
1388:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  Value Between Min_Data = 0 and Max_Data = 127
1389:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1390:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1391:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSI_SetCalibTrimming(uint32_t Value)
1392:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1393:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, Value << RCC_ICSCR_HSITRIM_Pos);
1394:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1395:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1396:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1397:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Get HSI Calibration trimming
1398:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll ICSCR        HSITRIM       LL_RCC_HSI_GetCalibTrimming
1399:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval Between Min_Data = 0 and Max_Data = 127
1400:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1401:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibTrimming(void)
1402:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1403:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_HSITRIM) >> RCC_ICSCR_HSITRIM_Pos);
1404:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1405:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1406:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1407:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
1408:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1409:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1410:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #if defined(RCC_HSI48_SUPPORT)
1411:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_HSI48 HSI48
1412:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
1413:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1414:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1415:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1416:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Enable HSI48
1417:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR         HSI48ON       LL_RCC_HSI48_Enable
1418:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1419:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1420:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSI48_Enable(void)
1421:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1422:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   SET_BIT(RCC->CR, RCC_CR_HSI48ON);
1423:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1424:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1425:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1426:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Disable HSI48
1427:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR          HSI48ON       LL_RCC_HSI48_Disable
1428:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1429:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1430:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSI48_Disable(void)
1431:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1432:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   CLEAR_BIT(RCC->CR, RCC_CR_HSI48ON);
ARM GAS  /tmp/ccBwposX.s 			page 89


1433:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1434:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1435:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1436:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Check if HSI48 oscillator Ready
1437:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR          HSI48RDY      LL_RCC_HSI48_IsReady
1438:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1439:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1440:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_HSI48_IsReady(void)
1441:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1442:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return ((READ_BIT(RCC->CR, RCC_CR_HSI48RDY) == RCC_CR_HSI48RDY) ? 1UL : 0UL);
1443:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1444:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1445:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1446:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Get HSI48 Calibration value
1447:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CRRCR          HSI48CAL      LL_RCC_HSI48_GetCalibration
1448:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval Between Min_Data = 0x00 and Max_Data = 0x1FF
1449:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1450:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_HSI48_GetCalibration(void)
1451:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1452:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_CRRCR_HSI48CAL_Pos);
1453:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1454:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1455:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1456:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
1457:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1458:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** #endif /* RCC_HSI48_SUPPORT */
1459:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1460:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_LSE LSE
1461:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
1462:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1463:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1464:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1465:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Enable  Low Speed External (LSE) crystal.
1466:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll BDCR         LSEON         LL_RCC_LSE_Enable
1467:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1468:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1469:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSE_Enable(void)
1470:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1471:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   SET_BIT(RCC->BDCR, RCC_BDCR_LSEON);
1472:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1473:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1474:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1475:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Disable  Low Speed External (LSE) crystal.
1476:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll BDCR         LSEON         LL_RCC_LSE_Disable
1477:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1478:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1479:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSE_Disable(void)
1480:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1481:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON);
1482:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1483:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1484:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1485:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Enable external clock source (LSE bypass).
1486:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll BDCR         LSEBYP        LL_RCC_LSE_EnableBypass
1487:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1488:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1489:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSE_EnableBypass(void)
ARM GAS  /tmp/ccBwposX.s 			page 90


1490:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1491:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP);
1492:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1493:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1494:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1495:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Disable external clock source (LSE bypass).
1496:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll BDCR         LSEBYP        LL_RCC_LSE_DisableBypass
1497:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1498:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1499:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSE_DisableBypass(void)
1500:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1501:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP);
1502:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1503:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1504:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1505:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Set LSE oscillator drive capability
1506:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note The oscillator is in Xtal mode when it is not in bypass mode.
1507:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll BDCR         LSEDRV        LL_RCC_LSE_SetDriveCapability
1508:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  LSEDrive This parameter can be one of the following values:
1509:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_LSEDRIVE_LOW
1510:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_LSEDRIVE_MEDIUMLOW
1511:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_LSEDRIVE_MEDIUMHIGH
1512:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_LSEDRIVE_HIGH
1513:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1514:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1515:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSE_SetDriveCapability(uint32_t LSEDrive)
1516:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1517:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   MODIFY_REG(RCC->BDCR, RCC_BDCR_LSEDRV, LSEDrive);
1518:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1519:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1520:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1521:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Get LSE oscillator drive capability
1522:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll BDCR         LSEDRV        LL_RCC_LSE_GetDriveCapability
1523:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1524:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_LSEDRIVE_LOW
1525:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_LSEDRIVE_MEDIUMLOW
1526:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_LSEDRIVE_MEDIUMHIGH
1527:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_LSEDRIVE_HIGH
1528:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1529:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_LSE_GetDriveCapability(void)
1530:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1531:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_LSEDRV));
1532:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1533:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1534:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1535:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Enable Clock security system on LSE.
1536:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll BDCR         LSECSSON      LL_RCC_LSE_EnableCSS
1537:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1538:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1539:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSE_EnableCSS(void)
1540:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1541:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON);
1542:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1543:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1544:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1545:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Disable Clock security system on LSE.
1546:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note Clock security system can be disabled only after a LSE
ARM GAS  /tmp/ccBwposX.s 			page 91


1547:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *       failure detection. In that case it MUST be disabled by software.
1548:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll BDCR         LSECSSON      LL_RCC_LSE_DisableCSS
1549:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1550:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1551:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSE_DisableCSS(void)
1552:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1553:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSECSSON);
1554:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1555:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1556:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1557:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Check if LSE oscillator Ready
1558:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll BDCR         LSERDY        LL_RCC_LSE_IsReady
1559:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1560:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1561:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void)
1562:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1563:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == (RCC_BDCR_LSERDY)) ? 1UL : 0UL);
1564:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1565:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1566:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1567:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Check if CSS on LSE failure Detection
1568:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll BDCR         LSECSSD       LL_RCC_LSE_IsCSSDetected
1569:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1570:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1571:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_LSE_IsCSSDetected(void)
1572:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1573:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSECSSD) == (RCC_BDCR_LSECSSD)) ? 1UL : 0UL);
1574:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1575:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1576:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1577:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
1578:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1579:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1580:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_LSI LSI
1581:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
1582:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1583:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1584:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1585:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Enable LSI Oscillator
1586:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CSR          LSION         LL_RCC_LSI_Enable
1587:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1588:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1589:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSI_Enable(void)
1590:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1591:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   SET_BIT(RCC->CSR, RCC_CSR_LSION);
1592:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1593:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1594:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1595:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Disable LSI Oscillator
1596:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CSR          LSION         LL_RCC_LSI_Disable
1597:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1598:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1599:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSI_Disable(void)
1600:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1601:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   CLEAR_BIT(RCC->CSR, RCC_CSR_LSION);
1602:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1603:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
ARM GAS  /tmp/ccBwposX.s 			page 92


1604:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1605:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Check if LSI is Ready
1606:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CSR          LSIRDY        LL_RCC_LSI_IsReady
1607:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1608:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1609:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_LSI_IsReady(void)
1610:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1611:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return ((READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == (RCC_CSR_LSIRDY)) ? 1UL : 0UL);
1612:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1613:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1614:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1615:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
1616:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1617:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1618:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_LSCO LSCO
1619:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
1620:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1621:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1622:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1623:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Enable Low speed clock
1624:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll BDCR         LSCOEN        LL_RCC_LSCO_Enable
1625:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1626:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1627:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSCO_Enable(void)
1628:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1629:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   SET_BIT(RCC->BDCR, RCC_BDCR_LSCOEN);
1630:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1631:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1632:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1633:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Disable Low speed clock
1634:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll BDCR         LSCOEN        LL_RCC_LSCO_Disable
1635:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1636:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1637:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSCO_Disable(void)
1638:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1639:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSCOEN);
1640:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1641:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1642:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1643:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Configure Low speed clock selection
1644:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll BDCR         LSCOSEL       LL_RCC_LSCO_SetSource
1645:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  Source This parameter can be one of the following values:
1646:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_LSCO_CLKSOURCE_LSI
1647:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_LSCO_CLKSOURCE_LSE
1648:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1649:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1650:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSCO_SetSource(uint32_t Source)
1651:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1652:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   MODIFY_REG(RCC->BDCR, RCC_BDCR_LSCOSEL, Source);
1653:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1654:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1655:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1656:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Get Low speed clock selection
1657:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll BDCR         LSCOSEL       LL_RCC_LSCO_GetSource
1658:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1659:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_LSCO_CLKSOURCE_LSI
1660:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_LSCO_CLKSOURCE_LSE
ARM GAS  /tmp/ccBwposX.s 			page 93


1661:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1662:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_LSCO_GetSource(void)
1663:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1664:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_LSCOSEL));
1665:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1666:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1667:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1668:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @}
1669:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1670:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1671:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_System System
1672:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @{
1673:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1674:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1675:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1676:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Configure the system clock source
1677:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CFGR         SW            LL_RCC_SetSysClkSource
1678:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  Source This parameter can be one of the following values:
1679:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_HSI
1680:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_HSE
1681:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_PLL
1682:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_LSI
1683:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_LSE
1684:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1685:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1686:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source)
1687:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1688:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source);
1689:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1690:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1691:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1692:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Get the system clock source
1693:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CFGR         SWS           LL_RCC_GetSysClkSource
1694:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1695:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI
1696:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE
1697:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL
1698:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_LSI
1699:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_LSE
1700:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1701:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void)
1702:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1703:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
1704:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1705:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1706:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1707:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Set AHB prescaler
1708:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CFGR         HPRE          LL_RCC_SetAHBPrescaler
1709:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  Prescaler This parameter can be one of the following values:
1710:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_1
1711:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_2
1712:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_4
1713:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_8
1714:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_16
1715:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_64
1716:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_128
1717:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_256
ARM GAS  /tmp/ccBwposX.s 			page 94


1718:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_512
1719:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1720:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1721:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler)
1722:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1723:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler);
1724:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1725:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1726:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1727:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Set APB1 prescaler
1728:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CFGR         PPRE         LL_RCC_SetAPB1Prescaler
1729:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  Prescaler This parameter can be one of the following values:
1730:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_1
1731:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_2
1732:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_4
1733:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_8
1734:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_16
1735:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1736:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1737:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler)
1738:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1739:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, Prescaler);
1740:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1741:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1742:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1743:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Set HSI16 division factor
1744:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CR         HSIDIV          LL_RCC_SetHSIDiv
1745:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @note  HSIDIV parameter is only applied to SYSCLK_Frequency when HSI is used as
1746:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * system clock source.
1747:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @param  HSIDiv  This parameter can be one of the following values:
1748:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_1
1749:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_2
1750:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_4
1751:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_8
1752:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_16
1753:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_32
1754:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_64
1755:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSI_DIV_128
1756:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval None
1757:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1758:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_SetHSIDiv(uint32_t HSIDiv)
1759:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1760:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   MODIFY_REG(RCC->CR, RCC_CR_HSIDIV, HSIDiv);
1761:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1762:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1763:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Get AHB prescaler
1764:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CFGR         HPRE          LL_RCC_GetAHBPrescaler
1765:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1766:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_1
1767:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_2
1768:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_4
1769:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_8
1770:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_16
1771:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_64
1772:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_128
1773:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_256
1774:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_512
ARM GAS  /tmp/ccBwposX.s 			page 95


1775:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1776:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_GetAHBPrescaler(void)
1777:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1778:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE));
1779:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** }
1780:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** 
1781:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** /**
1782:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @brief  Get APB1 prescaler
1783:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @rmtoll CFGR         PPRE         LL_RCC_GetAPB1Prescaler
1784:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1785:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_1
1786:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_2
1787:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_4
1788:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_8
1789:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_16
1790:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   */
1791:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_GetAPB1Prescaler(void)
 2025              		.loc 2 1791 26 is_stmt 1 view .LVU608
 2026              	.LBB10:
1792:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h **** {
1793:Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE));
 2027              		.loc 2 1793 3 view .LVU609
 2028              		.loc 2 1793 21 is_stmt 0 view .LVU610
 2029 0006 064B     		ldr	r3, .L180
 2030 0008 9A68     		ldr	r2, [r3, #8]
 2031              	.LBE10:
 2032              	.LBE9:
 2033              		.loc 1 1194 22 view .LVU611
 2034 000a 120B     		lsrs	r2, r2, #12
 2035 000c 0723     		movs	r3, #7
 2036 000e 1340     		ands	r3, r2
 2037 0010 9B00     		lsls	r3, r3, #2
 2038 0012 044A     		ldr	r2, .L180+4
 2039 0014 9A58     		ldr	r2, [r3, r2]
 2040 0016 1F23     		movs	r3, #31
 2041 0018 1340     		ands	r3, r2
 2042              		.loc 1 1194 11 view .LVU612
 2043 001a D840     		lsrs	r0, r0, r3
1195:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 2044              		.loc 1 1195 1 view .LVU613
 2045              		@ sp needed
 2046 001c 10BD     		pop	{r4, pc}
 2047              	.L181:
 2048 001e C046     		.align	2
 2049              	.L180:
 2050 0020 00100240 		.word	1073876992
 2051 0024 00000000 		.word	APBPrescTable
 2052              		.cfi_endproc
 2053              	.LFE303:
 2055              		.section	.text.HAL_RCC_GetOscConfig,"ax",%progbits
 2056              		.align	1
 2057              		.global	HAL_RCC_GetOscConfig
 2058              		.syntax unified
 2059              		.code	16
 2060              		.thumb_func
 2061              		.fpu softvfp
 2063              	HAL_RCC_GetOscConfig:
ARM GAS  /tmp/ccBwposX.s 			page 96


 2064              	.LVL146:
 2065              	.LFB304:
1196:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1197:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
1198:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief  Configure the RCC_OscInitStruct according to the internal
1199:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         RCC configuration registers.
1200:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @param  RCC_OscInitStruct  pointer to an RCC_OscInitTypeDef structure that
1201:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         will be configured.
1202:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval None
1203:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
1204:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
1205:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
 2066              		.loc 1 1205 1 is_stmt 1 view -0
 2067              		.cfi_startproc
 2068              		@ args = 0, pretend = 0, frame = 0
 2069              		@ frame_needed = 0, uses_anonymous_args = 0
 2070              		@ link register save eliminated.
1206:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Check the parameters */
1207:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   assert_param(RCC_OscInitStruct != (void *)NULL);
 2071              		.loc 1 1207 3 view .LVU615
1208:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1209:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Set all possible values for the Oscillator type parameter ---------------*/
1210:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT)
1211:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | \
1212:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                                       RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLA
1213:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #else
1214:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | \
 2072              		.loc 1 1214 3 view .LVU616
 2073              		.loc 1 1214 37 is_stmt 0 view .LVU617
 2074 0000 0F23     		movs	r3, #15
 2075 0002 0360     		str	r3, [r0]
1215:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****                                       RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI;
1216:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */
1217:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1218:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get the HSE configuration -----------------------------------------------*/
1219:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if ((RCC->CR & RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
 2076              		.loc 1 1219 3 is_stmt 1 view .LVU618
 2077              		.loc 1 1219 11 is_stmt 0 view .LVU619
 2078 0004 324B     		ldr	r3, .L195
 2079 0006 1B68     		ldr	r3, [r3]
 2080              		.loc 1 1219 6 view .LVU620
 2081 0008 5B03     		lsls	r3, r3, #13
 2082 000a 42D5     		bpl	.L183
1220:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1221:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
 2083              		.loc 1 1221 5 is_stmt 1 view .LVU621
 2084              		.loc 1 1221 33 is_stmt 0 view .LVU622
 2085 000c A023     		movs	r3, #160
 2086 000e DB02     		lsls	r3, r3, #11
 2087 0010 4360     		str	r3, [r0, #4]
 2088              	.L184:
1222:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1223:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else if ((RCC->CR & RCC_CR_HSEON) == RCC_CR_HSEON)
1224:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1225:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     RCC_OscInitStruct->HSEState = RCC_HSE_ON;
1226:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1227:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else
ARM GAS  /tmp/ccBwposX.s 			page 97


1228:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1229:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
1230:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1231:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1232:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get the HSI configuration -----------------------------------------------*/
1233:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if ((RCC->CR & RCC_CR_HSION) == RCC_CR_HSION)
 2089              		.loc 1 1233 3 is_stmt 1 view .LVU623
 2090              		.loc 1 1233 11 is_stmt 0 view .LVU624
 2091 0012 2F4B     		ldr	r3, .L195
 2092 0014 1B68     		ldr	r3, [r3]
 2093              		.loc 1 1233 6 view .LVU625
 2094 0016 DB05     		lsls	r3, r3, #23
 2095 0018 46D5     		bpl	.L186
1234:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1235:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     RCC_OscInitStruct->HSIState = RCC_HSI_ON;
 2096              		.loc 1 1235 5 is_stmt 1 view .LVU626
 2097              		.loc 1 1235 33 is_stmt 0 view .LVU627
 2098 001a 8023     		movs	r3, #128
 2099 001c 5B00     		lsls	r3, r3, #1
 2100 001e C360     		str	r3, [r0, #12]
 2101              	.L187:
1236:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1237:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else
1238:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1239:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
1240:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1241:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC_OscInitStruct->HSICalibrationValue = ((RCC->ICSCR & RCC_ICSCR_HSITRIM) >> RCC_ICSCR_HSITRIM_P
 2102              		.loc 1 1241 3 is_stmt 1 view .LVU628
 2103              		.loc 1 1241 49 is_stmt 0 view .LVU629
 2104 0020 2B4B     		ldr	r3, .L195
 2105 0022 5968     		ldr	r1, [r3, #4]
 2106              		.loc 1 1241 78 view .LVU630
 2107 0024 090A     		lsrs	r1, r1, #8
 2108 0026 7F22     		movs	r2, #127
 2109 0028 0A40     		ands	r2, r1
 2110              		.loc 1 1241 42 view .LVU631
 2111 002a 4261     		str	r2, [r0, #20]
1242:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC_OscInitStruct->HSIDiv = (RCC->CR & RCC_CR_HSIDIV);
 2112              		.loc 1 1242 3 is_stmt 1 view .LVU632
 2113              		.loc 1 1242 35 is_stmt 0 view .LVU633
 2114 002c 1A68     		ldr	r2, [r3]
 2115              		.loc 1 1242 40 view .LVU634
 2116 002e E021     		movs	r1, #224
 2117 0030 8901     		lsls	r1, r1, #6
 2118 0032 0A40     		ands	r2, r1
 2119              		.loc 1 1242 29 view .LVU635
 2120 0034 0261     		str	r2, [r0, #16]
1243:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1244:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get the LSE configuration -----------------------------------------------*/
1245:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if ((RCC->BDCR & RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
 2121              		.loc 1 1245 3 is_stmt 1 view .LVU636
 2122              		.loc 1 1245 11 is_stmt 0 view .LVU637
 2123 0036 DB6D     		ldr	r3, [r3, #92]
 2124              		.loc 1 1245 6 view .LVU638
 2125 0038 5B07     		lsls	r3, r3, #29
 2126 003a 38D5     		bpl	.L188
1246:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
ARM GAS  /tmp/ccBwposX.s 			page 98


1247:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
 2127              		.loc 1 1247 5 is_stmt 1 view .LVU639
 2128              		.loc 1 1247 33 is_stmt 0 view .LVU640
 2129 003c 0523     		movs	r3, #5
 2130 003e 8360     		str	r3, [r0, #8]
 2131              	.L189:
1248:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1249:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else if ((RCC->BDCR & RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
1250:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1251:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     RCC_OscInitStruct->LSEState = RCC_LSE_ON;
1252:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1253:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else
1254:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1255:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
1256:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1257:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1258:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get the LSI configuration -----------------------------------------------*/
1259:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if ((RCC->CSR & RCC_CSR_LSION) == RCC_CSR_LSION)
 2132              		.loc 1 1259 3 is_stmt 1 view .LVU641
 2133              		.loc 1 1259 11 is_stmt 0 view .LVU642
 2134 0040 234B     		ldr	r3, .L195
 2135 0042 1B6E     		ldr	r3, [r3, #96]
 2136              		.loc 1 1259 6 view .LVU643
 2137 0044 DB07     		lsls	r3, r3, #31
 2138 0046 3CD5     		bpl	.L191
1260:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1261:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     RCC_OscInitStruct->LSIState = RCC_LSI_ON;
 2139              		.loc 1 1261 5 is_stmt 1 view .LVU644
 2140              		.loc 1 1261 33 is_stmt 0 view .LVU645
 2141 0048 0123     		movs	r3, #1
 2142 004a 8361     		str	r3, [r0, #24]
 2143              	.L192:
1262:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1263:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else
1264:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1265:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
1266:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1267:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1268:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT)
1269:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get the HSI48 configuration ---------------------------------------------*/
1270:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if (READ_BIT(RCC->CR, RCC_CR_HSI48ON) == RCC_CR_HSI48ON)
1271:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1272:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     RCC_OscInitStruct->HSI48State = RCC_HSI48_ON;
1273:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1274:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else
1275:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1276:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     RCC_OscInitStruct->HSI48State = RCC_HSI48_OFF;
1277:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1278:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */
1279:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1280:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get the PLL configuration -----------------------------------------------*/
1281:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if ((RCC->CR & RCC_CR_PLLON) == RCC_CR_PLLON)
 2144              		.loc 1 1281 3 is_stmt 1 view .LVU646
 2145              		.loc 1 1281 11 is_stmt 0 view .LVU647
 2146 004c 204B     		ldr	r3, .L195
 2147 004e 1B68     		ldr	r3, [r3]
 2148              		.loc 1 1281 6 view .LVU648
ARM GAS  /tmp/ccBwposX.s 			page 99


 2149 0050 DB01     		lsls	r3, r3, #7
 2150 0052 39D5     		bpl	.L193
1282:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1283:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
 2151              		.loc 1 1283 5 is_stmt 1 view .LVU649
 2152              		.loc 1 1283 37 is_stmt 0 view .LVU650
 2153 0054 0223     		movs	r3, #2
 2154 0056 C361     		str	r3, [r0, #28]
 2155              	.L194:
1284:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1285:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   else
1286:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1287:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
1288:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1289:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLSource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
 2156              		.loc 1 1289 3 is_stmt 1 view .LVU651
 2157              		.loc 1 1289 42 is_stmt 0 view .LVU652
 2158 0058 1D4B     		ldr	r3, .L195
 2159 005a D968     		ldr	r1, [r3, #12]
 2160              		.loc 1 1289 52 view .LVU653
 2161 005c 0322     		movs	r2, #3
 2162 005e 0A40     		ands	r2, r1
 2163              		.loc 1 1289 36 view .LVU654
 2164 0060 0262     		str	r2, [r0, #32]
1290:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLM = (RCC->PLLCFGR & RCC_PLLCFGR_PLLM);
 2165              		.loc 1 1290 3 is_stmt 1 view .LVU655
 2166              		.loc 1 1290 37 is_stmt 0 view .LVU656
 2167 0062 D968     		ldr	r1, [r3, #12]
 2168              		.loc 1 1290 47 view .LVU657
 2169 0064 7022     		movs	r2, #112
 2170 0066 0A40     		ands	r2, r1
 2171              		.loc 1 1290 31 view .LVU658
 2172 0068 4262     		str	r2, [r0, #36]
1291:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLN = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos);
 2173              		.loc 1 1291 3 is_stmt 1 view .LVU659
 2174              		.loc 1 1291 38 is_stmt 0 view .LVU660
 2175 006a D968     		ldr	r1, [r3, #12]
 2176              		.loc 1 1291 68 view .LVU661
 2177 006c 090A     		lsrs	r1, r1, #8
 2178 006e 7F22     		movs	r2, #127
 2179 0070 0A40     		ands	r2, r1
 2180              		.loc 1 1291 31 view .LVU662
 2181 0072 8262     		str	r2, [r0, #40]
1292:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLP = (RCC->PLLCFGR & RCC_PLLCFGR_PLLP);
 2182              		.loc 1 1292 3 is_stmt 1 view .LVU663
 2183              		.loc 1 1292 37 is_stmt 0 view .LVU664
 2184 0074 DA68     		ldr	r2, [r3, #12]
 2185              		.loc 1 1292 47 view .LVU665
 2186 0076 F821     		movs	r1, #248
 2187 0078 8903     		lsls	r1, r1, #14
 2188 007a 0A40     		ands	r2, r1
 2189              		.loc 1 1292 31 view .LVU666
 2190 007c C262     		str	r2, [r0, #44]
1293:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #if defined(RCC_PLLQ_SUPPORT)
1294:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLQ = (RCC->PLLCFGR & RCC_PLLCFGR_PLLQ);
 2191              		.loc 1 1294 3 is_stmt 1 view .LVU667
 2192              		.loc 1 1294 37 is_stmt 0 view .LVU668
ARM GAS  /tmp/ccBwposX.s 			page 100


 2193 007e DA68     		ldr	r2, [r3, #12]
 2194              		.loc 1 1294 47 view .LVU669
 2195 0080 E021     		movs	r1, #224
 2196 0082 0905     		lsls	r1, r1, #20
 2197 0084 0A40     		ands	r2, r1
 2198              		.loc 1 1294 31 view .LVU670
 2199 0086 0263     		str	r2, [r0, #48]
1295:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** #endif /* RCC_PLLQ_SUPPORT */
1296:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLR = (RCC->PLLCFGR & RCC_PLLCFGR_PLLR);
 2200              		.loc 1 1296 3 is_stmt 1 view .LVU671
 2201              		.loc 1 1296 37 is_stmt 0 view .LVU672
 2202 0088 DB68     		ldr	r3, [r3, #12]
 2203              		.loc 1 1296 47 view .LVU673
 2204 008a 5B0F     		lsrs	r3, r3, #29
 2205 008c 5B07     		lsls	r3, r3, #29
 2206              		.loc 1 1296 31 view .LVU674
 2207 008e 4363     		str	r3, [r0, #52]
1297:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 2208              		.loc 1 1297 1 view .LVU675
 2209              		@ sp needed
 2210 0090 7047     		bx	lr
 2211              	.L183:
1223:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 2212              		.loc 1 1223 8 is_stmt 1 view .LVU676
1223:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 2213              		.loc 1 1223 16 is_stmt 0 view .LVU677
 2214 0092 0F4B     		ldr	r3, .L195
 2215 0094 1B68     		ldr	r3, [r3]
1223:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 2216              		.loc 1 1223 11 view .LVU678
 2217 0096 DB03     		lsls	r3, r3, #15
 2218 0098 03D5     		bpl	.L185
1225:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2219              		.loc 1 1225 5 is_stmt 1 view .LVU679
1225:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2220              		.loc 1 1225 33 is_stmt 0 view .LVU680
 2221 009a 8023     		movs	r3, #128
 2222 009c 5B02     		lsls	r3, r3, #9
 2223 009e 4360     		str	r3, [r0, #4]
 2224 00a0 B7E7     		b	.L184
 2225              	.L185:
1229:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2226              		.loc 1 1229 5 is_stmt 1 view .LVU681
1229:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2227              		.loc 1 1229 33 is_stmt 0 view .LVU682
 2228 00a2 0023     		movs	r3, #0
 2229 00a4 4360     		str	r3, [r0, #4]
 2230 00a6 B4E7     		b	.L184
 2231              	.L186:
1239:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2232              		.loc 1 1239 5 is_stmt 1 view .LVU683
1239:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2233              		.loc 1 1239 33 is_stmt 0 view .LVU684
 2234 00a8 0023     		movs	r3, #0
 2235 00aa C360     		str	r3, [r0, #12]
 2236 00ac B8E7     		b	.L187
 2237              	.L188:
ARM GAS  /tmp/ccBwposX.s 			page 101


1249:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 2238              		.loc 1 1249 8 is_stmt 1 view .LVU685
1249:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 2239              		.loc 1 1249 16 is_stmt 0 view .LVU686
 2240 00ae 084B     		ldr	r3, .L195
 2241 00b0 DB6D     		ldr	r3, [r3, #92]
1249:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 2242              		.loc 1 1249 11 view .LVU687
 2243 00b2 DB07     		lsls	r3, r3, #31
 2244 00b4 02D5     		bpl	.L190
1251:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2245              		.loc 1 1251 5 is_stmt 1 view .LVU688
1251:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2246              		.loc 1 1251 33 is_stmt 0 view .LVU689
 2247 00b6 0123     		movs	r3, #1
 2248 00b8 8360     		str	r3, [r0, #8]
 2249 00ba C1E7     		b	.L189
 2250              	.L190:
1255:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2251              		.loc 1 1255 5 is_stmt 1 view .LVU690
1255:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2252              		.loc 1 1255 33 is_stmt 0 view .LVU691
 2253 00bc 0023     		movs	r3, #0
 2254 00be 8360     		str	r3, [r0, #8]
 2255 00c0 BEE7     		b	.L189
 2256              	.L191:
1265:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2257              		.loc 1 1265 5 is_stmt 1 view .LVU692
1265:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2258              		.loc 1 1265 33 is_stmt 0 view .LVU693
 2259 00c2 0023     		movs	r3, #0
 2260 00c4 8361     		str	r3, [r0, #24]
 2261 00c6 C1E7     		b	.L192
 2262              	.L193:
1287:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2263              		.loc 1 1287 5 is_stmt 1 view .LVU694
1287:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2264              		.loc 1 1287 37 is_stmt 0 view .LVU695
 2265 00c8 0123     		movs	r3, #1
 2266 00ca C361     		str	r3, [r0, #28]
 2267 00cc C4E7     		b	.L194
 2268              	.L196:
 2269 00ce C046     		.align	2
 2270              	.L195:
 2271 00d0 00100240 		.word	1073876992
 2272              		.cfi_endproc
 2273              	.LFE304:
 2275              		.section	.text.HAL_RCC_GetClockConfig,"ax",%progbits
 2276              		.align	1
 2277              		.global	HAL_RCC_GetClockConfig
 2278              		.syntax unified
 2279              		.code	16
 2280              		.thumb_func
 2281              		.fpu softvfp
 2283              	HAL_RCC_GetClockConfig:
 2284              	.LVL147:
 2285              	.LFB305:
ARM GAS  /tmp/ccBwposX.s 			page 102


1298:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1299:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
1300:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief  Configure the RCC_ClkInitStruct according to the internal
1301:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         RCC configuration registers.
1302:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @param  RCC_ClkInitStruct Pointer to a @ref RCC_ClkInitTypeDef structure that
1303:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *                           will be configured.
1304:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @param  pFLatency         Pointer on the Flash Latency.
1305:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval None
1306:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
1307:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
1308:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
 2286              		.loc 1 1308 1 is_stmt 1 view -0
 2287              		.cfi_startproc
 2288              		@ args = 0, pretend = 0, frame = 0
 2289              		@ frame_needed = 0, uses_anonymous_args = 0
 2290              		.loc 1 1308 1 is_stmt 0 view .LVU697
 2291 0000 30B5     		push	{r4, r5, lr}
 2292              	.LCFI8:
 2293              		.cfi_def_cfa_offset 12
 2294              		.cfi_offset 4, -12
 2295              		.cfi_offset 5, -8
 2296              		.cfi_offset 14, -4
1309:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Check the parameters */
1310:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   assert_param(RCC_ClkInitStruct != (void *)NULL);
 2297              		.loc 1 1310 3 is_stmt 1 view .LVU698
1311:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   assert_param(pFLatency != (void *)NULL);
 2298              		.loc 1 1311 3 view .LVU699
1312:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1313:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Set all possible values for the Clock type parameter --------------------*/
1314:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1;
 2299              		.loc 1 1314 3 view .LVU700
 2300              		.loc 1 1314 32 is_stmt 0 view .LVU701
 2301 0002 0723     		movs	r3, #7
 2302 0004 0360     		str	r3, [r0]
1315:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1316:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get the SYSCLK configuration --------------------------------------------*/
1317:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
 2303              		.loc 1 1317 3 is_stmt 1 view .LVU702
 2304              		.loc 1 1317 51 is_stmt 0 view .LVU703
 2305 0006 094A     		ldr	r2, .L198
 2306 0008 9468     		ldr	r4, [r2, #8]
 2307              		.loc 1 1317 37 view .LVU704
 2308 000a 1C40     		ands	r4, r3
 2309              		.loc 1 1317 35 view .LVU705
 2310 000c 4460     		str	r4, [r0, #4]
1318:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1319:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get the HCLK configuration ----------------------------------------------*/
1320:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
 2311              		.loc 1 1320 3 is_stmt 1 view .LVU706
 2312              		.loc 1 1320 52 is_stmt 0 view .LVU707
 2313 000e 9468     		ldr	r4, [r2, #8]
 2314              		.loc 1 1320 38 view .LVU708
 2315 0010 F025     		movs	r5, #240
 2316 0012 2D01     		lsls	r5, r5, #4
 2317 0014 2C40     		ands	r4, r5
 2318              		.loc 1 1320 36 view .LVU709
 2319 0016 8460     		str	r4, [r0, #8]
ARM GAS  /tmp/ccBwposX.s 			page 103


1321:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1322:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get the APB1 configuration ----------------------------------------------*/
1323:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE);
 2320              		.loc 1 1323 3 is_stmt 1 view .LVU710
 2321              		.loc 1 1323 53 is_stmt 0 view .LVU711
 2322 0018 9268     		ldr	r2, [r2, #8]
 2323              		.loc 1 1323 39 view .LVU712
 2324 001a E024     		movs	r4, #224
 2325 001c E401     		lsls	r4, r4, #7
 2326 001e 2240     		ands	r2, r4
 2327              		.loc 1 1323 37 view .LVU713
 2328 0020 C260     		str	r2, [r0, #12]
1324:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1325:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1326:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get the Flash Wait State (Latency) configuration ------------------------*/
1327:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
 2329              		.loc 1 1327 3 is_stmt 1 view .LVU714
 2330              		.loc 1 1327 32 is_stmt 0 view .LVU715
 2331 0022 034A     		ldr	r2, .L198+4
 2332 0024 1268     		ldr	r2, [r2]
 2333              		.loc 1 1327 16 view .LVU716
 2334 0026 1340     		ands	r3, r2
 2335              		.loc 1 1327 14 view .LVU717
 2336 0028 0B60     		str	r3, [r1]
1328:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 2337              		.loc 1 1328 1 view .LVU718
 2338              		@ sp needed
 2339 002a 30BD     		pop	{r4, r5, pc}
 2340              	.L199:
 2341              		.align	2
 2342              	.L198:
 2343 002c 00100240 		.word	1073876992
 2344 0030 00200240 		.word	1073881088
 2345              		.cfi_endproc
 2346              	.LFE305:
 2348              		.section	.text.HAL_RCC_EnableCSS,"ax",%progbits
 2349              		.align	1
 2350              		.global	HAL_RCC_EnableCSS
 2351              		.syntax unified
 2352              		.code	16
 2353              		.thumb_func
 2354              		.fpu softvfp
 2356              	HAL_RCC_EnableCSS:
 2357              	.LFB306:
1329:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1330:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
1331:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief  Enable the Clock Security System.
1332:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   If a failure is detected on the HSE oscillator clock, this oscillator
1333:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         is automatically disabled and an interrupt is generated to inform the
1334:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         software about the failure (Clock Security System Interrupt, CSSI),
1335:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         allowing the MCU to perform rescue operations. The CSSI is linked to
1336:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         the Cortex-M0+ NMI (Non-Maskable Interrupt) exception vector.
1337:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   The Clock Security System can only be cleared by reset.
1338:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval None
1339:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
1340:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void)
1341:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
ARM GAS  /tmp/ccBwposX.s 			page 104


 2358              		.loc 1 1341 1 is_stmt 1 view -0
 2359              		.cfi_startproc
 2360              		@ args = 0, pretend = 0, frame = 0
 2361              		@ frame_needed = 0, uses_anonymous_args = 0
 2362              		@ link register save eliminated.
1342:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   SET_BIT(RCC->CR, RCC_CR_CSSON) ;
 2363              		.loc 1 1342 3 view .LVU720
 2364 0000 034A     		ldr	r2, .L201
 2365 0002 1168     		ldr	r1, [r2]
 2366 0004 8023     		movs	r3, #128
 2367 0006 1B03     		lsls	r3, r3, #12
 2368 0008 0B43     		orrs	r3, r1
 2369 000a 1360     		str	r3, [r2]
1343:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 2370              		.loc 1 1343 1 is_stmt 0 view .LVU721
 2371              		@ sp needed
 2372 000c 7047     		bx	lr
 2373              	.L202:
 2374 000e C046     		.align	2
 2375              	.L201:
 2376 0010 00100240 		.word	1073876992
 2377              		.cfi_endproc
 2378              	.LFE306:
 2380              		.section	.text.HAL_RCC_EnableLSECSS,"ax",%progbits
 2381              		.align	1
 2382              		.global	HAL_RCC_EnableLSECSS
 2383              		.syntax unified
 2384              		.code	16
 2385              		.thumb_func
 2386              		.fpu softvfp
 2388              	HAL_RCC_EnableLSECSS:
 2389              	.LFB307:
1344:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1345:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
1346:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief  Enable the LSE Clock Security System.
1347:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   If a failure is detected on the LSE oscillator clock, this oscillator
1348:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         is automatically disabled and an interrupt is generated to inform the
1349:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         software about the failure (Clock Security System Interrupt, CSSI),
1350:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         allowing the MCU to perform rescue operations. The CSSI is linked to
1351:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         the Cortex-M0+ NMI (Non-Maskable Interrupt) exception vector.
1352:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   The LSE Clock Security System Detection bit (LSECSSD in BDCR) can only be
1353:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         cleared by a backup domain reset.
1354:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval None
1355:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
1356:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** void HAL_RCC_EnableLSECSS(void)
1357:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
 2390              		.loc 1 1357 1 is_stmt 1 view -0
 2391              		.cfi_startproc
 2392              		@ args = 0, pretend = 0, frame = 0
 2393              		@ frame_needed = 0, uses_anonymous_args = 0
 2394              		@ link register save eliminated.
1358:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ;
 2395              		.loc 1 1358 3 view .LVU723
 2396 0000 024A     		ldr	r2, .L204
 2397 0002 D36D     		ldr	r3, [r2, #92]
 2398 0004 2021     		movs	r1, #32
 2399 0006 0B43     		orrs	r3, r1
ARM GAS  /tmp/ccBwposX.s 			page 105


 2400 0008 D365     		str	r3, [r2, #92]
1359:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 2401              		.loc 1 1359 1 is_stmt 0 view .LVU724
 2402              		@ sp needed
 2403 000a 7047     		bx	lr
 2404              	.L205:
 2405              		.align	2
 2406              	.L204:
 2407 000c 00100240 		.word	1073876992
 2408              		.cfi_endproc
 2409              	.LFE307:
 2411              		.section	.text.HAL_RCC_DisableLSECSS,"ax",%progbits
 2412              		.align	1
 2413              		.global	HAL_RCC_DisableLSECSS
 2414              		.syntax unified
 2415              		.code	16
 2416              		.thumb_func
 2417              		.fpu softvfp
 2419              	HAL_RCC_DisableLSECSS:
 2420              	.LFB308:
1360:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1361:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
1362:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief  Disable the LSE Clock Security System.
1363:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   After LSE failure detection, the software must disable LSECSSON
1364:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   The Clock Security System can only be cleared by reset otherwise.
1365:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval None
1366:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
1367:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** void HAL_RCC_DisableLSECSS(void)
1368:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
 2421              		.loc 1 1368 1 is_stmt 1 view -0
 2422              		.cfi_startproc
 2423              		@ args = 0, pretend = 0, frame = 0
 2424              		@ frame_needed = 0, uses_anonymous_args = 0
 2425              		@ link register save eliminated.
1369:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ;
 2426              		.loc 1 1369 3 view .LVU726
 2427 0000 024A     		ldr	r2, .L207
 2428 0002 D36D     		ldr	r3, [r2, #92]
 2429 0004 2021     		movs	r1, #32
 2430 0006 8B43     		bics	r3, r1
 2431 0008 D365     		str	r3, [r2, #92]
1370:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 2432              		.loc 1 1370 1 is_stmt 0 view .LVU727
 2433              		@ sp needed
 2434 000a 7047     		bx	lr
 2435              	.L208:
 2436              		.align	2
 2437              	.L207:
 2438 000c 00100240 		.word	1073876992
 2439              		.cfi_endproc
 2440              	.LFE308:
 2442              		.section	.text.HAL_RCC_CSSCallback,"ax",%progbits
 2443              		.align	1
 2444              		.weak	HAL_RCC_CSSCallback
 2445              		.syntax unified
 2446              		.code	16
 2447              		.thumb_func
ARM GAS  /tmp/ccBwposX.s 			page 106


 2448              		.fpu softvfp
 2450              	HAL_RCC_CSSCallback:
 2451              	.LFB310:
1371:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1372:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
1373:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief Handle the RCC Clock Security System interrupt request.
1374:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note  This API should be called under the NMI_Handler().
1375:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval None
1376:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
1377:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void)
1378:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
1379:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   uint32_t itflag = RCC->CIFR;
1380:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1381:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Clear interrupt flags related to CSS */
1382:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC->CICR = (itflag & (RCC_CIFR_CSSF | RCC_CIFR_LSECSSF));
1383:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1384:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Check RCC CSSF interrupt flag  */
1385:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if ((itflag & RCC_CIFR_CSSF) != 0x00u)
1386:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1387:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* RCC Clock Security System interrupt user callback */
1388:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     HAL_RCC_CSSCallback();
1389:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1390:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1391:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Check RCC LSECSSF interrupt flag  */
1392:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   if ((itflag & RCC_CIFR_LSECSSF) != 0x00u)
1393:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
1394:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     /* RCC Clock Security System interrupt user callback */
1395:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****     HAL_RCC_LSECSSCallback();
1396:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
1397:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
1398:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1399:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
1400:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief Handle the RCC HSE Clock Security System interrupt callback.
1401:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval none
1402:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
1403:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void)
1404:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
 2452              		.loc 1 1404 1 is_stmt 1 view -0
 2453              		.cfi_startproc
 2454              		@ args = 0, pretend = 0, frame = 0
 2455              		@ frame_needed = 0, uses_anonymous_args = 0
 2456              		@ link register save eliminated.
1405:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* NOTE : This function should not be modified, when the callback is needed,
1406:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             the @ref HAL_RCC_CSSCallback should be implemented in the user file
1407:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****    */
1408:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 2457              		.loc 1 1408 1 view .LVU729
 2458              		@ sp needed
 2459 0000 7047     		bx	lr
 2460              		.cfi_endproc
 2461              	.LFE310:
 2463              		.section	.text.HAL_RCC_LSECSSCallback,"ax",%progbits
 2464              		.align	1
 2465              		.weak	HAL_RCC_LSECSSCallback
 2466              		.syntax unified
 2467              		.code	16
 2468              		.thumb_func
ARM GAS  /tmp/ccBwposX.s 			page 107


 2469              		.fpu softvfp
 2471              	HAL_RCC_LSECSSCallback:
 2472              	.LFB311:
1409:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1410:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
1411:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief  RCC LSE Clock Security System interrupt callback.
1412:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval none
1413:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
1414:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** __weak void HAL_RCC_LSECSSCallback(void)
1415:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
 2473              		.loc 1 1415 1 view -0
 2474              		.cfi_startproc
 2475              		@ args = 0, pretend = 0, frame = 0
 2476              		@ frame_needed = 0, uses_anonymous_args = 0
 2477              		@ link register save eliminated.
1416:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* NOTE : This function should not be modified, when the callback is needed,
1417:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****             the HAL_RCC_LSECSSCallback should be implemented in the user file
1418:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****    */
1419:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 2478              		.loc 1 1419 1 view .LVU731
 2479              		@ sp needed
 2480 0000 7047     		bx	lr
 2481              		.cfi_endproc
 2482              	.LFE311:
 2484              		.section	.text.HAL_RCC_NMI_IRQHandler,"ax",%progbits
 2485              		.align	1
 2486              		.global	HAL_RCC_NMI_IRQHandler
 2487              		.syntax unified
 2488              		.code	16
 2489              		.thumb_func
 2490              		.fpu softvfp
 2492              	HAL_RCC_NMI_IRQHandler:
 2493              	.LFB309:
1378:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   uint32_t itflag = RCC->CIFR;
 2494              		.loc 1 1378 1 view -0
 2495              		.cfi_startproc
 2496              		@ args = 0, pretend = 0, frame = 0
 2497              		@ frame_needed = 0, uses_anonymous_args = 0
 2498 0000 10B5     		push	{r4, lr}
 2499              	.LCFI9:
 2500              		.cfi_def_cfa_offset 8
 2501              		.cfi_offset 4, -8
 2502              		.cfi_offset 14, -4
1379:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 2503              		.loc 1 1379 3 view .LVU733
1379:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 2504              		.loc 1 1379 12 is_stmt 0 view .LVU734
 2505 0002 084A     		ldr	r2, .L216
 2506 0004 D469     		ldr	r4, [r2, #28]
 2507              	.LVL148:
1382:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 2508              		.loc 1 1382 3 is_stmt 1 view .LVU735
1382:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 2509              		.loc 1 1382 23 is_stmt 0 view .LVU736
 2510 0006 C023     		movs	r3, #192
 2511 0008 9B00     		lsls	r3, r3, #2
 2512 000a 2340     		ands	r3, r4
ARM GAS  /tmp/ccBwposX.s 			page 108


1382:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 2513              		.loc 1 1382 13 view .LVU737
 2514 000c 1362     		str	r3, [r2, #32]
1385:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 2515              		.loc 1 1385 3 is_stmt 1 view .LVU738
1385:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 2516              		.loc 1 1385 6 is_stmt 0 view .LVU739
 2517 000e E305     		lsls	r3, r4, #23
 2518 0010 02D4     		bmi	.L214
 2519              	.L212:
1392:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 2520              		.loc 1 1392 3 is_stmt 1 view .LVU740
1392:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   {
 2521              		.loc 1 1392 6 is_stmt 0 view .LVU741
 2522 0012 A305     		lsls	r3, r4, #22
 2523 0014 03D4     		bmi	.L215
 2524              	.L211:
1397:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 2525              		.loc 1 1397 1 view .LVU742
 2526              		@ sp needed
 2527              	.LVL149:
1397:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 2528              		.loc 1 1397 1 view .LVU743
 2529 0016 10BD     		pop	{r4, pc}
 2530              	.LVL150:
 2531              	.L214:
1388:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2532              		.loc 1 1388 5 is_stmt 1 view .LVU744
 2533 0018 FFF7FEFF 		bl	HAL_RCC_CSSCallback
 2534              	.LVL151:
 2535 001c F9E7     		b	.L212
 2536              	.L215:
1395:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   }
 2537              		.loc 1 1395 5 view .LVU745
 2538 001e FFF7FEFF 		bl	HAL_RCC_LSECSSCallback
 2539              	.LVL152:
1397:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
 2540              		.loc 1 1397 1 is_stmt 0 view .LVU746
 2541 0022 F8E7     		b	.L211
 2542              	.L217:
 2543              		.align	2
 2544              	.L216:
 2545 0024 00100240 		.word	1073876992
 2546              		.cfi_endproc
 2547              	.LFE309:
 2549              		.section	.text.HAL_RCC_GetResetSource,"ax",%progbits
 2550              		.align	1
 2551              		.global	HAL_RCC_GetResetSource
 2552              		.syntax unified
 2553              		.code	16
 2554              		.thumb_func
 2555              		.fpu softvfp
 2557              	HAL_RCC_GetResetSource:
 2558              	.LFB312:
1420:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1421:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** /**
1422:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @brief  Get and clear reset flags
ARM GAS  /tmp/ccBwposX.s 			page 109


1423:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @note   Once reset flags are retrieved, this API is clearing them in order
1424:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   *         to isolate next reset reason.
1425:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   * @retval can be a combination of @ref RCC_Reset_Flag
1426:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   */
1427:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** uint32_t HAL_RCC_GetResetSource(void)
1428:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** {
 2559              		.loc 1 1428 1 is_stmt 1 view -0
 2560              		.cfi_startproc
 2561              		@ args = 0, pretend = 0, frame = 0
 2562              		@ frame_needed = 0, uses_anonymous_args = 0
 2563              		@ link register save eliminated.
1429:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   uint32_t reset;
 2564              		.loc 1 1429 3 view .LVU748
1430:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1431:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Get all reset flags */
1432:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   reset = RCC->CSR & RCC_RESET_FLAG_ALL;
 2565              		.loc 1 1432 3 view .LVU749
 2566              		.loc 1 1432 14 is_stmt 0 view .LVU750
 2567 0000 044B     		ldr	r3, .L219
 2568 0002 186E     		ldr	r0, [r3, #96]
 2569              		.loc 1 1432 9 view .LVU751
 2570 0004 400E     		lsrs	r0, r0, #25
 2571 0006 4006     		lsls	r0, r0, #25
 2572              	.LVL153:
1433:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1434:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   /* Clear Reset flags */
1435:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   RCC->CSR |= RCC_CSR_RMVF;
 2573              		.loc 1 1435 3 is_stmt 1 view .LVU752
 2574              		.loc 1 1435 12 is_stmt 0 view .LVU753
 2575 0008 196E     		ldr	r1, [r3, #96]
 2576 000a 8022     		movs	r2, #128
 2577 000c 1204     		lsls	r2, r2, #16
 2578 000e 0A43     		orrs	r2, r1
 2579 0010 1A66     		str	r2, [r3, #96]
1436:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** 
1437:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c ****   return reset;
 2580              		.loc 1 1437 3 is_stmt 1 view .LVU754
1438:Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c **** }
 2581              		.loc 1 1438 1 is_stmt 0 view .LVU755
 2582              		@ sp needed
 2583 0012 7047     		bx	lr
 2584              	.L220:
 2585              		.align	2
 2586              	.L219:
 2587 0014 00100240 		.word	1073876992
 2588              		.cfi_endproc
 2589              	.LFE312:
 2591              		.text
 2592              	.Letext0:
 2593              		.file 3 "/usr/lib/gcc/arm-none-eabi/10.3.1/include/stdint.h"
 2594              		.file 4 "Drivers/CMSIS/Device/ST/STM32G0xx/Include/system_stm32g0xx.h"
 2595              		.file 5 "Drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g031xx.h"
 2596              		.file 6 "Drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g0xx.h"
 2597              		.file 7 "Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_def.h"
 2598              		.file 8 "Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_rcc.h"
 2599              		.file 9 "Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_gpio.h"
 2600              		.file 10 "Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal.h"
ARM GAS  /tmp/ccBwposX.s 			page 110


 2601              		.file 11 "Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_dma.h"
ARM GAS  /tmp/ccBwposX.s 			page 111


DEFINED SYMBOLS
                            *ABS*:0000000000000000 stm32g0xx_hal_rcc.c
     /tmp/ccBwposX.s:16     .text.HAL_RCC_DeInit:0000000000000000 $t
     /tmp/ccBwposX.s:24     .text.HAL_RCC_DeInit:0000000000000000 HAL_RCC_DeInit
     /tmp/ccBwposX.s:192    .text.HAL_RCC_DeInit:00000000000000a0 $d
     /tmp/ccBwposX.s:201    .text.HAL_RCC_OscConfig:0000000000000000 $t
     /tmp/ccBwposX.s:208    .text.HAL_RCC_OscConfig:0000000000000000 HAL_RCC_OscConfig
     /tmp/ccBwposX.s:960    .text.HAL_RCC_OscConfig:0000000000000318 $d
     /tmp/ccBwposX.s:974    .text.HAL_RCC_OscConfig:0000000000000344 $t
     /tmp/ccBwposX.s:1294   .text.HAL_RCC_OscConfig:00000000000004ac $d
     /tmp/ccBwposX.s:1303   .text.HAL_RCC_MCOConfig:0000000000000000 $t
     /tmp/ccBwposX.s:1310   .text.HAL_RCC_MCOConfig:0000000000000000 HAL_RCC_MCOConfig
     /tmp/ccBwposX.s:1414   .text.HAL_RCC_MCOConfig:0000000000000050 $d
     /tmp/ccBwposX.s:1421   .text.HAL_RCC_GetSysClockFreq:0000000000000000 $t
     /tmp/ccBwposX.s:1428   .text.HAL_RCC_GetSysClockFreq:0000000000000000 HAL_RCC_GetSysClockFreq
     /tmp/ccBwposX.s:1602   .text.HAL_RCC_GetSysClockFreq:00000000000000ac $d
     /tmp/ccBwposX.s:1609   .text.HAL_RCC_ClockConfig:0000000000000000 $t
     /tmp/ccBwposX.s:1616   .text.HAL_RCC_ClockConfig:0000000000000000 HAL_RCC_ClockConfig
     /tmp/ccBwposX.s:1959   .text.HAL_RCC_ClockConfig:000000000000016c $d
     /tmp/ccBwposX.s:1971   .text.HAL_RCC_GetHCLKFreq:0000000000000000 $t
     /tmp/ccBwposX.s:1978   .text.HAL_RCC_GetHCLKFreq:0000000000000000 HAL_RCC_GetHCLKFreq
     /tmp/ccBwposX.s:1995   .text.HAL_RCC_GetHCLKFreq:0000000000000008 $d
     /tmp/ccBwposX.s:2000   .text.HAL_RCC_GetPCLK1Freq:0000000000000000 $t
     /tmp/ccBwposX.s:2007   .text.HAL_RCC_GetPCLK1Freq:0000000000000000 HAL_RCC_GetPCLK1Freq
     /tmp/ccBwposX.s:2050   .text.HAL_RCC_GetPCLK1Freq:0000000000000020 $d
     /tmp/ccBwposX.s:2056   .text.HAL_RCC_GetOscConfig:0000000000000000 $t
     /tmp/ccBwposX.s:2063   .text.HAL_RCC_GetOscConfig:0000000000000000 HAL_RCC_GetOscConfig
     /tmp/ccBwposX.s:2271   .text.HAL_RCC_GetOscConfig:00000000000000d0 $d
     /tmp/ccBwposX.s:2276   .text.HAL_RCC_GetClockConfig:0000000000000000 $t
     /tmp/ccBwposX.s:2283   .text.HAL_RCC_GetClockConfig:0000000000000000 HAL_RCC_GetClockConfig
     /tmp/ccBwposX.s:2343   .text.HAL_RCC_GetClockConfig:000000000000002c $d
     /tmp/ccBwposX.s:2349   .text.HAL_RCC_EnableCSS:0000000000000000 $t
     /tmp/ccBwposX.s:2356   .text.HAL_RCC_EnableCSS:0000000000000000 HAL_RCC_EnableCSS
     /tmp/ccBwposX.s:2376   .text.HAL_RCC_EnableCSS:0000000000000010 $d
     /tmp/ccBwposX.s:2381   .text.HAL_RCC_EnableLSECSS:0000000000000000 $t
     /tmp/ccBwposX.s:2388   .text.HAL_RCC_EnableLSECSS:0000000000000000 HAL_RCC_EnableLSECSS
     /tmp/ccBwposX.s:2407   .text.HAL_RCC_EnableLSECSS:000000000000000c $d
     /tmp/ccBwposX.s:2412   .text.HAL_RCC_DisableLSECSS:0000000000000000 $t
     /tmp/ccBwposX.s:2419   .text.HAL_RCC_DisableLSECSS:0000000000000000 HAL_RCC_DisableLSECSS
     /tmp/ccBwposX.s:2438   .text.HAL_RCC_DisableLSECSS:000000000000000c $d
     /tmp/ccBwposX.s:2443   .text.HAL_RCC_CSSCallback:0000000000000000 $t
     /tmp/ccBwposX.s:2450   .text.HAL_RCC_CSSCallback:0000000000000000 HAL_RCC_CSSCallback
     /tmp/ccBwposX.s:2464   .text.HAL_RCC_LSECSSCallback:0000000000000000 $t
     /tmp/ccBwposX.s:2471   .text.HAL_RCC_LSECSSCallback:0000000000000000 HAL_RCC_LSECSSCallback
     /tmp/ccBwposX.s:2485   .text.HAL_RCC_NMI_IRQHandler:0000000000000000 $t
     /tmp/ccBwposX.s:2492   .text.HAL_RCC_NMI_IRQHandler:0000000000000000 HAL_RCC_NMI_IRQHandler
     /tmp/ccBwposX.s:2545   .text.HAL_RCC_NMI_IRQHandler:0000000000000024 $d
     /tmp/ccBwposX.s:2550   .text.HAL_RCC_GetResetSource:0000000000000000 $t
     /tmp/ccBwposX.s:2557   .text.HAL_RCC_GetResetSource:0000000000000000 HAL_RCC_GetResetSource
     /tmp/ccBwposX.s:2587   .text.HAL_RCC_GetResetSource:0000000000000014 $d

UNDEFINED SYMBOLS
HAL_GetTick
HAL_InitTick
SystemCoreClock
uwTickPrio
HAL_GPIO_Init
ARM GAS  /tmp/ccBwposX.s 			page 112


__aeabi_uidiv
AHBPrescTable
APBPrescTable
