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fix interfaccia

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This commit is contained in:
nzasch
2022-01-12 01:09:32 +01:00
parent b9a7a1e15b
commit 6d0c31556a
435 changed files with 436215 additions and 10940 deletions
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110
codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lpuart.h
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@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -159,7 +158,6 @@ typedef struct
#define LL_LPUART_ICR_NCF USART_ICR_NECF /*!< Noise error detected clear flag */
#define LL_LPUART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error clear flag */
#define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected clear flag */
#define LL_LPUART_ICR_TXFECF USART_ICR_TXFECF /*!< TX FIFO Empty clear flag */
#define LL_LPUART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete clear flag */
#define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS clear flag */
#define LL_LPUART_ICR_CMCF USART_ICR_CMCF /*!< Character match clear flag */
@@ -577,7 +575,7 @@ __STATIC_INLINE uint32_t LL_LPUART_IsEnabledFIFO(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_SetTXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold)
{
MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos);
ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos);
}
/**
@@ -612,7 +610,7 @@ __STATIC_INLINE uint32_t LL_LPUART_GetTXFIFOThreshold(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_SetRXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold)
{
MODIFY_REG(LPUARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos);
ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos);
}
/**
@@ -655,8 +653,8 @@ __STATIC_INLINE uint32_t LL_LPUART_GetRXFIFOThreshold(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_ConfigFIFOsThreshold(USART_TypeDef *LPUARTx, uint32_t TXThreshold, uint32_t RXThreshold)
{
MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) | \
(RXThreshold << USART_CR3_RXFTCFG_Pos));
ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) | \
(RXThreshold << USART_CR3_RXFTCFG_Pos));
}
/**
@@ -669,7 +667,7 @@ __STATIC_INLINE void LL_LPUART_ConfigFIFOsThreshold(USART_TypeDef *LPUARTx, uint
*/
__STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR1, USART_CR1_UESM);
ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_UESM);
}
/**
@@ -681,7 +679,7 @@ __STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM);
ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM);
}
/**
@@ -704,7 +702,7 @@ __STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR1, USART_CR1_RE);
ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RE);
}
/**
@@ -715,7 +713,7 @@ __STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE);
ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE);
}
/**
@@ -726,7 +724,7 @@ __STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR1, USART_CR1_TE);
ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TE);
}
/**
@@ -737,7 +735,7 @@ __STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE);
ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE);
}
/**
@@ -755,7 +753,7 @@ __STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirection)
{
MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
ATOMIC_MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
}
/**
@@ -872,7 +870,7 @@ __STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR1, USART_CR1_MME);
ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_MME);
}
/**
@@ -883,7 +881,7 @@ __STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME);
ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME);
}
/**
@@ -1875,17 +1873,6 @@ __STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx)
WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF);
}
/**
* @brief Clear TX FIFO Empty Flag
* @rmtoll ICR TXFECF LL_LPUART_ClearFlag_TXFE
* @param LPUARTx LPUART Instance
* @retval None
*/
__STATIC_INLINE void LL_LPUART_ClearFlag_TXFE(USART_TypeDef *LPUARTx)
{
WRITE_REG(LPUARTx->ICR, USART_ICR_TXFECF);
}
/**
* @brief Clear Transmission Complete Flag
* @rmtoll ICR TCCF LL_LPUART_ClearFlag_TC
@@ -1946,7 +1933,7 @@ __STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
}
/* Legacy define */
@@ -1960,7 +1947,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
}
/**
@@ -1971,7 +1958,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR1, USART_CR1_TCIE);
ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TCIE);
}
/* Legacy define */
@@ -1985,7 +1972,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
}
/**
@@ -1996,7 +1983,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR1, USART_CR1_PEIE);
ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_PEIE);
}
/**
@@ -2007,7 +1994,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR1, USART_CR1_CMIE);
ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_CMIE);
}
/**
@@ -2018,7 +2005,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableIT_TXFE(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR1, USART_CR1_TXFEIE);
ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TXFEIE);
}
/**
@@ -2029,7 +2016,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_TXFE(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableIT_RXFF(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR1, USART_CR1_RXFFIE);
ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RXFFIE);
}
/**
@@ -2044,7 +2031,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_RXFF(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR3, USART_CR3_EIE);
ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_EIE);
}
/**
@@ -2055,7 +2042,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
}
/**
@@ -2066,7 +2053,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
}
/**
@@ -2077,7 +2064,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableIT_TXFT(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR3, USART_CR3_TXFTIE);
ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_TXFTIE);
}
/**
@@ -2088,7 +2075,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_TXFT(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableIT_RXFT(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR3, USART_CR3_RXFTIE);
ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_RXFTIE);
}
/**
@@ -2099,7 +2086,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_RXFT(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
}
/* Legacy define */
@@ -2113,7 +2100,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
}
/**
@@ -2124,7 +2111,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE);
ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE);
}
/* Legacy define */
@@ -2138,7 +2125,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
}
/**
@@ -2149,7 +2136,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE);
ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE);
}
/**
@@ -2160,7 +2147,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE);
ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE);
}
/**
@@ -2171,7 +2158,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableIT_TXFE(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXFEIE);
ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXFEIE);
}
/**
@@ -2182,7 +2169,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_TXFE(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableIT_RXFF(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXFFIE);
ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXFFIE);
}
/**
@@ -2197,7 +2184,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_RXFF(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE);
ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE);
}
/**
@@ -2208,7 +2195,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
}
/**
@@ -2219,7 +2206,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
}
/**
@@ -2230,7 +2217,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableIT_TXFT(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR3, USART_CR3_TXFTIE);
ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_TXFTIE);
}
/**
@@ -2241,7 +2228,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_TXFT(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableIT_RXFT(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR3, USART_CR3_RXFTIE);
ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_RXFTIE);
}
/**
@@ -2409,7 +2396,7 @@ __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFT(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR3, USART_CR3_DMAR);
ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_DMAR);
}
/**
@@ -2420,7 +2407,7 @@ __STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR);
ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR);
}
/**
@@ -2442,7 +2429,7 @@ __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx)
{
SET_BIT(LPUARTx->CR3, USART_CR3_DMAT);
ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_DMAT);
}
/**
@@ -2453,7 +2440,7 @@ __STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx)
*/
__STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx)
{
CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT);
ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT);
}
/**
@@ -2661,4 +2648,3 @@ void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct);
#endif /* STM32G4xx_LL_LPUART_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/