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fix interfaccia

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This commit is contained in:
nzasch
2022-01-12 01:09:32 +01:00
parent b9a7a1e15b
commit 6d0c31556a
435 changed files with 436215 additions and 10940 deletions
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26
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
View File

@@ -4,7 +4,17 @@
* @author MCD Application Team
* @brief HAL module driver.
* This is the common part of the HAL initialization
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -19,17 +29,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -49,11 +48,11 @@
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/**
* @brief STM32G4xx HAL Driver version number V1.2.1
* @brief STM32G4xx HAL Driver version number V1.2.2
*/
#define __STM32G4xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
#define __STM32G4xx_HAL_VERSION_SUB1 (0x02U) /*!< [23:16] sub1 version */
#define __STM32G4xx_HAL_VERSION_SUB2 (0x01U) /*!< [15:8] sub2 version */
#define __STM32G4xx_HAL_VERSION_SUB2 (0x02U) /*!< [15:8] sub2 version */
#define __STM32G4xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
#define __STM32G4xx_HAL_VERSION ((__STM32G4xx_HAL_VERSION_MAIN << 24U)\
|(__STM32G4xx_HAL_VERSION_SUB1 << 16U)\
@@ -771,4 +770,3 @@ void HAL_SYSCFG_CCMSRAM_WriteProtectionEnable(uint32_t Page)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

65
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c
View File

@@ -6,19 +6,22 @@
* functionalities of the Analog to Digital Converter (ADC)
* peripheral:
* + Initialization and de-initialization functions
* ++ Initialization and Configuration of ADC
* + Operation functions
* ++ Start, stop, get result of conversions of regular
* group, using 3 possible modes: polling, interruption or DMA.
* + Control functions
* ++ Channels configuration on regular group
* ++ Analog Watchdog configuration
* + State functions
* ++ ADC state machine management
* ++ Interrupts and flags management
* + Peripheral Control functions
* + Peripheral State functions
* Other functions (extended functions) are available in file
* "stm32g4xx_hal_adc_ex.c".
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### ADC peripheral features #####
@@ -219,11 +222,11 @@
The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1,
allows the user to configure dynamically the driver callbacks.
Use Functions @ref HAL_ADC_RegisterCallback()
Use Functions HAL_ADC_RegisterCallback()
to register an interrupt callback.
[..]
Function @ref HAL_ADC_RegisterCallback() allows to register following callbacks:
Function HAL_ADC_RegisterCallback() allows to register following callbacks:
(+) ConvCpltCallback : ADC conversion complete callback
(+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
(+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback
@@ -239,11 +242,11 @@
and a pointer to the user callback function.
[..]
Use function @ref HAL_ADC_UnRegisterCallback to reset a callback to the default
Use function HAL_ADC_UnRegisterCallback to reset a callback to the default
weak function.
[..]
@ref HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) ConvCpltCallback : ADC conversion complete callback
@@ -259,27 +262,27 @@
(+) MspDeInitCallback : ADC Msp DeInit callback
[..]
By default, after the @ref HAL_ADC_Init() and when the state is @ref HAL_ADC_STATE_RESET
By default, after the HAL_ADC_Init() and when the state is HAL_ADC_STATE_RESET
all callbacks are set to the corresponding weak functions:
examples @ref HAL_ADC_ConvCpltCallback(), @ref HAL_ADC_ErrorCallback().
examples HAL_ADC_ConvCpltCallback(), HAL_ADC_ErrorCallback().
Exception done for MspInit and MspDeInit functions that are
reset to the legacy weak functions in the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit() only when
reset to the legacy weak functions in the HAL_ADC_Init()/ HAL_ADC_DeInit() only when
these callbacks are null (not registered beforehand).
[..]
If MspInit or MspDeInit are not null, the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit()
If MspInit or MspDeInit are not null, the HAL_ADC_Init()/ HAL_ADC_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
[..]
Callbacks can be registered/unregistered in @ref HAL_ADC_STATE_READY state only.
Callbacks can be registered/unregistered in HAL_ADC_STATE_READY state only.
Exception done MspInit/MspDeInit functions that can be registered/unregistered
in @ref HAL_ADC_STATE_READY or @ref HAL_ADC_STATE_RESET state,
in HAL_ADC_STATE_READY or HAL_ADC_STATE_RESET state,
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
[..]
Then, the user first registers the MspInit/MspDeInit user callbacks
using @ref HAL_ADC_RegisterCallback() before calling @ref HAL_ADC_DeInit()
or @ref HAL_ADC_Init() function.
using HAL_ADC_RegisterCallback() before calling HAL_ADC_DeInit()
or HAL_ADC_Init() function.
[..]
When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or
@@ -288,17 +291,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -2025,11 +2017,12 @@ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, ui
#if defined(ADC_MULTIMODE_SUPPORT)
/* Ensure that multimode regular conversions are not enabled. */
/* Otherwise, dedicated API HAL_ADCEx_MultiModeStart_DMA() must be used. */
if ((tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
if ((ADC_IS_INDEPENDENT(hadc) != RESET)
|| (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
|| (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT)
|| (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN)
)
#endif
#endif /* ADC_MULTIMODE_SUPPORT */
{
/* Enable the ADC peripheral */
tmp_hal_status = ADC_Enable(hadc);
@@ -3687,5 +3680,3 @@ void ADC_DMAError(DMA_HandleTypeDef *hdma)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

36
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c
View File

@@ -5,20 +5,21 @@
* @brief This file provides firmware functions to manage the following
* functionalities of the Analog to Digital Converter (ADC)
* peripheral:
* + Operation functions
* ++ Start, stop, get result of conversions of ADC group injected,
* using 2 possible modes: polling, interruption.
* ++ Calibration
* +++ ADC automatic self-calibration
* +++ Calibration factors get or set
* ++ Multimode feature when available
* + Control functions
* ++ Channels configuration on ADC group injected
* + State functions
* ++ ADC group injected contexts queue management
* + Peripheral Control functions
* Other functions (generic functions) are available in file
* "stm32g4xx_hal_adc.c".
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
[..]
(@) Sections "ADC peripheral features" and "How to use this driver" are
@@ -26,17 +27,6 @@
[..]
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -2381,5 +2371,3 @@ HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef *hadc)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

81
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_comp.c
View File

@@ -6,11 +6,20 @@
* This file provides firmware functions to manage the following
* functionalities of the COMP peripheral:
* + Initialization and de-initialization functions
* + Start/Stop operation functions in polling mode
* + Start/Stop operation functions in interrupt mode (through EXTI interrupt)
* + Peripheral control functions
* + Peripheral state functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
================================================================================
##### COMP Peripheral features #####
@@ -140,18 +149,6 @@
@endverbatim
******************************************************************************
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -314,7 +311,7 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
/* Note: Variable divided by 2 to compensate partially */
/* CPU processing cycles, scaling in us split to not */
/* exceed 32 bits register capacity and handle low frequency. */
wait_loop_index = ((COMP_DELAY_VOLTAGE_SCALER_STAB_US / 10UL) * (SystemCoreClock / (100000UL * 2UL)));
wait_loop_index = ((COMP_DELAY_VOLTAGE_SCALER_STAB_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL));
while(wait_loop_index != 0UL)
{
wait_loop_index--;
@@ -330,7 +327,7 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
/* Configure EXTI rising edge */
if((hcomp->Init.TriggerMode & COMP_EXTI_RISING) != 0UL)
{
#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
#if defined(COMP7)
if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7))
{
LL_EXTI_EnableRisingTrig_32_63(exti_line);
@@ -341,11 +338,11 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
}
#else
LL_EXTI_EnableRisingTrig_0_31(exti_line);
#endif
#endif /* COMP7 */
}
else
{
#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
#if defined(COMP7)
if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7))
{
LL_EXTI_DisableRisingTrig_32_63(exti_line);
@@ -356,13 +353,13 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
}
#else
LL_EXTI_DisableRisingTrig_0_31(exti_line);
#endif
#endif /* COMP7 */
}
/* Configure EXTI falling edge */
if((hcomp->Init.TriggerMode & COMP_EXTI_FALLING) != 0UL)
{
#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
#if defined(COMP7)
if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7))
{
LL_EXTI_EnableFallingTrig_32_63(exti_line);
@@ -373,11 +370,11 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
}
#else
LL_EXTI_EnableFallingTrig_0_31(exti_line);
#endif
#endif /* COMP7 */
}
else
{
#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
#if defined(COMP7)
if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7))
{
LL_EXTI_DisableFallingTrig_32_63(exti_line);
@@ -388,11 +385,11 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
}
#else
LL_EXTI_DisableFallingTrig_0_31(exti_line);
#endif
#endif /* COMP7 */
}
/* Clear COMP EXTI pending bit (if any) */
#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
#if defined(COMP7)
if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7))
{
LL_EXTI_ClearFlag_32_63(exti_line);
@@ -403,12 +400,12 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
}
#else
LL_EXTI_ClearFlag_0_31(exti_line);
#endif
#endif /* COMP7 */
/* Configure EXTI event mode */
if((hcomp->Init.TriggerMode & COMP_EXTI_EVENT) != 0UL)
{
#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
#if defined(COMP7)
if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7))
{
LL_EXTI_EnableEvent_32_63(exti_line);
@@ -419,11 +416,11 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
}
#else
LL_EXTI_EnableEvent_0_31(exti_line);
#endif
#endif /* COMP7 */
}
else
{
#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
#if defined(COMP7)
if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7))
{
LL_EXTI_DisableEvent_32_63(exti_line);
@@ -434,13 +431,13 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
}
#else
LL_EXTI_DisableEvent_0_31(exti_line);
#endif
#endif /* COMP7 */
}
/* Configure EXTI interrupt mode */
if((hcomp->Init.TriggerMode & COMP_EXTI_IT) != 0UL)
{
#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
#if defined(COMP7)
if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7))
{
LL_EXTI_EnableIT_32_63(exti_line);
@@ -451,11 +448,11 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
}
#else
LL_EXTI_EnableIT_0_31(exti_line);
#endif
#endif /* COMP7 */
}
else
{
#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
#if defined(COMP7)
if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7))
{
LL_EXTI_DisableIT_32_63(exti_line);
@@ -466,13 +463,13 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
}
#else
LL_EXTI_DisableIT_0_31(exti_line);
#endif
#endif /* COMP7 */
}
}
else
{
/* Disable EXTI event mode */
#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
#if defined(COMP7)
if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7))
{
LL_EXTI_DisableEvent_32_63(exti_line);
@@ -483,10 +480,10 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
}
#else
LL_EXTI_DisableEvent_0_31(exti_line);
#endif
#endif /* COMP7 */
/* Disable EXTI interrupt mode */
#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
#if defined(COMP7)
if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7))
{
LL_EXTI_DisableIT_32_63(exti_line);
@@ -497,7 +494,7 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
}
#else
LL_EXTI_DisableIT_0_31(exti_line);
#endif
#endif /* COMP7 */
}
/* Set HAL COMP handle state */
@@ -880,7 +877,7 @@ void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp)
uint32_t tmp_comp_exti_flag_set = 0UL;
/* Check COMP EXTI flag */
#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
#if defined(COMP7)
if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7))
{
if(LL_EXTI_IsActiveFlag_32_63(exti_line) != 0UL)
@@ -900,12 +897,12 @@ void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp)
{
tmp_comp_exti_flag_set = 1UL;
}
#endif
#endif /* COMP7 */
if(tmp_comp_exti_flag_set != 0UL)
{
/* Clear COMP EXTI line pending bit */
#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx)
#if defined(COMP7)
if(tmp_comp_exti_flag_set == 2UL)
{
LL_EXTI_ClearFlag_32_63(exti_line);
@@ -916,7 +913,7 @@ void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp)
}
#else
LL_EXTI_ClearFlag_0_31(exti_line);
#endif
#endif /* COMP7 */
/* COMP trigger user callback */
#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
@@ -1104,5 +1101,3 @@ uint32_t HAL_COMP_GetError(COMP_HandleTypeDef *hcomp)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

43
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c
View File

@@ -11,7 +11,18 @@
* + IRQ handler management
* + Peripheral State functions
*
* @verbatim
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
================================================================================
##### How to use this driver #####
================================================================================
@@ -79,9 +90,9 @@
The compilation define USE_HAL_CORDIC_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Function @ref HAL_CORDIC_RegisterCallback() to register an interrupt callback.
Use Function HAL_CORDIC_RegisterCallback() to register an interrupt callback.
Function @ref HAL_CORDIC_RegisterCallback() allows to register following callbacks:
Function HAL_CORDIC_RegisterCallback() allows to register following callbacks:
(+) ErrorCallback : Error Callback.
(+) CalculateCpltCallback : Calculate complete Callback.
(+) MspInitCallback : CORDIC MspInit.
@@ -89,9 +100,9 @@
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
Use function @ref HAL_CORDIC_UnRegisterCallback() to reset a callback to the default
Use function HAL_CORDIC_UnRegisterCallback() to reset a callback to the default
weak function.
@ref HAL_CORDIC_UnRegisterCallback takes as parameters the HAL peripheral handle,
HAL_CORDIC_UnRegisterCallback takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) ErrorCallback : Error Callback.
@@ -101,11 +112,11 @@
By default, after the HAL_CORDIC_Init() and when the state is HAL_CORDIC_STATE_RESET,
all callbacks are set to the corresponding weak functions:
examples @ref HAL_CORDIC_ErrorCallback(), @ref HAL_CORDIC_CalculateCpltCallback().
examples HAL_CORDIC_ErrorCallback(), HAL_CORDIC_CalculateCpltCallback().
Exception done for MspInit and MspDeInit functions that are
reset to the legacy weak function in the HAL_CORDIC_Init()/ @ref HAL_CORDIC_DeInit() only when
reset to the legacy weak function in the HAL_CORDIC_Init()/ HAL_CORDIC_DeInit() only when
these callbacks are null (not registered beforehand).
if not, MspInit or MspDeInit are not null, the HAL_CORDIC_Init()/ @ref HAL_CORDIC_DeInit()
if not, MspInit or MspDeInit are not null, the HAL_CORDIC_Init()/ HAL_CORDIC_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in HAL_CORDIC_STATE_READY state only.
@@ -113,7 +124,7 @@
in HAL_CORDIC_STATE_READY or HAL_CORDIC_STATE_RESET state,
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_CORDIC_RegisterCallback() before calling @ref HAL_CORDIC_DeInit()
using HAL_CORDIC_RegisterCallback() before calling HAL_CORDIC_DeInit()
or HAL_CORDIC_Init() function.
When The compilation define USE_HAL_CORDIC_REGISTER_CALLBACKS is set to 0 or
@@ -121,18 +132,6 @@
are set to the corresponding weak functions.
@endverbatim
*
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
@@ -1352,5 +1351,3 @@ static void CORDIC_DMAError(DMA_HandleTypeDef *hdma)
#endif /* HAL_CORDIC_MODULE_ENABLED */
#endif /* CORDIC */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

24
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
View File

@@ -8,6 +8,17 @@
* + Initialization and Configuration functions
* + Peripheral Control functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -87,18 +98,6 @@
| | | 0 bit for subpriority
==========================================================================================================================
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -516,4 +515,3 @@ void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

44
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c
View File

@@ -9,6 +9,17 @@
* + Peripheral Control functions
* + Peripheral State functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
===============================================================================
##### How to use this driver #####
@@ -29,17 +40,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -62,8 +62,8 @@
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/** @defgroup CRC_Private_Functions CRC Private Functions
* @{
*/
* @{
*/
static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength);
static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength);
/**
@@ -77,8 +77,8 @@ static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint3
*/
/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions.
*
* @brief Initialization and Configuration functions.
*
@verbatim
===============================================================================
##### Initialization and de-initialization functions #####
@@ -250,8 +250,8 @@ __weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc)
*/
/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
* @brief management functions.
*
* @brief management functions.
*
@verbatim
===============================================================================
##### Peripheral Control functions #####
@@ -385,8 +385,8 @@ uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t
*/
/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
* @brief Peripheral State functions.
*
* @brief Peripheral State functions.
*
@verbatim
===============================================================================
##### Peripheral State functions #####
@@ -418,8 +418,8 @@ HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc)
*/
/** @addtogroup CRC_Private_Functions
* @{
*/
* @{
*/
/**
* @brief Enter 8-bit input data to the CRC calculator.
@@ -514,5 +514,3 @@ static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint3
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

24
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c
View File

@@ -6,6 +6,17 @@
* This file provides firmware functions to manage the extended
* functionalities of the CRC peripheral.
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
================================================================================
##### How to use this driver #####
@@ -16,17 +27,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -221,5 +221,3 @@ HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

95
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp.c
View File

@@ -11,6 +11,17 @@
* + CRYP IRQ handler management
* + Peripheral State functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -283,17 +294,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -1209,7 +1209,7 @@ HAL_StatusTypeDef HAL_CRYP_Encrypt(CRYP_HandleTypeDef *hcryp, uint32_t *Input, u
/* Check input buffer size */
assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size));
#endif
#endif /* USE_FULL_ASSERT */
if (hcryp->State == HAL_CRYP_STATE_READY)
{
@@ -1309,7 +1309,7 @@ HAL_StatusTypeDef HAL_CRYP_Decrypt(CRYP_HandleTypeDef *hcryp, uint32_t *Input, u
/* Check input buffer size */
assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size));
#endif
#endif /* USE_FULL_ASSERT */
if (hcryp->State == HAL_CRYP_STATE_READY)
{
@@ -1408,7 +1408,7 @@ HAL_StatusTypeDef HAL_CRYP_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint32_t *Input
/* Check input buffer size */
assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size));
#endif
#endif /* USE_FULL_ASSERT */
if (hcryp->State == HAL_CRYP_STATE_READY)
{
@@ -1518,7 +1518,7 @@ HAL_StatusTypeDef HAL_CRYP_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint32_t *Input
/* Check input buffer size */
assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size));
#endif
#endif /* USE_FULL_ASSERT */
if (hcryp->State == HAL_CRYP_STATE_READY)
{
@@ -1628,7 +1628,7 @@ HAL_StatusTypeDef HAL_CRYP_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint32_t *Inpu
/* Check input buffer size */
assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size));
#endif
#endif /* USE_FULL_ASSERT */
if (hcryp->State == HAL_CRYP_STATE_READY)
{
@@ -1754,7 +1754,7 @@ HAL_StatusTypeDef HAL_CRYP_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint32_t *Inpu
/* Check input buffer size */
assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size));
#endif
#endif /* USE_FULL_ASSERT */
if (hcryp->State == HAL_CRYP_STATE_READY)
{
@@ -3939,6 +3939,11 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_IT(CRYP_HandleTypeDef *hcryp)
uint32_t npblb;
uint32_t mode;
uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
uint32_t headersize_in_bytes;
uint32_t tmp;
uint32_t mask[12] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU}; /* 8-bit data type */
#if (USE_HAL_CRYP_SUSPEND_RESUME == 1U)
if ((hcryp->Phase == CRYP_PHASE_HEADER_SUSPENDED) || (hcryp->Phase == CRYP_PHASE_PAYLOAD_SUSPENDED))
@@ -4028,7 +4033,16 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_IT(CRYP_HandleTypeDef *hcryp)
/* Enable the CRYP peripheral */
__HAL_CRYP_ENABLE(hcryp);
if (hcryp->Init.HeaderSize == 0U) /*header phase is skipped*/
if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD)
{
headersize_in_bytes = hcryp->Init.HeaderSize * 4U;
}
else
{
headersize_in_bytes = hcryp->Init.HeaderSize;
}
if (headersize_in_bytes == 0U) /* Header phase is skipped */
{
/* Set the phase */
hcryp->Phase = CRYP_PHASE_PROCESS;
@@ -4122,24 +4136,53 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_IT(CRYP_HandleTypeDef *hcryp)
#endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
}
}
else if ((hcryp->Init.HeaderSize) < 4U) /*HeaderSize < 4 */
/* Enter header data */
/* Check first whether header length is small enough to enter the full header in one shot */
else if (headersize_in_bytes <= 16U)
{
/* Last block optionally pad the data with zeros*/
for (loopcounter = 0U; loopcounter < (hcryp->Init.HeaderSize % 4U); loopcounter++)
for (loopcounter = 0U; (loopcounter < (headersize_in_bytes / 4U)); loopcounter++)
{
hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
hcryp->CrypHeaderCount++ ;
}
/* If the header size is a multiple of words */
if ((headersize_in_bytes % 4U) == 0U)
{
/* Pad the data with zeros to have a complete block */
while (loopcounter < 4U)
{
hcryp->Instance->DINR = 0x0U;
loopcounter++;
}
}
else
{
/* Enter last bytes, padded with zeros */
tmp = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
tmp &= mask[(hcryp->Init.DataType * 2U) + (headersize_in_bytes % 4U)];
hcryp->Instance->DINR = tmp;
hcryp->CrypHeaderCount++;
loopcounter++;
/* Pad the data with zeros to have a complete block */
while (loopcounter < 4U)
{
/* pad the data with zeros to have a complete block */
hcryp->Instance->DINR = 0x0U;
loopcounter++;
}
}
/* Call Input transfer complete callback */
#if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U)
/*Call registered Input complete callback*/
hcryp->InCpltCallback(hcryp);
#else
/*Call legacy weak Input complete callback*/
HAL_CRYP_InCpltCallback(hcryp);
#endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */
}
else
{
/* Write the input block in the IN FIFO */
/* Write the first input header block in the Input FIFO,
the following header data will be fed after interrupt occurrence */
hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
hcryp->CrypHeaderCount++;
hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
@@ -4148,9 +4191,8 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_IT(CRYP_HandleTypeDef *hcryp)
hcryp->CrypHeaderCount++;
hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount);
hcryp->CrypHeaderCount++;
}
} /* end of if (DoKeyIVConfig == 1U) */
}/* if (hcryp->Init.HeaderSize == 0U) */ /* Header phase is skipped*/
} /* end of if (dokeyivconfig == 1U) */
else /* Key and IV have already been configured,
header has already been processed;
only process here message payload */
@@ -5548,4 +5590,3 @@ static void CRYP_PhaseProcessingResume(CRYP_HandleTypeDef *hcryp)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

13
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp_ex.c
View File

@@ -9,13 +9,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -385,5 +384,3 @@ void HAL_CRYPEx_DisableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

49
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c
View File

@@ -11,6 +11,17 @@
* + Peripheral State and Errors functions
*
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### DAC Peripheral features #####
@@ -264,7 +275,7 @@
The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Functions @ref HAL_DAC_RegisterCallback() to register a user callback,
Use Functions HAL_DAC_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
(+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
@@ -279,7 +290,7 @@
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
Use function @ref HAL_DAC_UnRegisterCallback() to reset a callback to the default
Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function. It allows to reset following callbacks:
(+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
(+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
@@ -294,12 +305,12 @@
(+) All Callbacks
This function) takes as parameters the HAL peripheral handle and the Callback ID.
By default, after the @ref HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
all callbacks are reset to the corresponding legacy weak (surcharged) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
reset to the legacy weak (surcharged) functions in the @ref HAL_DAC_Init
and @ref HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the @ref HAL_DAC_Init and @ref HAL_DAC_DeInit
reset to the legacy weak (surcharged) functions in the HAL_DAC_Init
and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
@@ -307,8 +318,8 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_DAC_RegisterCallback before calling @ref HAL_DAC_DeInit
or @ref HAL_DAC_Init function.
using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit
or HAL_DAC_Init function.
When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
@@ -328,17 +339,6 @@
(@) You can refer to the DAC HAL driver header file for more useful macros
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
@@ -669,7 +669,7 @@ HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
uint32_t Alignment)
{
HAL_StatusTypeDef status = HAL_ERROR;
HAL_StatusTypeDef status;
uint32_t tmpreg = 0U;
/* Check the parameters */
@@ -1059,23 +1059,23 @@ __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
*/
uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel)
{
uint32_t tmp = 0U;
uint32_t result;
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
if (Channel == DAC_CHANNEL_1)
{
tmp = hdac->Instance->DOR1;
result = hdac->Instance->DOR1;
}
else
{
tmp = hdac->Instance->DOR2;
result = hdac->Instance->DOR2;
}
/* Returns the DAC channel data output register value */
return tmp;
return result;
}
/**
@@ -1673,4 +1673,3 @@ void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

23
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c
View File

@@ -7,6 +7,17 @@
* functionalities of the DAC peripheral.
*
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -52,17 +63,6 @@
at least one time after reset).
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
@@ -1098,4 +1098,3 @@ void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

25
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
View File

@@ -8,6 +8,18 @@
* + Initialization and de-initialization functions
* + IO operation functions
* + Peripheral State and errors functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -72,18 +84,6 @@
(@) You can refer to the DMA HAL driver header file for more useful macros
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -1108,4 +1108,3 @@ static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

24
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
View File

@@ -7,6 +7,17 @@
* functionalities of the DMA Extension peripheral:
* + Extended features functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -26,18 +37,6 @@
(exception done if a given DMA is not using the DMAMUX SYNC block neither a request generator)
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -297,4 +296,3 @@ void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

41
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
View File

@@ -9,6 +9,17 @@
* + Initialization and de-initialization functions
* + IO operation functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### EXTI Peripheral features #####
@@ -70,18 +81,6 @@
(#) Generate software interrupt using HAL_EXTI_GenerateSWI().
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -317,6 +316,10 @@ HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigT
pExtiConfig->Mode |= EXTI_MODE_EVENT;
}
/* Get default Trigger and GPIOSel configuration */
pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
pExtiConfig->GPIOSel = 0x00u;
/* 2] Get trigger for configurable lines : rising */
if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u)
{
@@ -328,10 +331,6 @@ HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigT
{
pExtiConfig->Trigger = EXTI_TRIGGER_RISING;
}
else
{
pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
}
/* Get falling configuration */
regaddr = (&EXTI->FTSR1 + (EXTI_CONFIG_OFFSET * offset));
@@ -351,15 +350,6 @@ HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigT
regval = SYSCFG->EXTICR[linepos >> 2u];
pExtiConfig->GPIOSel = ((regval >> (SYSCFG_EXTICR1_EXTI1_Pos * ((linepos & 0x03u)))));
}
else
{
pExtiConfig->GPIOSel = 0x00u;
}
}
else
{
pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
pExtiConfig->GPIOSel = 0x00u;
}
return HAL_OK;
@@ -647,4 +637,3 @@ void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

75
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fdcan.c
View File

@@ -10,7 +10,17 @@
* + IO operation functions
* + Peripheral Configuration and Control functions
* + Peripheral State and Error functions
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -88,10 +98,10 @@
The compilation define USE_HAL_FDCAN_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Function @ref HAL_FDCAN_RegisterCallback() or HAL_FDCAN_RegisterXXXCallback()
Use Function HAL_FDCAN_RegisterCallback() or HAL_FDCAN_RegisterXXXCallback()
to register an interrupt callback.
Function @ref HAL_FDCAN_RegisterCallback() allows to register following callbacks:
Function HAL_FDCAN_RegisterCallback() allows to register following callbacks:
(+) TxFifoEmptyCallback : Tx Fifo Empty Callback.
(+) HighPriorityMessageCallback : High Priority Message Callback.
(+) TimestampWraparoundCallback : Timestamp Wraparound Callback.
@@ -104,14 +114,14 @@
For specific callbacks TxEventFifoCallback, RxFifo0Callback, RxFifo1Callback,
TxBufferCompleteCallback, TxBufferAbortCallback and ErrorStatusCallback use dedicated
register callbacks : respectively @ref HAL_FDCAN_RegisterTxEventFifoCallback(),
@ref HAL_FDCAN_RegisterRxFifo0Callback(), @ref HAL_FDCAN_RegisterRxFifo1Callback(),
@ref HAL_FDCAN_RegisterTxBufferCompleteCallback(), @ref HAL_FDCAN_RegisterTxBufferAbortCallback()
and @ref HAL_FDCAN_RegisterErrorStatusCallback().
register callbacks : respectively HAL_FDCAN_RegisterTxEventFifoCallback(),
HAL_FDCAN_RegisterRxFifo0Callback(), HAL_FDCAN_RegisterRxFifo1Callback(),
HAL_FDCAN_RegisterTxBufferCompleteCallback(), HAL_FDCAN_RegisterTxBufferAbortCallback()
and HAL_FDCAN_RegisterErrorStatusCallback().
Use function @ref HAL_FDCAN_UnRegisterCallback() to reset a callback to the default
Use function HAL_FDCAN_UnRegisterCallback() to reset a callback to the default
weak function.
@ref HAL_FDCAN_UnRegisterCallback takes as parameters the HAL peripheral handle,
HAL_FDCAN_UnRegisterCallback takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) TxFifoEmptyCallback : Tx Fifo Empty Callback.
@@ -124,18 +134,18 @@
For specific callbacks TxEventFifoCallback, RxFifo0Callback, RxFifo1Callback,
TxBufferCompleteCallback and TxBufferAbortCallback, use dedicated
unregister callbacks : respectively @ref HAL_FDCAN_UnRegisterTxEventFifoCallback(),
@ref HAL_FDCAN_UnRegisterRxFifo0Callback(), @ref HAL_FDCAN_UnRegisterRxFifo1Callback(),
@ref HAL_FDCAN_UnRegisterTxBufferCompleteCallback(), @ref HAL_FDCAN_UnRegisterTxBufferAbortCallback()
and @ref HAL_FDCAN_UnRegisterErrorStatusCallback().
unregister callbacks : respectively HAL_FDCAN_UnRegisterTxEventFifoCallback(),
HAL_FDCAN_UnRegisterRxFifo0Callback(), HAL_FDCAN_UnRegisterRxFifo1Callback(),
HAL_FDCAN_UnRegisterTxBufferCompleteCallback(), HAL_FDCAN_UnRegisterTxBufferAbortCallback()
and HAL_FDCAN_UnRegisterErrorStatusCallback().
By default, after the @ref HAL_FDCAN_Init() and when the state is HAL_FDCAN_STATE_RESET,
By default, after the HAL_FDCAN_Init() and when the state is HAL_FDCAN_STATE_RESET,
all callbacks are set to the corresponding weak functions:
examples @ref HAL_FDCAN_ErrorCallback().
examples HAL_FDCAN_ErrorCallback().
Exception done for MspInit and MspDeInit functions that are
reset to the legacy weak function in the @ref HAL_FDCAN_Init()/ @ref HAL_FDCAN_DeInit() only when
reset to the legacy weak function in the HAL_FDCAN_Init()/ HAL_FDCAN_DeInit() only when
these callbacks are null (not registered beforehand).
if not, MspInit or MspDeInit are not null, the @ref HAL_FDCAN_Init()/ @ref HAL_FDCAN_DeInit()
if not, MspInit or MspDeInit are not null, the HAL_FDCAN_Init()/ HAL_FDCAN_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in HAL_FDCAN_STATE_READY state only.
@@ -143,8 +153,8 @@
in HAL_FDCAN_STATE_READY or HAL_FDCAN_STATE_RESET state,
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_FDCAN_RegisterCallback() before calling @ref HAL_FDCAN_DeInit()
or @ref HAL_FDCAN_Init() function.
using HAL_FDCAN_RegisterCallback() before calling HAL_FDCAN_DeInit()
or HAL_FDCAN_Init() function.
When The compilation define USE_HAL_FDCAN_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registration feature is not available and all callbacks
@@ -152,17 +162,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -241,19 +240,19 @@
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
static const uint8_t DLCtoBytes[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 12, 16, 20, 24, 32, 48, 64};
/* Private function prototypes -----------------------------------------------*/
/** @addtogroup FDCAN_Private_Functions_Prototypes
/** @addtogroup FDCAN_Private_Variables
* @{
*/
static void FDCAN_CalcultateRamBlockAddresses(FDCAN_HandleTypeDef *hfdcan);
static void FDCAN_CopyMessageToRAM(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxHeaderTypeDef *pTxHeader, uint8_t *pTxData,
uint32_t BufferIndex);
static const uint8_t DLCtoBytes[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 12, 16, 20, 24, 32, 48, 64};
/**
* @}
*/
/* Private function prototypes -----------------------------------------------*/
static void FDCAN_CalcultateRamBlockAddresses(FDCAN_HandleTypeDef *hfdcan);
static void FDCAN_CopyMessageToRAM(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxHeaderTypeDef *pTxHeader, uint8_t *pTxData,
uint32_t BufferIndex);
/* Exported functions --------------------------------------------------------*/
/** @defgroup FDCAN_Exported_Functions FDCAN Exported Functions
* @{
@@ -3383,7 +3382,7 @@ uint32_t HAL_FDCAN_GetError(FDCAN_HandleTypeDef *hfdcan)
* @}
*/
/** @addtogroup FDCAN_Private_Functions
/** @defgroup FDCAN_Private_Functions FDCAN Private Functions
* @{
*/
@@ -3515,5 +3514,3 @@ static void FDCAN_CopyMessageToRAM(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxHeaderTy
*/
#endif /* FDCAN1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

12
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
View File

@@ -75,13 +75,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file in
* the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
******************************************************************************
*/
@@ -767,4 +766,3 @@ static void FLASH_Program_Fast(uint32_t Address, uint32_t DataAddress)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

20
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
View File

@@ -58,13 +58,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file in
* the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
******************************************************************************
*/
@@ -157,9 +156,6 @@ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t
/* Deactivate the cache if they are activated to avoid data misbehavior */
if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != 0U)
{
/* Disable instruction cache */
__HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != 0U)
{
/* Disable data cache */
@@ -253,9 +249,6 @@ HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
/* Deactivate the cache if they are activated to avoid data misbehavior */
if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != 0U)
{
/* Disable instruction cache */
__HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != 0U)
{
/* Disable data cache */
@@ -625,6 +618,8 @@ void FLASH_FlushCaches(void)
if ((cache == FLASH_CACHE_ICACHE_ENABLED) ||
(cache == FLASH_CACHE_ICACHE_DCACHE_ENABLED))
{
/* Disable instruction cache */
__HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
/* Reset instruction cache */
__HAL_FLASH_INSTRUCTION_CACHE_RESET();
/* Enable instruction cache */
@@ -1417,4 +1412,3 @@ static void FLASH_OB_GetPCROP(uint32_t *PCROPConfig, uint32_t *PCROPStartAddr, u
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

12
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
View File

@@ -36,13 +36,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file in
* the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
******************************************************************************
*/
@@ -250,6 +249,5 @@ __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig)
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

118
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fmac.c
View File

@@ -14,13 +14,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*
@@ -31,17 +30,17 @@
[..]
The FMAC HAL driver can be used as follows:
(#) Initialize the FMAC low level resources by implementing the @ref HAL_FMAC_MspInit():
(++) Enable the FMAC interface clock using @ref __HAL_RCC_FMAC_CLK_ENABLE().
(#) Initialize the FMAC low level resources by implementing the HAL_FMAC_MspInit():
(++) Enable the FMAC interface clock using __HAL_RCC_FMAC_CLK_ENABLE().
(++) In case of using interrupts (e.g. access configured as FMAC_BUFFER_ACCESS_IT):
(+++) Configure the FMAC interrupt priority using @ref HAL_NVIC_SetPriority().
(+++) Enable the FMAC IRQ handler using @ref HAL_NVIC_EnableIRQ().
(+++) In FMAC IRQ handler, call @ref HAL_FMAC_IRQHandler().
(+++) Configure the FMAC interrupt priority using HAL_NVIC_SetPriority().
(+++) Enable the FMAC IRQ handler using HAL_NVIC_EnableIRQ().
(+++) In FMAC IRQ handler, call HAL_FMAC_IRQHandler().
(++) In case of using DMA to control data transfer (e.g. access configured
as FMAC_BUFFER_ACCESS_DMA):
(+++) Enable the DMA interface clock using @ref __HAL_RCC_DMA1_CLK_ENABLE()
or @ref __HAL_RCC_DMA2_CLK_ENABLE() depending on the used DMA instance.
(+++) Enable the DMAMUX1 interface clock using @ref __HAL_RCC_DMAMUX1_CLK_ENABLE().
(+++) Enable the DMA interface clock using __HAL_RCC_DMA1_CLK_ENABLE()
or __HAL_RCC_DMA2_CLK_ENABLE() depending on the used DMA instance.
(+++) Enable the DMAMUX1 interface clock using __HAL_RCC_DMAMUX1_CLK_ENABLE().
(+++) If the initialization of the internal buffers (coefficients, input,
output) is done via DMA, configure and enable one DMA channel for
managing data transfer from memory to memory (preload channel).
@@ -52,16 +51,16 @@
one DMA channel for managing data transfer from peripheral to
memory (output channel).
(+++) Associate the initialized DMA handle(s) to the FMAC DMA handle(s)
using @ref __HAL_LINKDMA().
using __HAL_LINKDMA().
(+++) Configure the priority and enable the NVIC for the transfer complete
interrupt on the enabled DMA channel(s) using @ref HAL_NVIC_SetPriority()
and @ref HAL_NVIC_EnableIRQ().
interrupt on the enabled DMA channel(s) using HAL_NVIC_SetPriority()
and HAL_NVIC_EnableIRQ().
(#) Initialize the FMAC HAL using @ref HAL_FMAC_Init(). This function
resorts to @ref HAL_FMAC_MspInit() for low-level initialization.
(#) Initialize the FMAC HAL using HAL_FMAC_Init(). This function
resorts to HAL_FMAC_MspInit() for low-level initialization.
(#) Configure the FMAC processing (filter) using @ref HAL_FMAC_FilterConfig()
or @ref HAL_FMAC_FilterConfig_DMA().
(#) Configure the FMAC processing (filter) using HAL_FMAC_FilterConfig()
or HAL_FMAC_FilterConfig_DMA().
This function:
(++) Defines the memory area within the FMAC internal memory
(input, coefficients, output) and the associated threshold (input, output).
@@ -74,61 +73,61 @@
(++) Enable the error interruptions in the input access and/or the output
access is done through IT/DMA. If an error occurs, the interruption
will be triggered in loop. In order to recover, the user will have
to reset the IP with the sequence @ref HAL_FMAC_DeInit / @ref HAL_FMAC_Init.
Optionally, he can also disable the interrupt using @ref __HAL_FMAC_DISABLE_IT;
to reset the IP with the sequence HAL_FMAC_DeInit / HAL_FMAC_Init.
Optionally, he can also disable the interrupt using __HAL_FMAC_DISABLE_IT;
the error status will be kept, but no more interrupt will be triggered.
(++) Write the provided coefficients into the internal memory using polling
mode ( @ref HAL_FMAC_FilterConfig() ) or DMA ( @ref HAL_FMAC_FilterConfig_DMA() ).
In the DMA case, @ref HAL_FMAC_FilterConfigCallback() is called when
mode ( HAL_FMAC_FilterConfig() ) or DMA ( HAL_FMAC_FilterConfig_DMA() ).
In the DMA case, HAL_FMAC_FilterConfigCallback() is called when
the handling is over.
(#) Optionally, the user can enable the error interruption related to
saturation by calling @ref __HAL_FMAC_ENABLE_IT. This helps in debugging the
saturation by calling __HAL_FMAC_ENABLE_IT. This helps in debugging the
filter. If a saturation occurs, the interruption will be triggered in loop.
In order to recover, the user will have to:
(++) Disable the interruption by calling @ref __HAL_FMAC_DISABLE_IT if
(++) Disable the interruption by calling __HAL_FMAC_DISABLE_IT if
the user wishes to continue all the same.
(++) Reset the IP with the sequence @ref HAL_FMAC_DeInit / @ref HAL_FMAC_Init.
(++) Reset the IP with the sequence HAL_FMAC_DeInit / HAL_FMAC_Init.
(#) Optionally, preload input (FIR, IIR) and output (IIR) data using
@ref HAL_FMAC_FilterPreload() or @ref HAL_FMAC_FilterPreload_DMA().
In the DMA case, @ref HAL_FMAC_FilterPreloadCallback() is called when
HAL_FMAC_FilterPreload() or HAL_FMAC_FilterPreload_DMA().
In the DMA case, HAL_FMAC_FilterPreloadCallback() is called when
the handling is over.
This step is optional as the filter can be started without preloaded
data.
(#) Start the FMAC processing (filter) using @ref HAL_FMAC_FilterStart().
(#) Start the FMAC processing (filter) using HAL_FMAC_FilterStart().
This function also configures the output buffer that will be filled from
the circular internal output buffer. The function returns immediately
without updating the provided buffer. The IP processing will be active until
@ref HAL_FMAC_FilterStop() is called.
HAL_FMAC_FilterStop() is called.
(#) If the input internal buffer is accessed via DMA, @ref HAL_FMAC_HalfGetDataCallback()
(#) If the input internal buffer is accessed via DMA, HAL_FMAC_HalfGetDataCallback()
will be called to indicate that half of the input buffer has been handled.
(#) If the input internal buffer is accessed via DMA or interrupt, @ref HAL_FMAC_GetDataCallback()
(#) If the input internal buffer is accessed via DMA or interrupt, HAL_FMAC_GetDataCallback()
will be called to require new input data. It will be provided through
@ref HAL_FMAC_AppendFilterData() if the DMA isn't in circular mode.
HAL_FMAC_AppendFilterData() if the DMA isn't in circular mode.
(#) If the output internal buffer is accessed via DMA, @ref HAL_FMAC_HalfOutputDataReadyCallback()
(#) If the output internal buffer is accessed via DMA, HAL_FMAC_HalfOutputDataReadyCallback()
will be called to indicate that half of the output buffer has been handled.
(#) If the output internal buffer is accessed via DMA or interrupt,
@ref HAL_FMAC_OutputDataReadyCallback() will be called to require a new output
buffer. It will be provided through @ref HAL_FMAC_ConfigFilterOutputBuffer()
HAL_FMAC_OutputDataReadyCallback() will be called to require a new output
buffer. It will be provided through HAL_FMAC_ConfigFilterOutputBuffer()
if the DMA isn't in circular mode.
(#) In all modes except none, provide new input data to be processed via @ref HAL_FMAC_AppendFilterData().
(#) In all modes except none, provide new input data to be processed via HAL_FMAC_AppendFilterData().
This function should only be called once the previous input data has been handled
(the preloaded input data isn't concerned).
(#) In all modes except none, provide a new output buffer to be filled via
@ref HAL_FMAC_ConfigFilterOutputBuffer(). This function should only be called once the previous
HAL_FMAC_ConfigFilterOutputBuffer(). This function should only be called once the previous
user's output buffer has been filled.
(#) In polling mode, handle the input and output data using @ref HAL_FMAC_PollFilterData().
(#) In polling mode, handle the input and output data using HAL_FMAC_PollFilterData().
This function:
(++) Write the user's input data (provided via @ref HAL_FMAC_AppendFilterData())
(++) Write the user's input data (provided via HAL_FMAC_AppendFilterData())
into the FMAC input memory area.
(++) Read the FMAC output memory area and write it into the user's output buffer.
It will return either when:
@@ -138,10 +137,10 @@
The user will have to use the updated input and output sizes to keep track
of them.
(#) Stop the FMAC processing (filter) using @ref HAL_FMAC_FilterStop().
(#) Stop the FMAC processing (filter) using HAL_FMAC_FilterStop().
(#) Call @ref HAL_FMAC_DeInit() to de-initialize the FMAC peripheral. This function
resorts to @ref HAL_FMAC_MspDeInit() for low-level de-initialization.
(#) Call HAL_FMAC_DeInit() to de-initialize the FMAC peripheral. This function
resorts to HAL_FMAC_MspDeInit() for low-level de-initialization.
##### Callback registration #####
==================================
@@ -151,8 +150,8 @@
allows the user to configure dynamically the driver callbacks.
[..]
Use Function @ref HAL_FMAC_RegisterCallback() to register a user callback.
Function @ref HAL_FMAC_RegisterCallback() allows to register following callbacks:
Use Function HAL_FMAC_RegisterCallback() to register a user callback.
Function HAL_FMAC_RegisterCallback() allows to register following callbacks:
(+) ErrorCallback : Error Callback.
(+) HalfGetDataCallback : Get Half Data Callback.
(+) GetDataCallback : Get Data Callback.
@@ -166,9 +165,9 @@
and a pointer to the user callback function.
[..]
Use function @ref HAL_FMAC_UnRegisterCallback() to reset a callback to the default
Use function HAL_FMAC_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function.
@ref HAL_FMAC_UnRegisterCallback() takes as parameters the HAL peripheral handle
HAL_FMAC_UnRegisterCallback() takes as parameters the HAL peripheral handle
and the Callback ID.
This function allows to reset following callbacks:
(+) ErrorCallback : Error Callback.
@@ -182,13 +181,13 @@
(+) MspDeInitCallback : FMAC MspDeInit.
[..]
By default, after the @ref HAL_FMAC_Init() and when the state is HAL_FMAC_STATE_RESET
By default, after the HAL_FMAC_Init() and when the state is HAL_FMAC_STATE_RESET
all callbacks are set to the corresponding weak (surcharged) functions:
examples @ref GetDataCallback(), @ref OutputDataReadyCallback().
examples GetDataCallback(), OutputDataReadyCallback().
Exception done for MspInit and MspDeInit functions that are respectively
reset to the legacy weak (surcharged) functions in the @ref HAL_FMAC_Init()
and @ref HAL_FMAC_DeInit() only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the @ref HAL_FMAC_Init() and @ref HAL_FMAC_DeInit()
reset to the legacy weak (surcharged) functions in the HAL_FMAC_Init()
and HAL_FMAC_DeInit() only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the HAL_FMAC_Init() and HAL_FMAC_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
[..]
@@ -197,8 +196,8 @@
in HAL_FMAC_STATE_READY or HAL_FMAC_STATE_RESET state, thus registered (user)
MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_FMAC_RegisterCallback() before calling @ref HAL_FMAC_DeInit()
or @ref HAL_FMAC_Init() function.
using HAL_FMAC_RegisterCallback() before calling HAL_FMAC_DeInit()
or HAL_FMAC_Init() function.
[..]
When the compilation define USE_HAL_FMAC_REGISTER_CALLBACKS is set to 0 or
@@ -250,11 +249,6 @@
/* FMAC Execution Enable */
#define FMAC_START FMAC_PARAM_START
/**
* @}
*/
/**
* @}
*/
@@ -2540,5 +2534,3 @@ static void FMAC_DMAError(DMA_HandleTypeDef *hdma)
#endif /* HAL_FMAC_MODULE_ENABLED */
#endif /* FMAC */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

102
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
View File

@@ -8,6 +8,17 @@
* + Initialization and de-initialization functions
* + IO operation functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### GPIO Peripheral features #####
@@ -89,17 +100,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -122,18 +122,10 @@
#ifdef HAL_GPIO_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
/* Private defines ------------------------------------------------------------*/
/** @defgroup GPIO_Private_Constants GPIO Private Constants
/* Private defines -----------------------------------------------------------*/
/** @addtogroup GPIO_Private_Constants GPIO Private Constants
* @{
*/
#define GPIO_MODE (0x00000003U)
#define EXTI_MODE (0x10000000U)
#define GPIO_MODE_IT (0x00010000U)
#define GPIO_MODE_EVT (0x00020000U)
#define RISING_EDGE (0x00100000U)
#define FALLING_EDGE (0x00200000U)
#define GPIO_OUTPUT_TYPE (0x00000010U)
#define GPIO_NUMBER (16U)
/**
* @}
@@ -177,7 +169,6 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0U)
@@ -189,8 +180,8 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
/*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Output or Alternate function mode selection */
if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) ||
((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
{
/* Check the Speed parameter */
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
@@ -203,18 +194,24 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
/* Configure the IO Output Type */
temp = GPIOx->OTYPER;
temp &= ~(GPIO_OTYPER_OT0 << position) ;
temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
GPIOx->OTYPER = temp;
}
/* Activate the Pull-up or Pull down resistor for the current IO */
temp = GPIOx->PUPDR;
temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
temp |= ((GPIO_Init->Pull) << (position * 2U));
GPIOx->PUPDR = temp;
if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
{
/* Check the Pull parameter */
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
/* Activate the Pull-up or Pull down resistor for the current IO */
temp = GPIOx->PUPDR;
temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
temp |= ((GPIO_Init->Pull) << (position * 2U));
GPIOx->PUPDR = temp;
}
/* In case of Alternate function mode selection */
if ((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
@@ -235,7 +232,7 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
if ((GPIO_Init->Mode & EXTI_MODE) != 0x00u)
{
/* Enable SYSCFG Clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
@@ -245,27 +242,10 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
temp |= (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U)));
SYSCFG->EXTICR[position >> 2U] = temp;
/* Clear EXTI line configuration */
temp = EXTI->IMR1;
temp &= ~(iocurrent);
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
{
temp |= iocurrent;
}
EXTI->IMR1 = temp;
temp = EXTI->EMR1;
temp &= ~(iocurrent);
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
{
temp |= iocurrent;
}
EXTI->EMR1 = temp;
/* Clear Rising Falling edge configuration */
temp = EXTI->RTSR1;
temp &= ~(iocurrent);
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
{
temp |= iocurrent;
}
@@ -273,11 +253,28 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
temp = EXTI->FTSR1;
temp &= ~(iocurrent);
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
{
temp |= iocurrent;
}
EXTI->FTSR1 = temp;
temp = EXTI->EMR1;
temp &= ~(iocurrent);
if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
{
temp |= iocurrent;
}
EXTI->EMR1 = temp;
/* Clear EXTI line configuration */
temp = EXTI->IMR1;
temp &= ~(iocurrent);
if ((GPIO_Init->Mode & EXTI_IT) != 0x00U)
{
temp |= iocurrent;
}
EXTI->IMR1 = temp;
}
}
@@ -322,8 +319,8 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
EXTI->EMR1 &= ~(iocurrent);
/* Clear Rising Falling edge configuration */
EXTI->RTSR1 &= ~(iocurrent);
EXTI->FTSR1 &= ~(iocurrent);
EXTI->RTSR1 &= ~(iocurrent);
tmp = 0x0FUL << (4U * (position & 0x03U));
SYSCFG->EXTICR[position >> 2U] &= ~tmp;
@@ -533,4 +530,3 @@ __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

62
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_hrtim.c
View File

@@ -50,6 +50,18 @@
* + Waveform Timer Burst Status Get
* + Waveform Timer Push-Pull Status Get
* + Peripheral State Get
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### Simple mode v.s. waveform mode #####
@@ -71,6 +83,8 @@
operates in waveform mode, all the HRTIM features are accessible without
any restriction. HRTIM waveform modes are managed through the set of
functions named HAL_HRTIM_Waveform<Function>
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
@@ -357,18 +371,6 @@
callbacks are set to the corresponding weak functions.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
@@ -1814,11 +1816,11 @@ HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_DMA(HRTIM_HandleTypeDef * hhrtim,
/* Check the parameters */
assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
{
return HAL_BUSY;
}
if((hhrtim->State == HAL_HRTIM_STATE_READY))
if(hhrtim->State == HAL_HRTIM_STATE_READY)
{
if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U))
{
@@ -2458,11 +2460,11 @@ HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_DMA(HRTIM_HandleTypeDef * hhrtim,
/* Check the parameters */
assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
{
return HAL_BUSY;
}
if((hhrtim->State == HAL_HRTIM_STATE_READY))
if(hhrtim->State == HAL_HRTIM_STATE_READY)
{
if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U))
{
@@ -5024,6 +5026,15 @@ HAL_StatusTypeDef HAL_HRTIM_WaveformTimerConfig(HRTIM_HandleTypeDef * hhrtim,
/* Force a software update */
HRTIM_ForceRegistersUpdate(hhrtim, TimerIdx);
/* Configure slave timer update re-synchronization */
if ((TimerIdx != HRTIM_TIMERINDEX_MASTER)
&& (pTimerCfg->UpdateGating == HRTIM_UPDATEGATING_INDEPENDENT))
{
MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR,
HRTIM_TIMCR_RSYNCU_Msk,
pTimerCfg->ReSyncUpdate << HRTIM_TIMCR_RSYNCU_Pos);
}
hhrtim->State = HAL_HRTIM_STATE_READY;
/* Process Unlocked */
@@ -6597,7 +6608,7 @@ HAL_StatusTypeDef HAL_HRTIM_WaveformCountStart_DMA(HRTIM_HandleTypeDef * hhrtim,
/* Check the parameters */
assert_param(IS_HRTIM_TIMERID(Timers));
if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
{
return HAL_BUSY;
}
@@ -7159,11 +7170,11 @@ HAL_StatusTypeDef HAL_HRTIM_BurstDMATransfer(HRTIM_HandleTypeDef *hhrtim,
/* Check the parameters */
assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
{
return HAL_BUSY;
}
if((hhrtim->State == HAL_HRTIM_STATE_READY))
if(hhrtim->State == HAL_HRTIM_STATE_READY)
{
if((BurstBufferAddress == 0U ) || (BurstBufferLength == 0U))
{
@@ -7626,6 +7637,9 @@ uint32_t HAL_HRTIM_WaveformGetOutputState(HRTIM_HandleTypeDef * hhrtim,
/* Check parameters */
assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
/* Prevent unused argument(s) compilation warning */
UNUSED(TimerIdx);
/* Set output state according to output control status and output disable status */
switch (Output)
{
@@ -9292,14 +9306,6 @@ static void HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
hrtim_timcr &= ~(HRTIM_TIMCR_UPDGAT);
hrtim_timcr |= pTimerCfg->UpdateGating;
if (pTimerCfg->UpdateGating == HRTIM_UPDATEGATING_INDEPENDENT)
{
/* Timing unit Re-Synchronized Update */
hrtim_timcr &= ~(HRTIM_TIMCR_RSYNCU);
hrtim_timcr |= (pTimerCfg->ReSyncUpdate) << HRTIM_TIMCR_RSYNCU_Pos;
}
/* Enable/Disable registers update on repetition */
hrtim_timcr &= ~(HRTIM_TIMCR_TREPU);
if (pTimerCfg->RepetitionUpdate == HRTIM_UPDATEONREPETITION_ENABLED)
@@ -11093,5 +11099,3 @@ static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

898
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c
View File

File diff suppressed because it is too large Load Diff

73
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c
View File

@@ -5,8 +5,21 @@
* @brief I2C Extended HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of I2C Extended peripheral:
* + Extended features functions
* + Filter Mode Functions
* + WakeUp Mode Functions
* + FastModePlus Functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### I2C peripheral Extended features #####
@@ -32,18 +45,6 @@
(++) HAL_I2CEx_EnableFastModePlus()
(++) HAL_I2CEx_DisableFastModePlus()
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -71,17 +72,15 @@
* @{
*/
/** @defgroup I2CEx_Exported_Functions_Group1 Extended features functions
* @brief Extended features functions
/** @defgroup I2CEx_Exported_Functions_Group1 Filter Mode Functions
* @brief Filter Mode Functions
*
@verbatim
===============================================================================
##### Extended features functions #####
##### Filter Mode Functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Configure Noise Filters
(+) Configure Wake Up Feature
(+) Configure Fast Mode Plus
@endverbatim
* @{
@@ -182,6 +181,23 @@ HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_
return HAL_BUSY;
}
}
/**
* @}
*/
/** @defgroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions
* @brief WakeUp Mode Functions
*
@verbatim
===============================================================================
##### WakeUp Mode Functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Configure Wake Up Feature
@endverbatim
* @{
*/
/**
* @brief Enable I2C wakeup from Stop mode(s).
@@ -260,6 +276,23 @@ HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c)
return HAL_BUSY;
}
}
/**
* @}
*/
/** @defgroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions
* @brief Fast Mode Plus Functions
*
@verbatim
===============================================================================
##### Fast Mode Plus Functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Configure Fast Mode Plus
@endverbatim
* @{
*/
/**
* @brief Enable the I2C fast mode plus driving capability.
@@ -318,11 +351,9 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
/* Disable fast mode plus driving capability for selected pin */
CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus);
}
/**
* @}
*/
/**
* @}
*/
@@ -335,5 +366,3 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

25
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2s.c
View File

@@ -8,6 +8,17 @@
* + Initialization and de-initialization functions
* + IO operation functions
* + Peripheral State and Errors functions
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
===============================================================================
##### How to use this driver #####
@@ -169,18 +180,7 @@
and weak (surcharged) callbacks are used.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -1857,4 +1857,3 @@ static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s,
#endif /* HAL_I2S_MODULE_ENABLED */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

103
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_irda.c
View File

@@ -11,6 +11,17 @@
* + Peripheral State and Errors functions
* + Peripheral Control functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -114,8 +125,8 @@
allows the user to configure dynamically the driver callbacks.
[..]
Use Function @ref HAL_IRDA_RegisterCallback() to register a user callback.
Function @ref HAL_IRDA_RegisterCallback() allows to register following callbacks:
Use Function HAL_IRDA_RegisterCallback() to register a user callback.
Function HAL_IRDA_RegisterCallback() allows to register following callbacks:
(+) TxHalfCpltCallback : Tx Half Complete Callback.
(+) TxCpltCallback : Tx Complete Callback.
(+) RxHalfCpltCallback : Rx Half Complete Callback.
@@ -130,9 +141,9 @@
and a pointer to the user callback function.
[..]
Use function @ref HAL_IRDA_UnRegisterCallback() to reset a callback to the default
Use function HAL_IRDA_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function.
@ref HAL_IRDA_UnRegisterCallback() takes as parameters the HAL peripheral handle,
HAL_IRDA_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) TxHalfCpltCallback : Tx Half Complete Callback.
@@ -147,13 +158,13 @@
(+) MspDeInitCallback : IRDA MspDeInit.
[..]
By default, after the @ref HAL_IRDA_Init() and when the state is HAL_IRDA_STATE_RESET
By default, after the HAL_IRDA_Init() and when the state is HAL_IRDA_STATE_RESET
all callbacks are set to the corresponding weak (surcharged) functions:
examples @ref HAL_IRDA_TxCpltCallback(), @ref HAL_IRDA_RxHalfCpltCallback().
examples HAL_IRDA_TxCpltCallback(), HAL_IRDA_RxHalfCpltCallback().
Exception done for MspInit and MspDeInit functions that are respectively
reset to the legacy weak (surcharged) functions in the @ref HAL_IRDA_Init()
and @ref HAL_IRDA_DeInit() only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the @ref HAL_IRDA_Init() and @ref HAL_IRDA_DeInit()
reset to the legacy weak (surcharged) functions in the HAL_IRDA_Init()
and HAL_IRDA_DeInit() only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the HAL_IRDA_Init() and HAL_IRDA_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
[..]
@@ -162,8 +173,8 @@
in HAL_IRDA_STATE_READY or HAL_IRDA_STATE_RESET state, thus registered (user)
MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_IRDA_RegisterCallback() before calling @ref HAL_IRDA_DeInit()
or @ref HAL_IRDA_Init() function.
using HAL_IRDA_RegisterCallback() before calling HAL_IRDA_DeInit()
or HAL_IRDA_Init() function.
[..]
When The compilation define USE_HAL_IRDA_REGISTER_CALLBACKS is set to 0 or
@@ -172,17 +183,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -801,10 +801,10 @@ HAL_StatusTypeDef HAL_IRDA_UnRegisterCallback(IRDA_HandleTypeDef *hirda, HAL_IRD
* @param Timeout Specify timeout value.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
uint8_t *pdata8bits;
uint16_t *pdata16bits;
const uint8_t *pdata8bits;
const uint16_t *pdata16bits;
uint32_t tickstart;
/* Check that a Tx process is not already ongoing */
@@ -831,7 +831,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, u
if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
{
pdata8bits = NULL;
pdata16bits = (uint16_t *) pData; /* Derogation R.11.3 */
pdata16bits = (const uint16_t *) pData; /* Derogation R.11.3 */
}
else
{
@@ -980,7 +980,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, ui
* @param Size Amount of data elements (u8 or u16) to be sent.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, const uint8_t *pData, uint16_t Size)
{
/* Check that a Tx process is not already ongoing */
if (hirda->gState == HAL_IRDA_STATE_READY)
@@ -1052,8 +1052,16 @@ HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData,
/* Process Unlocked */
__HAL_UNLOCK(hirda);
/* Enable the IRDA Parity Error and Data Register not empty Interrupts */
SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
if (hirda->Init.Parity != IRDA_PARITY_NONE)
{
/* Enable the IRDA Parity Error and Data Register not empty Interrupts */
SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
}
else
{
/* Enable the IRDA Data Register not empty Interrupts */
SET_BIT(hirda->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
}
/* Enable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
@@ -1077,7 +1085,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData,
* @param Size Amount of data elements (u8 or u16) to be sent.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, const uint8_t *pData, uint16_t Size)
{
/* Check that a Tx process is not already ongoing */
if (hirda->gState == HAL_IRDA_STATE_READY)
@@ -1194,8 +1202,11 @@ HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData
/* Process Unlocked */
__HAL_UNLOCK(hirda);
/* Enable the UART Parity Error Interrupt */
SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
if (hirda->Init.Parity != IRDA_PARITY_NONE)
{
/* Enable the UART Parity Error Interrupt */
SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
}
/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
@@ -1287,7 +1298,10 @@ HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda)
__HAL_IRDA_CLEAR_OREFLAG(hirda);
/* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */
SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
if (hirda->Init.Parity != IRDA_PARITY_NONE)
{
SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
}
SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
/* Enable the IRDA DMA Rx request */
@@ -2283,21 +2297,21 @@ static HAL_StatusTypeDef IRDA_SetConfig(IRDA_HandleTypeDef *hirda)
{
case IRDA_CLOCKSOURCE_PCLK1:
pclk = HAL_RCC_GetPCLK1Freq();
tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate, hirda->Init.ClockPrescaler));
tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate, hirda->Init.ClockPrescaler));
break;
case IRDA_CLOCKSOURCE_PCLK2:
pclk = HAL_RCC_GetPCLK2Freq();
tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate, hirda->Init.ClockPrescaler));
tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate, hirda->Init.ClockPrescaler));
break;
case IRDA_CLOCKSOURCE_HSI:
tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16(HSI_VALUE, hirda->Init.BaudRate, hirda->Init.ClockPrescaler));
tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16(HSI_VALUE, hirda->Init.BaudRate, hirda->Init.ClockPrescaler));
break;
case IRDA_CLOCKSOURCE_SYSCLK:
pclk = HAL_RCC_GetSysClockFreq();
tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate, hirda->Init.ClockPrescaler));
tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate, hirda->Init.ClockPrescaler));
break;
case IRDA_CLOCKSOURCE_LSE:
tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16((uint32_t)LSE_VALUE, hirda->Init.BaudRate, hirda->Init.ClockPrescaler));
tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16((uint32_t)LSE_VALUE, hirda->Init.BaudRate, hirda->Init.ClockPrescaler));
break;
default:
ret = HAL_ERROR;
@@ -2307,7 +2321,7 @@ static HAL_StatusTypeDef IRDA_SetConfig(IRDA_HandleTypeDef *hirda)
/* USARTDIV must be greater than or equal to 0d16 */
if ((tmpreg >= USART_BRR_MIN) && (tmpreg <= USART_BRR_MAX))
{
hirda->Instance->BRR = tmpreg;
hirda->Instance->BRR = (uint16_t)tmpreg;
}
else
{
@@ -2365,11 +2379,12 @@ static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda)
}
/**
* @brief Handle IRDA Communication Timeout.
* @brief Handle IRDA Communication Timeout. It waits
* until a flag is no longer in the specified status.
* @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
* the configuration information for the specified IRDA module.
* @param Flag Specifies the IRDA flag to check.
* @param Status Flag status (SET or RESET)
* @param Status The actual Flag status (SET or RESET)
* @param Tickstart Tick start value
* @param Timeout Timeout duration
* @retval HAL status
@@ -2770,7 +2785,7 @@ static void IRDA_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
*/
static void IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda)
{
uint16_t *tmp;
const uint16_t *tmp;
/* Check that a Tx process is ongoing */
if (hirda->gState == HAL_IRDA_STATE_BUSY_TX)
@@ -2787,7 +2802,7 @@ static void IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda)
{
if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
{
tmp = (uint16_t *) hirda->pTxBuffPtr; /* Derogation R.11.3 */
tmp = (const uint16_t *) hirda->pTxBuffPtr; /* Derogation R.11.3 */
hirda->Instance->TDR = (uint16_t)(*tmp & 0x01FFU);
hirda->pTxBuffPtr += 2U;
}
@@ -2895,4 +2910,4 @@ static void IRDA_Receive_IT(IRDA_HandleTypeDef *hirda)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

33
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_iwdg.c
View File

@@ -8,6 +8,17 @@
* + Initialization and Start functions
* + IO operation functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### IWDG Generic features #####
@@ -86,18 +97,6 @@
the reload register
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -121,11 +120,13 @@
/* Status register needs up to 5 LSI clock periods divided by the clock
prescaler to be updated. The number of LSI clock periods is upper-rounded to
6 for the timeout value calculation.
The timeout value is also calculated using the highest prescaler (256) and
The timeout value is calculated using the highest prescaler (256) and
the LSI_VALUE constant. The value of this constant can be changed by the user
to take into account possible LSI clock period variations.
The timeout value is multiplied by 1000 to be converted in milliseconds. */
#define HAL_IWDG_DEFAULT_TIMEOUT ((6UL * 256UL * 1000UL) / LSI_VALUE)
The timeout value is multiplied by 1000 to be converted in milliseconds.
LSI startup time is also considered here by adding LSI_STARTUP_TIME
converted in milliseconds. */
#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL))
#define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
/**
* @}
@@ -279,5 +280,3 @@ HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

115
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_lptim.c
View File

@@ -11,6 +11,17 @@
* + Reading operation functions.
* + Peripheral State functions.
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -96,13 +107,13 @@
The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
[..]
Use Function @ref HAL_LPTIM_RegisterCallback() to register a callback.
@ref HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
Use Function HAL_LPTIM_RegisterCallback() to register a callback.
HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
the Callback ID and a pointer to the user callback function.
[..]
Use function @ref HAL_LPTIM_UnRegisterCallback() to reset a callback to the
Use function HAL_LPTIM_UnRegisterCallback() to reset a callback to the
default weak function.
@ref HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
and the Callback ID.
[..]
These functions allow to register/unregister following callbacks:
@@ -120,7 +131,7 @@
[..]
By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
all interrupt callbacks are set to the corresponding weak functions:
examples @ref HAL_LPTIM_TriggerCallback(), @ref HAL_LPTIM_CompareMatchCallback().
examples HAL_LPTIM_TriggerCallback(), HAL_LPTIM_CompareMatchCallback().
[..]
Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
@@ -134,7 +145,7 @@
in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
using HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
[..]
When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
@@ -143,17 +154,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -235,8 +235,8 @@ HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
|| (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
|| (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
{
assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
@@ -279,8 +279,8 @@ HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
/* Get the LPTIMx CFGR value */
tmpcfgr = hlptim->Instance->CFGR;
if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
|| (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
|| (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
{
tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
}
@@ -310,8 +310,8 @@ HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
}
/* Configure LPTIM external clock polarity and digital filter */
if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
|| (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
|| (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
{
tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
hlptim->Init.UltraLowPowerClock.SampleTime);
@@ -534,7 +534,7 @@ HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
return HAL_TIMEOUT;
}
/* Change the TIM state*/
/* Change the LPTIM state*/
hlptim->State = HAL_LPTIM_STATE_READY;
/* Return function status */
@@ -670,7 +670,7 @@ HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
}
/* Change the TIM state*/
/* Change the LPTIM state*/
hlptim->State = HAL_LPTIM_STATE_READY;
/* Return function status */
@@ -757,7 +757,7 @@ HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
return HAL_TIMEOUT;
}
/* Change the TIM state*/
/* Change the LPTIM state*/
hlptim->State = HAL_LPTIM_STATE_READY;
/* Return function status */
@@ -893,7 +893,7 @@ HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
}
/* Change the TIM state*/
/* Change the LPTIM state*/
hlptim->State = HAL_LPTIM_STATE_READY;
/* Return function status */
@@ -980,7 +980,7 @@ HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
return HAL_TIMEOUT;
}
/* Change the TIM state*/
/* Change the LPTIM state*/
hlptim->State = HAL_LPTIM_STATE_READY;
/* Return function status */
@@ -1116,7 +1116,7 @@ HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
__HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
}
/* Change the TIM state*/
/* Change the LPTIM state*/
hlptim->State = HAL_LPTIM_STATE_READY;
/* Return function status */
@@ -2178,39 +2178,48 @@ HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlpti
switch (CallbackID)
{
case HAL_LPTIM_MSPINIT_CB_ID :
hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
/* Legacy weak MspInit Callback */
hlptim->MspInitCallback = HAL_LPTIM_MspInit;
break;
case HAL_LPTIM_MSPDEINIT_CB_ID :
hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
/* Legacy weak Msp DeInit Callback */
hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
break;
case HAL_LPTIM_COMPARE_MATCH_CB_ID :
hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Legacy weak Compare match Callback */
/* Legacy weak Compare match Callback */
hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
break;
case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Legacy weak Auto-reload match Callback */
/* Legacy weak Auto-reload match Callback */
hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
break;
case HAL_LPTIM_TRIGGER_CB_ID :
hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* Legacy weak External trigger event detection Callback */
/* Legacy weak External trigger event detection Callback */
hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
break;
case HAL_LPTIM_COMPARE_WRITE_CB_ID :
hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Legacy weak Compare register write complete Callback */
/* Legacy weak Compare register write complete Callback */
hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
break;
case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Legacy weak Auto-reload register write complete Callback */
/* Legacy weak Auto-reload register write complete Callback */
hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
break;
case HAL_LPTIM_DIRECTION_UP_CB_ID :
hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Legacy weak Up-counting direction change Callback */
/* Legacy weak Up-counting direction change Callback */
hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
break;
case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Legacy weak Down-counting direction change Callback */
/* Legacy weak Down-counting direction change Callback */
hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
break;
default :
@@ -2224,11 +2233,13 @@ HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlpti
switch (CallbackID)
{
case HAL_LPTIM_MSPINIT_CB_ID :
hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
/* Legacy weak MspInit Callback */
hlptim->MspInitCallback = HAL_LPTIM_MspInit;
break;
case HAL_LPTIM_MSPDEINIT_CB_ID :
hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
/* Legacy weak Msp DeInit Callback */
hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
break;
default :
@@ -2303,13 +2314,13 @@ HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
{
/* Reset the LPTIM callback to the legacy weak callbacks */
lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Compare match Callback */
lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Auto-reload match Callback */
lptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* External trigger event detection Callback */
lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Compare register write complete Callback */
lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Auto-reload register write complete Callback */
lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Up-counting direction change Callback */
lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Down-counting direction change Callback */
lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
lptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
}
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
@@ -2352,9 +2363,12 @@ void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
uint32_t tmpCFGR;
uint32_t tmpCMP;
uint32_t tmpARR;
uint32_t primask_bit;
uint32_t tmpOR;
__disable_irq();
/* Enter critical section */
primask_bit = __get_PRIMASK();
__set_PRIMASK(1) ;
/*********** Save LPTIM Config ***********/
/* Save LPTIM source clock */
@@ -2444,7 +2458,8 @@ void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
hlptim->Instance->CFGR = tmpCFGR;
hlptim->Instance->OR = tmpOR;
__enable_irq();
/* Exit critical section: restore previous priority mask */
__set_PRIMASK(primask_bit);
}
/**
* @}
@@ -2459,5 +2474,3 @@ void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

12
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_msp_template.c
View File

@@ -8,13 +8,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -102,4 +101,3 @@ void HAL_PPP_MspDeInit(void)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

62
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_nand.c
View File

@@ -6,6 +6,17 @@
* This file provides a generic firmware to drive NAND memories mounted
* as external device.
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -58,25 +69,25 @@
The compilation define USE_HAL_NAND_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Functions @ref HAL_NAND_RegisterCallback() to register a user callback,
Use Functions HAL_NAND_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) MspInitCallback : NAND MspInit.
(+) MspDeInitCallback : NAND MspDeInit.
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
Use function @ref HAL_NAND_UnRegisterCallback() to reset a callback to the default
Use function HAL_NAND_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function. It allows to reset following callbacks:
(+) MspInitCallback : NAND MspInit.
(+) MspDeInitCallback : NAND MspDeInit.
This function) takes as parameters the HAL peripheral handle and the Callback ID.
By default, after the @ref HAL_NAND_Init and if the state is HAL_NAND_STATE_RESET
By default, after the HAL_NAND_Init and if the state is HAL_NAND_STATE_RESET
all callbacks are reset to the corresponding legacy weak (surcharged) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
reset to the legacy weak (surcharged) functions in the @ref HAL_NAND_Init
and @ref HAL_NAND_DeInit only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the @ref HAL_NAND_Init and @ref HAL_NAND_DeInit
reset to the legacy weak (surcharged) functions in the HAL_NAND_Init
and HAL_NAND_DeInit only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the HAL_NAND_Init and HAL_NAND_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
@@ -84,8 +95,8 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_NAND_RegisterCallback before calling @ref HAL_NAND_DeInit
or @ref HAL_NAND_Init function.
using HAL_NAND_RegisterCallback before calling HAL_NAND_DeInit
or HAL_NAND_Init function.
When The compilation define USE_HAL_NAND_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
@@ -93,17 +104,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -790,6 +790,17 @@ HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_Address
__DSB();
}
/* Calculate PageSize */
if (hnand->Init.MemoryDataWidth == FMC_NAND_MEM_BUS_WIDTH_8)
{
hnand->Config.PageSize = hnand->Config.PageSize / 2U;
}
else
{
/* Do nothing */
/* Keep the same PageSize for FMC_NAND_MEM_BUS_WIDTH_16*/
}
/* Get Data into Buffer */
for (index = 0U; index < hnand->Config.PageSize; index++)
{
@@ -1074,6 +1085,17 @@ HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_Addres
}
}
/* Calculate PageSize */
if (hnand->Init.MemoryDataWidth == FMC_NAND_MEM_BUS_WIDTH_8)
{
hnand->Config.PageSize = hnand->Config.PageSize / 2U;
}
else
{
/* Do nothing */
/* Keep the same PageSize for FMC_NAND_MEM_BUS_WIDTH_16*/
}
/* Write data to memory */
for (index = 0U; index < hnand->Config.PageSize; index++)
{
@@ -2217,5 +2239,3 @@ uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand)
*/
#endif /* FMC_BANK3 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

40
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_nor.c
View File

@@ -6,6 +6,17 @@
* This file provides a generic firmware to drive NOR memories mounted
* as external device.
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -55,25 +66,25 @@
The compilation define USE_HAL_NOR_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Functions @ref HAL_NOR_RegisterCallback() to register a user callback,
Use Functions HAL_NOR_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) MspInitCallback : NOR MspInit.
(+) MspDeInitCallback : NOR MspDeInit.
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
Use function @ref HAL_NOR_UnRegisterCallback() to reset a callback to the default
Use function HAL_NOR_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function. It allows to reset following callbacks:
(+) MspInitCallback : NOR MspInit.
(+) MspDeInitCallback : NOR MspDeInit.
This function) takes as parameters the HAL peripheral handle and the Callback ID.
By default, after the @ref HAL_NOR_Init and if the state is HAL_NOR_STATE_RESET
By default, after the HAL_NOR_Init and if the state is HAL_NOR_STATE_RESET
all callbacks are reset to the corresponding legacy weak (surcharged) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
reset to the legacy weak (surcharged) functions in the @ref HAL_NOR_Init
and @ref HAL_NOR_DeInit only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the @ref HAL_NOR_Init and @ref HAL_NOR_DeInit
reset to the legacy weak (surcharged) functions in the HAL_NOR_Init
and HAL_NOR_DeInit only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the HAL_NOR_Init and HAL_NOR_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
@@ -81,8 +92,8 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_NOR_RegisterCallback before calling @ref HAL_NOR_DeInit
or @ref HAL_NOR_Init function.
using HAL_NOR_RegisterCallback before calling HAL_NOR_DeInit
or HAL_NOR_Init function.
When The compilation define USE_HAL_NOR_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
@@ -90,17 +101,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -1508,5 +1508,3 @@ HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Addres
*/
#endif /* FMC_BANK1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

91
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c
View File

@@ -4,16 +4,23 @@
* @author MCD Application Team
* @brief OPAMP HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the operational amplifiers (OPAMP1,...OPAMP6)
* peripheral:
* + OPAMP Configuration
* + OPAMP calibration
* Thanks to
* functionalities of the operational amplifiers peripheral:
* + Initialization/de-initialization functions
* + I/O operation functions
* + Peripheral Control functions
* + Peripheral State functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
================================================================================
##### OPAMP Peripheral Features #####
@@ -90,7 +97,7 @@
(#) Configure the OPAMP using HAL_OPAMP_Init() function:
(++) Select OPAMP_POWERMODE_HIGHSPEED
(++) Otherwise select OPAMP_POWERMODE_NORMAL
(++) Otherwise select OPAMP_POWERMODE_NORMALSPEED
*** Calibration ***
============================================
@@ -111,14 +118,14 @@
(++) The compilation define USE_HAL_OPAMP_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
(++) Use Functions @ref HAL_OPAMP_RegisterCallback() to register a user callback,
(++) Use Functions HAL_OPAMP_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+++) MspInitCallback : OPAMP MspInit.
(+++) MspDeInitCallback : OPAMP MspDeInit.
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
(++) Use function @ref HAL_OPAMP_UnRegisterCallback() to reset a callback to the default
(++) Use function HAL_OPAMP_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function. It allows to reset following callbacks:
(+++) MspInitCallback : OPAMP MspInit.
(+++) MspDeInitCallback : OPAMP MspDeInit.
@@ -167,17 +174,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/*
@@ -189,31 +185,43 @@
selected among the list shown by table below.
Table 1. OPAMPs inverting/non-inverting inputs for the STM32G4 devices:
+--------------------------------------------------------------------------------------------+
| | | OPAMP1 | OPAMP2 | OPAMP3 | OPAMP4 | OPAMP5 | OPAMP6 |
|-----------------|--------|----------|----------|----------|----------|----------|----------|
| | No conn| X | X | X | X | X | X |
| Inverting Input | VM0 | PA3 | PA5 | PB2 | PB10 | PB15 | PA1 |
| (1) | VM1 | PC5 | PC5 | PB10 | PD8 | PA3 | PB1 |
|-----------------|--------|----------|----------|----------|----------|----------|----------|
| | VP0 | PA1 | PA7 | PB0 | PB13 | PB14 | PB12 |
| Non Inverting | VP1 | PA3 | PB14 | PB13 | PD11 | PD12 | PD9 |
| Input | VP2 | PA7 | PB0 | PA1 | PB11 | PC3 | PB13 |
| | VP3 | DAC3_CH1 | PD14 | DAC3_CH2 | DAC4_CH1 | DAC4_CH2 | DAC3_CH1 |
+--------------------------------------------------------------------------------------------+
+-----------------------------------------------------------------------------------------------+
| | | OPAMP1 | OPAMP2 | OPAMP3 | OPAMP4 | OPAMP5 | OPAMP6 |
|-----------------|--------|----------|----------|-------------|----------|----------|----------|
| | No conn| X | X | X | X | X | X |
| Inverting Input | VM0 | PA3 | PA5 | PB2 | PB10 | PB15 | PA1 |
| (1) | VM1 | PC5 | PC5 | PB10 | PD8 | PA3 | PB1 |
|-----------------|--------|----------|----------|-------------|----------|----------|----------|
| | VP0 | PA1 | PA7 | PB0 | PB13 | PB14 | PB12 |
| Non Inverting | VP1 | PA3 | PB14 | PB13 | PD11 | PD12 | PD9 |
| Input | VP2 | PA7 | PB0 | PA1 | PB11 | PC3 | PB13 |
| | VP3 | DAC3_CH1 | PD14 | DAC3_CH2(2) | DAC4_CH1 | DAC4_CH2 | DAC3_CH1 |
+-----------------------------------------------------------------------------------------------+
(1): No connection in follower mode.
(2): Available for STM32G47x/ STM32G48x devices only
Table 2. OPAMPs outputs for the STM32G4 devices:
+--------------------------------------------------------------------------------+
| | | OPAMP1 | OPAMP2 | OPAMP3 | OPAMP4 | OPAMP5 | OPAMP6 |
|-----------------|--------|--------|--------|--------|--------|--------|--------|
| Output | | PA2 | PA6 | PB1 | PB12 | PA8 | PB11 |
|-----------------|--------|--------|--------|--------|--------|--------|--------+
| Internal output | | ADC1 | ADC2 | ADC2 | ADC5 | ADC5 | ADC4 |
| to ADCs | | CH13 | CH16 | CH18 | CH5 | CH3 | CH17 |
| | | | | ADC3 | | | |
| | | | | CH13 | | | |
|-----------------|--------|--------|--------|--------|--------|--------|--------+
+------------------------------------------------------------------------------------+
| | | OPAMP1 | OPAMP2 | OPAMP3 | OPAMP4 | OPAMP5 | OPAMP6 |
|-----------------|--------|--------|--------|----------|--------|--------|----------|
| Output | | PA2 | PA6 | PB1 | PB12 | PA8 | PB11 |
|-----------------|--------|--------|--------|----------|--------|--------|----------+
| Internal output | | ADC1 | ADC2 | ADC2 | ADC5 | ADC5 | ADC4 |
| to ADCs | | CH13 | CH16 | CH18 | CH5 | CH3 | CH17(2) |
| (1) | | | | ADC3 | | | ADC3 |
| | | | | CH13(2) | | | CH17(3) |
|-----------------|--------|--------|--------|----------|------ -|--------|----------|
| Internal output | | ADC1 | ADC2 | ADC3 | ADC4 | ADC5 | ADC1 |
| to ADCs input | | CH3 | CH3 | CH1(2) | CH3 | CH1 | CH14 |
| on GPIO | | | | ADC1 | ADC1 | | ADC2 |
| | | | | CH12 | CH11 | | CH14 |
+------------------------------------------------------------------------------------+
(1): This ADC channel is connected internally to the OPAMPx_VOUT when OPAINTOEN
bit is set.
In this case, the I/O on which the OPAMPx_VOUT is available, can be used for
another purpose.
(2): Available for STM32G47x/ STM32G48x devices only.
(3): Available for STM32G491/STM32G4A1 devices only.
*/
@@ -1192,4 +1200,3 @@ HAL_StatusTypeDef HAL_OPAMP_UnRegisterCallback(OPAMP_HandleTypeDef *hopamp, HAL_
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

15
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c
View File

@@ -5,8 +5,7 @@
* @brief Extended OPAMP HAL module driver.
*
* This file provides firmware functions to manage the following
* functionalities of the operational amplifiers (OPAMP1...OPAMP6)
* peripheral:
* functionalities of the operational amplifiers peripheral:
* + Extended Initialization and de-initialization functions
* + Extended Peripheral Control functions
*
@@ -14,13 +13,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -747,4 +745,3 @@ HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPA
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

206
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c
View File

@@ -10,6 +10,17 @@
* + Peripheral Control functions
* + Peripheral State functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -40,17 +51,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -88,8 +88,10 @@
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd);
#if (USE_USB_DOUBLE_BUFFER == 1U)
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal);
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal);
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/**
* @}
@@ -200,7 +202,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
hpcd->USB_Address = 0U;
hpcd->State = HAL_PCD_STATE_READY;
/* Activate LPM */
if (hpcd->Init.lpm_enable == 1U)
{
@@ -695,7 +697,8 @@ HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
/**
* @brief Unregister the USB PCD Iso OUT incomplete Callback
* USB PCD Iso OUT incomplete Callback is redirected to the weak HAL_PCD_ISOOUTIncompleteCallback() predefined callback
* USB PCD Iso OUT incomplete Callback is redirected
* to the weak HAL_PCD_ISOOUTIncompleteCallback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
*/
@@ -769,7 +772,8 @@ HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
/**
* @brief Unregister the USB PCD Iso IN incomplete Callback
* USB PCD Iso IN incomplete Callback is redirected to the weak HAL_PCD_ISOINIncompleteCallback() predefined callback
* USB PCD Iso IN incomplete Callback is redirected
* to the weak HAL_PCD_ISOINIncompleteCallback() predefined callback
* @param hpcd PCD handle
* @retval HAL status
*/
@@ -1003,14 +1007,18 @@ HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd)
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_CTR))
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
return;
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_RESET))
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
@@ -1021,19 +1029,25 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
return;
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_PMAOVR))
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
return;
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ERR))
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
return;
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_WKUP))
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LPMODE);
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
@@ -1055,9 +1069,11 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
return;
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SUSP))
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
{
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
@@ -1072,10 +1088,12 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
#else
HAL_PCD_SuspendCallback(hpcd);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
}
/* Handle LPM Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_L1REQ))
if ((wIstr & USB_ISTR_L1REQ) == USB_ISTR_L1REQ)
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_L1REQ);
if (hpcd->LPM_State == LPM_L0)
@@ -1100,9 +1118,11 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
HAL_PCD_SuspendCallback(hpcd);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
return;
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SOF))
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
@@ -1111,12 +1131,16 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
#else
HAL_PCD_SOFCallback(hpcd);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ESOF))
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
return;
}
}
@@ -1669,7 +1693,10 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd)
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
PCD_EPTypeDef *ep;
uint16_t count, wIstr, wEPVal, TxByteNbre;
uint16_t count;
uint16_t wIstr;
uint16_t wEPVal;
uint16_t TxPctSize;
uint8_t epindex;
/* stay in loop while pending interrupts */
@@ -1789,6 +1816,7 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
}
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* manage double buffer bulk out */
@@ -1799,7 +1827,7 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
{
@@ -1823,6 +1851,8 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
ep->xfer_buff += count;
@@ -1840,7 +1870,6 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
(void) USB_EPStartXfer(hpcd->Instance, ep);
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
@@ -1850,43 +1879,73 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
/* Manage Bulk Single Buffer Transaction */
if ((ep->type == EP_TYPE_BULK) && ((wEPVal & USB_EP_KIND) == 0U))
if (ep->type != EP_TYPE_BULK)
{
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
ep->xfer_len = 0U;
if (ep->xfer_len > TxByteNbre)
#if (USE_USB_DOUBLE_BUFFER == 1U)
if (ep->doublebuffer != 0U)
{
ep->xfer_len -= TxByteNbre;
}
else
{
ep->xfer_len = 0U;
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
{
/* TX COMPLETE */
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
HAL_PCD_DataInStageCallback(hpcd, ep->num);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxByteNbre;
ep->xfer_count += TxByteNbre;
(void)USB_EPStartXfer(hpcd->Instance, ep);
}
}
/* Double Buffer Iso/bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
/* Manage Bulk Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
if (ep->xfer_len > TxPctSize)
{
ep->xfer_len -= TxPctSize;
}
else
{
ep->xfer_len = 0U;
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxPctSize;
ep->xfer_count += TxPctSize;
(void)USB_EPStartXfer(hpcd->Instance, ep);
}
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
}
}
}
@@ -1896,6 +1955,7 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/**
* @brief Manage double buffer bulk out transaction from ISR
* @param hpcd PCD handle
@@ -1932,7 +1992,7 @@ static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
/* Check if Buffer1 is in blocked state which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
}
if (count != 0U)
@@ -1964,7 +2024,7 @@ static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
}
if (count != 0U)
@@ -1988,22 +2048,23 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
uint32_t len;
uint16_t TxByteNbre;
uint16_t TxPctSize;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
{
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
if (ep->xfer_len > TxByteNbre)
if (ep->xfer_len > TxPctSize)
{
ep->xfer_len -= TxByteNbre;
ep->xfer_len -= TxPctSize;
}
else
{
ep->xfer_len = 0U;
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
{
@@ -2019,7 +2080,7 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
}
}
else /* Transfer is not yet Done */
@@ -2027,14 +2088,14 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
{
ep->xfer_buff += TxByteNbre;
ep->xfer_count += TxByteNbre;
ep->xfer_buff += TxPctSize;
ep->xfer_count += TxPctSize;
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
@@ -2044,7 +2105,7 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
}
else if (ep->xfer_len_db == 0U)
{
len = TxByteNbre;
len = TxPctSize;
ep->xfer_fill_db = 0U;
}
else
@@ -2066,11 +2127,11 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
if (ep->xfer_len >= TxByteNbre)
if (ep->xfer_len >= TxPctSize)
{
ep->xfer_len -= TxByteNbre;
ep->xfer_len -= TxPctSize;
}
else
{
@@ -2093,7 +2154,7 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
}
}
else /* Transfer is not yet Done */
@@ -2101,14 +2162,14 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
{
ep->xfer_buff += TxByteNbre;
ep->xfer_count += TxByteNbre;
ep->xfer_buff += TxPctSize;
ep->xfer_count += TxPctSize;
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
@@ -2118,7 +2179,7 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
}
else if (ep->xfer_len_db == 0U)
{
len = TxByteNbre;
len = TxPctSize;
ep->xfer_fill_db = 0U;
}
else
@@ -2142,6 +2203,7 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
return HAL_OK;
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
@@ -2158,5 +2220,3 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

17
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c
View File

@@ -10,13 +10,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -101,6 +100,7 @@ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
@@ -109,6 +109,7 @@ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
}
@@ -160,7 +161,7 @@ void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd)
USB_TypeDef *USBx = hpcd->Instance;
uint32_t tickstart = HAL_GetTick();
/* Wait Detect flag or a timeout is happen*/
/* Wait Detect flag or a timeout is happen */
while ((USBx->BCDR & USB_BCDR_DCDET) == 0U)
{
/* Check for the Timeout */
@@ -332,5 +333,3 @@ __weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef m
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

12
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
View File

@@ -11,13 +11,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -651,4 +650,3 @@ __weak void HAL_PWR_PVDCallback(void)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

12
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
View File

@@ -11,13 +11,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -1181,4 +1180,3 @@ void HAL_PWREx_DisableUCPDDeadBattery(void)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

60
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_qspi.c
View File

@@ -14,6 +14,17 @@
* + Errors management and abort functionality
*
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
===============================================================================
##### How to use this driver #####
@@ -133,7 +144,7 @@
The compilation define USE_HAL_QSPI_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Functions @ref HAL_QSPI_RegisterCallback() to register a user callback,
Use Functions HAL_QSPI_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) ErrorCallback : callback when error occurs.
(+) AbortCpltCallback : callback when abort is completed.
@@ -150,7 +161,7 @@
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
Use function @ref HAL_QSPI_UnRegisterCallback() to reset a callback to the default
Use function HAL_QSPI_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function. It allows to reset following callbacks:
(+) ErrorCallback : callback when error occurs.
(+) AbortCpltCallback : callback when abort is completed.
@@ -166,12 +177,12 @@
(+) MspDeInitCallback : QSPI MspDeInit.
This function) takes as parameters the HAL peripheral handle and the Callback ID.
By default, after the @ref HAL_QSPI_Init and if the state is HAL_QSPI_STATE_RESET
By default, after the HAL_QSPI_Init and if the state is HAL_QSPI_STATE_RESET
all callbacks are reset to the corresponding legacy weak (surcharged) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
reset to the legacy weak (surcharged) functions in the @ref HAL_QSPI_Init
and @ref HAL_QSPI_DeInit only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the @ref HAL_QSPI_Init and @ref HAL_QSPI_DeInit
reset to the legacy weak (surcharged) functions in the HAL_QSPI_Init
and HAL_QSPI_DeInit only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the HAL_QSPI_Init and HAL_QSPI_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
@@ -179,8 +190,8 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_QSPI_RegisterCallback before calling @ref HAL_QSPI_DeInit
or @ref HAL_QSPI_Init function.
using HAL_QSPI_RegisterCallback before calling HAL_QSPI_DeInit
or HAL_QSPI_Init function.
When The compilation define USE_HAL_QSPI_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
@@ -194,17 +205,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -314,9 +314,6 @@ HAL_StatusTypeDef HAL_QSPI_Init(QSPI_HandleTypeDef *hqspi)
assert_param(IS_QSPI_FLASH_ID(hqspi->Init.FlashID));
}
/* Process locked */
__HAL_LOCK(hqspi);
if(hqspi->State == HAL_QSPI_STATE_RESET)
{
/* Allocate lock resource and initialize it */
@@ -400,9 +397,6 @@ HAL_StatusTypeDef HAL_QSPI_DeInit(QSPI_HandleTypeDef *hqspi)
return HAL_ERROR;
}
/* Process locked */
__HAL_LOCK(hqspi);
/* Disable the QSPI Peripheral Clock */
__HAL_QSPI_DISABLE(hqspi);
@@ -728,7 +722,7 @@ void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi)
/* Change state of QSPI */
hqspi->State = HAL_QSPI_STATE_READY;
/* Error callback */
#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
hqspi->ErrorCallback(hqspi);
@@ -1359,10 +1353,10 @@ HAL_StatusTypeDef HAL_QSPI_Transmit_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pDat
{
/* Process unlocked */
__HAL_UNLOCK(hqspi);
/* Enable the QSPI transfer error Interrupt */
__HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE);
/* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */
SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
}
@@ -1507,10 +1501,10 @@ HAL_StatusTypeDef HAL_QSPI_Receive_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData
/* Process unlocked */
__HAL_UNLOCK(hqspi);
/* Enable the QSPI transfer error Interrupt */
__HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE);
/* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */
SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
}
@@ -2341,7 +2335,7 @@ HAL_StatusTypeDef HAL_QSPI_Abort_IT(QSPI_HandleTypeDef *hqspi)
{
/* Change state of QSPI */
hqspi->State = HAL_QSPI_STATE_READY;
/* Abort Complete callback */
#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
hqspi->AbortCpltCallback(hqspi);
@@ -2783,6 +2777,4 @@ static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uin
* @}
*/
#endif /* defined(QUADSPI) || defined(QUADSPI1) || defined(QUADSPI2) */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#endif /* defined(QUADSPI) */

78
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
View File

@@ -39,14 +39,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file in
* the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
******************************************************************************
*/
@@ -83,9 +81,13 @@
/** @defgroup RCC_Private_Macros RCC Private Macros
* @{
*/
#define MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
#define MCO1_GPIO_PORT GPIOA
#define MCO1_PIN GPIO_PIN_8
#define RCC_GET_MCO_GPIO_PIN(__RCC_MCOx__) ((__RCC_MCOx__) & GPIO_PIN_MASK)
#define RCC_GET_MCO_GPIO_AF(__RCC_MCOx__) (((__RCC_MCOx__) & RCC_MCO_GPIOAF_MASK) >> RCC_MCO_GPIOAF_POS)
#define RCC_GET_MCO_GPIO_INDEX(__RCC_MCOx__) (((__RCC_MCOx__) & RCC_MCO_GPIOPORT_MASK) >> RCC_MCO_GPIOPORT_POS)
#define RCC_GET_MCO_GPIO_PORT(__RCC_MCOx__) (AHB2PERIPH_BASE + ((0x00000400UL) * RCC_GET_MCO_GPIO_INDEX(__RCC_MCOx__)))
#define RCC_PLL_OSCSOURCE_CONFIG(__HAL_RCC_PLLSOURCE__) \
(MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__HAL_RCC_PLLSOURCE__)))
@@ -961,11 +963,16 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, ui
*/
/**
* @brief Select the clock source to output on MCO pin(PA8).
* @note PA8 should be configured in alternate function mode.
* @brief Select the clock source to output on MCO pin(PA8/PG10).
* @note PA8/PG10 should be configured in alternate function mode.
* @note The default configuration of the GPIOG pin 10 (PG10) is set to reset mode (NRST pin)
* and user shall set the NRST_MODE Bit in the FLASH OPTR register to be able to use it
* as an MCO pin.
* The @ref HAL_FLASHEx_OBProgram() API can be used to configure the NRST_MODE Bit value.
* @param RCC_MCOx specifies the output direction for the clock source.
* For STM32G4xx family this parameter can have only one value:
* @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8).
* @arg @ref RCC_MCO_PA8 Clock source to output on MCO1 pin(PA8).
* @arg @ref RCC_MCO_PG10 Clock source to output on MCO1 pin(PG10).
* @param RCC_MCOSource specifies the clock source to output.
* This parameter can be one of the following values:
* @arg @ref RCC_MCO1SOURCE_NOCLOCK MCO output disabled, no clock on MCO
@@ -987,29 +994,41 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, ui
*/
void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
{
GPIO_InitTypeDef GPIO_InitStruct;
GPIO_InitTypeDef gpio_initstruct;
uint32_t mcoindex;
uint32_t mco_gpio_index;
GPIO_TypeDef * mco_gpio_port;
/* Check the parameters */
assert_param(IS_RCC_MCO(RCC_MCOx));
assert_param(IS_RCC_MCODIV(RCC_MCODiv));
assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
/* Prevent unused argument(s) compilation warning if no assert_param check */
UNUSED(RCC_MCOx);
/* Common GPIO init parameters */
gpio_initstruct.Mode = GPIO_MODE_AF_PP;
gpio_initstruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
gpio_initstruct.Pull = GPIO_NOPULL;
/* MCO Clock Enable */
MCO1_CLK_ENABLE();
/* Get MCOx selection */
mcoindex = RCC_MCOx & RCC_MCO_INDEX_MASK;
/* Configure the MCO1 pin in alternate function mode */
GPIO_InitStruct.Pin = MCO1_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct);
/* Get MCOx GPIO Port */
mco_gpio_port = (GPIO_TypeDef *) RCC_GET_MCO_GPIO_PORT(RCC_MCOx);
/* Mask MCOSEL[] and MCOPRE[] bits then set MCO1 clock source and prescaler */
MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL | RCC_CFGR_MCOPRE), (RCC_MCOSource | RCC_MCODiv));
/* MCOx Clock Enable */
mco_gpio_index = RCC_GET_MCO_GPIO_INDEX(RCC_MCOx);
SET_BIT(RCC->AHB2ENR, (1UL << mco_gpio_index ));
/* Configure the MCOx pin in alternate function mode */
gpio_initstruct.Pin = RCC_GET_MCO_GPIO_PIN(RCC_MCOx);
gpio_initstruct.Alternate = RCC_GET_MCO_GPIO_AF(RCC_MCOx);
HAL_GPIO_Init(mco_gpio_port, &gpio_initstruct);
if (mcoindex == RCC_MCO1_INDEX)
{
assert_param(IS_RCC_MCODIV(RCC_MCODiv));
assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
/* Mask MCOSEL[] and MCOPRE[] bits then set MCO clock source and prescaler */
MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL | RCC_CFGR_MCOPRE), (RCC_MCOSource | RCC_MCODiv));
}
}
/**
@@ -1380,4 +1399,3 @@ static uint32_t RCC_GetSysClockFreqFromPLLSource(void)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

13
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
View File

@@ -12,14 +12,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file in
* the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
******************************************************************************
*/
@@ -1824,5 +1822,4 @@ __weak void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

198
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rng.c
View File

@@ -9,6 +9,17 @@
* + Peripheral Control functions
* + Peripheral State functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -31,8 +42,8 @@
allows the user to configure dynamically the driver callbacks.
[..]
Use Function @ref HAL_RNG_RegisterCallback() to register a user callback.
Function @ref HAL_RNG_RegisterCallback() allows to register following callbacks:
Use Function HAL_RNG_RegisterCallback() to register a user callback.
Function HAL_RNG_RegisterCallback() allows to register following callbacks:
(+) ErrorCallback : RNG Error Callback.
(+) MspInitCallback : RNG MspInit.
(+) MspDeInitCallback : RNG MspDeInit.
@@ -40,9 +51,9 @@
and a pointer to the user callback function.
[..]
Use function @ref HAL_RNG_UnRegisterCallback() to reset a callback to the default
Use function HAL_RNG_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function.
@ref HAL_RNG_UnRegisterCallback() takes as parameters the HAL peripheral handle,
HAL_RNG_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) ErrorCallback : RNG Error Callback.
@@ -51,16 +62,16 @@
[..]
For specific callback ReadyDataCallback, use dedicated register callbacks:
respectively @ref HAL_RNG_RegisterReadyDataCallback() , @ref HAL_RNG_UnRegisterReadyDataCallback().
respectively HAL_RNG_RegisterReadyDataCallback() , HAL_RNG_UnRegisterReadyDataCallback().
[..]
By default, after the @ref HAL_RNG_Init() and when the state is HAL_RNG_STATE_RESET
By default, after the HAL_RNG_Init() and when the state is HAL_RNG_STATE_RESET
all callbacks are set to the corresponding weak (surcharged) functions:
example @ref HAL_RNG_ErrorCallback().
example HAL_RNG_ErrorCallback().
Exception done for MspInit and MspDeInit functions that are respectively
reset to the legacy weak (surcharged) functions in the @ref HAL_RNG_Init()
and @ref HAL_RNG_DeInit() only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the @ref HAL_RNG_Init() and @ref HAL_RNG_DeInit()
reset to the legacy weak (surcharged) functions in the HAL_RNG_Init()
and HAL_RNG_DeInit() only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the HAL_RNG_Init() and HAL_RNG_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
[..]
@@ -69,8 +80,8 @@
in HAL_RNG_STATE_READY or HAL_RNG_STATE_RESET state, thus registered (user)
MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_RNG_RegisterCallback() before calling @ref HAL_RNG_DeInit()
or @ref HAL_RNG_Init() function.
using HAL_RNG_RegisterCallback() before calling HAL_RNG_DeInit()
or HAL_RNG_Init() function.
[..]
When The compilation define USE_HAL_RNG_REGISTER_CALLBACKS is set to 0 or
@@ -79,17 +90,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -129,8 +129,8 @@
*/
/** @addtogroup RNG_Exported_Functions_Group1
* @brief Initialization and configuration functions
*
* @brief Initialization and configuration functions
*
@verbatim
===============================================================================
##### Initialization and configuration functions #####
@@ -301,7 +301,8 @@ __weak void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng)
* @param pCallback pointer to the Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RNG_RegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_CallbackIDTypeDef CallbackID, pRNG_CallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_RNG_RegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_CallbackIDTypeDef CallbackID,
pRNG_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -318,44 +319,44 @@ HAL_StatusTypeDef HAL_RNG_RegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_Call
{
switch (CallbackID)
{
case HAL_RNG_ERROR_CB_ID :
hrng->ErrorCallback = pCallback;
break;
case HAL_RNG_ERROR_CB_ID :
hrng->ErrorCallback = pCallback;
break;
case HAL_RNG_MSPINIT_CB_ID :
hrng->MspInitCallback = pCallback;
break;
case HAL_RNG_MSPINIT_CB_ID :
hrng->MspInitCallback = pCallback;
break;
case HAL_RNG_MSPDEINIT_CB_ID :
hrng->MspDeInitCallback = pCallback;
break;
case HAL_RNG_MSPDEINIT_CB_ID :
hrng->MspDeInitCallback = pCallback;
break;
default :
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
default :
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else if (HAL_RNG_STATE_RESET == hrng->State)
{
switch (CallbackID)
{
case HAL_RNG_MSPINIT_CB_ID :
hrng->MspInitCallback = pCallback;
break;
case HAL_RNG_MSPINIT_CB_ID :
hrng->MspInitCallback = pCallback;
break;
case HAL_RNG_MSPDEINIT_CB_ID :
hrng->MspDeInitCallback = pCallback;
break;
case HAL_RNG_MSPDEINIT_CB_ID :
hrng->MspDeInitCallback = pCallback;
break;
default :
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
default :
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else
@@ -393,44 +394,44 @@ HAL_StatusTypeDef HAL_RNG_UnRegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_Ca
{
switch (CallbackID)
{
case HAL_RNG_ERROR_CB_ID :
hrng->ErrorCallback = HAL_RNG_ErrorCallback; /* Legacy weak ErrorCallback */
break;
case HAL_RNG_ERROR_CB_ID :
hrng->ErrorCallback = HAL_RNG_ErrorCallback; /* Legacy weak ErrorCallback */
break;
case HAL_RNG_MSPINIT_CB_ID :
hrng->MspInitCallback = HAL_RNG_MspInit; /* Legacy weak MspInit */
break;
case HAL_RNG_MSPINIT_CB_ID :
hrng->MspInitCallback = HAL_RNG_MspInit; /* Legacy weak MspInit */
break;
case HAL_RNG_MSPDEINIT_CB_ID :
hrng->MspDeInitCallback = HAL_RNG_MspDeInit; /* Legacy weak MspDeInit */
break;
case HAL_RNG_MSPDEINIT_CB_ID :
hrng->MspDeInitCallback = HAL_RNG_MspDeInit; /* Legacy weak MspDeInit */
break;
default :
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
default :
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else if (HAL_RNG_STATE_RESET == hrng->State)
{
switch (CallbackID)
{
case HAL_RNG_MSPINIT_CB_ID :
hrng->MspInitCallback = HAL_RNG_MspInit; /* Legacy weak MspInit */
break;
case HAL_RNG_MSPINIT_CB_ID :
hrng->MspInitCallback = HAL_RNG_MspInit; /* Legacy weak MspInit */
break;
case HAL_RNG_MSPDEINIT_CB_ID :
hrng->MspDeInitCallback = HAL_RNG_MspDeInit; /* Legacy weak MspInit */
break;
case HAL_RNG_MSPDEINIT_CB_ID :
hrng->MspDeInitCallback = HAL_RNG_MspDeInit; /* Legacy weak MspInit */
break;
default :
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
default :
/* Update the error code */
hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK;
/* Return error status */
status = HAL_ERROR;
break;
}
}
else
@@ -520,8 +521,8 @@ HAL_StatusTypeDef HAL_RNG_UnRegisterReadyDataCallback(RNG_HandleTypeDef *hrng)
*/
/** @addtogroup RNG_Exported_Functions_Group2
* @brief Peripheral Control functions
*
* @brief Peripheral Control functions
*
@verbatim
===============================================================================
##### Peripheral Control functions #####
@@ -538,11 +539,11 @@ HAL_StatusTypeDef HAL_RNG_UnRegisterReadyDataCallback(RNG_HandleTypeDef *hrng)
/**
* @brief Generates a 32-bit random number.
* @note This function checks value of RNG_FLAG_DRDY flag to know if valid
* random number is available in the DR register (RNG_FLAG_DRDY flag set
* random number is available in the DR register (RNG_FLAG_DRDY flag set
* whenever a random number is available through the RNG_DR register).
* After transitioning from 0 to 1 (random number available),
* RNG_FLAG_DRDY flag remains high until output buffer becomes empty after reading
* four words from the RNG_DR register, i.e. further function calls
* After transitioning from 0 to 1 (random number available),
* RNG_FLAG_DRDY flag remains high until output buffer becomes empty after reading
* four words from the RNG_DR register, i.e. further function calls
* will immediately return a new u32 random number (additional words are
* available and can be read by the application, till RNG_FLAG_DRDY flag remains high).
* @note When no more random number data is available in DR register, RNG_FLAG_DRDY
@@ -575,11 +576,15 @@ HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t
{
if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
{
hrng->State = HAL_RNG_STATE_READY;
hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
/* Process Unlocked */
__HAL_UNLOCK(hrng);
return HAL_ERROR;
/* New check to avoid false timeout detection in case of preemption */
if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
{
hrng->State = HAL_RNG_STATE_READY;
hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
/* Process Unlocked */
__HAL_UNLOCK(hrng);
return HAL_ERROR;
}
}
}
@@ -693,6 +698,8 @@ void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng)
/* Clear the clock error flag */
__HAL_RNG_CLEAR_IT(hrng, RNG_IT_CEI | RNG_IT_SEI);
return;
}
/* Check RNG data ready interrupt occurred */
@@ -738,7 +745,7 @@ uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng)
* @note When RNG_FLAG_DRDY flag value is set, first random number has been read
* from DR register in IRQ Handler and is provided as callback parameter.
* Depending on valid data available in the conditioning output buffer,
* additional words can be read by the application from DR register till
* additional words can be read by the application from DR register till
* DRDY bit remains high.
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
@@ -775,8 +782,8 @@ __weak void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng)
/** @addtogroup RNG_Exported_Functions_Group3
* @brief Peripheral State functions
*
* @brief Peripheral State functions
*
@verbatim
===============================================================================
##### Peripheral State functions #####
@@ -804,7 +811,7 @@ HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng)
* @brief Return the RNG handle error code.
* @param hrng: pointer to a RNG_HandleTypeDef structure.
* @retval RNG Error Code
*/
*/
uint32_t HAL_RNG_GetError(RNG_HandleTypeDef *hrng)
{
/* Return RNG Error Code */
@@ -830,4 +837,3 @@ uint32_t HAL_RNG_GetError(RNG_HandleTypeDef *hrng)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

222
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c
View File

@@ -15,6 +15,17 @@
* + RTC Tamper and TimeStamp Pins Selection
* + Interrupts and flags management
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
===============================================================================
##### RTC Operating Condition #####
@@ -99,10 +110,10 @@
[..]
The compilation define USE_RTC_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Function @ref HAL_RTC_RegisterCallback() to register an interrupt callback.
Use Function HAL_RTC_RegisterCallback() to register an interrupt callback.
[..]
Function @ref HAL_RTC_RegisterCallback() allows to register following callbacks:
Function HAL_RTC_RegisterCallback() allows to register following callbacks:
(+) AlarmAEventCallback : RTC Alarm A Event callback.
(+) AlarmBEventCallback : RTC Alarm B Event callback.
(+) TimeStampEventCallback : RTC TimeStamp Event callback.
@@ -146,9 +157,9 @@
and a pointer to the user callback function.
[..]
Use function @ref HAL_RTC_UnRegisterCallback() to reset a callback to the default
Use function HAL_RTC_UnRegisterCallback() to reset a callback to the default
weak function.
@ref HAL_RTC_UnRegisterCallback() takes as parameters the HAL peripheral handle,
HAL_RTC_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) AlarmAEventCallback : RTC Alarm A Event callback.
@@ -195,13 +206,13 @@
(+) MspDeInitCallback : RTC MspDeInit callback.
[..]
By default, after the @ref HAL_RTC_Init() and when the state is HAL_RTC_STATE_RESET,
By default, after the HAL_RTC_Init() and when the state is HAL_RTC_STATE_RESET,
all callbacks are set to the corresponding weak functions :
examples @ref AlarmAEventCallback(), @ref TimeStampEventCallback().
examples AlarmAEventCallback(), TimeStampEventCallback().
Exception done for MspInit and MspDeInit callbacks that are reset to the legacy weak function
in the @ref HAL_RTC_Init()/@ref HAL_RTC_DeInit() only when these callbacks are null
in the HAL_RTC_Init()/HAL_RTC_DeInit() only when these callbacks are null
(not registered beforehand).
If not, MspInit or MspDeInit are not null, @ref HAL_RTC_Init()/@ref HAL_RTC_DeInit()
If not, MspInit or MspDeInit are not null, HAL_RTC_Init()/HAL_RTC_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
[..]
@@ -210,8 +221,8 @@
in HAL_RTC_STATE_READY or HAL_RTC_STATE_RESET state,
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_RTC_RegisterCallback() before calling @ref HAL_RTC_DeInit()
or @ref HAL_RTC_Init() function.
using HAL_RTC_RegisterCallback() before calling HAL_RTC_DeInit()
or HAL_RTC_Init() function.
[..]
When The compilation define USE_HAL_RTC_REGISTER_CALLBACKS is set to 0 or
@@ -220,16 +231,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -380,19 +381,19 @@ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc)
if (status == HAL_OK)
{
/* Clear RTC_CR FMT, OSEL and POL Bits */
CLEAR_BIT(RTC->CR, (RTC_CR_FMT | RTC_CR_POL | RTC_CR_OSEL | RTC_CR_TAMPOE));
CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_FMT | RTC_CR_POL | RTC_CR_OSEL | RTC_CR_TAMPOE));
/* Set RTC_CR register */
SET_BIT(RTC->CR, (hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity));
SET_BIT(hrtc->Instance->CR, (hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity));
/* Configure the RTC PRER */
WRITE_REG(RTC->PRER, ((hrtc->Init.SynchPrediv) | (hrtc->Init.AsynchPrediv << RTC_PRER_PREDIV_A_Pos)));
WRITE_REG(hrtc->Instance->PRER, ((hrtc->Init.SynchPrediv) | (hrtc->Init.AsynchPrediv << RTC_PRER_PREDIV_A_Pos)));
/* Exit Initialization mode */
status = RTC_ExitInitMode(hrtc);
if (status == HAL_OK)
{
MODIFY_REG(RTC->CR, \
MODIFY_REG(hrtc->Instance->CR, \
RTC_CR_TAMPALRM_PU | RTC_CR_TAMPALRM_TYPE | RTC_CR_OUT2EN, \
hrtc->Init.OutPutPullUp | hrtc->Init.OutPutType | hrtc->Init.OutPutRemap);
}
@@ -437,21 +438,21 @@ HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc)
else
{
/* Reset all RTC CR register bits */
CLEAR_REG(RTC->CR);
WRITE_REG(RTC->DR, (uint32_t)(RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0));
CLEAR_REG(RTC->TR);
WRITE_REG(RTC->WUTR, RTC_WUTR_WUT);
WRITE_REG(RTC->PRER, ((uint32_t)(RTC_PRER_PREDIV_A | 0xFFU)));
CLEAR_REG(RTC->ALRMAR);
CLEAR_REG(RTC->ALRMBR);
CLEAR_REG(RTC->SHIFTR);
CLEAR_REG(RTC->CALR);
CLEAR_REG(RTC->ALRMASSR);
CLEAR_REG(RTC->ALRMBSSR);
WRITE_REG(RTC->SCR, RTC_SCR_CITSF | RTC_SCR_CTSOVF | RTC_SCR_CTSF | RTC_SCR_CWUTF | RTC_SCR_CALRBF | RTC_SCR_CALRAF);
CLEAR_REG(hrtc->Instance->CR);
WRITE_REG(hrtc->Instance->DR, (uint32_t)(RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0));
CLEAR_REG(hrtc->Instance->TR);
WRITE_REG(hrtc->Instance->WUTR, RTC_WUTR_WUT);
WRITE_REG(hrtc->Instance->PRER, ((uint32_t)(RTC_PRER_PREDIV_A | 0xFFU)));
CLEAR_REG(hrtc->Instance->ALRMAR);
CLEAR_REG(hrtc->Instance->ALRMBR);
CLEAR_REG(hrtc->Instance->SHIFTR);
CLEAR_REG(hrtc->Instance->CALR);
CLEAR_REG(hrtc->Instance->ALRMASSR);
CLEAR_REG(hrtc->Instance->ALRMBSSR);
WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CITSF | RTC_SCR_CTSOVF | RTC_SCR_CTSF | RTC_SCR_CWUTF | RTC_SCR_CALRBF | RTC_SCR_CALRAF);
/* Exit initialization mode */
CLEAR_BIT(RTC->ICSR, RTC_ICSR_INIT);
CLEAR_BIT(hrtc->Instance->ICSR, RTC_ICSR_INIT);
status = HAL_RTC_WaitForSynchro(hrtc);
@@ -877,7 +878,7 @@ HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim
{
if (Format == RTC_FORMAT_BIN)
{
if (READ_BIT(RTC->CR, RTC_CR_FMT) != 0U)
if (READ_BIT(hrtc->Instance->CR, RTC_CR_FMT) != 0U)
{
assert_param(IS_RTC_HOUR12(sTime->Hours));
assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
@@ -897,7 +898,7 @@ HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim
}
else
{
if (READ_BIT(RTC->CR, RTC_CR_FMT) != 0U)
if (READ_BIT(hrtc->Instance->CR, RTC_CR_FMT) != 0U)
{
assert_param(IS_RTC_HOUR12(RTC_Bcd2ToByte(sTime->Hours)));
assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
@@ -916,13 +917,13 @@ HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim
}
/* Set the RTC_TR register */
WRITE_REG(RTC->TR, (tmpreg & RTC_TR_RESERVED_MASK));
WRITE_REG(hrtc->Instance->TR, (tmpreg & RTC_TR_RESERVED_MASK));
/* This interface is deprecated. To manage Daylight Saving Time, please use HAL_RTC_DST_xxx functions */
CLEAR_BIT(RTC->CR, RTC_CR_BKP);
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_BKP);
/* This interface is deprecated. To manage Daylight Saving Time, please use HAL_RTC_DST_xxx functions */
SET_BIT(RTC->CR, (sTime->DayLightSaving | sTime->StoreOperation));
SET_BIT(hrtc->Instance->CR, (sTime->DayLightSaving | sTime->StoreOperation));
/* Exit Initialization mode */
status = RTC_ExitInitMode(hrtc);
@@ -964,19 +965,17 @@ HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim
{
uint32_t tmpreg;
UNUSED(hrtc);
/* Check the parameters */
assert_param(IS_RTC_FORMAT(Format));
/* Get subseconds structure field from the corresponding register*/
sTime->SubSeconds = READ_REG(RTC->SSR);
sTime->SubSeconds = READ_REG(hrtc->Instance->SSR);
/* Get SecondFraction structure field from the corresponding register field*/
sTime->SecondFraction = (uint32_t)(READ_REG(RTC->PRER) & RTC_PRER_PREDIV_S);
sTime->SecondFraction = (uint32_t)(READ_REG(hrtc->Instance->PRER) & RTC_PRER_PREDIV_S);
/* Get the TR register */
tmpreg = (uint32_t)(READ_REG(RTC->TR) & RTC_TR_RESERVED_MASK);
tmpreg = (uint32_t)(READ_REG(hrtc->Instance->TR) & RTC_TR_RESERVED_MASK);
/* Fill the structure fields with the read parameters */
sTime->Hours = (uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> RTC_TR_HU_Pos);
@@ -1057,7 +1056,7 @@ HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDat
if (status == HAL_OK)
{
/* Set the RTC_DR register */
WRITE_REG(RTC->DR, (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK));
WRITE_REG(hrtc->Instance->DR, (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK));
/* Exit Initialization mode */
status = RTC_ExitInitMode(hrtc);
@@ -1094,13 +1093,11 @@ HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDat
{
uint32_t datetmpreg;
UNUSED(hrtc);
/* Check the parameters */
assert_param(IS_RTC_FORMAT(Format));
/* Get the DR register */
datetmpreg = (uint32_t)(READ_REG(RTC->DR) & RTC_DR_RESERVED_MASK);
datetmpreg = (uint32_t)(READ_REG(hrtc->Instance->DR) & RTC_DR_RESERVED_MASK);
/* Fill the structure fields with the read parameters */
sDate->Year = (uint8_t)((datetmpreg & (RTC_DR_YT | RTC_DR_YU)) >> RTC_DR_YU_Pos);
@@ -1167,7 +1164,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
if (Format == RTC_FORMAT_BIN)
{
if (READ_BIT(RTC->CR, RTC_CR_FMT) != 0U)
if (READ_BIT(hrtc->Instance->CR, RTC_CR_FMT) != 0U)
{
assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
@@ -1200,7 +1197,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
}
else /* Format BCD */
{
if (READ_BIT(RTC->CR, RTC_CR_FMT) != 0U)
if (READ_BIT(hrtc->Instance->CR, RTC_CR_FMT) != 0U)
{
assert_param(IS_RTC_HOUR12(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
@@ -1245,14 +1242,14 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
{
/* Disable the Alarm A interrupt */
/* In case of interrupt mode is used, the interrupt source must disabled */
CLEAR_BIT(RTC->CR, (RTC_CR_ALRAE | RTC_CR_ALRAIE));
CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_ALRAE | RTC_CR_ALRAIE));
/* Clear flag alarm A */
WRITE_REG(RTC->SCR, RTC_SCR_CALRAF);
WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRAF);
tickstart = HAL_GetTick();
/* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
while (READ_BIT(RTC->ICSR, RTC_ICSR_ALRAWF) == 0U)
while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_ALRAWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -1268,24 +1265,24 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
}
}
WRITE_REG(RTC->ALRMAR, tmpreg);
WRITE_REG(hrtc->Instance->ALRMAR, tmpreg);
/* Configure the Alarm A Sub Second register */
WRITE_REG(RTC->ALRMASSR, subsecondtmpreg);
WRITE_REG(hrtc->Instance->ALRMASSR, subsecondtmpreg);
/* Configure the Alarm state: Enable Alarm */
SET_BIT(RTC->CR, RTC_CR_ALRAE);
SET_BIT(hrtc->Instance->CR, RTC_CR_ALRAE);
}
else
{
/* Disable the Alarm B interrupt */
/* In case of interrupt mode is used, the interrupt source must disabled */
CLEAR_BIT(RTC->CR, (RTC_CR_ALRBE | RTC_CR_ALRBIE));
CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_ALRBE | RTC_CR_ALRBIE));
/* Clear flag alarm B */
WRITE_REG(RTC->SCR, RTC_SCR_CALRBF);
WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRBF);
tickstart = HAL_GetTick();
/* Wait till RTC ALRBWF flag is set and if Time out is reached exit */
while (READ_BIT(RTC->ICSR, RTC_ICSR_ALRBWF) == 0U)
while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_ALRBWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -1301,11 +1298,11 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
}
}
WRITE_REG(RTC->ALRMBR, tmpreg);
WRITE_REG(hrtc->Instance->ALRMBR, tmpreg);
/* Configure the Alarm B Sub Second register */
WRITE_REG(RTC->ALRMBSSR, subsecondtmpreg);
WRITE_REG(hrtc->Instance->ALRMBSSR, subsecondtmpreg);
/* Configure the Alarm state: Enable Alarm */
SET_BIT(RTC->CR, RTC_CR_ALRBE);
SET_BIT(hrtc->Instance->CR, RTC_CR_ALRBE);
}
/* Enable the write protection for RTC registers */
@@ -1354,7 +1351,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef
if (Format == RTC_FORMAT_BIN)
{
if (READ_BIT(RTC->CR, RTC_CR_FMT) != 0U)
if (READ_BIT(hrtc->Instance->CR, RTC_CR_FMT) != 0U)
{
assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
@@ -1387,7 +1384,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef
}
else /* Format BCD */
{
if (READ_BIT(RTC->CR, RTC_CR_FMT) != 0U)
if (READ_BIT(hrtc->Instance->CR, RTC_CR_FMT) != 0U)
{
assert_param(IS_RTC_HOUR12(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
@@ -1431,15 +1428,15 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef
if (sAlarm->Alarm == RTC_ALARM_A)
{
/* Disable the Alarm A interrupt */
CLEAR_BIT(RTC->CR, (RTC_CR_ALRAE | RTC_CR_ALRAIE));
CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_ALRAE | RTC_CR_ALRAIE));
/* Clear flag alarm A */
WRITE_REG(RTC->SCR, RTC_SCR_CALRAF);
WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRAF);
__HAL_RTC_ALARM_EXTI_CLEAR_IT();
tickstart = HAL_GetTick();
/* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
while (READ_BIT(RTC->ICSR, RTC_ICSR_ALRAWF) == 0U)
while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_ALRAWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -1455,24 +1452,24 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef
}
}
WRITE_REG(RTC->ALRMAR, tmpreg);
WRITE_REG(hrtc->Instance->ALRMAR, tmpreg);
/* Configure the Alarm A Sub Second register */
WRITE_REG(RTC->ALRMASSR, subsecondtmpreg);
WRITE_REG(hrtc->Instance->ALRMASSR, subsecondtmpreg);
/* Configure the Alarm interrupt : Enable Alarm */
SET_BIT(RTC->CR, (RTC_CR_ALRAE | RTC_CR_ALRAIE));
SET_BIT(hrtc->Instance->CR, (RTC_CR_ALRAE | RTC_CR_ALRAIE));
}
else
{
/* Disable the Alarm B interrupt */
CLEAR_BIT(RTC->CR, (RTC_CR_ALRBE | RTC_CR_ALRBIE));
CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_ALRBE | RTC_CR_ALRBIE));
/* Clear flag alarm B */
WRITE_REG(RTC->SCR, RTC_SCR_CALRBF);
WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRBF);
__HAL_RTC_ALARM_EXTI_CLEAR_IT();
tickstart = HAL_GetTick();
/* Wait till RTC ALRBWF flag is set and if Time out is reached exit */
while (READ_BIT(RTC->ICSR, RTC_ICSR_ALRBWF) == 0U)
while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_ALRBWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -1488,11 +1485,11 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef
}
}
WRITE_REG(RTC->ALRMBR, tmpreg);
WRITE_REG(hrtc->Instance->ALRMBR, tmpreg);
/* Configure the Alarm B Sub Second register */
WRITE_REG(RTC->ALRMBSSR, subsecondtmpreg);
WRITE_REG(hrtc->Instance->ALRMBSSR, subsecondtmpreg);
/* Configure the Alarm B interrupt : Enable Alarm */
SET_BIT(RTC->CR, (RTC_CR_ALRBE | RTC_CR_ALRBIE));
SET_BIT(hrtc->Instance->CR, (RTC_CR_ALRBE | RTC_CR_ALRBIE));
}
/* RTC Alarm Interrupt Configuration: EXTI configuration */
@@ -1539,13 +1536,13 @@ HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alar
{
/* AlarmA */
/* In case of interrupt mode is used, the interrupt source must disabled */
CLEAR_BIT(RTC->CR, RTC_CR_ALRAE | RTC_CR_ALRAIE);
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_ALRAE | RTC_CR_ALRAIE);
__HAL_RTC_ALARM_EXTI_CLEAR_IT();
tickstart = HAL_GetTick();
/* Wait till RTC ALRxWF flag is set and if Time out is reached exit */
while (READ_BIT(RTC->ICSR, RTC_ICSR_ALRAWF) == 0U)
while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_ALRAWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -1565,13 +1562,13 @@ HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alar
{
/* AlarmB */
/* In case of interrupt mode is used, the interrupt source must disabled */
CLEAR_BIT(RTC->CR, RTC_CR_ALRBE | RTC_CR_ALRBIE);
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_ALRBE | RTC_CR_ALRBIE);
__HAL_RTC_ALARM_EXTI_CLEAR_IT();
tickstart = HAL_GetTick();
/* Wait till RTC ALRxWF flag is set and if Time out is reached exit */
while (READ_BIT(RTC->ICSR, RTC_ICSR_ALRBWF) == 0U)
while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_ALRBWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -1616,8 +1613,6 @@ HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
{
uint32_t tmpreg, subsecondtmpreg;
UNUSED(hrtc);
/* Check the parameters */
assert_param(IS_RTC_FORMAT(Format));
assert_param(IS_RTC_ALARM(Alarm));
@@ -1627,8 +1622,8 @@ HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
/* AlarmA */
sAlarm->Alarm = RTC_ALARM_A;
tmpreg = READ_REG(RTC->ALRMAR);
subsecondtmpreg = (uint32_t)(READ_REG(RTC->ALRMASSR) & RTC_ALRMASSR_SS);
tmpreg = READ_REG(hrtc->Instance->ALRMAR);
subsecondtmpreg = (uint32_t)(READ_REG(hrtc->Instance->ALRMASSR) & RTC_ALRMASSR_SS);
/* Fill the structure with the read parameters */
sAlarm->AlarmTime.Hours = (uint8_t)((tmpreg & (RTC_ALRMAR_HT | RTC_ALRMAR_HU)) >> RTC_ALRMAR_HU_Pos);
@@ -1644,8 +1639,8 @@ HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
{
sAlarm->Alarm = RTC_ALARM_B;
tmpreg = READ_REG(RTC->ALRMBR);
subsecondtmpreg = (uint32_t)(READ_REG(RTC->ALRMBSSR) & RTC_ALRMBSSR_SS);
tmpreg = READ_REG(hrtc->Instance->ALRMBR);
subsecondtmpreg = (uint32_t)(READ_REG(hrtc->Instance->ALRMBSSR) & RTC_ALRMBSSR_SS);
/* Fill the structure with the read parameters */
sAlarm->AlarmTime.Hours = (uint8_t)((tmpreg & (RTC_ALRMBR_HT | RTC_ALRMBR_HU)) >> RTC_ALRMBR_HU_Pos);
@@ -1677,12 +1672,12 @@ HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA
void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc)
{
/* Get interrupt status */
uint32_t tmp = READ_REG(RTC->MISR);
uint32_t tmp = READ_REG(hrtc->Instance->MISR);
if ((tmp & RTC_MISR_ALRAMF) != 0U)
{
/* Clear the AlarmA interrupt pending bit */
WRITE_REG(RTC->SCR, RTC_SCR_CALRAF);
WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRAF);
__HAL_RTC_ALARM_EXTI_CLEAR_IT();
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
@@ -1696,7 +1691,7 @@ void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc)
if ((tmp & RTC_MISR_ALRBMF) != 0U)
{
/* Clear the AlarmB interrupt pending bit */
WRITE_REG(RTC->SCR, RTC_SCR_CALRBF);
WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRBF);
__HAL_RTC_ALARM_EXTI_CLEAR_IT();
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
@@ -1737,7 +1732,7 @@ HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t T
uint32_t tickstart = HAL_GetTick();
while (READ_BIT(RTC->SR, RTC_SR_ALRAF) == 0U)
while (READ_BIT(hrtc->Instance->SR, RTC_SR_ALRAF) == 0U)
{
if (Timeout != HAL_MAX_DELAY)
{
@@ -1754,7 +1749,7 @@ HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t T
}
/* Clear the Alarm interrupt pending bit */
WRITE_REG(RTC->SCR, RTC_SCR_CALRAF);
WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRAF);
/* Change RTC state */
hrtc->State = HAL_RTC_STATE_READY;
@@ -1799,15 +1794,13 @@ HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef *hrtc)
{
uint32_t tickstart;
UNUSED(hrtc);
/* Clear RSF flag */
CLEAR_BIT(RTC->ICSR, RTC_ICSR_RSF);
CLEAR_BIT(hrtc->Instance->ICSR, RTC_ICSR_RSF);
tickstart = HAL_GetTick();
/* Wait the registers to be synchronised */
while (READ_BIT(RTC->ICSR, RTC_ICSR_RSF) == 0U)
while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_RSF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -1869,17 +1862,15 @@ HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef *hrtc)
uint32_t tickstart;
HAL_StatusTypeDef status = HAL_OK;
UNUSED(hrtc);
/* Check if the Initialization mode is set */
if (READ_BIT(RTC->ICSR, RTC_ICSR_INITF) == 0U)
if (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_INITF) == 0U)
{
/* Set the Initialization mode */
SET_BIT(RTC->ICSR, RTC_ICSR_INIT);
SET_BIT(hrtc->Instance->ICSR, RTC_ICSR_INIT);
tickstart = HAL_GetTick();
/* Wait till RTC is in INIT state and if Time out is reached exit */
while ((READ_BIT(RTC->ICSR, RTC_ICSR_INITF) == 0U) && (status != HAL_TIMEOUT))
while ((READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_INITF) == 0U) && (status != HAL_TIMEOUT))
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -1903,10 +1894,10 @@ HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc)
HAL_StatusTypeDef status = HAL_OK;
/* Exit Initialization mode */
CLEAR_BIT(RTC->ICSR, RTC_ICSR_INIT);
CLEAR_BIT(hrtc->Instance->ICSR, RTC_ICSR_INIT);
/* If CR_BYPSHAD bit = 0, wait for synchro */
if (READ_BIT(RTC->CR, RTC_CR_BYPSHAD) == 0U)
if (READ_BIT(hrtc->Instance->CR, RTC_CR_BYPSHAD) == 0U)
{
if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
{
@@ -1917,14 +1908,14 @@ HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc)
else /* WA 2.9.6 Calendar initialization may fail in case of consecutive INIT mode entry */
{
/* Clear BYPSHAD bit */
CLEAR_BIT(RTC->CR, RTC_CR_BYPSHAD);
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_BYPSHAD);
if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
{
hrtc->State = HAL_RTC_STATE_TIMEOUT;
status = HAL_TIMEOUT;
}
/* Restore BYPSHAD bit */
SET_BIT(RTC->CR, RTC_CR_BYPSHAD);
SET_BIT(hrtc->Instance->CR, RTC_CR_BYPSHAD);
}
return status;
@@ -1971,9 +1962,8 @@ uint8_t RTC_Bcd2ToByte(uint8_t Value)
*/
void HAL_RTC_DST_Add1Hour(RTC_HandleTypeDef *hrtc)
{
UNUSED(hrtc);
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
SET_BIT(RTC->CR, RTC_CR_ADD1H);
SET_BIT(hrtc->Instance->CR, RTC_CR_ADD1H);
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
}
@@ -1985,9 +1975,8 @@ void HAL_RTC_DST_Add1Hour(RTC_HandleTypeDef *hrtc)
*/
void HAL_RTC_DST_Sub1Hour(RTC_HandleTypeDef *hrtc)
{
UNUSED(hrtc);
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
SET_BIT(RTC->CR, RTC_CR_SUB1H);
SET_BIT(hrtc->Instance->CR, RTC_CR_SUB1H);
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
}
@@ -1999,9 +1988,8 @@ void HAL_RTC_DST_Sub1Hour(RTC_HandleTypeDef *hrtc)
*/
void HAL_RTC_DST_SetStoreOperation(RTC_HandleTypeDef *hrtc)
{
UNUSED(hrtc);
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
SET_BIT(RTC->CR, RTC_CR_BKP);
SET_BIT(hrtc->Instance->CR, RTC_CR_BKP);
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
}
@@ -2012,9 +2000,8 @@ void HAL_RTC_DST_SetStoreOperation(RTC_HandleTypeDef *hrtc)
*/
void HAL_RTC_DST_ClearStoreOperation(RTC_HandleTypeDef *hrtc)
{
UNUSED(hrtc);
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
CLEAR_BIT(RTC->CR, RTC_CR_BKP);
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_BKP);
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
}
@@ -2025,8 +2012,7 @@ void HAL_RTC_DST_ClearStoreOperation(RTC_HandleTypeDef *hrtc)
*/
uint32_t HAL_RTC_DST_ReadStoreOperation(RTC_HandleTypeDef *hrtc)
{
UNUSED(hrtc);
return READ_BIT(RTC->CR, RTC_CR_BKP);
return READ_BIT(hrtc->Instance->CR, RTC_CR_BKP);
}
/**
@@ -2041,5 +2027,3 @@ uint32_t HAL_RTC_DST_ReadStoreOperation(RTC_HandleTypeDef *hrtc)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

145
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c
View File

@@ -11,6 +11,17 @@
* + Extended Control functions
* + Extended RTC features functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -89,17 +100,7 @@
(+) To read the RTC Backup Data registers, use the HAL_RTCEx_BKUPRead()
function.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
@endverbatim
******************************************************************************
*/
@@ -175,13 +176,13 @@ HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeS
hrtc->State = HAL_RTC_STATE_BUSY;
/* Get the RTC_CR register and clear the bits to be configured */
CLEAR_BIT(RTC->CR, (RTC_CR_TSEDGE | RTC_CR_TSE));
CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_TSEDGE | RTC_CR_TSE));
/* Disable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
/* Configure the Time Stamp TSEDGE and Enable bits */
SET_BIT(RTC->CR, (uint32_t)TimeStampEdge | RTC_CR_TSE);
SET_BIT(hrtc->Instance->CR, (uint32_t)TimeStampEdge | RTC_CR_TSE);
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
@@ -229,16 +230,16 @@ HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t Ti
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
/* Get the RTC_CR register and clear the bits to be configured */
CLEAR_BIT(RTC->CR, (RTC_CR_TSEDGE | RTC_CR_TSE | RTC_CR_TSIE));
CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_TSEDGE | RTC_CR_TSE | RTC_CR_TSIE));
/* Configure the Time Stamp TSEDGE before Enable bit to avoid unwanted TSF setting. */
SET_BIT(RTC->CR, (uint32_t)TimeStampEdge);
SET_BIT(hrtc->Instance->CR, (uint32_t)TimeStampEdge);
/* clear interrupt flag if any */
WRITE_REG(RTC->SCR, RTC_SCR_CITSF);
WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CITSF);
/* Enable IT timestamp */
SET_BIT(RTC->CR, (RTC_CR_TSE | RTC_CR_TSIE));
SET_BIT(hrtc->Instance->CR, (RTC_CR_TSE | RTC_CR_TSIE));
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
@@ -271,10 +272,10 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc)
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
/* clear event or interrupt flag */
WRITE_REG(RTC->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF));
WRITE_REG(hrtc->Instance->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF));
/* In case of interrupt mode is used, the interrupt source must disabled */
CLEAR_BIT(RTC->CR, (RTC_CR_TSEDGE | RTC_CR_TSE | RTC_CR_TSIE));
CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_TSEDGE | RTC_CR_TSE | RTC_CR_TSIE));
__HAL_RTC_TIMESTAMP_EXTI_CLEAR_IT();
@@ -306,7 +307,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetInternalTimeStamp(RTC_HandleTypeDef *hrtc)
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
/* Configure the internal Time Stamp Enable bits */
SET_BIT(RTC->CR, RTC_CR_ITSE);
SET_BIT(hrtc->Instance->CR, RTC_CR_ITSE);
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
@@ -336,7 +337,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateInternalTimeStamp(RTC_HandleTypeDef *hrtc)
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
/* Configure the internal Time Stamp Enable bits */
CLEAR_BIT(RTC->CR, RTC_CR_ITSE);
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_ITSE);
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
@@ -365,21 +366,19 @@ HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDe
{
uint32_t tmptime, tmpdate;
UNUSED(hrtc);
/* Check the parameters */
assert_param(IS_RTC_FORMAT(Format));
/* Get the TimeStamp time and date registers values */
tmptime = (uint32_t)READ_BIT(RTC->TSTR, RTC_TR_RESERVED_MASK);
tmpdate = (uint32_t)READ_BIT(RTC->TSDR, RTC_DR_RESERVED_MASK);
tmptime = (uint32_t)READ_BIT(hrtc->Instance->TSTR, RTC_TR_RESERVED_MASK);
tmpdate = (uint32_t)READ_BIT(hrtc->Instance->TSDR, RTC_DR_RESERVED_MASK);
/* Fill the Time structure fields with the read parameters */
sTimeStamp->Hours = (uint8_t)((tmptime & (RTC_TSTR_HT | RTC_TSTR_HU)) >> RTC_TSTR_HU_Pos);
sTimeStamp->Minutes = (uint8_t)((tmptime & (RTC_TSTR_MNT | RTC_TSTR_MNU)) >> RTC_TSTR_MNU_Pos);
sTimeStamp->Seconds = (uint8_t)((tmptime & (RTC_TSTR_ST | RTC_TSTR_SU)) >> RTC_TSTR_SU_Pos);
sTimeStamp->TimeFormat = (uint8_t)((tmptime & (RTC_TSTR_PM)) >> RTC_TSTR_PM_Pos);
sTimeStamp->SubSeconds = (uint32_t)READ_BIT(RTC->TSSSR, RTC_TSSSR_SS);
sTimeStamp->SubSeconds = (uint32_t)READ_BIT(hrtc->Instance->TSSSR, RTC_TSSSR_SS);
/* Fill the Date structure fields with the read parameters */
sTimeStampDate->Year = 0U;
@@ -402,7 +401,7 @@ HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDe
}
/* Clear the TIMESTAMP Flags */
WRITE_REG(RTC->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF));
WRITE_REG(hrtc->Instance->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF));
return HAL_OK;
}
@@ -432,7 +431,7 @@ void HAL_RTCEx_TimeStampIRQHandler(RTC_HandleTypeDef *hrtc)
/* Clear the EXTI Flag for RTC TimeStamp */
__HAL_RTC_TIMESTAMP_EXTI_CLEAR_FLAG();
__IO uint32_t misr = READ_REG(RTC->MISR);
__IO uint32_t misr = READ_REG(hrtc->Instance->MISR);
/* Get the TimeStamp interrupt source enable */
if ((misr & RTC_MISR_TSMF) != 0U)
@@ -449,12 +448,12 @@ void HAL_RTCEx_TimeStampIRQHandler(RTC_HandleTypeDef *hrtc)
{
/* internal Timestamp interrupt */
/* ITSF flag is set, TSF must be cleared together with ITSF (this will clear timestamp time and date registers) */
WRITE_REG(RTC->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF));
WRITE_REG(hrtc->Instance->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF));
}
else
{
/* Clear the TIMESTAMP interrupt pending bit (this will clear timestamp time and date registers) */
WRITE_REG(RTC->SCR, RTC_SCR_CTSF);
WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CTSF);
}
}
@@ -472,12 +471,12 @@ HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint3
{
uint32_t tickstart = HAL_GetTick();
while (READ_BIT(RTC->SR, RTC_SR_TSF) == 0U)
while (READ_BIT(hrtc->Instance->SR, RTC_SR_TSF) == 0U)
{
if (READ_BIT(RTC->SR, RTC_SR_TSOVF) != 0U)
if (READ_BIT(hrtc->Instance->SR, RTC_SR_TSOVF) != 0U)
{
/* Clear the TIMESTAMP OverRun Flag */
WRITE_REG(RTC->SCR, RTC_SCR_CTSOVF);
WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CTSOVF);
/* Change TIMESTAMP state */
hrtc->State = HAL_RTC_STATE_ERROR;
@@ -648,17 +647,17 @@ HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t
}
}
/* Configure the Wakeup Timer counter */
WRITE_REG(RTC->WUTR, (uint32_t)WakeUpCounter);
WRITE_REG(hrtc->Instance->WUTR, (uint32_t)WakeUpCounter);
/* Configure the clock source */
MODIFY_REG(RTC->CR, RTC_CR_WUCKSEL, (uint32_t)WakeUpClock);
MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL, (uint32_t)WakeUpClock);
/* RTC WakeUpTimer Interrupt Configuration: EXTI configuration */
__HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT();
__HAL_RTC_WAKEUPTIMER_EXTI_RISING_IT();
/* Configure the Interrupt in the RTC_CR register and Enable the Wakeup Timer */
SET_BIT(RTC->CR, (RTC_CR_WUTIE | RTC_CR_WUTE));
SET_BIT(hrtc->Instance->CR, (RTC_CR_WUTIE | RTC_CR_WUTE));
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
@@ -690,13 +689,13 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc)
/* Disable the Wakeup Timer */
/* In case of interrupt mode is used, the interrupt source must disabled */
CLEAR_BIT(RTC->CR, RTC_CR_WUTE | RTC_CR_WUTIE);
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE | RTC_CR_WUTIE);
__HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_IT();
tickstart = HAL_GetTick();
/* Wait till RTC WUTWF flag is set and if Time out is reached exit */
while (READ_BIT(RTC->ICSR, RTC_ICSR_WUTWF) == 0U)
while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_WUTWF) == 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -730,10 +729,8 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc)
*/
uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc)
{
UNUSED(hrtc);
/* Get the counter value */
return (uint32_t)(READ_BIT(RTC->WUTR, RTC_WUTR_WUT));
return (uint32_t)(READ_BIT(hrtc->Instance->WUTR, RTC_WUTR_WUT));
}
/**
@@ -744,10 +741,10 @@ uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc)
void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc)
{
/* Get the pending status of the WAKEUPTIMER Interrupt */
if (READ_BIT(RTC->SR, RTC_SR_WUTF) != 0U)
if (READ_BIT(hrtc->Instance->SR, RTC_SR_WUTF) != 0U)
{
/* Clear the WAKEUPTIMER interrupt pending bit */
WRITE_REG(RTC->SCR, RTC_SCR_CWUTF);
WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CWUTF);
__HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_IT();
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
@@ -789,7 +786,7 @@ HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uin
{
uint32_t tickstart = HAL_GetTick();
while (READ_BIT(RTC->SR, RTC_SR_WUTF) == 0U)
while (READ_BIT(hrtc->Instance->SR, RTC_SR_WUTF) == 0U)
{
if (Timeout != HAL_MAX_DELAY)
{
@@ -806,7 +803,7 @@ HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uin
}
/* Clear the WAKEUPTIMER Flag */
WRITE_REG(RTC->SCR, RTC_SCR_CWUTF);
WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CWUTF);
/* Change RTC state */
hrtc->State = HAL_RTC_STATE_READY;
@@ -885,12 +882,12 @@ HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef *hrtc, uint32_t Smo
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
/* check if a calibration is pending*/
if (READ_BIT(RTC->ICSR, RTC_ICSR_RECALPF) != 0U)
if (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_RECALPF) != 0U)
{
tickstart = HAL_GetTick();
/* check if a calibration is pending*/
while (READ_BIT(RTC->ICSR, RTC_ICSR_RECALPF) != 0U)
while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_RECALPF) != 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -909,7 +906,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef *hrtc, uint32_t Smo
}
/* Configure the Smooth calibration settings */
MODIFY_REG(RTC->CALR, (RTC_CALR_CALP | RTC_CALR_CALW8 | RTC_CALR_CALW16 | RTC_CALR_CALM),
MODIFY_REG(hrtc->Instance->CALR, (RTC_CALR_CALP | RTC_CALR_CALW8 | RTC_CALR_CALW16 | RTC_CALR_CALM),
(uint32_t)(SmoothCalibPeriod | SmoothCalibPlusPulses | SmoothCalibMinusPulsesValue));
@@ -956,7 +953,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef *hrtc, uint32_t Sh
tickstart = HAL_GetTick();
/* Wait until the shift is completed*/
while (READ_BIT(RTC->ICSR, RTC_ICSR_SHPF) != 0U)
while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_SHPF) != 0U)
{
if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE)
{
@@ -973,13 +970,13 @@ HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef *hrtc, uint32_t Sh
}
/* Check if the reference clock detection is disabled */
if (READ_BIT(RTC->CR, RTC_CR_REFCKON) == 0U)
if (READ_BIT(hrtc->Instance->CR, RTC_CR_REFCKON) == 0U)
{
/* Configure the Shift settings */
MODIFY_REG(RTC->SHIFTR, RTC_SHIFTR_SUBFS, (uint32_t)(ShiftSubFS) | (uint32_t)(ShiftAdd1S));
MODIFY_REG(hrtc->Instance->SHIFTR, RTC_SHIFTR_SUBFS, (uint32_t)(ShiftSubFS) | (uint32_t)(ShiftAdd1S));
/* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
if (READ_BIT(RTC->CR, RTC_CR_BYPSHAD) == 0U)
if (READ_BIT(hrtc->Instance->CR, RTC_CR_BYPSHAD) == 0U)
{
if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
{
@@ -1044,10 +1041,10 @@ HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef *hrtc, uint32
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
/* Configure the RTC_CR register */
MODIFY_REG(RTC->CR, RTC_CR_COSEL, (uint32_t)CalibOutput);
MODIFY_REG(hrtc->Instance->CR, RTC_CR_COSEL, (uint32_t)CalibOutput);
/* Enable calibration output */
SET_BIT(RTC->CR, RTC_CR_COE);
SET_BIT(hrtc->Instance->CR, RTC_CR_COE);
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
@@ -1077,7 +1074,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef *hrtc)
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
/* Disable calibration output */
CLEAR_BIT(RTC->CR, RTC_CR_COE);
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_COE);
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
@@ -1113,7 +1110,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef *hrtc)
if (status == HAL_OK)
{
/* Enable clockref detection */
SET_BIT(RTC->CR, RTC_CR_REFCKON);
SET_BIT(hrtc->Instance->CR, RTC_CR_REFCKON);
/* Exit Initialization mode */
status = RTC_ExitInitMode(hrtc);
@@ -1155,7 +1152,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef *hrtc)
if (status == HAL_OK)
{
/* Disable clockref detection */
CLEAR_BIT(RTC->CR, RTC_CR_REFCKON);
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_REFCKON);
/* Exit Initialization mode */
status = RTC_ExitInitMode(hrtc);
@@ -1193,7 +1190,7 @@ HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef *hrtc)
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
/* Set the BYPSHAD bit */
SET_BIT(RTC->CR, RTC_CR_BYPSHAD);
SET_BIT(hrtc->Instance->CR, RTC_CR_BYPSHAD);
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
@@ -1225,7 +1222,7 @@ HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc)
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
/* Reset the BYPSHAD bit */
CLEAR_BIT(RTC->CR, RTC_CR_BYPSHAD);
CLEAR_BIT(hrtc->Instance->CR, RTC_CR_BYPSHAD);
/* Enable the write protection for RTC registers */
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
@@ -1283,7 +1280,7 @@ HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t
{
uint32_t tickstart = HAL_GetTick();
while (READ_BIT(RTC->SR, RTC_SR_ALRBF) == 0U)
while (READ_BIT(hrtc->Instance->SR, RTC_SR_ALRBF) == 0U)
{
if (Timeout != HAL_MAX_DELAY)
{
@@ -1300,7 +1297,7 @@ HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t
}
/* Clear the Alarm Flag */
WRITE_REG(RTC->SCR, RTC_SCR_CALRBF);
WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRBF);
/* Change RTC state */
hrtc->State = HAL_RTC_STATE_READY;
@@ -1349,7 +1346,6 @@ HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t
HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef *sTamper)
{
uint32_t tmpreg;
UNUSED(hrtc);
/* Check the parameters */
assert_param(IS_RTC_TAMPER(sTamper->Tamper));
@@ -1390,10 +1386,10 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef
sTamper->PrechargeDuration | sTamper->TamperPullUp));
/* timestamp on tamper */
if (READ_BIT(RTC->CR, RTC_CR_TAMPTS) != (sTamper->TimeStampOnTamperDetection))
if (READ_BIT(hrtc->Instance->CR, RTC_CR_TAMPTS) != (sTamper->TimeStampOnTamperDetection))
{
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
MODIFY_REG(RTC->CR, RTC_CR_TAMPTS, sTamper->TimeStampOnTamperDetection);
MODIFY_REG(hrtc->Instance->CR, RTC_CR_TAMPTS, sTamper->TimeStampOnTamperDetection);
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
}
@@ -1413,7 +1409,6 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef
HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef *sTamper)
{
uint32_t tmpreg;
UNUSED(hrtc);
/* Check the parameters */
assert_param(IS_RTC_TAMPER(sTamper->Tamper));
@@ -1451,10 +1446,10 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType
sTamper->PrechargeDuration | sTamper->TamperPullUp));
/* timestamp on tamper */
if (READ_BIT(RTC->CR, RTC_CR_TAMPTS) != sTamper->TimeStampOnTamperDetection)
if (READ_BIT(hrtc->Instance->CR, RTC_CR_TAMPTS) != sTamper->TimeStampOnTamperDetection)
{
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
MODIFY_REG(RTC->CR, RTC_CR_TAMPTS, sTamper->TimeStampOnTamperDetection);
MODIFY_REG(hrtc->Instance->CR, RTC_CR_TAMPTS, sTamper->TimeStampOnTamperDetection);
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
}
@@ -1483,8 +1478,6 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType
*/
HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper)
{
UNUSED(hrtc);
assert_param(IS_RTC_TAMPER(Tamper));
/* Disable the selected Tamper pin */
@@ -1551,17 +1544,16 @@ HAL_StatusTypeDef HAL_RTCEx_PollForTamperEvent(RTC_HandleTypeDef *hrtc, uint32_t
*/
HAL_StatusTypeDef HAL_RTCEx_SetInternalTamper(RTC_HandleTypeDef *hrtc, RTC_InternalTamperTypeDef *sIntTamper)
{
UNUSED(hrtc);
/* Check the parameters */
assert_param(IS_RTC_INTERNAL_TAMPER(sIntTamper->IntTamper));
assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sIntTamper->TimeStampOnTamperDetection));
/* timestamp on internal tamper */
if (READ_BIT(RTC->CR, RTC_CR_TAMPTS) != sIntTamper->TimeStampOnTamperDetection)
if (READ_BIT(hrtc->Instance->CR, RTC_CR_TAMPTS) != sIntTamper->TimeStampOnTamperDetection)
{
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
MODIFY_REG(RTC->CR, RTC_CR_TAMPTS, sIntTamper->TimeStampOnTamperDetection);
MODIFY_REG(hrtc->Instance->CR, RTC_CR_TAMPTS, sIntTamper->TimeStampOnTamperDetection);
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
}
@@ -1580,17 +1572,15 @@ HAL_StatusTypeDef HAL_RTCEx_SetInternalTamper(RTC_HandleTypeDef *hrtc, RTC_Inter
*/
HAL_StatusTypeDef HAL_RTCEx_SetInternalTamper_IT(RTC_HandleTypeDef *hrtc, RTC_InternalTamperTypeDef *sIntTamper)
{
UNUSED(hrtc);
/* Check the parameters */
assert_param(IS_RTC_INTERNAL_TAMPER(sIntTamper->IntTamper));
assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sIntTamper->TimeStampOnTamperDetection));
/* timestamp on internal tamper */
if (READ_BIT(RTC->CR, RTC_CR_TAMPTS) != sIntTamper->TimeStampOnTamperDetection)
if (READ_BIT(hrtc->Instance->CR, RTC_CR_TAMPTS) != sIntTamper->TimeStampOnTamperDetection)
{
__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
MODIFY_REG(RTC->CR, RTC_CR_TAMPTS, sIntTamper->TimeStampOnTamperDetection);
MODIFY_REG(hrtc->Instance->CR, RTC_CR_TAMPTS, sIntTamper->TimeStampOnTamperDetection);
__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
}
@@ -1839,7 +1829,6 @@ __weak void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc)
*/
}
/**
* @brief Tamper 2 callback.
* @param hrtc RTC handle
@@ -2076,5 +2065,3 @@ uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

24
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai.c
View File

@@ -10,6 +10,17 @@
* + Peripheral Control functions
* + Peripheral State functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -197,18 +208,6 @@
and weak (surcharged) callbacks are used.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -2768,4 +2767,3 @@ static void SAI_DMAAbort(DMA_HandleTypeDef *hdma)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

12
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai_ex.c
View File

@@ -10,13 +10,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -128,4 +127,3 @@ HAL_StatusTypeDef HAL_SAIEx_ConfigPdmMicDelay(SAI_HandleTypeDef *hsai, SAIEx_Pdm
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

48
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard.c
View File

@@ -10,6 +10,17 @@
* + Peripheral Control functions
* + Peripheral State and Error functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -167,17 +178,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -809,11 +809,11 @@ HAL_StatusTypeDef HAL_SMARTCARD_UnRegisterCallback(SMARTCARD_HandleTypeDef *hsma
* @param Timeout Timeout duration.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size,
HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsmartcard, const uint8_t *pData, uint16_t Size,
uint32_t Timeout)
{
uint32_t tickstart;
uint8_t *ptmpdata = pData;
const uint8_t *ptmpdata = pData;
/* Check that a Tx process is not already ongoing */
if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
@@ -983,7 +983,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsmartcard, uin
* @param Size amount of data to be sent.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard, const uint8_t *pData, uint16_t Size)
{
/* Check that a Tx process is not already ongoing */
if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
@@ -1141,7 +1141,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard,
* @param Size amount of data to be sent.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsmartcard, const uint8_t *pData, uint16_t Size)
{
/* Check that a Tx process is not already ongoing */
if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
@@ -2420,25 +2420,25 @@ static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard
{
case SMARTCARD_CLOCKSOURCE_PCLK1:
pclk = HAL_RCC_GetPCLK1Freq();
tmpreg = (uint16_t)(((pclk / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) +
tmpreg = (uint32_t)(((pclk / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) +
(hsmartcard->Init.BaudRate / 2U)) / hsmartcard->Init.BaudRate);
break;
case SMARTCARD_CLOCKSOURCE_PCLK2:
pclk = HAL_RCC_GetPCLK2Freq();
tmpreg = (uint16_t)(((pclk / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) +
tmpreg = (uint32_t)(((pclk / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) +
(hsmartcard->Init.BaudRate / 2U)) / hsmartcard->Init.BaudRate);
break;
case SMARTCARD_CLOCKSOURCE_HSI:
tmpreg = (uint16_t)(((HSI_VALUE / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) +
tmpreg = (uint32_t)(((HSI_VALUE / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) +
(hsmartcard->Init.BaudRate / 2U)) / hsmartcard->Init.BaudRate);
break;
case SMARTCARD_CLOCKSOURCE_SYSCLK:
pclk = HAL_RCC_GetSysClockFreq();
tmpreg = (uint16_t)(((pclk / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) +
tmpreg = (uint32_t)(((pclk / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) +
(hsmartcard->Init.BaudRate / 2U)) / hsmartcard->Init.BaudRate);
break;
case SMARTCARD_CLOCKSOURCE_LSE:
tmpreg = (uint16_t)(((uint16_t)(LSE_VALUE / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) +
tmpreg = (uint32_t)(((uint16_t)(LSE_VALUE / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) +
(hsmartcard->Init.BaudRate / 2U)) / hsmartcard->Init.BaudRate);
break;
default:
@@ -2449,7 +2449,7 @@ static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard
/* USARTDIV must be greater than or equal to 0d16 */
if ((tmpreg >= USART_BRR_MIN) && (tmpreg <= USART_BRR_MAX))
{
hsmartcard->Instance->BRR = tmpreg;
hsmartcard->Instance->BRR = (uint16_t)tmpreg;
}
else
{
@@ -2580,11 +2580,12 @@ static HAL_StatusTypeDef SMARTCARD_CheckIdleState(SMARTCARD_HandleTypeDef *hsmar
}
/**
* @brief Handle SMARTCARD Communication Timeout.
* @brief Handle SMARTCARD Communication Timeout. It waits
* until a flag is no longer in the specified status.
* @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
* the configuration information for the specified SMARTCARD module.
* @param Flag Specifies the SMARTCARD flag to check.
* @param Status The new Flag status (SET or RESET).
* @param Status The actual Flag status (SET or RESET).
* @param Tickstart Tick start value
* @param Timeout Timeout duration.
* @retval HAL status
@@ -3184,4 +3185,3 @@ static void SMARTCARD_RxISR_FIFOEN(SMARTCARD_HandleTypeDef *hsmartcard)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

23
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard_ex.c
View File

@@ -8,6 +8,17 @@
* + Initialization and de-initialization functions
* + Peripheral Control functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
=============================================================================
##### SMARTCARD peripheral extended features #####
@@ -27,17 +38,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -493,4 +493,3 @@ static void SMARTCARDEx_SetNbDataToProcess(SMARTCARD_HandleTypeDef *hsmartcard)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

315
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus.c
View File

@@ -10,6 +10,17 @@
* + IO operation functions
* + Peripheral State and Errors functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -20,7 +31,7 @@
(#) Declare a SMBUS_HandleTypeDef handle structure, for example:
SMBUS_HandleTypeDef hsmbus;
(#)Initialize the SMBUS low level resources by implementing the @ref HAL_SMBUS_MspInit() API:
(#)Initialize the SMBUS low level resources by implementing the HAL_SMBUS_MspInit() API:
(##) Enable the SMBUSx interface clock
(##) SMBUS pins configuration
(+++) Enable the clock for the SMBUS GPIOs
@@ -33,69 +44,75 @@
Dual Addressing mode, Own Address2, Own Address2 Mask, General call, Nostretch mode,
Peripheral mode and Packet Error Check mode in the hsmbus Init structure.
(#) Initialize the SMBUS registers by calling the @ref HAL_SMBUS_Init() API:
(#) Initialize the SMBUS registers by calling the HAL_SMBUS_Init() API:
(++) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
by calling the customized @ref HAL_SMBUS_MspInit(&hsmbus) API.
by calling the customized HAL_SMBUS_MspInit(&hsmbus) API.
(#) To check if target device is ready for communication, use the function @ref HAL_SMBUS_IsDeviceReady()
(#) To check if target device is ready for communication, use the function HAL_SMBUS_IsDeviceReady()
(#) For SMBUS IO operations, only one mode of operations is available within this driver
*** Interrupt mode IO operation ***
===================================
[..]
(+) Transmit in master/host SMBUS mode an amount of data in non-blocking mode using @ref HAL_SMBUS_Master_Transmit_IT()
(++) At transmission end of transfer @ref HAL_SMBUS_MasterTxCpltCallback() is executed and user can
add his own code by customization of function pointer @ref HAL_SMBUS_MasterTxCpltCallback()
(+) Receive in master/host SMBUS mode an amount of data in non-blocking mode using @ref HAL_SMBUS_Master_Receive_IT()
(++) At reception end of transfer @ref HAL_SMBUS_MasterRxCpltCallback() is executed and user can
add his own code by customization of function pointer @ref HAL_SMBUS_MasterRxCpltCallback()
(+) Abort a master/host SMBUS process communication with Interrupt using @ref HAL_SMBUS_Master_Abort_IT()
(+) Transmit in master/host SMBUS mode an amount of data in non-blocking mode
using HAL_SMBUS_Master_Transmit_IT()
(++) At transmission end of transfer HAL_SMBUS_MasterTxCpltCallback() is executed and users can
add their own code by customization of function pointer HAL_SMBUS_MasterTxCpltCallback()
(+) Receive in master/host SMBUS mode an amount of data in non-blocking mode
using HAL_SMBUS_Master_Receive_IT()
(++) At reception end of transfer HAL_SMBUS_MasterRxCpltCallback() is executed and users can
add their own code by customization of function pointer HAL_SMBUS_MasterRxCpltCallback()
(+) Abort a master/host SMBUS process communication with Interrupt using HAL_SMBUS_Master_Abort_IT()
(++) The associated previous transfer callback is called at the end of abort process
(++) mean @ref HAL_SMBUS_MasterTxCpltCallback() in case of previous state was master transmit
(++) mean @ref HAL_SMBUS_MasterRxCpltCallback() in case of previous state was master receive
(++) mean HAL_SMBUS_MasterTxCpltCallback() in case of previous state was master transmit
(++) mean HAL_SMBUS_MasterRxCpltCallback() in case of previous state was master receive
(+) Enable/disable the Address listen mode in slave/device or host/slave SMBUS mode
using @ref HAL_SMBUS_EnableListen_IT() @ref HAL_SMBUS_DisableListen_IT()
(++) When address slave/device SMBUS match, @ref HAL_SMBUS_AddrCallback() is executed and user can
add his own code to check the Address Match Code and the transmission direction request by master/host (Write/Read).
(++) At Listen mode end @ref HAL_SMBUS_ListenCpltCallback() is executed and user can
add his own code by customization of function pointer @ref HAL_SMBUS_ListenCpltCallback()
(+) Transmit in slave/device SMBUS mode an amount of data in non-blocking mode using @ref HAL_SMBUS_Slave_Transmit_IT()
(++) At transmission end of transfer @ref HAL_SMBUS_SlaveTxCpltCallback() is executed and user can
add his own code by customization of function pointer @ref HAL_SMBUS_SlaveTxCpltCallback()
(+) Receive in slave/device SMBUS mode an amount of data in non-blocking mode using @ref HAL_SMBUS_Slave_Receive_IT()
(++) At reception end of transfer @ref HAL_SMBUS_SlaveRxCpltCallback() is executed and user can
add his own code by customization of function pointer @ref HAL_SMBUS_SlaveRxCpltCallback()
(+) Enable/Disable the SMBUS alert mode using @ref HAL_SMBUS_EnableAlert_IT() @ref HAL_SMBUS_DisableAlert_IT()
(++) When SMBUS Alert is generated @ref HAL_SMBUS_ErrorCallback() is executed and user can
add his own code by customization of function pointer @ref HAL_SMBUS_ErrorCallback()
to check the Alert Error Code using function @ref HAL_SMBUS_GetError()
(+) Get HAL state machine or error values using @ref HAL_SMBUS_GetState() or @ref HAL_SMBUS_GetError()
(+) In case of transfer Error, @ref HAL_SMBUS_ErrorCallback() function is executed and user can
add his own code by customization of function pointer @ref HAL_SMBUS_ErrorCallback()
to check the Error Code using function @ref HAL_SMBUS_GetError()
using HAL_SMBUS_EnableListen_IT() HAL_SMBUS_DisableListen_IT()
(++) When address slave/device SMBUS match, HAL_SMBUS_AddrCallback() is executed and users can
add their own code to check the Address Match Code and the transmission direction
request by master/host (Write/Read).
(++) At Listen mode end HAL_SMBUS_ListenCpltCallback() is executed and users can
add their own code by customization of function pointer HAL_SMBUS_ListenCpltCallback()
(+) Transmit in slave/device SMBUS mode an amount of data in non-blocking mode
using HAL_SMBUS_Slave_Transmit_IT()
(++) At transmission end of transfer HAL_SMBUS_SlaveTxCpltCallback() is executed and users can
add their own code by customization of function pointer HAL_SMBUS_SlaveTxCpltCallback()
(+) Receive in slave/device SMBUS mode an amount of data in non-blocking mode
using HAL_SMBUS_Slave_Receive_IT()
(++) At reception end of transfer HAL_SMBUS_SlaveRxCpltCallback() is executed and users can
add their own code by customization of function pointer HAL_SMBUS_SlaveRxCpltCallback()
(+) Enable/Disable the SMBUS alert mode using
HAL_SMBUS_EnableAlert_IT() or HAL_SMBUS_DisableAlert_IT()
(++) When SMBUS Alert is generated HAL_SMBUS_ErrorCallback() is executed and users can
add their own code by customization of function pointer HAL_SMBUS_ErrorCallback()
to check the Alert Error Code using function HAL_SMBUS_GetError()
(+) Get HAL state machine or error values using HAL_SMBUS_GetState() or HAL_SMBUS_GetError()
(+) In case of transfer Error, HAL_SMBUS_ErrorCallback() function is executed and users can
add their own code by customization of function pointer HAL_SMBUS_ErrorCallback()
to check the Error Code using function HAL_SMBUS_GetError()
*** SMBUS HAL driver macros list ***
==================================
[..]
Below the list of most used macros in SMBUS HAL driver.
(+) @ref __HAL_SMBUS_ENABLE: Enable the SMBUS peripheral
(+) @ref __HAL_SMBUS_DISABLE: Disable the SMBUS peripheral
(+) @ref __HAL_SMBUS_GET_FLAG: Check whether the specified SMBUS flag is set or not
(+) @ref __HAL_SMBUS_CLEAR_FLAG: Clear the specified SMBUS pending flag
(+) @ref __HAL_SMBUS_ENABLE_IT: Enable the specified SMBUS interrupt
(+) @ref __HAL_SMBUS_DISABLE_IT: Disable the specified SMBUS interrupt
(+) __HAL_SMBUS_ENABLE: Enable the SMBUS peripheral
(+) __HAL_SMBUS_DISABLE: Disable the SMBUS peripheral
(+) __HAL_SMBUS_GET_FLAG: Check whether the specified SMBUS flag is set or not
(+) __HAL_SMBUS_CLEAR_FLAG: Clear the specified SMBUS pending flag
(+) __HAL_SMBUS_ENABLE_IT: Enable the specified SMBUS interrupt
(+) __HAL_SMBUS_DISABLE_IT: Disable the specified SMBUS interrupt
*** Callback registration ***
=============================================
[..]
The compilation flag USE_HAL_SMBUS_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Functions @ref HAL_SMBUS_RegisterCallback() or @ref HAL_SMBUS_RegisterAddrCallback()
Use Functions HAL_SMBUS_RegisterCallback() or HAL_SMBUS_RegisterAddrCallback()
to register an interrupt callback.
[..]
Function @ref HAL_SMBUS_RegisterCallback() allows to register following callbacks:
Function HAL_SMBUS_RegisterCallback() allows to register following callbacks:
(+) MasterTxCpltCallback : callback for Master transmission end of transfer.
(+) MasterRxCpltCallback : callback for Master reception end of transfer.
(+) SlaveTxCpltCallback : callback for Slave transmission end of transfer.
@@ -107,11 +124,11 @@
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
[..]
For specific callback AddrCallback use dedicated register callbacks : @ref HAL_SMBUS_RegisterAddrCallback.
For specific callback AddrCallback use dedicated register callbacks : HAL_SMBUS_RegisterAddrCallback.
[..]
Use function @ref HAL_SMBUS_UnRegisterCallback to reset a callback to the default
Use function HAL_SMBUS_UnRegisterCallback to reset a callback to the default
weak function.
@ref HAL_SMBUS_UnRegisterCallback takes as parameters the HAL peripheral handle,
HAL_SMBUS_UnRegisterCallback takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) MasterTxCpltCallback : callback for Master transmission end of transfer.
@@ -123,24 +140,24 @@
(+) MspInitCallback : callback for Msp Init.
(+) MspDeInitCallback : callback for Msp DeInit.
[..]
For callback AddrCallback use dedicated register callbacks : @ref HAL_SMBUS_UnRegisterAddrCallback.
For callback AddrCallback use dedicated register callbacks : HAL_SMBUS_UnRegisterAddrCallback.
[..]
By default, after the @ref HAL_SMBUS_Init() and when the state is @ref HAL_I2C_STATE_RESET
By default, after the HAL_SMBUS_Init() and when the state is HAL_I2C_STATE_RESET
all callbacks are set to the corresponding weak functions:
examples @ref HAL_SMBUS_MasterTxCpltCallback(), @ref HAL_SMBUS_MasterRxCpltCallback().
examples HAL_SMBUS_MasterTxCpltCallback(), HAL_SMBUS_MasterRxCpltCallback().
Exception done for MspInit and MspDeInit functions that are
reset to the legacy weak functions in the @ref HAL_SMBUS_Init()/ @ref HAL_SMBUS_DeInit() only when
reset to the legacy weak functions in the HAL_SMBUS_Init()/ HAL_SMBUS_DeInit() only when
these callbacks are null (not registered beforehand).
If MspInit or MspDeInit are not null, the @ref HAL_SMBUS_Init()/ @ref HAL_SMBUS_DeInit()
If MspInit or MspDeInit are not null, the HAL_SMBUS_Init()/ HAL_SMBUS_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
[..]
Callbacks can be registered/unregistered in @ref HAL_I2C_STATE_READY state only.
Callbacks can be registered/unregistered in HAL_I2C_STATE_READY state only.
Exception done MspInit/MspDeInit functions that can be registered/unregistered
in @ref HAL_I2C_STATE_READY or @ref HAL_I2C_STATE_RESET state,
in HAL_I2C_STATE_READY or HAL_I2C_STATE_RESET state,
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
Then, the user first registers the MspInit/MspDeInit user callbacks
using @ref HAL_SMBUS_RegisterCallback() before calling @ref HAL_SMBUS_DeInit()
or @ref HAL_SMBUS_Init() function.
using HAL_SMBUS_RegisterCallback() before calling HAL_SMBUS_DeInit()
or HAL_SMBUS_Init() function.
[..]
When the compilation flag USE_HAL_SMBUS_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registration feature is not available and all callbacks
@@ -150,18 +167,6 @@
(@) You can refer to the SMBUS HAL driver header file for more useful macros
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -203,20 +208,28 @@
/** @addtogroup SMBUS_Private_Functions SMBUS Private Functions
* @{
*/
static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status,
uint32_t Timeout);
/* Private functions to handle flags during polling transfer */
static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag,
FlagStatus Status, uint32_t Timeout);
static void SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest);
static void SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest);
/* Private functions for SMBUS transfer IRQ handler */
static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t StatusFlags);
static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t StatusFlags);
static void SMBUS_ConvertOtherXferOptions(SMBUS_HandleTypeDef *hsmbus);
static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus);
static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode,
uint32_t Request);
/* Private functions to centralize the enable/disable of Interrupts */
static void SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest);
static void SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest);
/* Private function to flush TXDR register */
static void SMBUS_Flush_TXDR(SMBUS_HandleTypeDef *hsmbus);
/* Private function to handle start, restart or stop a transfer */
static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size,
uint32_t Mode, uint32_t Request);
/* Private function to Convert Specific options */
static void SMBUS_ConvertOtherXferOptions(SMBUS_HandleTypeDef *hsmbus);
/**
* @}
*/
@@ -364,15 +377,20 @@ HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus)
/*---------------------------- SMBUSx OAR2 Configuration -----------------------*/
/* Configure SMBUSx: Dual mode and Own Address2 */
hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | (hsmbus->Init.OwnAddress2Masks << 8U));
hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | \
(hsmbus->Init.OwnAddress2Masks << 8U));
/*---------------------------- SMBUSx CR1 Configuration ------------------------*/
/* Configure SMBUSx: Generalcall and NoStretch mode */
hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | hsmbus->Init.AnalogFilter);
hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | \
hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | \
hsmbus->Init.AnalogFilter);
/* Enable Slave Byte Control only in case of Packet Error Check is enabled and SMBUS Peripheral is set in Slave mode */
if ((hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLE)
&& ((hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP)))
/* Enable Slave Byte Control only in case of Packet Error Check is enabled
and SMBUS Peripheral is set in Slave mode */
if ((hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLE) && \
((hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \
(hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP)))
{
hsmbus->Instance->CR1 |= I2C_CR1_SBC;
}
@@ -581,7 +599,8 @@ HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uin
* @param pCallback pointer to the Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID,
HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus,
HAL_SMBUS_CallbackIDTypeDef CallbackID,
pSMBUS_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -695,7 +714,8 @@ HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SM
* @arg @ref HAL_SMBUS_MSPDEINIT_CB_ID MspDeInit callback ID
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID)
HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus,
HAL_SMBUS_CallbackIDTypeDef CallbackID)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -790,7 +810,8 @@ HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_
* @param pCallback pointer to the Address Match Callback function
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, pSMBUS_AddrCallbackTypeDef pCallback)
HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus,
pSMBUS_AddrCallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -914,8 +935,8 @@ HAL_StatusTypeDef HAL_SMBUS_UnRegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus)
* @param XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData,
uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress,
uint8_t *pData, uint16_t Size, uint32_t XferOptions)
{
uint32_t tmp;
@@ -955,7 +976,8 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint
if ((hsmbus->XferSize < hsmbus->XferCount) && (hsmbus->XferSize == MAX_NBYTE_SIZE))
{
SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize,
SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_WRITE);
SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE),
SMBUS_GENERATE_START_WRITE);
}
else
{
@@ -965,9 +987,11 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint
/* Store current volatile XferOptions, misra rule */
tmp = hsmbus->XferOptions;
if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) && (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0))
if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) && \
(IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0))
{
SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions,
SMBUS_NO_STARTSTOP);
}
/* Else transfer direction change, so generate Restart with new transfer direction */
else
@@ -976,7 +1000,9 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint
SMBUS_ConvertOtherXferOptions(hsmbus);
/* Handle Transfer */
SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE);
SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize,
hsmbus->XferOptions,
SMBUS_GENERATE_START_WRITE);
}
/* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */
@@ -1057,7 +1083,8 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint1
if ((hsmbus->XferSize < hsmbus->XferCount) && (hsmbus->XferSize == MAX_NBYTE_SIZE))
{
SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize,
SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_READ);
SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE),
SMBUS_GENERATE_START_READ);
}
else
{
@@ -1067,9 +1094,11 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint1
/* Store current volatile XferOptions, Misra rule */
tmp = hsmbus->XferOptions;
if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX) && (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0))
if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX) && \
(IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0))
{
SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions,
SMBUS_NO_STARTSTOP);
}
/* Else transfer direction change, so generate Restart with new transfer direction */
else
@@ -1078,7 +1107,9 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint1
SMBUS_ConvertOtherXferOptions(hsmbus);
/* Handle Transfer */
SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_READ);
SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize,
hsmbus->XferOptions,
SMBUS_GENERATE_START_READ);
}
}
@@ -1222,12 +1253,14 @@ HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8
if ((hsmbus->XferSize < hsmbus->XferCount) && (hsmbus->XferSize == MAX_NBYTE_SIZE))
{
SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize,
SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE),
SMBUS_NO_STARTSTOP);
}
else
{
/* Set NBYTE to transmit */
SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions,
SMBUS_NO_STARTSTOP);
/* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
/* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
@@ -1313,7 +1346,8 @@ HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_
/* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */
if (((SMBUS_GET_PEC_MODE(hsmbus) != 0UL) && (hsmbus->XferSize == 2U)) || (hsmbus->XferSize == 1U))
{
SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions,
SMBUS_NO_STARTSTOP);
}
else
{
@@ -1576,7 +1610,8 @@ void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
uint32_t tmpcr1value = READ_REG(hsmbus->Instance->CR1);
/* SMBUS in mode Transmitter ---------------------------------------------------*/
if ((SMBUS_CHECK_IT_SOURCE(tmpcr1value, (SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET) &&
if ((SMBUS_CHECK_IT_SOURCE(tmpcr1value, (SMBUS_IT_TCI | SMBUS_IT_STOPI |
SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET) &&
((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) ||
(SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) ||
(SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) ||
@@ -1600,7 +1635,8 @@ void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
}
/* SMBUS in mode Receiver ----------------------------------------------------*/
if ((SMBUS_CHECK_IT_SOURCE(tmpcr1value, (SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET) &&
if ((SMBUS_CHECK_IT_SOURCE(tmpcr1value, (SMBUS_IT_TCI | SMBUS_IT_STOPI |
SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET) &&
((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_RXNE) != RESET) ||
(SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) ||
(SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) ||
@@ -1720,7 +1756,8 @@ __weak void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
* @param AddrMatchCode Address Match Code
* @retval None
*/
__weak void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode)
__weak void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection,
uint16_t AddrMatchCode)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hsmbus);
@@ -1842,6 +1879,9 @@ static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t
/* No need to generate STOP, it is automatically done */
hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
/* Flush TX register */
SMBUS_Flush_TXDR(hsmbus);
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
@@ -1967,13 +2007,15 @@ static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t
if (hsmbus->XferCount > MAX_NBYTE_SIZE)
{
SMBUS_TransferConfig(hsmbus, DevAddress, MAX_NBYTE_SIZE,
(SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
(SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)),
SMBUS_NO_STARTSTOP);
hsmbus->XferSize = MAX_NBYTE_SIZE;
}
else
{
hsmbus->XferSize = hsmbus->XferCount;
SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions,
SMBUS_NO_STARTSTOP);
/* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
/* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
if (SMBUS_GET_PEC_MODE(hsmbus) != 0UL)
@@ -2130,6 +2172,9 @@ static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t S
/* Clear NACK Flag */
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
/* Flush TX register */
SMBUS_Flush_TXDR(hsmbus);
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
}
@@ -2151,6 +2196,9 @@ static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t S
/* Set ErrorCode corresponding to a Non-Acknowledge */
hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
/* Flush TX register */
SMBUS_Flush_TXDR(hsmbus);
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
@@ -2225,7 +2273,9 @@ static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t S
else
{
/* Set Reload for next Bytes */
SMBUS_TransferConfig(hsmbus, 0, 1, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
SMBUS_TransferConfig(hsmbus, 0, 1,
SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE),
SMBUS_NO_STARTSTOP);
/* Ack last Byte Read */
hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
@@ -2237,14 +2287,16 @@ static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t S
{
if (hsmbus->XferCount > MAX_NBYTE_SIZE)
{
SMBUS_TransferConfig(hsmbus, 0, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)),
SMBUS_TransferConfig(hsmbus, 0, MAX_NBYTE_SIZE,
(SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)),
SMBUS_NO_STARTSTOP);
hsmbus->XferSize = MAX_NBYTE_SIZE;
}
else
{
hsmbus->XferSize = hsmbus->XferCount;
SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions,
SMBUS_NO_STARTSTOP);
/* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
/* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
if (SMBUS_GET_PEC_MODE(hsmbus) != 0UL)
@@ -2489,7 +2541,8 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus)
uint32_t tmperror;
/* SMBUS Bus error interrupt occurred ------------------------------------*/
if (((itflags & SMBUS_FLAG_BERR) == SMBUS_FLAG_BERR) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI))
if (((itflags & SMBUS_FLAG_BERR) == SMBUS_FLAG_BERR) && \
((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI))
{
hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BERR;
@@ -2498,7 +2551,8 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus)
}
/* SMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/
if (((itflags & SMBUS_FLAG_OVR) == SMBUS_FLAG_OVR) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI))
if (((itflags & SMBUS_FLAG_OVR) == SMBUS_FLAG_OVR) && \
((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI))
{
hsmbus->ErrorCode |= HAL_SMBUS_ERROR_OVR;
@@ -2507,7 +2561,8 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus)
}
/* SMBUS Arbitration Loss error interrupt occurred ------------------------------------*/
if (((itflags & SMBUS_FLAG_ARLO) == SMBUS_FLAG_ARLO) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI))
if (((itflags & SMBUS_FLAG_ARLO) == SMBUS_FLAG_ARLO) && \
((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI))
{
hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ARLO;
@@ -2516,7 +2571,8 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus)
}
/* SMBUS Timeout error interrupt occurred ---------------------------------------------*/
if (((itflags & SMBUS_FLAG_TIMEOUT) == SMBUS_FLAG_TIMEOUT) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI))
if (((itflags & SMBUS_FLAG_TIMEOUT) == SMBUS_FLAG_TIMEOUT) && \
((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI))
{
hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BUSTIMEOUT;
@@ -2525,7 +2581,8 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus)
}
/* SMBUS Alert error interrupt occurred -----------------------------------------------*/
if (((itflags & SMBUS_FLAG_ALERT) == SMBUS_FLAG_ALERT) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI))
if (((itflags & SMBUS_FLAG_ALERT) == SMBUS_FLAG_ALERT) && \
((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI))
{
hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ALERT;
@@ -2534,7 +2591,8 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus)
}
/* SMBUS Packet Error Check error interrupt occurred ----------------------------------*/
if (((itflags & SMBUS_FLAG_PECERR) == SMBUS_FLAG_PECERR) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI))
if (((itflags & SMBUS_FLAG_PECERR) == SMBUS_FLAG_PECERR) && \
((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI))
{
hsmbus->ErrorCode |= HAL_SMBUS_ERROR_PECERR;
@@ -2542,7 +2600,10 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus)
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR);
}
/* Store current volatile hsmbus->State, misra rule */
/* Flush TX register */
SMBUS_Flush_TXDR(hsmbus);
/* Store current volatile hsmbus->ErrorCode, misra rule */
tmperror = hsmbus->ErrorCode;
/* Call the Error Callback in case of Error detected */
@@ -2582,8 +2643,8 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus)
* @param Timeout Timeout duration
* @retval HAL status
*/
static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status,
uint32_t Timeout)
static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag,
FlagStatus Status, uint32_t Timeout)
{
uint32_t tickstart = HAL_GetTick();
@@ -2612,6 +2673,27 @@ static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbu
return HAL_OK;
}
/**
* @brief SMBUS Tx data register flush process.
* @param hsmbus SMBUS handle.
* @retval None
*/
static void SMBUS_Flush_TXDR(SMBUS_HandleTypeDef *hsmbus)
{
/* If a pending TXIS flag is set */
/* Write a dummy data in TXDR to clear it */
if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
{
hsmbus->Instance->TXDR = 0x00U;
}
/* Flush TX register if not empty */
if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXE) == RESET)
{
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_TXE);
}
}
/**
* @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set).
* @param hsmbus SMBUS handle.
@@ -2632,8 +2714,8 @@ static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbu
* @arg @ref SMBUS_GENERATE_START_WRITE Generate Restart for write request.
* @retval None
*/
static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode,
uint32_t Request)
static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size,
uint32_t Mode, uint32_t Request)
{
/* Check the parameters */
assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
@@ -2644,9 +2726,10 @@ static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddre
MODIFY_REG(hsmbus->Instance->CR2,
((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \
(I2C_CR2_RD_WRN & (uint32_t)(Request >> (31UL - I2C_CR2_RD_WRN_Pos))) | \
I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE)), \
I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE)), \
(uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \
(((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | (uint32_t)Mode | (uint32_t)Request));
(((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \
(uint32_t)Mode | (uint32_t)Request));
}
/**
@@ -2703,5 +2786,3 @@ static void SMBUS_ConvertOtherXferOptions(SMBUS_HandleTypeDef *hsmbus)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

154
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus_ex.c
View File

@@ -7,6 +7,17 @@
* functionalities of SMBUS Extended peripheral:
* + Extended features functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### SMBUS peripheral Extended features #####
@@ -15,26 +26,18 @@
[..] Comparing to other previous devices, the SMBUS interface for STM32G4xx
devices contains the following additional features
(+) Disable or enable wakeup from Stop mode(s)
(+) Disable or enable Fast Mode Plus
##### How to use this driver #####
==============================================================================
(#) Configure the enable or disable of SMBUS Wake Up Mode using the functions :
(++) HAL_SMBUSEx_EnableWakeUp()
(++) HAL_SMBUSEx_DisableWakeUp()
(#) Configure the enable or disable of fast mode plus driving capability using the functions :
(++) HAL_SMBUSEx_EnableFastModePlus()
(++) HAL_SMBUSEx_DisableFastModePlus()
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -62,15 +65,109 @@
* @{
*/
/** @defgroup SMBUSEx_Exported_Functions_Group1 Extended features functions
* @brief Extended features functions
*
/** @defgroup SMBUSEx_Exported_Functions_Group2 WakeUp Mode Functions
* @brief WakeUp Mode Functions
*
@verbatim
===============================================================================
##### Extended features functions #####
##### WakeUp Mode Functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Configure Wake Up Feature
@endverbatim
* @{
*/
/**
* @brief Enable SMBUS wakeup from Stop mode(s).
* @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
* the configuration information for the specified SMBUSx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SMBUSEx_EnableWakeUp(SMBUS_HandleTypeDef *hsmbus)
{
/* Check the parameters */
assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hsmbus->Instance));
if (hsmbus->State == HAL_SMBUS_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hsmbus);
hsmbus->State = HAL_SMBUS_STATE_BUSY;
/* Disable the selected SMBUS peripheral */
__HAL_SMBUS_DISABLE(hsmbus);
/* Enable wakeup from stop mode */
hsmbus->Instance->CR1 |= I2C_CR1_WUPEN;
__HAL_SMBUS_ENABLE(hsmbus);
hsmbus->State = HAL_SMBUS_STATE_READY;
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
return HAL_OK;
}
else
{
return HAL_BUSY;
}
}
/**
* @brief Disable SMBUS wakeup from Stop mode(s).
* @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
* the configuration information for the specified SMBUSx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SMBUSEx_DisableWakeUp(SMBUS_HandleTypeDef *hsmbus)
{
/* Check the parameters */
assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hsmbus->Instance));
if (hsmbus->State == HAL_SMBUS_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hsmbus);
hsmbus->State = HAL_SMBUS_STATE_BUSY;
/* Disable the selected SMBUS peripheral */
__HAL_SMBUS_DISABLE(hsmbus);
/* Disable wakeup from stop mode */
hsmbus->Instance->CR1 &= ~(I2C_CR1_WUPEN);
__HAL_SMBUS_ENABLE(hsmbus);
hsmbus->State = HAL_SMBUS_STATE_READY;
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
return HAL_OK;
}
else
{
return HAL_BUSY;
}
}
/**
* @}
*/
/** @defgroup SMBUSEx_Exported_Functions_Group3 Fast Mode Plus Functions
* @brief Fast Mode Plus Functions
*
@verbatim
===============================================================================
##### Fast Mode Plus Functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Configure Fast Mode Plus
@endverbatim
@@ -82,16 +179,16 @@
* @param ConfigFastModePlus Selects the pin.
* This parameter can be one of the @ref SMBUSEx_FastModePlus values
* @note For I2C1, fast mode plus driving capability can be enabled on all selected
* I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
* I2C1 pins using SMBUS_FASTMODEPLUS_I2C1 parameter or independently
* on each one of the following pins PB6, PB7, PB8 and PB9.
* @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
* can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter.
* can be enabled only by using SMBUS_FASTMODEPLUS_I2C1 parameter.
* @note For all I2C2 pins fast mode plus driving capability can be enabled
* only by using I2C_FASTMODEPLUS_I2C2 parameter.
* only by using SMBUS_FASTMODEPLUS_I2C2 parameter.
* @note For all I2C3 pins fast mode plus driving capability can be enabled
* only by using I2C_FASTMODEPLUS_I2C3 parameter.
* only by using SMBUS_FASTMODEPLUS_I2C3 parameter.
* @note For all I2C4 pins fast mode plus driving capability can be enabled
* only by using I2C_FASTMODEPLUS_I2C4 parameter.
* only by using SMBUS_FASTMODEPLUS_I2C4 parameter.
* @retval None
*/
void HAL_SMBUSEx_EnableFastModePlus(uint32_t ConfigFastModePlus)
@@ -111,16 +208,16 @@ void HAL_SMBUSEx_EnableFastModePlus(uint32_t ConfigFastModePlus)
* @param ConfigFastModePlus Selects the pin.
* This parameter can be one of the @ref SMBUSEx_FastModePlus values
* @note For I2C1, fast mode plus driving capability can be disabled on all selected
* I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
* I2C1 pins using SMBUS_FASTMODEPLUS_I2C1 parameter or independently
* on each one of the following pins PB6, PB7, PB8 and PB9.
* @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
* can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter.
* can be disabled only by using SMBUS_FASTMODEPLUS_I2C1 parameter.
* @note For all I2C2 pins fast mode plus driving capability can be disabled
* only by using I2C_FASTMODEPLUS_I2C2 parameter.
* only by using SMBUS_FASTMODEPLUS_I2C2 parameter.
* @note For all I2C3 pins fast mode plus driving capability can be disabled
* only by using I2C_FASTMODEPLUS_I2C3 parameter.
* only by using SMBUS_FASTMODEPLUS_I2C3 parameter.
* @note For all I2C4 pins fast mode plus driving capability can be disabled
* only by using I2C_FASTMODEPLUS_I2C4 parameter.
* only by using SMBUS_FASTMODEPLUS_I2C4 parameter.
* @retval None
*/
void HAL_SMBUSEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
@@ -135,6 +232,9 @@ void HAL_SMBUSEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus);
}
/**
* @}
*/
/**
* @}
@@ -152,5 +252,3 @@ void HAL_SMBUSEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

109
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c
View File

@@ -9,7 +9,17 @@
* + IO operation functions
* + Peripheral Control functions
* + Peripheral State functions
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -184,18 +194,6 @@
(#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
(#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -1009,6 +1007,8 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
{
#if (USE_SPI_CRC != 0U)
__IO uint32_t tmpreg = 0U;
__IO uint8_t *ptmpreg8;
__IO uint8_t tmpreg8 = 0;
#endif /* USE_SPI_CRC */
uint32_t tickstart;
HAL_StatusTypeDef errorcode = HAL_OK;
@@ -1182,10 +1182,12 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
}
else
{
/* Initialize the 8bit temporary pointer */
ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
/* Read 8bit CRC */
tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
tmpreg8 = *ptmpreg8;
/* To avoid GCC warning */
UNUSED(tmpreg);
UNUSED(tmpreg8);
if ((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
{
@@ -1197,9 +1199,9 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
goto error;
}
/* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */
tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
tmpreg8 = *ptmpreg8;
/* To avoid GCC warning */
UNUSED(tmpreg);
UNUSED(tmpreg8);
}
}
}
@@ -1244,17 +1246,17 @@ error :
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
uint32_t Timeout)
{
#if (USE_SPI_CRC != 0U)
__IO uint32_t tmpreg = 0U;
#endif /* USE_SPI_CRC */
uint16_t initial_TxXferCount;
uint16_t initial_RxXferCount;
uint32_t tmp_mode;
HAL_SPI_StateTypeDef tmp_state;
uint32_t tickstart;
#if (USE_SPI_CRC != 0U)
__IO uint32_t tmpreg = 0U;
uint32_t spi_cr1;
uint32_t spi_cr2;
__IO uint8_t *ptmpreg8;
__IO uint8_t tmpreg8 = 0;
#endif /* USE_SPI_CRC */
/* Variable used to alternate Rx and Tx during transfer */
@@ -1494,10 +1496,12 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
}
else
{
/* Initialize the 8bit temporary pointer */
ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
/* Read 8bit CRC */
tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
tmpreg8 = *ptmpreg8;
/* To avoid GCC warning */
UNUSED(tmpreg);
UNUSED(tmpreg8);
if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
{
@@ -1509,9 +1513,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
goto error;
}
/* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */
tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
tmpreg8 = *ptmpreg8;
/* To avoid GCC warning */
UNUSED(tmpreg);
UNUSED(tmpreg8);
}
}
}
@@ -3068,6 +3072,8 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
uint32_t tickstart;
#if (USE_SPI_CRC != 0U)
__IO uint32_t tmpreg = 0U;
__IO uint8_t *ptmpreg8;
__IO uint8_t tmpreg8 = 0;
#endif /* USE_SPI_CRC */
/* Init tickstart for timeout management*/
@@ -3099,10 +3105,12 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
}
else
{
/* Initialize the 8bit temporary pointer */
ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
/* Read 8bit CRC */
tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
tmpreg8 = *ptmpreg8;
/* To avoid GCC warning */
UNUSED(tmpreg);
UNUSED(tmpreg8);
if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
{
@@ -3112,9 +3120,9 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
}
/* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */
tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
tmpreg8 = *ptmpreg8;
/* To avoid GCC warning */
UNUSED(tmpreg);
UNUSED(tmpreg8);
}
}
}
@@ -3181,6 +3189,8 @@ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
uint32_t tickstart;
#if (USE_SPI_CRC != 0U)
__IO uint32_t tmpreg = 0U;
__IO uint8_t *ptmpreg8;
__IO uint8_t tmpreg8 = 0;
#endif /* USE_SPI_CRC */
/* Init tickstart for timeout management*/
@@ -3204,10 +3214,12 @@ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
/* Error on the CRC reception */
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
}
/* Read CRC to Flush DR and RXNE flag */
tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
/* Initialize the 8bit temporary pointer */
ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
/* Read 8bit CRC */
tmpreg8 = *ptmpreg8;
/* To avoid GCC warning */
UNUSED(tmpreg);
UNUSED(tmpreg8);
}
else
{
@@ -3554,12 +3566,15 @@ static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
*/
static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
{
__IO uint32_t tmpreg = 0U;
__IO uint8_t *ptmpreg8;
__IO uint8_t tmpreg8 = 0;
/* Initialize the 8bit temporary pointer */
ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
/* Read 8bit CRC to flush Data Register */
tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
tmpreg8 = *ptmpreg8;
/* To avoid GCC warning */
UNUSED(tmpreg);
UNUSED(tmpreg8);
hspi->CRCSize--;
@@ -3671,7 +3686,7 @@ static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
/* Read 16bit CRC to flush Data Register */
tmpreg = READ_REG(hspi->Instance->DR);
/* To avoid GCC warning */
UNUSED(tmpreg);
UNUSED(tmpreg);
/* Disable RXNE interrupt */
__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
@@ -3726,12 +3741,15 @@ static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
*/
static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
{
__IO uint32_t tmpreg = 0U;
__IO uint8_t *ptmpreg8;
__IO uint8_t tmpreg8 = 0;
/* Initialize the 8bit temporary pointer */
ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
/* Read 8bit CRC to flush Data Register */
tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
tmpreg8 = *ptmpreg8;
/* To avoid GCC warning */
UNUSED(tmpreg);
UNUSED(tmpreg8);
hspi->CRCSize--;
@@ -3940,7 +3958,7 @@ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi,
return HAL_TIMEOUT;
}
/* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */
if(count == 0U)
if (count == 0U)
{
tmp_timeout = 0U;
}
@@ -3964,15 +3982,19 @@ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi,
static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State,
uint32_t Timeout, uint32_t Tickstart)
{
__IO uint32_t tmpreg;
__IO uint32_t count;
uint32_t tmp_timeout;
uint32_t tmp_tickstart;
__IO uint8_t *ptmpreg8;
__IO uint8_t tmpreg8 = 0;
/* Adjust Timeout value in case of end of transfer */
tmp_timeout = Timeout - (HAL_GetTick() - Tickstart);
tmp_tickstart = HAL_GetTick();
/* Initialize the 8bit temporary pointer */
ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
/* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */
count = tmp_timeout * ((SystemCoreClock * 35U) >> 20U);
@@ -3981,9 +4003,9 @@ static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi,
if ((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY))
{
/* Flush Data Register by a blank read */
tmpreg = READ_REG(*((__IO uint8_t *)&hspi->Instance->DR));
tmpreg8 = *ptmpreg8;
/* To avoid GCC warning */
UNUSED(tmpreg);
UNUSED(tmpreg8);
}
if (Timeout != HAL_MAX_DELAY)
@@ -4018,10 +4040,10 @@ static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi,
return HAL_TIMEOUT;
}
/* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */
if(count == 0U)
if (count == 0U)
{
tmp_timeout = 0U;
}
}
count--;
}
}
@@ -4412,4 +4434,3 @@ static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

13
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c
View File

@@ -10,13 +10,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -111,5 +110,3 @@ HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

40
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sram.c
View File

@@ -6,6 +6,17 @@
* This file provides a generic firmware to drive SRAM memories
* mounted as external device.
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -64,25 +75,25 @@
The compilation define USE_HAL_SRAM_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Functions @ref HAL_SRAM_RegisterCallback() to register a user callback,
Use Functions HAL_SRAM_RegisterCallback() to register a user callback,
it allows to register following callbacks:
(+) MspInitCallback : SRAM MspInit.
(+) MspDeInitCallback : SRAM MspDeInit.
This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function.
Use function @ref HAL_SRAM_UnRegisterCallback() to reset a callback to the default
Use function HAL_SRAM_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function. It allows to reset following callbacks:
(+) MspInitCallback : SRAM MspInit.
(+) MspDeInitCallback : SRAM MspDeInit.
This function) takes as parameters the HAL peripheral handle and the Callback ID.
By default, after the @ref HAL_SRAM_Init and if the state is HAL_SRAM_STATE_RESET
By default, after the HAL_SRAM_Init and if the state is HAL_SRAM_STATE_RESET
all callbacks are reset to the corresponding legacy weak (surcharged) functions.
Exception done for MspInit and MspDeInit callbacks that are respectively
reset to the legacy weak (surcharged) functions in the @ref HAL_SRAM_Init
and @ref HAL_SRAM_DeInit only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the @ref HAL_SRAM_Init and @ref HAL_SRAM_DeInit
reset to the legacy weak (surcharged) functions in the HAL_SRAM_Init
and HAL_SRAM_DeInit only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the HAL_SRAM_Init and HAL_SRAM_DeInit
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
Callbacks can be registered/unregistered in READY state only.
@@ -90,8 +101,8 @@
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_SRAM_RegisterCallback before calling @ref HAL_SRAM_DeInit
or @ref HAL_SRAM_Init function.
using HAL_SRAM_RegisterCallback before calling HAL_SRAM_DeInit
or HAL_SRAM_Init function.
When The compilation define USE_HAL_SRAM_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registering feature is not available
@@ -99,17 +110,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -1108,5 +1108,3 @@ static void SRAM_DMAError(DMA_HandleTypeDef *hdma)
*/
#endif /* FMC_BANK1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

1123
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
View File

File diff suppressed because it is too large Load Diff

425
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
View File

@@ -13,6 +13,17 @@
* + Time OCRef clear configuration
* + Timer remapping capabilities configuration
* + Timer encoder index configuration
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### TIMER Extended features #####
@@ -62,24 +73,16 @@
(#) Activate the TIM peripheral using one of the start functions:
(++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OCN_Start_IT()
(++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
(++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(),
HAL_TIMEx_OCN_Start_IT()
(++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(),
HAL_TIMEx_PWMN_Start_IT()
(++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
(++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
(++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(),
HAL_TIMEx_HallSensor_Start_IT().
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -354,7 +357,8 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
/* Enable the Input Capture channel 1
(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
TIM_CHANNEL_2 and TIM_CHANNEL_3) */
TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
@@ -386,7 +390,8 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
/* Disable the Input Capture channels 1, 2 and 3
(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
TIM_CHANNEL_2 and TIM_CHANNEL_3) */
TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
/* Disable the Peripheral */
@@ -437,7 +442,8 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
/* Enable the Input Capture channel 1
(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
TIM_CHANNEL_2 and TIM_CHANNEL_3) */
TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
@@ -469,7 +475,8 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
/* Disable the Input Capture channel 1
(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
TIM_CHANNEL_2 and TIM_CHANNEL_3) */
TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
/* Disable the capture compare Interrupts event */
@@ -529,7 +536,8 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
}
/* Enable the Input Capture channel 1
(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
TIM_CHANNEL_2 and TIM_CHANNEL_3) */
TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
/* Set the DMA Input Capture 1 Callbacks */
@@ -576,7 +584,8 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
/* Disable the Input Capture channel 1
(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
TIM_CHANNEL_2 and TIM_CHANNEL_3) */
TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
@@ -719,6 +728,7 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
*/
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
/* Check the parameters */
@@ -765,34 +775,38 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Chann
}
default:
status = HAL_ERROR;
break;
}
/* Enable the TIM Break interrupt */
__HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
/* Enable the Capture compare channel N */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
/* Enable the Main Output */
__HAL_TIM_MOE_ENABLE(htim);
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
if (status == HAL_OK)
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
/* Enable the TIM Break interrupt */
__HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
/* Enable the Capture compare channel N */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
/* Enable the Main Output */
__HAL_TIM_MOE_ENABLE(htim);
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
{
__HAL_TIM_ENABLE(htim);
}
}
else
{
__HAL_TIM_ENABLE(htim);
}
}
else
{
__HAL_TIM_ENABLE(htim);
}
/* Return function status */
return HAL_OK;
return status;
}
/**
@@ -809,7 +823,9 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Chann
*/
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpccer;
/* Check the parameters */
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
@@ -844,30 +860,34 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channe
}
default:
status = HAL_ERROR;
break;
}
/* Disable the Capture compare channel N */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
/* Disable the TIM Break interrupt (only if no more channel is active) */
tmpccer = htim->Instance->CCER;
if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE | TIM_CCER_CC4NE)) == (uint32_t)RESET)
if (status == HAL_OK)
{
__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
/* Disable the Capture compare channel N */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
/* Disable the TIM Break interrupt (only if no more channel is active) */
tmpccer = htim->Instance->CCER;
if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE | TIM_CCER_CC4NE)) == (uint32_t)RESET)
{
__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
}
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
/* Set the TIM complementary channel state */
TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
}
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
/* Set the TIM complementary channel state */
TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
/* Return function status */
return HAL_OK;
return status;
}
/**
@@ -886,6 +906,7 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channe
*/
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
/* Check the parameters */
@@ -924,7 +945,8 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -944,7 +966,8 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -964,7 +987,8 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -984,7 +1008,8 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAErrorCCxN ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length) != HAL_OK)
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4,
Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -995,31 +1020,35 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
}
default:
status = HAL_ERROR;
break;
}
/* Enable the Capture compare channel N */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
/* Enable the Main Output */
__HAL_TIM_MOE_ENABLE(htim);
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
if (status == HAL_OK)
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
/* Enable the Capture compare channel N */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
/* Enable the Main Output */
__HAL_TIM_MOE_ENABLE(htim);
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
{
__HAL_TIM_ENABLE(htim);
}
}
else
{
__HAL_TIM_ENABLE(htim);
}
}
else
{
__HAL_TIM_ENABLE(htim);
}
/* Return function status */
return HAL_OK;
return status;
}
/**
@@ -1036,6 +1065,8 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
*/
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
{
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
@@ -1074,23 +1105,27 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chann
}
default:
status = HAL_ERROR;
break;
}
/* Disable the Capture compare channel N */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
if (status == HAL_OK)
{
/* Disable the Capture compare channel N */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
/* Set the TIM complementary channel state */
TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
/* Set the TIM complementary channel state */
TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
}
/* Return function status */
return HAL_OK;
return status;
}
/**
@@ -1224,6 +1259,7 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
*/
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
/* Check the parameters */
@@ -1269,34 +1305,38 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Chan
}
default:
status = HAL_ERROR;
break;
}
/* Enable the TIM Break interrupt */
__HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
/* Enable the complementary PWM output */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
/* Enable the Main Output */
__HAL_TIM_MOE_ENABLE(htim);
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
if (status == HAL_OK)
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
/* Enable the TIM Break interrupt */
__HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
/* Enable the complementary PWM output */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
/* Enable the Main Output */
__HAL_TIM_MOE_ENABLE(htim);
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
{
__HAL_TIM_ENABLE(htim);
}
}
else
{
__HAL_TIM_ENABLE(htim);
}
}
else
{
__HAL_TIM_ENABLE(htim);
}
/* Return function status */
return HAL_OK;
return status;
}
/**
@@ -1313,6 +1353,7 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Chan
*/
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpccer;
/* Check the parameters */
@@ -1349,30 +1390,34 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Chann
}
default:
status = HAL_ERROR;
break;
}
/* Disable the complementary PWM output */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
/* Disable the TIM Break interrupt (only if no more channel is active) */
tmpccer = htim->Instance->CCER;
if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE | TIM_CCER_CC4NE)) == (uint32_t)RESET)
if (status == HAL_OK)
{
__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
/* Disable the complementary PWM output */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
/* Disable the TIM Break interrupt (only if no more channel is active) */
tmpccer = htim->Instance->CCER;
if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE | TIM_CCER_CC4NE)) == (uint32_t)RESET)
{
__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
}
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
/* Set the TIM complementary channel state */
TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
}
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
/* Set the TIM complementary channel state */
TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
/* Return function status */
return HAL_OK;
return status;
}
/**
@@ -1391,6 +1436,7 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Chann
*/
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
/* Check the parameters */
@@ -1429,7 +1475,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1449,7 +1496,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1469,7 +1517,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1489,7 +1538,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAErrorCCxN ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length) != HAL_OK)
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4,
Length) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
@@ -1500,31 +1550,35 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
}
default:
status = HAL_ERROR;
break;
}
/* Enable the complementary PWM output */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
/* Enable the Main Output */
__HAL_TIM_MOE_ENABLE(htim);
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
if (status == HAL_OK)
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
/* Enable the complementary PWM output */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
/* Enable the Main Output */
__HAL_TIM_MOE_ENABLE(htim);
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
{
__HAL_TIM_ENABLE(htim);
}
}
else
{
__HAL_TIM_ENABLE(htim);
}
}
else
{
__HAL_TIM_ENABLE(htim);
}
/* Return function status */
return HAL_OK;
return status;
}
/**
@@ -1541,6 +1595,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
*/
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
{
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
@@ -1579,23 +1635,27 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
}
default:
status = HAL_ERROR;
break;
}
/* Disable the complementary PWM output */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
if (status == HAL_OK)
{
/* Disable the complementary PWM output */
TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
/* Set the TIM complementary channel state */
TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
/* Set the TIM complementary channel state */
TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
}
/* Return function status */
return HAL_OK;
return status;
}
/**
@@ -1623,8 +1683,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
/**
* @brief Starts the TIM One Pulse signal generation on the complementary
* output.
* @note OutputChannel must match the pulse output channel chosen when calling
* @ref HAL_TIM_OnePulse_ConfigChannel().
* @note OutputChannel must match the pulse output channel chosen when calling
* @ref HAL_TIM_OnePulse_ConfigChannel().
* @param htim TIM One Pulse handle
* @param OutputChannel pulse output channel to enable
* This parameter can be one of the following values:
@@ -1644,7 +1704,7 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t Ou
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
/* Check the TIM channels state */
if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
|| (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
|| (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
|| (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
@@ -1672,8 +1732,8 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t Ou
/**
* @brief Stops the TIM One Pulse signal generation on the complementary
* output.
* @note OutputChannel must match the pulse output channel chosen when calling
* @ref HAL_TIM_OnePulse_ConfigChannel().
* @note OutputChannel must match the pulse output channel chosen when calling
* @ref HAL_TIM_OnePulse_ConfigChannel().
* @param htim TIM One Pulse handle
* @param OutputChannel pulse output channel to disable
* This parameter can be one of the following values:
@@ -1711,8 +1771,8 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t Out
/**
* @brief Starts the TIM One Pulse signal generation in interrupt mode on the
* complementary channel.
* @note OutputChannel must match the pulse output channel chosen when calling
* @ref HAL_TIM_OnePulse_ConfigChannel().
* @note OutputChannel must match the pulse output channel chosen when calling
* @ref HAL_TIM_OnePulse_ConfigChannel().
* @param htim TIM One Pulse handle
* @param OutputChannel pulse output channel to enable
* This parameter can be one of the following values:
@@ -1732,7 +1792,7 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
/* Check the TIM channels state */
if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
|| (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
|| (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
|| (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
@@ -1766,8 +1826,8 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t
/**
* @brief Stops the TIM One Pulse signal generation in interrupt mode on the
* complementary channel.
* @note OutputChannel must match the pulse output channel chosen when calling
* @ref HAL_TIM_OnePulse_ConfigChannel().
* @note OutputChannel must match the pulse output channel chosen when calling
* @ref HAL_TIM_OnePulse_ConfigChannel().
* @param htim TIM One Pulse handle
* @param OutputChannel pulse output channel to disable
* This parameter can be one of the following values:
@@ -2285,6 +2345,7 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmporx;
uint32_t bkin_enable_mask;
uint32_t bkin_polarity_mask;
@@ -2424,12 +2485,13 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
break;
}
default:
status = HAL_ERROR;
break;
}
__HAL_UNLOCK(htim);
return HAL_OK;
return status;
}
/**
@@ -2811,6 +2873,7 @@ HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Chan
*/
HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpbdtr;
/* Check the parameters */
@@ -2845,10 +2908,11 @@ HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t B
break;
}
default:
status = HAL_ERROR;
break;
}
return HAL_OK;
return status;
}
/**
@@ -2864,6 +2928,7 @@ HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t B
*/
HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tickstart;
/* Check the parameters */
@@ -2880,15 +2945,17 @@ HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t Br
/* Break input BRK is re-armed automatically by hardware. Poll to check whether fault condition disappeared */
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
do
while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL)
{
if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != TIM_BDTR_BKDSRM)
if ((HAL_GetTick() - tickstart) > TIM_BREAKINPUT_REARM_TIMEOUT)
{
return HAL_OK;
/* New check to avoid false timeout detection in case of preemption */
if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL)
{
return HAL_TIMEOUT;
}
}
} while ((HAL_GetTick() - tickstart) <= TIM_BREAKINPUT_REARM_TIMEOUT);
return HAL_TIMEOUT;
}
}
break;
}
@@ -2901,23 +2968,26 @@ HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t Br
/* Break input BRK2 is re-armed automatically by hardware. Poll to check whether fault condition disappeared */
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
do
while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != 0UL)
{
if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != TIM_BDTR_BK2DSRM)
if ((HAL_GetTick() - tickstart) > TIM_BREAKINPUT_REARM_TIMEOUT)
{
return HAL_OK;
/* New check to avoid false timeout detection in case of preemption */
if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != 0UL)
{
return HAL_TIMEOUT;
}
}
} while ((HAL_GetTick() - tickstart) <= TIM_BREAKINPUT_REARM_TIMEOUT);
return HAL_TIMEOUT;
}
}
break;
}
default:
status = HAL_ERROR;
break;
}
return HAL_OK;
return status;
}
/**
@@ -2934,8 +3004,9 @@ HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t Br
* @note Macros @ref __HAL_TIM_CALC_PERIOD_DITHER() __HAL_TIM_CALC_DELAY_DITHER() __HAL_TIM_CALC_PULSE_DITHER()
* can be used to calculate period (ARR) and delay (CCRx) value.
* @note Enabling dithering, modifies automatically values of registers ARR/CCRx to keep the same integer part.
* So it may be necessary to read ARR value or CCRx value with macros @ref __HAL_TIM_GET_AUTORELOAD() __HAL_TIM_GET_COMPARE()
* and if necessary update Init structure field htim->Init.Period .
* @note Enabling dithering, modifies automatically values of registers ARR/CCRx to keep the same integer part.
* So it may be necessary to read ARR value or CCRx value with macros @ref __HAL_TIM_GET_AUTORELOAD()
* __HAL_TIM_GET_COMPARE() and if necessary update Init structure field htim->Init.Period .
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_DitheringEnable(TIM_HandleTypeDef *htim)
@@ -2958,8 +3029,8 @@ HAL_StatusTypeDef HAL_TIMEx_DitheringEnable(TIM_HandleTypeDef *htim)
* - ARR and CCRx values are limited to 0xFFEF in dithering mode
* (corresponds to 4094 for the integer part and 15 for the dithered part).
* @note Disabling dithering, modifies automatically values of registers ARR/CCRx to keep the same integer part.
* So it may be necessary to read ARR value or CCRx value with macros @ref __HAL_TIM_GET_AUTORELOAD() __HAL_TIM_GET_COMPARE()
* and if necessary update Init structure field htim->Init.Period .
* So it may be necessary to read ARR value or CCRx value with macros @ref __HAL_TIM_GET_AUTORELOAD()
* __HAL_TIM_GET_COMPARE() and if necessary update Init structure field htim->Init.Period .
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_DitheringDisable(TIM_HandleTypeDef *htim)
@@ -3451,7 +3522,7 @@ HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim,
*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup TIMEx_Private_Functions TIMEx Private Functions
/** @defgroup TIMEx_Private_Functions TIM Extended Private Functions
* @{
*/
@@ -3628,5 +3699,3 @@ static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Cha
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

24
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_timebase_tim_template.c
View File

@@ -8,8 +8,18 @@
* the TIM time base:
* + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms
* + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
******************************************************************************
* @attention
*
@verbatim
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
@@ -25,17 +35,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -197,4 +196,3 @@ void TIM6_DAC_IRQHandler(void)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

380
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c
View File

@@ -10,6 +10,17 @@
* + Peripheral Control functions
*
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
===============================================================================
##### How to use this driver #####
@@ -76,8 +87,8 @@
allows the user to configure dynamically the driver callbacks.
[..]
Use Function @ref HAL_UART_RegisterCallback() to register a user callback.
Function @ref HAL_UART_RegisterCallback() allows to register following callbacks:
Use Function HAL_UART_RegisterCallback() to register a user callback.
Function HAL_UART_RegisterCallback() allows to register following callbacks:
(+) TxHalfCpltCallback : Tx Half Complete Callback.
(+) TxCpltCallback : Tx Complete Callback.
(+) RxHalfCpltCallback : Rx Half Complete Callback.
@@ -95,9 +106,9 @@
and a pointer to the user callback function.
[..]
Use function @ref HAL_UART_UnRegisterCallback() to reset a callback to the default
Use function HAL_UART_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function.
@ref HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle,
HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) TxHalfCpltCallback : Tx Half Complete Callback.
@@ -116,16 +127,16 @@
[..]
For specific callback RxEventCallback, use dedicated registration/reset functions:
respectively @ref HAL_UART_RegisterRxEventCallback() , @ref HAL_UART_UnRegisterRxEventCallback().
respectively HAL_UART_RegisterRxEventCallback() , HAL_UART_UnRegisterRxEventCallback().
[..]
By default, after the @ref HAL_UART_Init() and when the state is HAL_UART_STATE_RESET
By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET
all callbacks are set to the corresponding weak (surcharged) functions:
examples @ref HAL_UART_TxCpltCallback(), @ref HAL_UART_RxHalfCpltCallback().
examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback().
Exception done for MspInit and MspDeInit functions that are respectively
reset to the legacy weak (surcharged) functions in the @ref HAL_UART_Init()
and @ref HAL_UART_DeInit() only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the @ref HAL_UART_Init() and @ref HAL_UART_DeInit()
reset to the legacy weak (surcharged) functions in the HAL_UART_Init()
and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
[..]
@@ -134,8 +145,8 @@
in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user)
MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_UART_RegisterCallback() before calling @ref HAL_UART_DeInit()
or @ref HAL_UART_Init() function.
using HAL_UART_RegisterCallback() before calling HAL_UART_DeInit()
or HAL_UART_Init() function.
[..]
When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or
@@ -145,17 +156,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -193,7 +193,6 @@
*/
/* Private macros ------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/** @addtogroup UART_Private_Functions
* @{
@@ -223,8 +222,8 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
* @}
*/
/* Exported Constants --------------------------------------------------------*/
/** @addtogroup UART_Exported_Constants
/* Private variables ---------------------------------------------------------*/
/** @addtogroup UART_Private_variables
* @{
*/
const uint16_t UARTPrescTable[12] = {1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64U, 128U, 256U};
@@ -232,6 +231,7 @@ const uint16_t UARTPrescTable[12] = {1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64U
* @}
*/
/* Exported Constants --------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup UART_Exported_Functions UART Exported Functions
@@ -1118,10 +1118,10 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart)
* @param Timeout Timeout duration.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
uint8_t *pdata8bits;
uint16_t *pdata16bits;
const uint8_t *pdata8bits;
const uint16_t *pdata16bits;
uint32_t tickstart;
/* Check that a Tx process is not already ongoing */
@@ -1147,7 +1147,7 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, u
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
{
pdata8bits = NULL;
pdata16bits = (uint16_t *) pData;
pdata16bits = (const uint16_t *) pData;
}
else
{
@@ -1293,7 +1293,7 @@ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, ui
* @param Size Amount of data elements (u8 or u16) to be sent.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
{
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
@@ -1329,7 +1329,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData
__HAL_UNLOCK(huart);
/* Enable the TX FIFO threshold interrupt */
SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
}
else
{
@@ -1346,7 +1346,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData
__HAL_UNLOCK(huart);
/* Enable the Transmit Data Register Empty interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
}
return HAL_OK;
@@ -1388,7 +1388,7 @@ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData,
if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
{
/* Enable the UART Receiver Timeout Interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
}
}
@@ -1410,7 +1410,7 @@ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData,
* @param Size Amount of data elements (u8 or u16) to be sent.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
{
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
@@ -1464,7 +1464,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pDat
/* Enable the DMA transfer for transmit request by setting the DMAT bit
in the UART CR3 register */
SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
return HAL_OK;
}
@@ -1507,7 +1507,7 @@ HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData
if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
{
/* Enable the UART Receiver Timeout Interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
}
}
@@ -1535,17 +1535,17 @@ HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
(gstate == HAL_UART_STATE_BUSY_TX))
{
/* Disable the UART DMA Tx request */
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
}
if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
(rxstate == HAL_UART_STATE_BUSY_RX))
{
/* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
/* Disable the UART DMA Rx request */
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
}
__HAL_UNLOCK(huart);
@@ -1565,7 +1565,7 @@ HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
if (huart->gState == HAL_UART_STATE_BUSY_TX)
{
/* Enable the UART DMA Tx request */
SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
}
if (huart->RxState == HAL_UART_STATE_BUSY_RX)
{
@@ -1573,11 +1573,14 @@ HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
/* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */
SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
if (huart->Init.Parity != UART_PARITY_NONE)
{
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
}
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
/* Enable the UART DMA Rx request */
SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
}
__HAL_UNLOCK(huart);
@@ -1606,7 +1609,7 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
(gstate == HAL_UART_STATE_BUSY_TX))
{
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
/* Abort the UART DMA Tx channel */
if (huart->hdmatx != NULL)
@@ -1630,7 +1633,7 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
(rxstate == HAL_UART_STATE_BUSY_RX))
{
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
/* Abort the UART DMA Rx channel */
if (huart->hdmarx != NULL)
@@ -1668,20 +1671,21 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
{
/* Disable TXE, TC, RXNE, PE, RXFT, TXFT and ERR (Frame error, noise error, overrun error) interrupts */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE |
USART_CR1_TCIE));
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE |
USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE);
/* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
}
/* Disable the UART DMA Tx request if enabled */
/* Abort the UART DMA Tx channel if enabled */
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
{
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
/* Disable the UART DMA Tx request if enabled */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
/* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
if (huart->hdmatx != NULL)
@@ -1703,10 +1707,11 @@ HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
}
}
/* Disable the UART DMA Rx request if enabled */
/* Abort the UART DMA Rx channel if enabled */
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
{
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
/* Disable the UART DMA Rx request if enabled */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
/* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
if (huart->hdmarx != NULL)
@@ -1769,13 +1774,14 @@ HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
{
/* Disable TCIE, TXEIE and TXFTIE interrupts */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
/* Disable the UART DMA Tx request if enabled */
/* Abort the UART DMA Tx channel if enabled */
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
{
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
/* Disable the UART DMA Tx request if enabled */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
/* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
if (huart->hdmatx != NULL)
@@ -1827,19 +1833,20 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
{
/* Disable PEIE, EIE, RXNEIE and RXFTIE interrupts */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE);
/* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
}
/* Disable the UART DMA Rx request if enabled */
/* Abort the UART DMA Rx channel if enabled */
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
{
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
/* Disable the UART DMA Rx request if enabled */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
/* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
if (huart->hdmarx != NULL)
@@ -1896,14 +1903,14 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
uint32_t abortcplt = 1U;
/* Disable interrupts */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_TCIE | USART_CR1_RXNEIE_RXFNEIE |
USART_CR1_TXEIE_TXFNFIE));
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_TCIE | USART_CR1_RXNEIE_RXFNEIE |
USART_CR1_TXEIE_TXFNFIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE));
/* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
}
/* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
@@ -1937,11 +1944,11 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
}
}
/* Disable the UART DMA Tx request if enabled */
/* Abort the UART DMA Tx channel if enabled */
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
{
/* Disable DMA Tx at UART level */
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
/* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
if (huart->hdmatx != NULL)
@@ -1961,10 +1968,11 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
}
}
/* Disable the UART DMA Rx request if enabled */
/* Abort the UART DMA Rx channel if enabled */
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
{
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
/* Disable the UART DMA Rx request if enabled */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
/* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
if (huart->hdmarx != NULL)
@@ -2046,13 +2054,14 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
{
/* Disable interrupts */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
/* Disable the UART DMA Tx request if enabled */
/* Abort the UART DMA Tx channel if enabled */
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
{
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
/* Disable the UART DMA Tx request if enabled */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
/* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
if (huart->hdmatx != NULL)
@@ -2136,19 +2145,20 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
{
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
/* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE));
}
/* Disable the UART DMA Rx request if enabled */
/* Abort the UART DMA Rx channel if enabled */
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
{
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
/* Disable the UART DMA Rx request if enabled */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
/* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
if (huart->hdmarx != NULL)
@@ -2326,10 +2336,11 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
UART_EndRxTransfer(huart);
/* Disable the UART DMA Rx request if enabled */
/* Abort the UART DMA Rx channel if enabled */
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
{
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
/* Disable the UART DMA Rx request if enabled */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
/* Abort the UART DMA Rx channel */
if (huart->hdmarx != NULL)
@@ -2414,18 +2425,18 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
if (HAL_IS_BIT_CLR(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC))
{
/* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
/* Disable the DMA transfer for the receiver request by resetting the DMAR bit
in the UART CR3 register */
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
/* At end of Rx process, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
/* Last bytes received, so no need as the abort is immediate */
(void)HAL_DMA_Abort(huart->hdmarx);
@@ -2450,10 +2461,10 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
&& (nb_rx_data > 0U))
{
/* Disable the UART Parity Error Interrupt and RXNE interrupts */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
/* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
/* Rx process is completed, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
@@ -2462,7 +2473,7 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
/* Clear RxISR function pointer */
huart->RxISR = NULL;
CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx complete callback*/
huart->RxEventCallback(huart, nb_rx_data);
@@ -2812,7 +2823,7 @@ HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
huart->gState = HAL_UART_STATE_BUSY;
/* Enable USART mute mode by setting the MME bit in the CR1 register */
SET_BIT(huart->Instance->CR1, USART_CR1_MME);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_MME);
huart->gState = HAL_UART_STATE_READY;
@@ -2832,7 +2843,7 @@ HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
huart->gState = HAL_UART_STATE_BUSY;
/* Disable USART mute mode by clearing the MME bit in the CR1 register */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME);
huart->gState = HAL_UART_STATE_READY;
@@ -2861,10 +2872,10 @@ HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
huart->gState = HAL_UART_STATE_BUSY;
/* Clear TE and RE bits */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
/* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
SET_BIT(huart->Instance->CR1, USART_CR1_TE);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TE);
huart->gState = HAL_UART_STATE_READY;
@@ -2884,10 +2895,10 @@ HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
huart->gState = HAL_UART_STATE_BUSY;
/* Clear TE and RE bits */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
/* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
SET_BIT(huart->Instance->CR1, USART_CR1_RE);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RE);
huart->gState = HAL_UART_STATE_READY;
@@ -3157,7 +3168,7 @@ HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
/* USARTDIV must be greater than or equal to 0d16 */
if (pclk != 0U)
{
usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
{
brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
@@ -3198,10 +3209,10 @@ HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
if (pclk != 0U)
{
/* USARTDIV must be greater than or equal to 0d16 */
usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
{
huart->Instance->BRR = usartdiv;
huart->Instance->BRR = (uint16_t)usartdiv;
}
else
{
@@ -3343,10 +3354,11 @@ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
}
/**
* @brief Handle UART Communication Timeout.
* @brief This function handles UART Communication Timeout. It waits
* until a flag is no longer in the specified status.
* @param huart UART handle.
* @param Flag Specifies the UART flag to check
* @param Status Flag status (SET or RESET)
* @param Status The actual Flag status (SET or RESET)
* @param Tickstart Tick start value
* @param Timeout Timeout duration
* @retval HAL status
@@ -3364,8 +3376,9 @@ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_
{
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
interrupts for the interrupt process */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE));
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE |
USART_CR1_TXEIE_TXFNFIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
huart->gState = HAL_UART_STATE_READY;
huart->RxState = HAL_UART_STATE_READY;
@@ -3384,8 +3397,9 @@ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
interrupts for the interrupt process */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE));
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE |
USART_CR1_TXEIE_TXFNFIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
huart->gState = HAL_UART_STATE_READY;
huart->RxState = HAL_UART_STATE_READY;
@@ -3427,7 +3441,7 @@ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pDat
huart->RxState = HAL_UART_STATE_BUSY_RX;
/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
/* Configure Rx interrupt processing */
if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
@@ -3445,8 +3459,11 @@ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pDat
__HAL_UNLOCK(huart);
/* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
if (huart->Init.Parity != UART_PARITY_NONE)
{
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
}
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
}
else
{
@@ -3463,7 +3480,14 @@ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pDat
__HAL_UNLOCK(huart);
/* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
if (huart->Init.Parity != UART_PARITY_NONE)
{
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
}
else
{
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
}
}
return HAL_OK;
}
@@ -3509,8 +3533,8 @@ HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pDa
__HAL_UNLOCK(huart);
/* Restore huart->gState to ready */
huart->gState = HAL_UART_STATE_READY;
/* Restore huart->RxState to ready */
huart->RxState = HAL_UART_STATE_READY;
return HAL_ERROR;
}
@@ -3518,14 +3542,17 @@ HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pDa
__HAL_UNLOCK(huart);
/* Enable the UART Parity Error Interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
if (huart->Init.Parity != UART_PARITY_NONE)
{
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
}
/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
/* Enable the DMA transfer for the receiver request by setting the DMAR bit
in the UART CR3 register */
SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
return HAL_OK;
}
@@ -3539,8 +3566,8 @@ HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pDa
static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
{
/* Disable TXEIE, TCIE, TXFT interrupts */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE));
/* At end of Tx process, restore huart->gState to Ready */
huart->gState = HAL_UART_STATE_READY;
@@ -3555,13 +3582,13 @@ static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
/* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
}
/* At end of Rx process, restore huart->RxState to Ready */
@@ -3589,10 +3616,10 @@ static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
/* Disable the DMA transfer for transmit request by resetting the DMAT bit
in the UART CR3 register */
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
/* Enable the UART Transmit Complete Interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
}
/* DMA Circular mode */
else
@@ -3640,12 +3667,12 @@ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
huart->RxXferCount = 0U;
/* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
/* Disable the DMA transfer for the receiver request by resetting the DMAR bit
in the UART CR3 register */
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
/* At end of Rx process, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
@@ -3653,7 +3680,7 @@ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
/* If Reception till IDLE event has been selected, Disable IDLE Interrupt */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
}
}
@@ -3965,10 +3992,10 @@ static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
if (huart->TxXferCount == 0U)
{
/* Disable the UART Transmit Data Register Empty Interrupt */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
/* Enable the UART Transmit Complete Interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
}
else
{
@@ -3988,7 +4015,7 @@ static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
*/
static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
{
uint16_t *tmp;
const uint16_t *tmp;
/* Check that a Tx process is ongoing */
if (huart->gState == HAL_UART_STATE_BUSY_TX)
@@ -3996,14 +4023,14 @@ static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
if (huart->TxXferCount == 0U)
{
/* Disable the UART Transmit Data Register Empty Interrupt */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
/* Enable the UART Transmit Complete Interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
}
else
{
tmp = (uint16_t *) huart->pTxBuffPtr;
tmp = (const uint16_t *) huart->pTxBuffPtr;
huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
huart->pTxBuffPtr += 2U;
huart->TxXferCount--;
@@ -4030,10 +4057,10 @@ static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
if (huart->TxXferCount == 0U)
{
/* Disable the TX FIFO threshold interrupt */
CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
/* Enable the UART Transmit Complete Interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
break; /* force exit loop */
}
@@ -4060,7 +4087,7 @@ static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
*/
static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
{
uint16_t *tmp;
const uint16_t *tmp;
uint16_t nb_tx_data;
/* Check that a Tx process is ongoing */
@@ -4071,16 +4098,16 @@ static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
if (huart->TxXferCount == 0U)
{
/* Disable the TX FIFO threshold interrupt */
CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
/* Enable the UART Transmit Complete Interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
break; /* force exit loop */
}
else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
{
tmp = (uint16_t *) huart->pTxBuffPtr;
tmp = (const uint16_t *) huart->pTxBuffPtr;
huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
huart->pTxBuffPtr += 2U;
huart->TxXferCount--;
@@ -4102,7 +4129,7 @@ static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
{
/* Disable the UART Transmit Complete Interrupt */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
/* Tx process is ended, restore huart->gState to Ready */
huart->gState = HAL_UART_STATE_READY;
@@ -4140,10 +4167,10 @@ static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
if (huart->RxXferCount == 0U)
{
/* Disable the UART Parity Error Interrupt and RXNE interrupts */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
/* Rx process is completed, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
@@ -4155,9 +4182,17 @@ static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
If Reception till IDLE event has been selected : */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
/* Disable IDLE interrupt */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
/* Set reception type to Standard */
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
/* Disable IDLE interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
{
/* Clear IDLE Flag */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
}
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, huart->RxXferSize);
@@ -4177,7 +4212,6 @@ static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
HAL_UART_RxCpltCallback(huart);
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
}
}
else
@@ -4212,10 +4246,10 @@ static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
if (huart->RxXferCount == 0U)
{
/* Disable the UART Parity Error Interrupt and RXNE interrupt*/
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
/* Rx process is completed, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
@@ -4227,9 +4261,17 @@ static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
If Reception till IDLE event has been selected : */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
/* Disable IDLE interrupt */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
/* Set reception type to Standard */
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
/* Disable IDLE interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
{
/* Clear IDLE Flag */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
}
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, huart->RxXferSize);
@@ -4249,7 +4291,6 @@ static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
HAL_UART_RxCpltCallback(huart);
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
}
}
else
@@ -4334,11 +4375,11 @@ static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
if (huart->RxXferCount == 0U)
{
/* Disable the UART Parity Error Interrupt and RXFT interrupt*/
CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
and RX FIFO Threshold interrupt */
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
/* Rx process is completed, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
@@ -4350,9 +4391,17 @@ static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
If Reception till IDLE event has been selected : */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
/* Disable IDLE interrupt */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
/* Set reception type to Standard */
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
/* Disable IDLE interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
{
/* Clear IDLE Flag */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
}
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, huart->RxXferSize);
@@ -4372,7 +4421,6 @@ static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
HAL_UART_RxCpltCallback(huart);
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
}
}
@@ -4384,13 +4432,13 @@ static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
{
/* Disable the UART RXFT interrupt*/
CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
/* Update the RxISR function pointer */
huart->RxISR = UART_RxISR_8BIT;
/* Enable the UART Data Register Not Empty interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
}
}
else
@@ -4477,11 +4525,11 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
if (huart->RxXferCount == 0U)
{
/* Disable the UART Parity Error Interrupt and RXFT interrupt*/
CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
and RX FIFO Threshold interrupt */
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
/* Rx process is completed, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
@@ -4493,9 +4541,17 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
If Reception till IDLE event has been selected : */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
/* Disable IDLE interrupt */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
/* Set reception type to Standard */
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
/* Disable IDLE interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
{
/* Clear IDLE Flag */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
}
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, huart->RxXferSize);
@@ -4515,7 +4571,6 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
HAL_UART_RxCpltCallback(huart);
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
}
}
@@ -4527,13 +4582,13 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
{
/* Disable the UART RXFT interrupt*/
CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
/* Update the RxISR function pointer */
huart->RxISR = UART_RxISR_16BIT;
/* Enable the UART Data Register Not Empty interrupt */
SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
}
}
else
@@ -4556,4 +4611,3 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

31
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c
View File

@@ -9,6 +9,17 @@
* + Peripheral Control functions
*
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### UART peripheral extended features #####
@@ -27,17 +38,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -483,7 +483,7 @@ HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart)
__HAL_LOCK(huart);
/* Set UESM bit */
SET_BIT(huart->Instance->CR1, USART_CR1_UESM);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_UESM);
/* Process Unlocked */
__HAL_UNLOCK(huart);
@@ -502,7 +502,7 @@ HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart)
__HAL_LOCK(huart);
/* Clear UESM bit */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_UESM);
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_UESM);
/* Process Unlocked */
__HAL_UNLOCK(huart);
@@ -858,7 +858,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
}
else
{
@@ -920,7 +920,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
}
else
{
@@ -1016,4 +1016,3 @@ static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

159
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart.c
View File

@@ -11,6 +11,17 @@
* + Peripheral Control functions
* + Peripheral State and Error functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
===============================================================================
##### How to use this driver #####
@@ -62,8 +73,8 @@
allows the user to configure dynamically the driver callbacks.
[..]
Use Function @ref HAL_USART_RegisterCallback() to register a user callback.
Function @ref HAL_USART_RegisterCallback() allows to register following callbacks:
Use Function HAL_USART_RegisterCallback() to register a user callback.
Function HAL_USART_RegisterCallback() allows to register following callbacks:
(+) TxHalfCpltCallback : Tx Half Complete Callback.
(+) TxCpltCallback : Tx Complete Callback.
(+) RxHalfCpltCallback : Rx Half Complete Callback.
@@ -79,9 +90,9 @@
and a pointer to the user callback function.
[..]
Use function @ref HAL_USART_UnRegisterCallback() to reset a callback to the default
Use function HAL_USART_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function.
@ref HAL_USART_UnRegisterCallback() takes as parameters the HAL peripheral handle,
HAL_USART_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
(+) TxHalfCpltCallback : Tx Half Complete Callback.
@@ -97,13 +108,13 @@
(+) MspDeInitCallback : USART MspDeInit.
[..]
By default, after the @ref HAL_USART_Init() and when the state is HAL_USART_STATE_RESET
By default, after the HAL_USART_Init() and when the state is HAL_USART_STATE_RESET
all callbacks are set to the corresponding weak (surcharged) functions:
examples @ref HAL_USART_TxCpltCallback(), @ref HAL_USART_RxHalfCpltCallback().
examples HAL_USART_TxCpltCallback(), HAL_USART_RxHalfCpltCallback().
Exception done for MspInit and MspDeInit functions that are respectively
reset to the legacy weak (surcharged) functions in the @ref HAL_USART_Init()
and @ref HAL_USART_DeInit() only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the @ref HAL_USART_Init() and @ref HAL_USART_DeInit()
reset to the legacy weak (surcharged) functions in the HAL_USART_Init()
and HAL_USART_DeInit() only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the HAL_USART_Init() and HAL_USART_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
[..]
@@ -112,8 +123,8 @@
in HAL_USART_STATE_READY or HAL_USART_STATE_RESET state, thus registered (user)
MspInit/DeInit callbacks can be used during the Init/DeInit.
In that case first register the MspInit/MspDeInit user callbacks
using @ref HAL_USART_RegisterCallback() before calling @ref HAL_USART_DeInit()
or @ref HAL_USART_Init() function.
using HAL_USART_RegisterCallback() before calling HAL_USART_DeInit()
or HAL_USART_Init() function.
[..]
When The compilation define USE_HAL_USART_REGISTER_CALLBACKS is set to 0 or
@@ -123,17 +134,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -748,10 +748,10 @@ HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_
* @param Timeout Timeout duration.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size, uint32_t Timeout)
{
uint8_t *ptxdata8bits;
uint16_t *ptxdata16bits;
const uint8_t *ptxdata8bits;
const uint16_t *ptxdata16bits;
uint32_t tickstart;
if (husart->State == HAL_USART_STATE_READY)
@@ -777,7 +777,7 @@ HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxDa
if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
{
ptxdata8bits = NULL;
ptxdata16bits = (uint16_t *) pTxData;
ptxdata16bits = (const uint16_t *) pTxData;
}
else
{
@@ -957,13 +957,13 @@ HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxDat
* @param Timeout Timeout duration.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,
HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
uint16_t Size, uint32_t Timeout)
{
uint8_t *prxdata8bits;
uint16_t *prxdata16bits;
uint8_t *ptxdata8bits;
uint16_t *ptxdata16bits;
const uint8_t *ptxdata8bits;
const uint16_t *ptxdata16bits;
uint16_t uhMask;
uint16_t rxdatacount;
uint32_t tickstart;
@@ -998,7 +998,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t
{
prxdata8bits = NULL;
ptxdata8bits = NULL;
ptxdata16bits = (uint16_t *) pTxData;
ptxdata16bits = (const uint16_t *) pTxData;
prxdata16bits = (uint16_t *) pRxData;
}
else
@@ -1104,7 +1104,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t
* @param Size amount of data elements (u8 or u16) to be sent.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size)
{
if (husart->State == HAL_USART_STATE_READY)
{
@@ -1231,7 +1231,10 @@ HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRx
__HAL_UNLOCK(husart);
/* Enable the USART Parity Error interrupt and RX FIFO Threshold interrupt */
SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
if (husart->Init.Parity != USART_PARITY_NONE)
{
SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
}
SET_BIT(husart->Instance->CR3, USART_CR3_RXFTIE);
}
else
@@ -1250,7 +1253,14 @@ HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRx
__HAL_UNLOCK(husart);
/* Enable the USART Parity Error and Data Register not empty Interrupts */
SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
if (husart->Init.Parity != USART_PARITY_NONE)
{
SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
}
else
{
SET_BIT(husart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
}
}
if (husart->SlaveMode == USART_SLAVEMODE_DISABLE)
@@ -1291,7 +1301,7 @@ HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRx
* @param Size amount of data elements (u8 or u16) to be sent (same amount to be received).
* @retval HAL status
*/
HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,
HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
uint16_t Size)
{
@@ -1339,8 +1349,11 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint
/* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
/* Enable the USART Parity Error interrupt */
SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
if (husart->Init.Parity != USART_PARITY_NONE)
{
/* Enable the USART Parity Error interrupt */
SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
}
/* Enable the TX and RX FIFO Threshold interrupts */
SET_BIT(husart->Instance->CR3, (USART_CR3_TXFTIE | USART_CR3_RXFTIE));
@@ -1365,7 +1378,14 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint
SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
/* Enable the USART Parity Error and USART Data Register not empty Interrupts */
SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
if (husart->Init.Parity != USART_PARITY_NONE)
{
SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
}
else
{
SET_BIT(husart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
}
/* Enable the USART Transmit Data Register Empty Interrupt */
SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
@@ -1389,10 +1409,10 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint
* @param Size amount of data elements (u8 or u16) to be sent.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t *tmp;
const uint32_t *tmp;
if (husart->State == HAL_USART_STATE_READY)
{
@@ -1423,8 +1443,8 @@ HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *p
husart->hdmatx->XferErrorCallback = USART_DMAError;
/* Enable the USART transmit DMA channel */
tmp = (uint32_t *)&pTxData;
status = HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t *)tmp, (uint32_t)&husart->Instance->TDR, Size);
tmp = (const uint32_t *)&pTxData;
status = HAL_DMA_Start_IT(husart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&husart->Instance->TDR, Size);
}
if (status == HAL_OK)
@@ -1535,8 +1555,11 @@ HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pR
/* Process Unlocked */
__HAL_UNLOCK(husart);
/* Enable the USART Parity Error Interrupt */
SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
if (husart->Init.Parity != USART_PARITY_NONE)
{
/* Enable the USART Parity Error Interrupt */
SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
}
/* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
@@ -1591,11 +1614,11 @@ HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pR
* @param Size amount of data elements (u8 or u16) to be received/sent.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,
HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData,
uint16_t Size)
{
HAL_StatusTypeDef status;
uint32_t *tmp;
const uint32_t *tmp;
if (husart->State == HAL_USART_STATE_READY)
{
@@ -1637,13 +1660,13 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uin
/* Enable the USART receive DMA channel */
tmp = (uint32_t *)&pRxData;
status = HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t *)tmp, Size);
status = HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(const uint32_t *)tmp, Size);
/* Enable the USART transmit DMA channel */
if (status == HAL_OK)
{
tmp = (uint32_t *)&pTxData;
status = HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t *)tmp, (uint32_t)&husart->Instance->TDR, Size);
tmp = (const uint32_t *)&pTxData;
status = HAL_DMA_Start_IT(husart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&husart->Instance->TDR, Size);
}
}
else
@@ -1656,8 +1679,11 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uin
/* Process Unlocked */
__HAL_UNLOCK(husart);
/* Enable the USART Parity Error Interrupt */
SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
if (husart->Init.Parity != USART_PARITY_NONE)
{
/* Enable the USART Parity Error Interrupt */
SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
}
/* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
@@ -1774,7 +1800,10 @@ HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart)
__HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF);
/* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */
SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
if (husart->Init.Parity != USART_PARITY_NONE)
{
SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
}
SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
/* Enable the USART DMA Rx request before the DMA Tx request */
@@ -1866,9 +1895,10 @@ HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart)
USART_CR1_TCIE));
CLEAR_BIT(husart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE));
/* Disable the USART DMA Tx request if enabled */
/* Abort the USART DMA Tx channel if enabled */
if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
{
/* Disable the USART DMA Tx request if enabled */
CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
/* Abort the USART DMA Tx channel : use blocking DMA Abort API (no callback) */
@@ -1891,9 +1921,10 @@ HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart)
}
}
/* Disable the USART DMA Rx request if enabled */
/* Abort the USART DMA Rx channel if enabled */
if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
{
/* Disable the USART DMA Rx request if enabled */
CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
/* Abort the USART DMA Rx channel : use blocking DMA Abort API (no callback) */
@@ -1995,7 +2026,7 @@ HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart)
}
}
/* Disable the USART DMA Tx request if enabled */
/* Abort the USART DMA Tx channel if enabled */
if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
{
/* Disable DMA Tx at USART level */
@@ -2019,9 +2050,10 @@ HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart)
}
}
/* Disable the USART DMA Rx request if enabled */
/* Abort the USART DMA Rx channel if enabled */
if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
{
/* Disable the USART DMA Rx request if enabled */
CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
/* Abort the USART DMA Rx channel : use non blocking DMA Abort API (callback) */
@@ -2201,9 +2233,10 @@ void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
Disable Interrupts, and disable DMA requests, if ongoing */
USART_EndTransfer(husart);
/* Disable the USART DMA Rx request if enabled */
/* Abort the USART DMA Rx channel if enabled */
if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
{
/* Disable the USART DMA Rx request if enabled */
CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR | USART_CR3_DMAR);
/* Abort the USART DMA Tx channel */
@@ -2810,10 +2843,11 @@ static void USART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
/**
* @brief Handle USART Communication Timeout.
* @brief Handle USART Communication Timeout. It waits
* until a flag is no longer in the specified status.
* @param husart USART handle.
* @param Flag Specifies the USART flag to check.
* @param Status the Flag status (SET or RESET).
* @param Status the actual Flag status (SET or RESET).
* @param Tickstart Tick start value
* @param Timeout timeout duration.
* @retval HAL status
@@ -3038,7 +3072,7 @@ static void USART_TxISR_8BIT(USART_HandleTypeDef *husart)
static void USART_TxISR_16BIT(USART_HandleTypeDef *husart)
{
const HAL_USART_StateTypeDef state = husart->State;
uint16_t *tmp;
const uint16_t *tmp;
if ((state == HAL_USART_STATE_BUSY_TX) ||
(state == HAL_USART_STATE_BUSY_TX_RX))
@@ -3053,7 +3087,7 @@ static void USART_TxISR_16BIT(USART_HandleTypeDef *husart)
}
else
{
tmp = (uint16_t *) husart->pTxBuffPtr;
tmp = (const uint16_t *) husart->pTxBuffPtr;
husart->Instance->TDR = (uint16_t)(*tmp & 0x01FFU);
husart->pTxBuffPtr += 2U;
husart->TxXferCount--;
@@ -3119,7 +3153,7 @@ static void USART_TxISR_8BIT_FIFOEN(USART_HandleTypeDef *husart)
static void USART_TxISR_16BIT_FIFOEN(USART_HandleTypeDef *husart)
{
const HAL_USART_StateTypeDef state = husart->State;
uint16_t *tmp;
const uint16_t *tmp;
uint16_t nb_tx_data;
/* Check that a Tx process is ongoing */
@@ -3140,7 +3174,7 @@ static void USART_TxISR_16BIT_FIFOEN(USART_HandleTypeDef *husart)
}
else if (__HAL_USART_GET_FLAG(husart, USART_FLAG_TXFNF) == SET)
{
tmp = (uint16_t *) husart->pTxBuffPtr;
tmp = (const uint16_t *) husart->pTxBuffPtr;
husart->Instance->TDR = (uint16_t)(*tmp & 0x01FFU);
husart->pTxBuffPtr += 2U;
husart->TxXferCount--;
@@ -3672,4 +3706,3 @@ static void USART_RxISR_16BIT_FIFOEN(USART_HandleTypeDef *husart)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

23
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart_ex.c
View File

@@ -8,6 +8,17 @@
* + Peripheral Control functions
*
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### USART peripheral extended features #####
@@ -26,17 +37,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -539,4 +539,3 @@ static void USARTEx_SetNbDataToProcess(USART_HandleTypeDef *husart)
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

28
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_wwdg.c
View File

@@ -7,6 +7,17 @@
* functionalities of the Window Watchdog (WWDG) peripheral:
* + Initialization and Configuration functions
* + IO operation functions
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### WWDG Specific features #####
@@ -40,7 +51,7 @@
(++) max time (mS) = 1000 * (Counter - 0x40) / WWDG clock
(+) Typical values:
(++) Counter min (T[5;0] = 0x00) at 170MHz (PCLK1) with zero prescaler:
max timeout before reset: approximately 24.09µs
max timeout before reset: approximately 24.09us
(++) Counter max (T[5;0] = 0x3F) at 170MHz (PCLK1) with prescaler
dividing by 128:
max timeout before reset: approximately 197.38ms
@@ -55,7 +66,7 @@
(+) Enable WWDG APB1 clock using __HAL_RCC_WWDG_CLK_ENABLE().
(+) Configure the WWDG prescaler, refresh window value, counter value and early
interrupt status using HAL_WWDG_Init() function. This will automatically
enable WWDG and start its downcounter. Time reference can be taken from
enable WWDG and start its downcounter. Time reference can be taken from
function exit. Care must be taken to provide a counter value
greater than 0x40 to prevent generation of immediate reset.
(+) If the Early Wakeup Interrupt (EWI) feature is enabled, an interrupt is
@@ -112,17 +123,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -418,5 +418,3 @@ __weak void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg)
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

13
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -1424,5 +1423,3 @@ void LL_ADC_INJ_StructInit(LL_ADC_INJ_InitTypeDef *ADC_INJ_InitStruct)
*/
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

15
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_comp.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -25,7 +24,7 @@
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
#endif
#endif /* USE_FULL_ASSERT */
/** @addtogroup STM32G4xx_LL_Driver
* @{
@@ -402,5 +401,3 @@ void LL_COMP_StructInit(LL_COMP_InitTypeDef *COMP_InitStruct)
*/
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

13
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_cordic.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -101,5 +100,3 @@ ErrorStatus LL_CORDIC_DeInit(CORDIC_TypeDef *CORDICx)
*/
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

16
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_crc.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -26,7 +25,7 @@
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
#endif
#endif /* USE_FULL_ASSERT */
/** @addtogroup STM32G4xx_LL_Driver
* @{
@@ -102,6 +101,3 @@ ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx)
*/
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

12
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_crs.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2018 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -83,4 +82,3 @@ ErrorStatus LL_CRS_DeInit(void)
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

12
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dac.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -425,4 +424,3 @@ void LL_DAC_StructInit(LL_DAC_InitTypeDef *DAC_InitStruct)
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

12
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -375,4 +374,3 @@ void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct)
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

12
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -295,4 +294,3 @@ void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct)
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

13
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmac.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -135,5 +134,3 @@ ErrorStatus LL_FMAC_DeInit(FMAC_TypeDef *FMACx)
*/
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

36
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmc.c
View File

@@ -10,6 +10,17 @@
* + Peripheral Control functions
* + Peripheral State functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### FMC peripheral features #####
@@ -39,17 +50,6 @@
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
@@ -87,15 +87,9 @@
/* --- BWTR Register ---*/
/* BWTR register clear mask */
#if defined(FMC_BWTRx_BUSTURN)
#define BWTR_CLEAR_MASK ((uint32_t)(FMC_BWTRx_ADDSET | FMC_BWTRx_ADDHLD |\
FMC_BWTRx_DATAST | FMC_BWTRx_BUSTURN |\
FMC_BWTRx_ACCMOD | FMC_BWTRx_DATAHLD))
#else
#define BWTR_CLEAR_MASK ((uint32_t)(FMC_BWTRx_ADDSET | FMC_BWTRx_ADDHLD |\
FMC_BWTRx_DATAST | FMC_BWTRx_ACCMOD |\
FMC_BWTRx_DATAHLD))
#endif /* FMC_BWTRx_BUSTURN */
#endif /* FMC_BANK1 */
#if defined(FMC_BANK3)
@@ -434,9 +428,7 @@ HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef
assert_param(IS_FMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime));
assert_param(IS_FMC_DATASETUP_TIME(Timing->DataSetupTime));
assert_param(IS_FMC_DATAHOLD_DURATION(Timing->DataHoldTime));
#if defined(FMC_BWTRx_BUSTURN)
assert_param(IS_FMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration));
#endif /* FMC_BWTRx_BUSTURN */
assert_param(IS_FMC_ACCESS_MODE(Timing->AccessMode));
assert_param(IS_FMC_NORSRAM_BANK(Bank));
@@ -445,12 +437,8 @@ HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef
((Timing->AddressHoldTime) << FMC_BWTRx_ADDHLD_Pos) |
((Timing->DataSetupTime) << FMC_BWTRx_DATAST_Pos) |
((Timing->DataHoldTime) << FMC_BWTRx_DATAHLD_Pos) |
#if defined(FMC_BWTRx_BUSTURN)
Timing->AccessMode |
((Timing->BusTurnAroundDuration) << FMC_BWTRx_BUSTURN_Pos)));
#else
Timing->AccessMode));
#endif /* FMC_BWTRx_BUSTURN */
}
else
{
@@ -815,5 +803,3 @@ HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, ui
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

12
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -269,4 +268,3 @@ void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct)
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

13
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_hrtim.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -79,5 +78,3 @@ ErrorStatus LL_HRTIM_DeInit(HRTIM_TypeDef *HRTIMx)
*/
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

17
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_i2c.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -25,7 +24,7 @@
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
#endif
#endif /* USE_FULL_ASSERT */
/** @addtogroup STM32G4xx_LL_Driver
* @{
@@ -125,7 +124,7 @@ ErrorStatus LL_I2C_DeInit(I2C_TypeDef *I2Cx)
/* Release reset of I2C clock */
LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_I2C4);
}
#endif
#endif /* I2C4 */
else
{
status = ERROR;
@@ -241,5 +240,3 @@ void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct)
*/
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

23
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lptim.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -28,7 +27,7 @@
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
#endif
#endif /* USE_FULL_ASSERT */
/** @addtogroup STM32G4xx_LL_Driver
* @{
@@ -189,12 +188,15 @@ void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
uint32_t tmpCFGR;
uint32_t tmpCMP;
uint32_t tmpARR;
uint32_t primask_bit;
uint32_t tmpOR;
/* Check the parameters */
assert_param(IS_LPTIM_INSTANCE(LPTIMx));
__disable_irq();
/* Enter critical section */
primask_bit = __get_PRIMASK();
__set_PRIMASK(1) ;
/********** Save LPTIM Config *********/
/* Save LPTIM source clock */
@@ -274,7 +276,8 @@ void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
LPTIMx->CFGR = tmpCFGR;
LPTIMx->OR = tmpOR;
__enable_irq();
/* Exit critical section: restore previous priority mask */
__set_PRIMASK(primask_bit);
}
/**
@@ -296,5 +299,3 @@ void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
*/
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

14
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lpuart.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -281,6 +280,3 @@ void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct)
*/
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

16
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_opamp.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -50,7 +49,7 @@
/* OPAMP instance. */
#define IS_LL_OPAMP_POWER_MODE(__POWER_MODE__) \
( ((__POWER_MODE__) == LL_OPAMP_POWERMODE_NORMAL) \
( ((__POWER_MODE__) == LL_OPAMP_POWERMODE_NORMALSPEED) \
|| ((__POWER_MODE__) == LL_OPAMP_POWERMODE_HIGHSPEED))
#define IS_LL_OPAMP_FUNCTIONAL_MODE(__FUNCTIONAL_MODE__) \
@@ -232,7 +231,7 @@ ErrorStatus LL_OPAMP_Init(OPAMP_TypeDef *OPAMPx, LL_OPAMP_InitTypeDef *OPAMP_Ini
void LL_OPAMP_StructInit(LL_OPAMP_InitTypeDef *OPAMP_InitStruct)
{
/* Set OPAMP_InitStruct fields to default values */
OPAMP_InitStruct->PowerMode = LL_OPAMP_POWERMODE_NORMAL;
OPAMP_InitStruct->PowerMode = LL_OPAMP_POWERMODE_NORMALSPEED;
OPAMP_InitStruct->FunctionalMode = LL_OPAMP_MODE_FOLLOWER;
OPAMP_InitStruct->InputNonInverting = LL_OPAMP_INPUT_NONINVERT_IO0;
/* Note: Parameter discarded if OPAMP in functional mode follower, */
@@ -260,4 +259,3 @@ void LL_OPAMP_StructInit(LL_OPAMP_InitTypeDef *OPAMP_InitStruct)
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

12
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -82,4 +81,3 @@ ErrorStatus LL_PWR_DeInit(void)
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

53
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rcc.c
View File

@@ -6,14 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file in
* the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
******************************************************************************
*/
#if defined(USE_FULL_LL_DRIVER)
@@ -657,7 +655,10 @@ uint32_t LL_RCC_GetSAIClockFreq(uint32_t SAIxSource)
case LL_RCC_SAI1_CLKSOURCE_PLL: /* PLL clock used as SAI1 clock source */
if (LL_RCC_PLL_IsReady() != 0U)
{
sai_frequency = RCC_PLL_GetFreqDomain_48M();
if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U)
{
sai_frequency = RCC_PLL_GetFreqDomain_48M();
}
}
break;
@@ -705,7 +706,10 @@ uint32_t LL_RCC_GetI2SClockFreq(uint32_t I2SxSource)
case LL_RCC_I2S_CLKSOURCE_PLL: /* I2S Clock is PLL"Q" */
if (LL_RCC_PLL_IsReady() != 0U)
{
i2s_frequency = RCC_PLL_GetFreqDomain_48M();
if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U)
{
i2s_frequency = RCC_PLL_GetFreqDomain_48M();
}
}
break;
@@ -755,7 +759,10 @@ uint32_t LL_RCC_GetFDCANClockFreq(uint32_t FDCANxSource)
case LL_RCC_FDCAN_CLKSOURCE_PLL: /* PLL clock used as FDCAN kernel clock */
if (LL_RCC_PLL_IsReady() != 0U)
{
fdcan_frequency = RCC_PLL_GetFreqDomain_48M();
if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U)
{
fdcan_frequency = RCC_PLL_GetFreqDomain_48M();
}
}
break;
@@ -792,7 +799,10 @@ uint32_t LL_RCC_GetRNGClockFreq(uint32_t RNGxSource)
case LL_RCC_RNG_CLKSOURCE_PLL: /* PLL clock used as RNG clock source */
if (LL_RCC_PLL_IsReady() != 0U)
{
rng_frequency = RCC_PLL_GetFreqDomain_48M();
if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U)
{
rng_frequency = RCC_PLL_GetFreqDomain_48M();
}
}
break;
@@ -833,7 +843,10 @@ uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource)
case LL_RCC_USB_CLKSOURCE_PLL: /* PLL clock used as USB clock source */
if (LL_RCC_PLL_IsReady() != 0U)
{
usb_frequency = RCC_PLL_GetFreqDomain_48M();
if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U)
{
usb_frequency = RCC_PLL_GetFreqDomain_48M();
}
}
break;
@@ -878,7 +891,10 @@ uint32_t LL_RCC_GetADCClockFreq(uint32_t ADCxSource)
case LL_RCC_ADC12_CLKSOURCE_PLL: /* PLL clock used as ADC12 clock source */
if (LL_RCC_PLL_IsReady() != 0U)
{
adc_frequency = RCC_PLL_GetFreqDomain_ADC();
if (LL_RCC_PLL_IsEnabledDomain_ADC() != 0U)
{
adc_frequency = RCC_PLL_GetFreqDomain_ADC();
}
}
break;
@@ -901,7 +917,10 @@ uint32_t LL_RCC_GetADCClockFreq(uint32_t ADCxSource)
case LL_RCC_ADC345_CLKSOURCE_PLL: /* PLL clock used as ADC345 clock source */
if (LL_RCC_PLL_IsReady() != 0U)
{
adc_frequency = RCC_PLL_GetFreqDomain_ADC();
if (LL_RCC_PLL_IsEnabledDomain_ADC() != 0U)
{
adc_frequency = RCC_PLL_GetFreqDomain_ADC();
}
}
break;
@@ -952,7 +971,10 @@ uint32_t LL_RCC_GetQUADSPIClockFreq(uint32_t QUADSPIxSource)
case LL_RCC_QUADSPI_CLKSOURCE_PLL: /* PLL clock used as QUADSPI source */
if (LL_RCC_PLL_IsReady() != 0U)
{
quadspi_frequency = RCC_PLL_GetFreqDomain_48M();
if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U)
{
quadspi_frequency = RCC_PLL_GetFreqDomain_48M();
}
}
break;
@@ -1148,4 +1170,3 @@ static uint32_t RCC_PLL_GetFreqDomain_48M(void)
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

37
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rng.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -26,7 +25,7 @@
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
#endif
#endif /* USE_FULL_ASSERT */
/** @addtogroup STM32G4xx_LL_Driver
* @{
@@ -42,7 +41,7 @@
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/** @addtogroup RNG_LL_Private_Macros
/** @defgroup RNG_LL_Private_Macros RNG Private Macros
* @{
*/
#define IS_LL_RNG_CED(__MODE__) (((__MODE__) == LL_RNG_CED_ENABLE) || \
@@ -71,14 +70,24 @@
*/
ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx)
{
ErrorStatus status = SUCCESS;
/* Check the parameters */
assert_param(IS_RNG_ALL_INSTANCE(RNGx));
/* Enable RNG reset state */
LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_RNG);
if (RNGx == RNG)
{
/* Enable RNG reset state */
LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_RNG);
/* Release RNG from reset state */
LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_RNG);
return (SUCCESS);
/* Release RNG from reset state */
LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_RNG);
}
else
{
status = ERROR;
}
return status;
}
/**
@@ -134,5 +143,3 @@ void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct)
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

16
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rtc.c
View File

@@ -6,12 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -329,7 +329,7 @@ ErrorStatus LL_RTC_TIME_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_Time
}
/* Exit Initialization mode */
LL_RTC_DisableInitMode(RTC);
LL_RTC_DisableInitMode(RTCx);
/* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
if (LL_RTC_IsShadowRegBypassEnabled(RTCx) == 0U)
@@ -417,7 +417,7 @@ ErrorStatus LL_RTC_DATE_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_Date
}
/* Exit Initialization mode */
LL_RTC_DisableInitMode(RTC);
LL_RTC_DisableInitMode(RTCx);
/* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
if (LL_RTC_IsShadowRegBypassEnabled(RTCx) == 0U)
@@ -880,5 +880,3 @@ ErrorStatus LL_RTC_WaitForSynchro(RTC_TypeDef *RTCx)
*/
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

14
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_spi.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -27,7 +26,7 @@
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
#endif
#endif /* USE_FULL_ASSERT */
/** @addtogroup STM32G4xx_LL_Driver
* @{
@@ -556,4 +555,3 @@ void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

45
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_tim.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -326,7 +325,8 @@ void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct)
/**
* @brief Configure the TIMx time base unit.
* @param TIMx Timer Instance
* @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (TIMx time base unit configuration data structure)
* @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure
* (TIMx time base unit configuration data structure)
* @retval An ErrorStatus enumeration value:
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
@@ -379,7 +379,8 @@ ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct)
/**
* @brief Set the fields of the TIMx output channel configuration data
* structure to their default values.
* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (the output channel configuration data structure)
* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure
* (the output channel configuration data structure)
* @retval None
*/
void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
@@ -405,7 +406,8 @@ void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
* @arg @ref LL_TIM_CHANNEL_CH4
* @arg @ref LL_TIM_CHANNEL_CH5
* @arg @ref LL_TIM_CHANNEL_CH6
* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration data structure)
* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration
* data structure)
* @retval An ErrorStatus enumeration value:
* - SUCCESS: TIMx output channel is initialized
* - ERROR: TIMx output channel is not initialized
@@ -444,7 +446,8 @@ ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTy
/**
* @brief Set the fields of the TIMx input channel configuration data
* structure to their default values.
* @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration data structure)
* @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration
* data structure)
* @retval None
*/
void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
@@ -464,7 +467,8 @@ void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
* @arg @ref LL_TIM_CHANNEL_CH2
* @arg @ref LL_TIM_CHANNEL_CH3
* @arg @ref LL_TIM_CHANNEL_CH4
* @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data structure)
* @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data
* structure)
* @retval An ErrorStatus enumeration value:
* - SUCCESS: TIMx output channel is initialized
* - ERROR: TIMx output channel is not initialized
@@ -496,7 +500,8 @@ ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTy
/**
* @brief Fills each TIM_EncoderInitStruct field with its default value
* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface configuration data structure)
* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface
* configuration data structure)
* @retval None
*/
void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)
@@ -516,7 +521,8 @@ void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct
/**
* @brief Configure the encoder interface of the timer instance.
* @param TIMx Timer Instance
* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface configuration data structure)
* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface
* configuration data structure)
* @retval An ErrorStatus enumeration value:
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
@@ -580,7 +586,8 @@ ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *T
/**
* @brief Set the fields of the TIMx Hall sensor interface configuration data
* structure to their default values.
* @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (HALL sensor interface configuration data structure)
* @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (HALL sensor interface
* configuration data structure)
* @retval None
*/
void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct)
@@ -607,7 +614,8 @@ void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorI
* @note LL_TIM_IC_POLARITY_BOTHEDGE must not be used for TI1 when it is used
* when TIMx operates in Hall sensor interface mode.
* @param TIMx Timer Instance
* @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (TIMx HALL sensor interface configuration data structure)
* @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (TIMx HALL sensor
* interface configuration data structure)
* @retval An ErrorStatus enumeration value:
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
@@ -687,7 +695,8 @@ ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, LL_TIM_HALLSENSOR_InitType
/**
* @brief Set the fields of the Break and Dead Time configuration data structure
* to their default values.
* @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration data structure)
* @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration
* data structure)
* @retval None
*/
void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct)
@@ -719,7 +728,8 @@ void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct)
* @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
* a timer instance provides a second break input.
* @param TIMx Timer Instance
* @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration data structure)
* @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration
* data structure)
* @retval An ErrorStatus enumeration value:
* - SUCCESS: Break and Dead Time is initialized
* - ERROR: not applicable
@@ -1374,4 +1384,3 @@ static ErrorStatus IC4Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICIni
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

23
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_ucpd.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -27,7 +26,7 @@
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
#endif
#endif /* USE_FULL_ASSERT */
/** @addtogroup STM32G4xx_LL_Driver
* @{
@@ -83,7 +82,7 @@ ErrorStatus LL_UCPD_DeInit(UCPD_TypeDef *UCPDx)
/* Check the parameters */
assert_param(IS_UCPD_ALL_INSTANCE(UCPDx));
LL_UCPD_Disable(UCPDx);
if (UCPD1 == UCPDx)
@@ -105,8 +104,9 @@ ErrorStatus LL_UCPD_DeInit(UCPD_TypeDef *UCPDx)
/**
* @brief Initialize the ucpd registers according to the specified parameters in UCPD_InitStruct.
* @note As some bits in ucpd configuration registers can only be written when the ucpd is disabled (ucpd_CR1_SPE bit =0),
* UCPD peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
* @note As some bits in ucpd configuration registers can only be written when the ucpd is disabled
* (ucpd_CR1_SPE bit =0), UCPD peripheral should be in disabled state prior calling this function.
* Otherwise, ERROR result will be returned.
* @param UCPDx UCPD Instance
* @param UCPD_InitStruct pointer to a @ref LL_UCPD_InitTypeDef structure that contains
* the configuration information for the UCPD peripheral.
@@ -117,7 +117,7 @@ ErrorStatus LL_UCPD_Init(UCPD_TypeDef *UCPDx, LL_UCPD_InitTypeDef *UCPD_InitStru
/* Check the ucpd Instance UCPDx*/
assert_param(IS_UCPD_ALL_INSTANCE(UCPDx));
if(UCPD1 == UCPDx)
if (UCPD1 == UCPDx)
{
LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_UCPD1);
}
@@ -167,4 +167,3 @@ void LL_UCPD_StructInit(LL_UCPD_InitTypeDef *UCPD_InitStruct)
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

12
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usart.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -421,5 +420,4 @@ void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

135
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c
View File

@@ -11,6 +11,17 @@
* + Peripheral Control functions
* + Peripheral State functions
*
******************************************************************************
* @attention
*
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
@@ -23,17 +34,7 @@
(#) The upper HAL HCD/PCD driver will call the right routines for its internal processes.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
@@ -53,7 +54,6 @@
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/**
* @brief Initializes the USB Core
* @param USBx USB Instance
@@ -235,22 +235,31 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
}
else
{
/*Set the endpoint Receive buffer address */
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
/*Set the endpoint Receive buffer counter*/
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
PCD_CLEAR_RX_DTOG(USBx, ep->num);
/* Configure VALID status for the Endpoint*/
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
}
}
/*Double Buffer*/
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
/* Set the endpoint as double buffered */
PCD_SET_EP_DBUF(USBx, ep->num);
if (ep->type == EP_TYPE_BULK)
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
@@ -284,6 +293,7 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return ret;
}
@@ -302,18 +312,20 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
/* Configure DISABLE status for the Endpoint*/
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
/* Configure DISABLE status for the Endpoint*/
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
}
}
/*Double Buffer*/
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->is_in == 0U)
@@ -340,6 +352,7 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
}
@@ -353,8 +366,10 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
uint32_t len;
#if (USE_USB_DOUBLE_BUFFER == 1U)
uint16_t pmabuffer;
uint16_t wEPVal;
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* IN endpoint */
if (ep->is_in == 1U)
@@ -375,6 +390,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* double buffer bulk management */
@@ -383,7 +399,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
if (ep->xfer_len_db > ep->maxpacket)
{
/* enable double buffer */
PCD_SET_EP_DBUF(USBx, ep->num);
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
@@ -449,8 +465,8 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
len = ep->xfer_len_db;
/* disable double buffer mode */
PCD_CLEAR_EP_DBUF(USBx, ep->num);
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
@@ -459,14 +475,9 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
}
}/* end if bulk double buffer */
/* manage isochronous double buffer IN mode */
else
}
else /* manage isochronous double buffer IN mode */
{
/* enable double buffer */
PCD_SET_EP_DBUF(USBx, ep->num);
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
@@ -479,27 +490,6 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
ep->xfer_buff += len;
if (ep->xfer_len_db > ep->maxpacket)
{
ep->xfer_len_db -= len;
}
else
{
len = ep->xfer_len_db;
ep->xfer_len_db = 0U;
}
if (len > 0U)
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
pmabuffer = ep->pmaaddr0;
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
}
}
else
{
@@ -509,30 +499,10 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
ep->xfer_buff += len;
if (ep->xfer_len_db > ep->maxpacket)
{
ep->xfer_len_db -= len;
}
else
{
len = ep->xfer_len_db;
ep->xfer_len_db = 0U;
}
if (len > 0U)
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
pmabuffer = ep->pmaaddr1;
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
}
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
}
@@ -554,6 +524,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
@@ -572,7 +543,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
{
PCD_FreeUserBuffer(USBx, ep->num, 0U);
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
}
}
}
@@ -597,6 +568,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
return HAL_ERROR;
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
}
@@ -656,7 +628,7 @@ HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
return HAL_OK;
}
#endif
#endif /* defined (HAL_PCD_MODULE_ENABLED) */
/**
* @brief USB_StopDevice Stop the usb device mode
@@ -770,7 +742,9 @@ void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, ui
{
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
uint32_t BaseAddr = (uint32_t)USBx;
uint32_t i, temp1, temp2;
uint32_t i;
uint32_t temp1;
uint32_t temp2;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
@@ -786,7 +760,7 @@ void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, ui
#if PMA_ACCESS > 1U
pdwVal++;
#endif
#endif /* PMA_ACCESS */
pBuf++;
}
@@ -804,7 +778,8 @@ void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uin
{
uint32_t n = (uint32_t)wNBytes >> 1;
uint32_t BaseAddr = (uint32_t)USBx;
uint32_t i, temp;
uint32_t i;
uint32_t temp;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
@@ -821,7 +796,7 @@ void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uin
#if PMA_ACCESS > 1U
pdwVal++;
#endif
#endif /* PMA_ACCESS */
}
if ((wNBytes % 2U) != 0U)
@@ -845,5 +820,3 @@ void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uin
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

12
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c
View File

@@ -6,13 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
@@ -698,4 +697,3 @@ static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/