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fix interfaccia

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This commit is contained in:
nzasch
2022-01-12 01:09:32 +01:00
parent b9a7a1e15b
commit 6d0c31556a
435 changed files with 436215 additions and 10940 deletions
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53
codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rcc.c
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@@ -6,14 +6,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* Copyright (c) 2019 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file in
* the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
******************************************************************************
*/
#if defined(USE_FULL_LL_DRIVER)
@@ -657,7 +655,10 @@ uint32_t LL_RCC_GetSAIClockFreq(uint32_t SAIxSource)
case LL_RCC_SAI1_CLKSOURCE_PLL: /* PLL clock used as SAI1 clock source */
if (LL_RCC_PLL_IsReady() != 0U)
{
sai_frequency = RCC_PLL_GetFreqDomain_48M();
if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U)
{
sai_frequency = RCC_PLL_GetFreqDomain_48M();
}
}
break;
@@ -705,7 +706,10 @@ uint32_t LL_RCC_GetI2SClockFreq(uint32_t I2SxSource)
case LL_RCC_I2S_CLKSOURCE_PLL: /* I2S Clock is PLL"Q" */
if (LL_RCC_PLL_IsReady() != 0U)
{
i2s_frequency = RCC_PLL_GetFreqDomain_48M();
if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U)
{
i2s_frequency = RCC_PLL_GetFreqDomain_48M();
}
}
break;
@@ -755,7 +759,10 @@ uint32_t LL_RCC_GetFDCANClockFreq(uint32_t FDCANxSource)
case LL_RCC_FDCAN_CLKSOURCE_PLL: /* PLL clock used as FDCAN kernel clock */
if (LL_RCC_PLL_IsReady() != 0U)
{
fdcan_frequency = RCC_PLL_GetFreqDomain_48M();
if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U)
{
fdcan_frequency = RCC_PLL_GetFreqDomain_48M();
}
}
break;
@@ -792,7 +799,10 @@ uint32_t LL_RCC_GetRNGClockFreq(uint32_t RNGxSource)
case LL_RCC_RNG_CLKSOURCE_PLL: /* PLL clock used as RNG clock source */
if (LL_RCC_PLL_IsReady() != 0U)
{
rng_frequency = RCC_PLL_GetFreqDomain_48M();
if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U)
{
rng_frequency = RCC_PLL_GetFreqDomain_48M();
}
}
break;
@@ -833,7 +843,10 @@ uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource)
case LL_RCC_USB_CLKSOURCE_PLL: /* PLL clock used as USB clock source */
if (LL_RCC_PLL_IsReady() != 0U)
{
usb_frequency = RCC_PLL_GetFreqDomain_48M();
if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U)
{
usb_frequency = RCC_PLL_GetFreqDomain_48M();
}
}
break;
@@ -878,7 +891,10 @@ uint32_t LL_RCC_GetADCClockFreq(uint32_t ADCxSource)
case LL_RCC_ADC12_CLKSOURCE_PLL: /* PLL clock used as ADC12 clock source */
if (LL_RCC_PLL_IsReady() != 0U)
{
adc_frequency = RCC_PLL_GetFreqDomain_ADC();
if (LL_RCC_PLL_IsEnabledDomain_ADC() != 0U)
{
adc_frequency = RCC_PLL_GetFreqDomain_ADC();
}
}
break;
@@ -901,7 +917,10 @@ uint32_t LL_RCC_GetADCClockFreq(uint32_t ADCxSource)
case LL_RCC_ADC345_CLKSOURCE_PLL: /* PLL clock used as ADC345 clock source */
if (LL_RCC_PLL_IsReady() != 0U)
{
adc_frequency = RCC_PLL_GetFreqDomain_ADC();
if (LL_RCC_PLL_IsEnabledDomain_ADC() != 0U)
{
adc_frequency = RCC_PLL_GetFreqDomain_ADC();
}
}
break;
@@ -952,7 +971,10 @@ uint32_t LL_RCC_GetQUADSPIClockFreq(uint32_t QUADSPIxSource)
case LL_RCC_QUADSPI_CLKSOURCE_PLL: /* PLL clock used as QUADSPI source */
if (LL_RCC_PLL_IsReady() != 0U)
{
quadspi_frequency = RCC_PLL_GetFreqDomain_48M();
if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U)
{
quadspi_frequency = RCC_PLL_GetFreqDomain_48M();
}
}
break;
@@ -1148,4 +1170,3 @@ static uint32_t RCC_PLL_GetFreqDomain_48M(void)
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/