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437171f10f527dfbc8d3f85390f318456a4f9a75
bassofono/codice/build/BasicMathFunctions.lst
nzasch 36ef31c453 opamp, peak detect
2021-07-03 18:17:05 +02:00

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ARM GAS /tmp/ccnDQoMC.s page 1
1 .cpu cortex-m4
2 .eabi_attribute 27, 1
3 .eabi_attribute 28, 1
4 .eabi_attribute 23, 1
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 2
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "BasicMathFunctions.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.arm_abs_f32,"ax",%progbits
16 .align 1
17 .p2align 2,,3
18 .global arm_abs_f32
19 .syntax unified
20 .thumb
21 .thumb_func
22 .fpu fpv4-sp-d16
24 arm_abs_f32:
25 .LFB148:
26 .file 1 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * Title: arm_abs_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * Description: Floating-point vector absolute value
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** #include <math.h>
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /**
ARM GAS /tmp/ccnDQoMC.s page 2
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** @ingroup groupMath
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** */
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /**
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** @defgroup BasicAbs Vector Absolute Value
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** Computes the absolute value of a vector on an element-by-element basis.
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** <pre>
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** pDst[n] = abs(pSrc[n]), 0 <= n < blockSize.
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** </pre>
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** The functions support in-place computation allowing the source and
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** destination pointers to reference the same memory buffer.
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** There are separate functions for floating-point, Q7, Q15, and Q31 data types.
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** */
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /**
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** @addtogroup BasicAbs
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** @{
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** */
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /**
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** @brief Floating-point vector absolute value.
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** @param[in] pSrc points to the input vector
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** @param[out] pDst points to the output vector
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** @param[in] blockSize number of samples in each vector
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** @return none
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** */
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** #include "arm_helium_utils.h"
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** void arm_abs_f32(
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** const float32_t * pSrc,
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** float32_t * pDst,
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** uint32_t blockSize)
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** {
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** uint32_t blkCnt; /* Loop counter */
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** f32x4_t vec1;
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** f32x4_t res;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Compute 4 outputs at a time */
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** blkCnt = blockSize >> 2U;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** while (blkCnt > 0U)
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** {
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* C = |A| */
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Calculate absolute values and then store the results in the destination buffer. */
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** vec1 = vld1q(pSrc);
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** res = vabsq(vec1);
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** vst1q(pDst, res);
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
ARM GAS /tmp/ccnDQoMC.s page 3
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Increment pointers */
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** pSrc += 4;
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** pDst += 4;
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Decrement the loop counter */
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** blkCnt--;
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** }
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Tail */
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** blkCnt = blockSize & 0x3;
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** if (blkCnt > 0U)
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** {
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* C = |A| */
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** vec1 = vld1q(pSrc);
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** vstrwq_p(pDst, vabsq(vec1), p0);
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** }
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** }
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** #else
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** void arm_abs_f32(
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** const float32_t * pSrc,
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** float32_t * pDst,
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** uint32_t blockSize)
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** {
27 .loc 1 117 0
28 .cfi_startproc
29 @ args = 0, pretend = 0, frame = 0
30 @ frame_needed = 0, uses_anonymous_args = 0
31 @ link register save eliminated.
32 .LVL0:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** uint32_t blkCnt; /* Loop counter */
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** f32x4_t vec1;
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** f32x4_t res;
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Compute 4 outputs at a time */
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** blkCnt = blockSize >> 2U;
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** while (blkCnt > 0U)
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** {
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* C = |A| */
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Calculate absolute values and then store the results in the destination buffer. */
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** vec1 = vld1q_f32(pSrc);
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** res = vabsq_f32(vec1);
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** vst1q_f32(pDst, res);
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Increment pointers */
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** pSrc += 4;
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** pDst += 4;
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Decrement the loop counter */
ARM GAS /tmp/ccnDQoMC.s page 4
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** blkCnt--;
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** }
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Tail */
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** blkCnt = blockSize & 0x3;
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** #else
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** blkCnt = blockSize >> 2U;
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** while (blkCnt > 0U)
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** {
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* C = |A| */
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Calculate absolute and store result in destination buffer. */
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** *pDst++ = fabsf(*pSrc++);
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** *pDst++ = fabsf(*pSrc++);
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** *pDst++ = fabsf(*pSrc++);
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** *pDst++ = fabsf(*pSrc++);
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Decrement loop counter */
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** blkCnt--;
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** }
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Loop unrolling: Compute remaining outputs */
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** blkCnt = blockSize % 0x4U;
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** #else
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Initialize blkCnt with number of samples */
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** blkCnt = blockSize;
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** #endif /* #if defined(ARM_MATH_NEON) */
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** while (blkCnt > 0U)
33 .loc 1 181 0
34 0000 3AB1 cbz r2, .L1
35 .LVL1:
36 .L3:
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** {
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* C = |A| */
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Calculate absolute and store result in destination buffer. */
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** *pDst++ = fabsf(*pSrc++);
37 .loc 1 186 0
38 0002 F0EC017A vldmia.32 r0!, {s15}
39 .LVL2:
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** {
40 .loc 1 181 0
41 0006 013A subs r2, r2, #1
42 .LVL3:
ARM GAS /tmp/ccnDQoMC.s page 5
43 .loc 1 186 0
44 0008 F0EEE77A vabs.f32 s15, s15
45 000c E1EC017A vstmia.32 r1!, {s15}
46 .LVL4:
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** {
47 .loc 1 181 0
48 0010 F7D1 bne .L3
49 .L1:
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** /* Decrement loop counter */
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** blkCnt--;
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** }
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c ****
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c **** }
50 .loc 1 192 0
51 0012 7047 bx lr
52 .cfi_endproc
53 .LFE148:
55 .section .text.arm_abs_q15,"ax",%progbits
56 .align 1
57 .p2align 2,,3
58 .global arm_abs_q15
59 .syntax unified
60 .thumb
61 .thumb_func
62 .fpu fpv4-sp-d16
64 arm_abs_q15:
65 .LFB149:
66 .file 2 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * Title: arm_abs_q15.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * Description: Q15 vector absolute value
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
ARM GAS /tmp/ccnDQoMC.s page 6
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** @addtogroup BasicAbs
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** @brief Q15 vector absolute value.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** @param[in] pSrc points to the input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** @param[out] pDst points to the output vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** @param[in] blockSize number of samples in each vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** @return none
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** @par Scaling and Overflow Behavior
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** The function uses saturating arithmetic.
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive va
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** */
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #if defined(ARM_MATH_MVEI)
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #include "arm_helium_utils.h"
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** void arm_abs_q15(
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** const q15_t * pSrc,
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** q15_t * pDst,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** uint32_t blockSize)
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** {
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** uint32_t blkCnt; /* loop counters */
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** q15x8_t vecSrc;
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /* Compute 8 outputs at a time */
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** blkCnt = blockSize >> 3;
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** while (blkCnt > 0U)
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** {
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /*
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * C = |A|
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * Calculate absolute and then store the results in the destination buffer.
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** */
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** vecSrc = vld1q(pSrc);
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** vst1q(pDst, vqabsq(vecSrc));
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /*
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * Decrement the blockSize loop counter
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** */
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** blkCnt--;
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /*
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * advance vector source and destination pointers
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** */
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** pSrc += 8;
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** pDst += 8;
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** }
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /*
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** * tail
ARM GAS /tmp/ccnDQoMC.s page 7
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** */
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** blkCnt = blockSize & 7;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** if (blkCnt > 0U)
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** {
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt);
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** vecSrc = vld1q(pSrc);
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** vstrhq_p(pDst, vqabsq(vecSrc), p0);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** }
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** }
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #else
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** void arm_abs_q15(
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** const q15_t * pSrc,
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** q15_t * pDst,
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** uint32_t blockSize)
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** {
67 .loc 2 101 0
68 .cfi_startproc
69 @ args = 0, pretend = 0, frame = 0
70 @ frame_needed = 0, uses_anonymous_args = 0
71 @ link register save eliminated.
72 .LVL5:
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** uint32_t blkCnt; /* Loop counter */
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** q15_t in; /* Temporary input variable */
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #if defined (ARM_MATH_LOOPUNROLL)
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** blkCnt = blockSize >> 2U;
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** while (blkCnt > 0U)
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** {
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /* C = |A| */
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** in = *pSrc++;
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #if defined (ARM_MATH_DSP)
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #else
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #endif
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** in = *pSrc++;
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #if defined (ARM_MATH_DSP)
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #else
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #endif
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** in = *pSrc++;
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #if defined (ARM_MATH_DSP)
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #else
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #endif
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** in = *pSrc++;
ARM GAS /tmp/ccnDQoMC.s page 8
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #if defined (ARM_MATH_DSP)
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #else
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #endif
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /* Decrement loop counter */
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** blkCnt--;
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** }
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /* Loop unrolling: Compute remaining outputs */
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** blkCnt = blockSize % 0x4U;
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #else
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /* Initialize blkCnt with number of samples */
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** blkCnt = blockSize;
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** while (blkCnt > 0U)
73 .loc 2 157 0
74 0000 AAB1 cbz r2, .L16
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** uint32_t blkCnt; /* Loop counter */
75 .loc 2 101 0
76 0002 10B4 push {r4}
77 .LCFI0:
78 .cfi_def_cfa_offset 4
79 .cfi_offset 4, -4
80 .LBB26:
81 .LBB27:
82 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h"
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
24:Drivers/CMSIS/Include/cmsis_gcc.h ****
25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
ARM GAS /tmp/ccnDQoMC.s page 9
26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
27:Drivers/CMSIS/Include/cmsis_gcc.h ****
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
38:Drivers/CMSIS/Include/cmsis_gcc.h ****
39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
ARM GAS /tmp/ccnDQoMC.s page 10
83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __COMPILER_BARRIER
117:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
119:Drivers/CMSIS/Include/cmsis_gcc.h ****
120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */
121:Drivers/CMSIS/Include/cmsis_gcc.h ****
122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss
127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly
128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script.
129:Drivers/CMSIS/Include/cmsis_gcc.h ****
130:Drivers/CMSIS/Include/cmsis_gcc.h **** */
131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
132:Drivers/CMSIS/Include/cmsis_gcc.h **** {
133:Drivers/CMSIS/Include/cmsis_gcc.h **** extern void _start(void) __NO_RETURN;
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
135:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct {
136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src;
137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest;
138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen;
139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t;
ARM GAS /tmp/ccnDQoMC.s page 11
140:Drivers/CMSIS/Include/cmsis_gcc.h ****
141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct {
142:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest;
143:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen;
144:Drivers/CMSIS/Include/cmsis_gcc.h **** } __zero_table_t;
145:Drivers/CMSIS/Include/cmsis_gcc.h ****
146:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_start__;
147:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_end__;
148:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_start__;
149:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_end__;
150:Drivers/CMSIS/Include/cmsis_gcc.h ****
151:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable
152:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; i<pTable->wlen; ++i) {
153:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = pTable->src[i];
154:Drivers/CMSIS/Include/cmsis_gcc.h **** }
155:Drivers/CMSIS/Include/cmsis_gcc.h **** }
156:Drivers/CMSIS/Include/cmsis_gcc.h ****
157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable
158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; i<pTable->wlen; ++i) {
159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u;
160:Drivers/CMSIS/Include/cmsis_gcc.h **** }
161:Drivers/CMSIS/Include/cmsis_gcc.h **** }
162:Drivers/CMSIS/Include/cmsis_gcc.h ****
163:Drivers/CMSIS/Include/cmsis_gcc.h **** _start();
164:Drivers/CMSIS/Include/cmsis_gcc.h **** }
165:Drivers/CMSIS/Include/cmsis_gcc.h ****
166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START __cmsis_start
167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
168:Drivers/CMSIS/Include/cmsis_gcc.h ****
169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP
170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP __StackTop
171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
172:Drivers/CMSIS/Include/cmsis_gcc.h ****
173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT
174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT __StackLimit
175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
176:Drivers/CMSIS/Include/cmsis_gcc.h ****
177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE
178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors
179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
180:Drivers/CMSIS/Include/cmsis_gcc.h ****
181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE
182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors")))
183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
184:Drivers/CMSIS/Include/cmsis_gcc.h ****
185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
187:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
188:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
189:Drivers/CMSIS/Include/cmsis_gcc.h **** */
190:Drivers/CMSIS/Include/cmsis_gcc.h ****
191:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
192:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
193:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
194:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
195:Drivers/CMSIS/Include/cmsis_gcc.h **** */
196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
ARM GAS /tmp/ccnDQoMC.s page 12
197:Drivers/CMSIS/Include/cmsis_gcc.h **** {
198:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
199:Drivers/CMSIS/Include/cmsis_gcc.h **** }
200:Drivers/CMSIS/Include/cmsis_gcc.h ****
201:Drivers/CMSIS/Include/cmsis_gcc.h ****
202:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
203:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
204:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
205:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
206:Drivers/CMSIS/Include/cmsis_gcc.h **** */
207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
208:Drivers/CMSIS/Include/cmsis_gcc.h **** {
209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
210:Drivers/CMSIS/Include/cmsis_gcc.h **** }
211:Drivers/CMSIS/Include/cmsis_gcc.h ****
212:Drivers/CMSIS/Include/cmsis_gcc.h ****
213:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
214:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register
215:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register.
216:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value
217:Drivers/CMSIS/Include/cmsis_gcc.h **** */
218:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
219:Drivers/CMSIS/Include/cmsis_gcc.h **** {
220:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
221:Drivers/CMSIS/Include/cmsis_gcc.h ****
222:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) );
223:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
224:Drivers/CMSIS/Include/cmsis_gcc.h **** }
225:Drivers/CMSIS/Include/cmsis_gcc.h ****
226:Drivers/CMSIS/Include/cmsis_gcc.h ****
227:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure)
230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode.
231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value
232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
236:Drivers/CMSIS/Include/cmsis_gcc.h ****
237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
240:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
241:Drivers/CMSIS/Include/cmsis_gcc.h ****
242:Drivers/CMSIS/Include/cmsis_gcc.h ****
243:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
244:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register
245:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register.
246:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
247:Drivers/CMSIS/Include/cmsis_gcc.h **** */
248:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
249:Drivers/CMSIS/Include/cmsis_gcc.h **** {
250:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
251:Drivers/CMSIS/Include/cmsis_gcc.h **** }
252:Drivers/CMSIS/Include/cmsis_gcc.h ****
253:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccnDQoMC.s page 13
254:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
255:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
256:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure)
257:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state.
258:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
259:Drivers/CMSIS/Include/cmsis_gcc.h **** */
260:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
261:Drivers/CMSIS/Include/cmsis_gcc.h **** {
262:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
263:Drivers/CMSIS/Include/cmsis_gcc.h **** }
264:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
265:Drivers/CMSIS/Include/cmsis_gcc.h ****
266:Drivers/CMSIS/Include/cmsis_gcc.h ****
267:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
268:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register
269:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
270:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value
271:Drivers/CMSIS/Include/cmsis_gcc.h **** */
272:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
273:Drivers/CMSIS/Include/cmsis_gcc.h **** {
274:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
275:Drivers/CMSIS/Include/cmsis_gcc.h ****
276:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
277:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
278:Drivers/CMSIS/Include/cmsis_gcc.h **** }
279:Drivers/CMSIS/Include/cmsis_gcc.h ****
280:Drivers/CMSIS/Include/cmsis_gcc.h ****
281:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
282:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register
283:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register.
284:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value
285:Drivers/CMSIS/Include/cmsis_gcc.h **** */
286:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
287:Drivers/CMSIS/Include/cmsis_gcc.h **** {
288:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
289:Drivers/CMSIS/Include/cmsis_gcc.h ****
290:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) );
291:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
293:Drivers/CMSIS/Include/cmsis_gcc.h ****
294:Drivers/CMSIS/Include/cmsis_gcc.h ****
295:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
296:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register
297:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register.
298:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value
299:Drivers/CMSIS/Include/cmsis_gcc.h **** */
300:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
301:Drivers/CMSIS/Include/cmsis_gcc.h **** {
302:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
303:Drivers/CMSIS/Include/cmsis_gcc.h ****
304:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
305:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
306:Drivers/CMSIS/Include/cmsis_gcc.h **** }
307:Drivers/CMSIS/Include/cmsis_gcc.h ****
308:Drivers/CMSIS/Include/cmsis_gcc.h ****
309:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
310:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer
ARM GAS /tmp/ccnDQoMC.s page 14
311:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP).
312:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
313:Drivers/CMSIS/Include/cmsis_gcc.h **** */
314:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
315:Drivers/CMSIS/Include/cmsis_gcc.h **** {
316:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
317:Drivers/CMSIS/Include/cmsis_gcc.h ****
318:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) );
319:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
320:Drivers/CMSIS/Include/cmsis_gcc.h **** }
321:Drivers/CMSIS/Include/cmsis_gcc.h ****
322:Drivers/CMSIS/Include/cmsis_gcc.h ****
323:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
324:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
325:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure)
326:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
327:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
328:Drivers/CMSIS/Include/cmsis_gcc.h **** */
329:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
330:Drivers/CMSIS/Include/cmsis_gcc.h **** {
331:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
332:Drivers/CMSIS/Include/cmsis_gcc.h ****
333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
334:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
335:Drivers/CMSIS/Include/cmsis_gcc.h **** }
336:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
337:Drivers/CMSIS/Include/cmsis_gcc.h ****
338:Drivers/CMSIS/Include/cmsis_gcc.h ****
339:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
340:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer
341:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP).
342:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
343:Drivers/CMSIS/Include/cmsis_gcc.h **** */
344:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
345:Drivers/CMSIS/Include/cmsis_gcc.h **** {
346:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
347:Drivers/CMSIS/Include/cmsis_gcc.h **** }
348:Drivers/CMSIS/Include/cmsis_gcc.h ****
349:Drivers/CMSIS/Include/cmsis_gcc.h ****
350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
351:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
354:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
355:Drivers/CMSIS/Include/cmsis_gcc.h **** */
356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
357:Drivers/CMSIS/Include/cmsis_gcc.h **** {
358:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
359:Drivers/CMSIS/Include/cmsis_gcc.h **** }
360:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
361:Drivers/CMSIS/Include/cmsis_gcc.h ****
362:Drivers/CMSIS/Include/cmsis_gcc.h ****
363:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
364:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer
365:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP).
366:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
367:Drivers/CMSIS/Include/cmsis_gcc.h **** */
ARM GAS /tmp/ccnDQoMC.s page 15
368:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
369:Drivers/CMSIS/Include/cmsis_gcc.h **** {
370:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
371:Drivers/CMSIS/Include/cmsis_gcc.h ****
372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
373:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
374:Drivers/CMSIS/Include/cmsis_gcc.h **** }
375:Drivers/CMSIS/Include/cmsis_gcc.h ****
376:Drivers/CMSIS/Include/cmsis_gcc.h ****
377:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
378:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
379:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure)
380:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
381:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
382:Drivers/CMSIS/Include/cmsis_gcc.h **** */
383:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
384:Drivers/CMSIS/Include/cmsis_gcc.h **** {
385:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
386:Drivers/CMSIS/Include/cmsis_gcc.h ****
387:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
388:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
389:Drivers/CMSIS/Include/cmsis_gcc.h **** }
390:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
391:Drivers/CMSIS/Include/cmsis_gcc.h ****
392:Drivers/CMSIS/Include/cmsis_gcc.h ****
393:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
394:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer
395:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP).
396:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
397:Drivers/CMSIS/Include/cmsis_gcc.h **** */
398:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
399:Drivers/CMSIS/Include/cmsis_gcc.h **** {
400:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
401:Drivers/CMSIS/Include/cmsis_gcc.h **** }
402:Drivers/CMSIS/Include/cmsis_gcc.h ****
403:Drivers/CMSIS/Include/cmsis_gcc.h ****
404:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
405:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
406:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure)
407:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
408:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
409:Drivers/CMSIS/Include/cmsis_gcc.h **** */
410:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
411:Drivers/CMSIS/Include/cmsis_gcc.h **** {
412:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
413:Drivers/CMSIS/Include/cmsis_gcc.h **** }
414:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
415:Drivers/CMSIS/Include/cmsis_gcc.h ****
416:Drivers/CMSIS/Include/cmsis_gcc.h ****
417:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
418:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
419:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure)
420:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
421:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value
422:Drivers/CMSIS/Include/cmsis_gcc.h **** */
423:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
424:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccnDQoMC.s page 16
425:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
426:Drivers/CMSIS/Include/cmsis_gcc.h ****
427:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
428:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
429:Drivers/CMSIS/Include/cmsis_gcc.h **** }
430:Drivers/CMSIS/Include/cmsis_gcc.h ****
431:Drivers/CMSIS/Include/cmsis_gcc.h ****
432:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
433:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure)
434:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
435:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set
436:Drivers/CMSIS/Include/cmsis_gcc.h **** */
437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
438:Drivers/CMSIS/Include/cmsis_gcc.h **** {
439:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
440:Drivers/CMSIS/Include/cmsis_gcc.h **** }
441:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
442:Drivers/CMSIS/Include/cmsis_gcc.h ****
443:Drivers/CMSIS/Include/cmsis_gcc.h ****
444:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
445:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask
446:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register.
447:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
448:Drivers/CMSIS/Include/cmsis_gcc.h **** */
449:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
450:Drivers/CMSIS/Include/cmsis_gcc.h **** {
451:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
452:Drivers/CMSIS/Include/cmsis_gcc.h ****
453:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
454:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
455:Drivers/CMSIS/Include/cmsis_gcc.h **** }
456:Drivers/CMSIS/Include/cmsis_gcc.h ****
457:Drivers/CMSIS/Include/cmsis_gcc.h ****
458:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
459:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
460:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure)
461:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
462:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
463:Drivers/CMSIS/Include/cmsis_gcc.h **** */
464:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
465:Drivers/CMSIS/Include/cmsis_gcc.h **** {
466:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
467:Drivers/CMSIS/Include/cmsis_gcc.h ****
468:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
469:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
470:Drivers/CMSIS/Include/cmsis_gcc.h **** }
471:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
472:Drivers/CMSIS/Include/cmsis_gcc.h ****
473:Drivers/CMSIS/Include/cmsis_gcc.h ****
474:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
475:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask
476:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register.
477:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
478:Drivers/CMSIS/Include/cmsis_gcc.h **** */
479:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
480:Drivers/CMSIS/Include/cmsis_gcc.h **** {
481:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
ARM GAS /tmp/ccnDQoMC.s page 17
482:Drivers/CMSIS/Include/cmsis_gcc.h **** }
483:Drivers/CMSIS/Include/cmsis_gcc.h ****
484:Drivers/CMSIS/Include/cmsis_gcc.h ****
485:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
486:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure)
488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
490:Drivers/CMSIS/Include/cmsis_gcc.h **** */
491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
492:Drivers/CMSIS/Include/cmsis_gcc.h **** {
493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
494:Drivers/CMSIS/Include/cmsis_gcc.h **** }
495:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
496:Drivers/CMSIS/Include/cmsis_gcc.h ****
497:Drivers/CMSIS/Include/cmsis_gcc.h ****
498:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
499:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
500:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
501:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
502:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ
503:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
504:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
505:Drivers/CMSIS/Include/cmsis_gcc.h **** */
506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void)
507:Drivers/CMSIS/Include/cmsis_gcc.h **** {
508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory");
509:Drivers/CMSIS/Include/cmsis_gcc.h **** }
510:Drivers/CMSIS/Include/cmsis_gcc.h ****
511:Drivers/CMSIS/Include/cmsis_gcc.h ****
512:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ
514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR.
515:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
516:Drivers/CMSIS/Include/cmsis_gcc.h **** */
517:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
518:Drivers/CMSIS/Include/cmsis_gcc.h **** {
519:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory");
520:Drivers/CMSIS/Include/cmsis_gcc.h **** }
521:Drivers/CMSIS/Include/cmsis_gcc.h ****
522:Drivers/CMSIS/Include/cmsis_gcc.h ****
523:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
524:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority
525:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register.
526:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
527:Drivers/CMSIS/Include/cmsis_gcc.h **** */
528:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
529:Drivers/CMSIS/Include/cmsis_gcc.h **** {
530:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
531:Drivers/CMSIS/Include/cmsis_gcc.h ****
532:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) );
533:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
534:Drivers/CMSIS/Include/cmsis_gcc.h **** }
535:Drivers/CMSIS/Include/cmsis_gcc.h ****
536:Drivers/CMSIS/Include/cmsis_gcc.h ****
537:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
538:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
ARM GAS /tmp/ccnDQoMC.s page 18
539:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure)
540:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state.
541:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
542:Drivers/CMSIS/Include/cmsis_gcc.h **** */
543:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
544:Drivers/CMSIS/Include/cmsis_gcc.h **** {
545:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
546:Drivers/CMSIS/Include/cmsis_gcc.h ****
547:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
548:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
549:Drivers/CMSIS/Include/cmsis_gcc.h **** }
550:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
551:Drivers/CMSIS/Include/cmsis_gcc.h ****
552:Drivers/CMSIS/Include/cmsis_gcc.h ****
553:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
554:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority
555:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register.
556:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
557:Drivers/CMSIS/Include/cmsis_gcc.h **** */
558:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
559:Drivers/CMSIS/Include/cmsis_gcc.h **** {
560:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
561:Drivers/CMSIS/Include/cmsis_gcc.h **** }
562:Drivers/CMSIS/Include/cmsis_gcc.h ****
563:Drivers/CMSIS/Include/cmsis_gcc.h ****
564:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
565:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
566:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure)
567:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state.
568:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
569:Drivers/CMSIS/Include/cmsis_gcc.h **** */
570:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
571:Drivers/CMSIS/Include/cmsis_gcc.h **** {
572:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
573:Drivers/CMSIS/Include/cmsis_gcc.h **** }
574:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
575:Drivers/CMSIS/Include/cmsis_gcc.h ****
576:Drivers/CMSIS/Include/cmsis_gcc.h ****
577:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
578:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition
579:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable
580:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level.
581:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
582:Drivers/CMSIS/Include/cmsis_gcc.h **** */
583:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
584:Drivers/CMSIS/Include/cmsis_gcc.h **** {
585:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
586:Drivers/CMSIS/Include/cmsis_gcc.h **** }
587:Drivers/CMSIS/Include/cmsis_gcc.h ****
588:Drivers/CMSIS/Include/cmsis_gcc.h ****
589:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
590:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask
591:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register.
592:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
593:Drivers/CMSIS/Include/cmsis_gcc.h **** */
594:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
595:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccnDQoMC.s page 19
596:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
597:Drivers/CMSIS/Include/cmsis_gcc.h ****
598:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
599:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
600:Drivers/CMSIS/Include/cmsis_gcc.h **** }
601:Drivers/CMSIS/Include/cmsis_gcc.h ****
602:Drivers/CMSIS/Include/cmsis_gcc.h ****
603:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
604:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
605:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure)
606:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state.
607:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
608:Drivers/CMSIS/Include/cmsis_gcc.h **** */
609:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
610:Drivers/CMSIS/Include/cmsis_gcc.h **** {
611:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
612:Drivers/CMSIS/Include/cmsis_gcc.h ****
613:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
614:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
615:Drivers/CMSIS/Include/cmsis_gcc.h **** }
616:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
617:Drivers/CMSIS/Include/cmsis_gcc.h ****
618:Drivers/CMSIS/Include/cmsis_gcc.h ****
619:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
620:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask
621:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register.
622:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
623:Drivers/CMSIS/Include/cmsis_gcc.h **** */
624:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
625:Drivers/CMSIS/Include/cmsis_gcc.h **** {
626:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
627:Drivers/CMSIS/Include/cmsis_gcc.h **** }
628:Drivers/CMSIS/Include/cmsis_gcc.h ****
629:Drivers/CMSIS/Include/cmsis_gcc.h ****
630:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
631:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
632:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure)
633:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state.
634:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
635:Drivers/CMSIS/Include/cmsis_gcc.h **** */
636:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
637:Drivers/CMSIS/Include/cmsis_gcc.h **** {
638:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
639:Drivers/CMSIS/Include/cmsis_gcc.h **** }
640:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
641:Drivers/CMSIS/Include/cmsis_gcc.h ****
642:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
643:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
644:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
645:Drivers/CMSIS/Include/cmsis_gcc.h ****
646:Drivers/CMSIS/Include/cmsis_gcc.h ****
647:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
648:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
649:Drivers/CMSIS/Include/cmsis_gcc.h ****
650:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit
652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
ARM GAS /tmp/ccnDQoMC.s page 20
653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
654:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
655:Drivers/CMSIS/Include/cmsis_gcc.h ****
656:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
657:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
658:Drivers/CMSIS/Include/cmsis_gcc.h **** */
659:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
660:Drivers/CMSIS/Include/cmsis_gcc.h **** {
661:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
662:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
663:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
664:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
665:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
666:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
667:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) );
668:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
669:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
670:Drivers/CMSIS/Include/cmsis_gcc.h **** }
671:Drivers/CMSIS/Include/cmsis_gcc.h ****
672:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
673:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
674:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure)
675:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
676:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
677:Drivers/CMSIS/Include/cmsis_gcc.h ****
678:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in
679:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
680:Drivers/CMSIS/Include/cmsis_gcc.h **** */
681:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
682:Drivers/CMSIS/Include/cmsis_gcc.h **** {
683:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
684:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
685:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
686:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
687:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
688:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
689:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
690:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
691:Drivers/CMSIS/Include/cmsis_gcc.h **** }
692:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
693:Drivers/CMSIS/Include/cmsis_gcc.h ****
694:Drivers/CMSIS/Include/cmsis_gcc.h ****
695:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
696:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit
697:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
698:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
699:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
700:Drivers/CMSIS/Include/cmsis_gcc.h ****
701:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
702:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
703:Drivers/CMSIS/Include/cmsis_gcc.h **** */
704:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
705:Drivers/CMSIS/Include/cmsis_gcc.h **** {
706:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
707:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
708:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
709:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
ARM GAS /tmp/ccnDQoMC.s page 21
710:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
711:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
712:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
713:Drivers/CMSIS/Include/cmsis_gcc.h **** }
714:Drivers/CMSIS/Include/cmsis_gcc.h ****
715:Drivers/CMSIS/Include/cmsis_gcc.h ****
716:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
717:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
718:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
719:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
720:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
721:Drivers/CMSIS/Include/cmsis_gcc.h ****
722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s
723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
724:Drivers/CMSIS/Include/cmsis_gcc.h **** */
725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
726:Drivers/CMSIS/Include/cmsis_gcc.h **** {
727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
728:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
729:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
730:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
732:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
733:Drivers/CMSIS/Include/cmsis_gcc.h **** }
734:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
735:Drivers/CMSIS/Include/cmsis_gcc.h ****
736:Drivers/CMSIS/Include/cmsis_gcc.h ****
737:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
738:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit
739:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
740:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
741:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
742:Drivers/CMSIS/Include/cmsis_gcc.h ****
743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
744:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
745:Drivers/CMSIS/Include/cmsis_gcc.h **** */
746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
747:Drivers/CMSIS/Include/cmsis_gcc.h **** {
748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
749:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
750:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
751:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
752:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
754:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) );
755:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
756:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
757:Drivers/CMSIS/Include/cmsis_gcc.h **** }
758:Drivers/CMSIS/Include/cmsis_gcc.h ****
759:Drivers/CMSIS/Include/cmsis_gcc.h ****
760:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure)
763:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
764:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
765:Drivers/CMSIS/Include/cmsis_gcc.h ****
766:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec
ARM GAS /tmp/ccnDQoMC.s page 22
767:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
768:Drivers/CMSIS/Include/cmsis_gcc.h **** */
769:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
770:Drivers/CMSIS/Include/cmsis_gcc.h **** {
771:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
772:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
773:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
774:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
775:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
776:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
777:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
778:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
779:Drivers/CMSIS/Include/cmsis_gcc.h **** }
780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
781:Drivers/CMSIS/Include/cmsis_gcc.h ****
782:Drivers/CMSIS/Include/cmsis_gcc.h ****
783:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
784:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit
785:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
786:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
787:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
788:Drivers/CMSIS/Include/cmsis_gcc.h ****
789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
791:Drivers/CMSIS/Include/cmsis_gcc.h **** */
792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
793:Drivers/CMSIS/Include/cmsis_gcc.h **** {
794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
795:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
796:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
797:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
798:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
799:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
800:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
801:Drivers/CMSIS/Include/cmsis_gcc.h **** }
802:Drivers/CMSIS/Include/cmsis_gcc.h ****
803:Drivers/CMSIS/Include/cmsis_gcc.h ****
804:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
805:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
806:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure)
807:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
808:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
809:Drivers/CMSIS/Include/cmsis_gcc.h ****
810:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu
811:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set
812:Drivers/CMSIS/Include/cmsis_gcc.h **** */
813:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
814:Drivers/CMSIS/Include/cmsis_gcc.h **** {
815:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
816:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
817:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
818:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
820:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
821:Drivers/CMSIS/Include/cmsis_gcc.h **** }
822:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
823:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccnDQoMC.s page 23
824:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
825:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
826:Drivers/CMSIS/Include/cmsis_gcc.h ****
827:Drivers/CMSIS/Include/cmsis_gcc.h ****
828:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
829:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR
830:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register.
831:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value
832:Drivers/CMSIS/Include/cmsis_gcc.h **** */
833:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
834:Drivers/CMSIS/Include/cmsis_gcc.h **** {
835:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
836:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
837:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr)
838:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
839:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
840:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
841:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr();
842:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
843:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
844:Drivers/CMSIS/Include/cmsis_gcc.h ****
845:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
846:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
847:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
848:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
849:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U);
850:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
851:Drivers/CMSIS/Include/cmsis_gcc.h **** }
852:Drivers/CMSIS/Include/cmsis_gcc.h ****
853:Drivers/CMSIS/Include/cmsis_gcc.h ****
854:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
855:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR
856:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register.
857:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set
858:Drivers/CMSIS/Include/cmsis_gcc.h **** */
859:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
860:Drivers/CMSIS/Include/cmsis_gcc.h **** {
861:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
862:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
863:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr)
864:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
865:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
866:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
867:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr);
868:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
869:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
870:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
871:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
872:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr;
873:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
874:Drivers/CMSIS/Include/cmsis_gcc.h **** }
875:Drivers/CMSIS/Include/cmsis_gcc.h ****
876:Drivers/CMSIS/Include/cmsis_gcc.h ****
877:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
878:Drivers/CMSIS/Include/cmsis_gcc.h ****
879:Drivers/CMSIS/Include/cmsis_gcc.h ****
880:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */
ARM GAS /tmp/ccnDQoMC.s page 24
881:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
882:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions
883:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
884:Drivers/CMSIS/Include/cmsis_gcc.h **** */
885:Drivers/CMSIS/Include/cmsis_gcc.h ****
886:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
887:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l"
888:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */
889:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
890:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
891:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
892:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
893:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
894:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
895:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
896:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
897:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
898:Drivers/CMSIS/Include/cmsis_gcc.h ****
899:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
900:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation
901:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes.
902:Drivers/CMSIS/Include/cmsis_gcc.h **** */
903:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop")
904:Drivers/CMSIS/Include/cmsis_gcc.h ****
905:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
906:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt
907:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
908:Drivers/CMSIS/Include/cmsis_gcc.h **** */
909:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi")
910:Drivers/CMSIS/Include/cmsis_gcc.h ****
911:Drivers/CMSIS/Include/cmsis_gcc.h ****
912:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
913:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event
914:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter
915:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs.
916:Drivers/CMSIS/Include/cmsis_gcc.h **** */
917:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe")
918:Drivers/CMSIS/Include/cmsis_gcc.h ****
919:Drivers/CMSIS/Include/cmsis_gcc.h ****
920:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
921:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event
922:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
923:Drivers/CMSIS/Include/cmsis_gcc.h **** */
924:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev")
925:Drivers/CMSIS/Include/cmsis_gcc.h ****
926:Drivers/CMSIS/Include/cmsis_gcc.h ****
927:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
928:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier
929:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor,
930:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory,
931:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed.
932:Drivers/CMSIS/Include/cmsis_gcc.h **** */
933:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
934:Drivers/CMSIS/Include/cmsis_gcc.h **** {
935:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory");
936:Drivers/CMSIS/Include/cmsis_gcc.h **** }
937:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccnDQoMC.s page 25
938:Drivers/CMSIS/Include/cmsis_gcc.h ****
939:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
940:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier
941:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier.
942:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete.
943:Drivers/CMSIS/Include/cmsis_gcc.h **** */
944:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
945:Drivers/CMSIS/Include/cmsis_gcc.h **** {
946:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory");
947:Drivers/CMSIS/Include/cmsis_gcc.h **** }
948:Drivers/CMSIS/Include/cmsis_gcc.h ****
949:Drivers/CMSIS/Include/cmsis_gcc.h ****
950:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
951:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier
952:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before
953:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion.
954:Drivers/CMSIS/Include/cmsis_gcc.h **** */
955:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
956:Drivers/CMSIS/Include/cmsis_gcc.h **** {
957:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory");
958:Drivers/CMSIS/Include/cmsis_gcc.h **** }
959:Drivers/CMSIS/Include/cmsis_gcc.h ****
960:Drivers/CMSIS/Include/cmsis_gcc.h ****
961:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
962:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit)
963:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
964:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
965:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
966:Drivers/CMSIS/Include/cmsis_gcc.h **** */
967:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
968:Drivers/CMSIS/Include/cmsis_gcc.h **** {
969:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
970:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value);
971:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
972:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
973:Drivers/CMSIS/Include/cmsis_gcc.h ****
974:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
975:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
976:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
977:Drivers/CMSIS/Include/cmsis_gcc.h **** }
978:Drivers/CMSIS/Include/cmsis_gcc.h ****
979:Drivers/CMSIS/Include/cmsis_gcc.h ****
980:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
981:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
982:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes
983:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
984:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
985:Drivers/CMSIS/Include/cmsis_gcc.h **** */
986:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
987:Drivers/CMSIS/Include/cmsis_gcc.h **** {
988:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
989:Drivers/CMSIS/Include/cmsis_gcc.h ****
990:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
991:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
992:Drivers/CMSIS/Include/cmsis_gcc.h **** }
993:Drivers/CMSIS/Include/cmsis_gcc.h ****
994:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccnDQoMC.s page 26
995:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
996:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
997:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
998:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
999:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
1000:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1001:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
1002:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1003:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
1004:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value);
1005:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1006:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result;
1007:Drivers/CMSIS/Include/cmsis_gcc.h ****
1008:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
1009:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
1010:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1011:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1012:Drivers/CMSIS/Include/cmsis_gcc.h ****
1013:Drivers/CMSIS/Include/cmsis_gcc.h ****
1014:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1015:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit)
1016:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
1017:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate
1018:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate
1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value
1020:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1021:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
1022:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1023:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U;
1024:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U)
1025:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1026:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1;
1027:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1028:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2));
1029:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1030:Drivers/CMSIS/Include/cmsis_gcc.h ****
1031:Drivers/CMSIS/Include/cmsis_gcc.h ****
1032:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1033:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint
1034:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state.
1035:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula
1036:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor.
1037:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break
1038:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1039:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value)
1040:Drivers/CMSIS/Include/cmsis_gcc.h ****
1041:Drivers/CMSIS/Include/cmsis_gcc.h ****
1042:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value
1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value.
1045:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
1046:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
1047:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1048:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
1049:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1050:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1051:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccnDQoMC.s page 27
1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
1053:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
1054:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
1055:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
1056:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
1058:Drivers/CMSIS/Include/cmsis_gcc.h ****
1059:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */
1060:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U)
1061:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1062:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U;
1063:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U;
1064:Drivers/CMSIS/Include/cmsis_gcc.h **** s--;
1065:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1066:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */
1067:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
1069:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
1071:Drivers/CMSIS/Include/cmsis_gcc.h ****
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros
1074:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value.
1075:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros
1076:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value
1077:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1078:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
1079:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1080:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
1081:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_clz(0) is undefined behaviour, so handle this case specially.
1082:Drivers/CMSIS/Include/cmsis_gcc.h **** This guarantees ARM-compatible results if happening to compile on a non-ARM
1083:Drivers/CMSIS/Include/cmsis_gcc.h **** target, and ensures the compiler doesn't decide to activate any
1084:Drivers/CMSIS/Include/cmsis_gcc.h **** optimisations using the logic "value was passed to __builtin_clz, so it
1085:Drivers/CMSIS/Include/cmsis_gcc.h **** is non-zero".
1086:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
1087:Drivers/CMSIS/Include/cmsis_gcc.h **** single CLZ instruction.
1088:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** if (value == 0U)
1090:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** return 32U;
1092:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1093:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_clz(value);
1094:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1095:Drivers/CMSIS/Include/cmsis_gcc.h ****
1096:Drivers/CMSIS/Include/cmsis_gcc.h ****
1097:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
1098:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
1099:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
1100:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
1101:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1102:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (8 bit)
1103:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 8 bit value.
1104:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
1105:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr)
1106:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1107:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
1108:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccnDQoMC.s page 28
1109:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1110:Drivers/CMSIS/Include/cmsis_gcc.h ****
1111:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
1112:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
1113:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1114:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
1115:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern.
1116:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1117:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
1118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1119:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */
1120:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
1122:Drivers/CMSIS/Include/cmsis_gcc.h ****
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1124:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (16 bit)
1125:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 16 bit values.
1126:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
1127:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr)
1128:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
1130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1131:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1132:Drivers/CMSIS/Include/cmsis_gcc.h ****
1133:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
1134:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
1135:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1136:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
1137:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern.
1138:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1139:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
1140:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1141:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */
1142:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1143:Drivers/CMSIS/Include/cmsis_gcc.h ****
1144:Drivers/CMSIS/Include/cmsis_gcc.h ****
1145:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1146:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit)
1147:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values.
1148:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
1149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr)
1150:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
1152:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1154:Drivers/CMSIS/Include/cmsis_gcc.h ****
1155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
1156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1157:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1158:Drivers/CMSIS/Include/cmsis_gcc.h ****
1159:Drivers/CMSIS/Include/cmsis_gcc.h ****
1160:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1161:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit)
1162:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values.
1163:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
1164:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
1165:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
ARM GAS /tmp/ccnDQoMC.s page 29
1166:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
1167:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1168:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
1169:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1170:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1171:Drivers/CMSIS/Include/cmsis_gcc.h ****
1172:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
1173:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1174:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1175:Drivers/CMSIS/Include/cmsis_gcc.h ****
1176:Drivers/CMSIS/Include/cmsis_gcc.h ****
1177:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1178:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (16 bit)
1179:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 16 bit values.
1180:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
1181:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
1182:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
1183:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
1184:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1185:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
1186:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1187:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1188:Drivers/CMSIS/Include/cmsis_gcc.h ****
1189:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
1190:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1191:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1192:Drivers/CMSIS/Include/cmsis_gcc.h ****
1193:Drivers/CMSIS/Include/cmsis_gcc.h ****
1194:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1195:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (32 bit)
1196:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values.
1197:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
1198:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
1199:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
1200:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
1201:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1202:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
1203:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1204:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1205:Drivers/CMSIS/Include/cmsis_gcc.h ****
1206:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
1207:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1208:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1209:Drivers/CMSIS/Include/cmsis_gcc.h ****
1210:Drivers/CMSIS/Include/cmsis_gcc.h ****
1211:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1212:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Remove the exclusive lock
1213:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Removes the exclusive lock which is created by LDREX.
1214:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1215:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __CLREX(void)
1216:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1217:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("clrex" ::: "memory");
1218:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1219:Drivers/CMSIS/Include/cmsis_gcc.h ****
1220:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
1221:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
1222:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
ARM GAS /tmp/ccnDQoMC.s page 30
1223:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
1224:Drivers/CMSIS/Include/cmsis_gcc.h ****
1225:Drivers/CMSIS/Include/cmsis_gcc.h ****
1226:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
1227:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
1228:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
1229:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1230:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Signed Saturate
1231:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates a signed value.
1232:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG1 Value to be saturated
1233:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG2 Bit position to saturate to (1..32)
1234:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value
1235:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1236:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SSAT(ARG1,ARG2) \
1237:Drivers/CMSIS/Include/cmsis_gcc.h **** __extension__ \
1238:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \
1239:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t __RES, __ARG1 = (ARG1); \
1240:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1241:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \
1242:Drivers/CMSIS/Include/cmsis_gcc.h **** })
1243:Drivers/CMSIS/Include/cmsis_gcc.h ****
1244:Drivers/CMSIS/Include/cmsis_gcc.h ****
1245:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1246:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Unsigned Saturate
1247:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates an unsigned value.
1248:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG1 Value to be saturated
1249:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG2 Bit position to saturate to (0..31)
1250:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value
1251:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1252:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USAT(ARG1,ARG2) \
1253:Drivers/CMSIS/Include/cmsis_gcc.h **** __extension__ \
1254:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \
1255:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1); \
1256:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1257:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \
1258:Drivers/CMSIS/Include/cmsis_gcc.h **** })
1259:Drivers/CMSIS/Include/cmsis_gcc.h ****
1260:Drivers/CMSIS/Include/cmsis_gcc.h ****
1261:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1262:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right with Extend (32 bit)
1263:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Moves each bit of a bitstring right by one bit.
1264:Drivers/CMSIS/Include/cmsis_gcc.h **** The carry input is shifted in at the left end of the bitstring.
1265:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to rotate
1266:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value
1267:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1268:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
1269:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1270:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1271:Drivers/CMSIS/Include/cmsis_gcc.h ****
1272:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
1273:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1274:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1275:Drivers/CMSIS/Include/cmsis_gcc.h ****
1276:Drivers/CMSIS/Include/cmsis_gcc.h ****
1277:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1278:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (8 bit)
1279:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 8 bit value.
ARM GAS /tmp/ccnDQoMC.s page 31
1280:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
1281:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr)
1282:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1283:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
1284:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1285:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1286:Drivers/CMSIS/Include/cmsis_gcc.h ****
1287:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
1288:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
1289:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1290:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
1291:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern.
1292:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1293:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
1294:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1295:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */
1296:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1297:Drivers/CMSIS/Include/cmsis_gcc.h ****
1298:Drivers/CMSIS/Include/cmsis_gcc.h ****
1299:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1300:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (16 bit)
1301:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 16 bit values.
1302:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
1303:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr)
1304:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1305:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
1306:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1307:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1308:Drivers/CMSIS/Include/cmsis_gcc.h ****
1309:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
1310:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
1311:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1312:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
1313:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern.
1314:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1315:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
1316:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1317:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */
1318:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1319:Drivers/CMSIS/Include/cmsis_gcc.h ****
1320:Drivers/CMSIS/Include/cmsis_gcc.h ****
1321:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1322:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (32 bit)
1323:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 32 bit values.
1324:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
1325:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr)
1326:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1327:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
1328:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1329:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1330:Drivers/CMSIS/Include/cmsis_gcc.h ****
1331:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
1332:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1333:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1334:Drivers/CMSIS/Include/cmsis_gcc.h ****
1335:Drivers/CMSIS/Include/cmsis_gcc.h ****
1336:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
ARM GAS /tmp/ccnDQoMC.s page 32
1337:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (8 bit)
1338:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 8 bit values.
1339:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
1340:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
1341:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1342:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
1343:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1344:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
1345:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1346:Drivers/CMSIS/Include/cmsis_gcc.h ****
1347:Drivers/CMSIS/Include/cmsis_gcc.h ****
1348:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1349:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (16 bit)
1350:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 16 bit values.
1351:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
1352:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
1353:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1354:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
1355:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1356:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
1357:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1358:Drivers/CMSIS/Include/cmsis_gcc.h ****
1359:Drivers/CMSIS/Include/cmsis_gcc.h ****
1360:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1361:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (32 bit)
1362:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 32 bit values.
1363:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
1364:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
1365:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1366:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
1367:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1368:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
1369:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1370:Drivers/CMSIS/Include/cmsis_gcc.h ****
1371:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
1372:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
1373:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
1374:Drivers/CMSIS/Include/cmsis_gcc.h ****
1375:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1376:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Signed Saturate
1377:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates a signed value.
1378:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to be saturated
1379:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] sat Bit position to saturate to (1..32)
1380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value
1381:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
1383:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1384:Drivers/CMSIS/Include/cmsis_gcc.h **** if ((sat >= 1U) && (sat <= 32U))
1385:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1386:Drivers/CMSIS/Include/cmsis_gcc.h **** const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
1387:Drivers/CMSIS/Include/cmsis_gcc.h **** const int32_t min = -1 - max ;
1388:Drivers/CMSIS/Include/cmsis_gcc.h **** if (val > max)
1389:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1390:Drivers/CMSIS/Include/cmsis_gcc.h **** return max;
1391:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1392:Drivers/CMSIS/Include/cmsis_gcc.h **** else if (val < min)
1393:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccnDQoMC.s page 33
1394:Drivers/CMSIS/Include/cmsis_gcc.h **** return min;
1395:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1396:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1397:Drivers/CMSIS/Include/cmsis_gcc.h **** return val;
1398:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1399:Drivers/CMSIS/Include/cmsis_gcc.h ****
1400:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1401:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Unsigned Saturate
1402:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates an unsigned value.
1403:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to be saturated
1404:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] sat Bit position to saturate to (0..31)
1405:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value
1406:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1407:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
1408:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1409:Drivers/CMSIS/Include/cmsis_gcc.h **** if (sat <= 31U)
1410:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1411:Drivers/CMSIS/Include/cmsis_gcc.h **** const uint32_t max = ((1U << sat) - 1U);
1412:Drivers/CMSIS/Include/cmsis_gcc.h **** if (val > (int32_t)max)
1413:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1414:Drivers/CMSIS/Include/cmsis_gcc.h **** return max;
1415:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1416:Drivers/CMSIS/Include/cmsis_gcc.h **** else if (val < 0)
1417:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1418:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
1419:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1420:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1421:Drivers/CMSIS/Include/cmsis_gcc.h **** return (uint32_t)val;
1422:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1423:Drivers/CMSIS/Include/cmsis_gcc.h ****
1424:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
1425:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
1426:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
1427:Drivers/CMSIS/Include/cmsis_gcc.h ****
1428:Drivers/CMSIS/Include/cmsis_gcc.h ****
1429:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
1430:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
1431:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1432:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (8 bit)
1433:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAB instruction for 8 bit value.
1434:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
1435:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr)
1436:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
1438:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1439:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1440:Drivers/CMSIS/Include/cmsis_gcc.h ****
1441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
1442:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result);
1443:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1444:Drivers/CMSIS/Include/cmsis_gcc.h ****
1445:Drivers/CMSIS/Include/cmsis_gcc.h ****
1446:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1447:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (16 bit)
1448:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAH instruction for 16 bit values.
1449:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
1450:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr)
ARM GAS /tmp/ccnDQoMC.s page 34
1451:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1452:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
1453:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1454:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1455:Drivers/CMSIS/Include/cmsis_gcc.h ****
1456:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
1457:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result);
1458:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1459:Drivers/CMSIS/Include/cmsis_gcc.h ****
1460:Drivers/CMSIS/Include/cmsis_gcc.h ****
1461:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1462:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (32 bit)
1463:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDA instruction for 32 bit values.
1464:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
1465:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr)
1466:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1467:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
1468:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1469:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1470:Drivers/CMSIS/Include/cmsis_gcc.h ****
1471:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
1472:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1473:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1474:Drivers/CMSIS/Include/cmsis_gcc.h ****
1475:Drivers/CMSIS/Include/cmsis_gcc.h ****
1476:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1477:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (8 bit)
1478:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLB instruction for 8 bit values.
1479:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
1480:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
1481:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1482:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
1483:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1484:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
1485:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1486:Drivers/CMSIS/Include/cmsis_gcc.h ****
1487:Drivers/CMSIS/Include/cmsis_gcc.h ****
1488:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1489:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (16 bit)
1490:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLH instruction for 16 bit values.
1491:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
1492:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
1493:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1494:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
1495:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1496:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
1497:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1498:Drivers/CMSIS/Include/cmsis_gcc.h ****
1499:Drivers/CMSIS/Include/cmsis_gcc.h ****
1500:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1501:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (32 bit)
1502:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STL instruction for 32 bit values.
1503:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
1504:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
1505:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
1507:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccnDQoMC.s page 35
1508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
1509:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1510:Drivers/CMSIS/Include/cmsis_gcc.h ****
1511:Drivers/CMSIS/Include/cmsis_gcc.h ****
1512:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (8 bit)
1514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAB exclusive instruction for 8 bit value.
1515:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
1516:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr)
1517:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1518:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
1519:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1520:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1521:Drivers/CMSIS/Include/cmsis_gcc.h ****
1522:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
1523:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result);
1524:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1525:Drivers/CMSIS/Include/cmsis_gcc.h ****
1526:Drivers/CMSIS/Include/cmsis_gcc.h ****
1527:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1528:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (16 bit)
1529:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAH exclusive instruction for 16 bit values.
1530:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
1531:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr)
1532:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1533:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
1534:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1535:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1536:Drivers/CMSIS/Include/cmsis_gcc.h ****
1537:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
1538:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result);
1539:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1540:Drivers/CMSIS/Include/cmsis_gcc.h ****
1541:Drivers/CMSIS/Include/cmsis_gcc.h ****
1542:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1543:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (32 bit)
1544:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDA exclusive instruction for 32 bit values.
1545:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
1546:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr)
1547:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1548:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
1549:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1550:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1551:Drivers/CMSIS/Include/cmsis_gcc.h ****
1552:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
1553:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1554:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1555:Drivers/CMSIS/Include/cmsis_gcc.h ****
1556:Drivers/CMSIS/Include/cmsis_gcc.h ****
1557:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1558:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (8 bit)
1559:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLB exclusive instruction for 8 bit values.
1560:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
1561:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
1562:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
1563:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
1564:Drivers/CMSIS/Include/cmsis_gcc.h **** */
ARM GAS /tmp/ccnDQoMC.s page 36
1565:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
1566:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1567:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1568:Drivers/CMSIS/Include/cmsis_gcc.h ****
1569:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
1570:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1571:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1572:Drivers/CMSIS/Include/cmsis_gcc.h ****
1573:Drivers/CMSIS/Include/cmsis_gcc.h ****
1574:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1575:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (16 bit)
1576:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLH exclusive instruction for 16 bit values.
1577:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
1578:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
1579:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
1580:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
1581:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1582:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
1583:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1584:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1585:Drivers/CMSIS/Include/cmsis_gcc.h ****
1586:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
1587:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1588:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1589:Drivers/CMSIS/Include/cmsis_gcc.h ****
1590:Drivers/CMSIS/Include/cmsis_gcc.h ****
1591:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1592:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (32 bit)
1593:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STL exclusive instruction for 32 bit values.
1594:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
1595:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
1596:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
1597:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
1598:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1599:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
1600:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1601:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1602:Drivers/CMSIS/Include/cmsis_gcc.h ****
1603:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
1604:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1605:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1606:Drivers/CMSIS/Include/cmsis_gcc.h ****
1607:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
1608:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
1609:Drivers/CMSIS/Include/cmsis_gcc.h ****
1610:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
1611:Drivers/CMSIS/Include/cmsis_gcc.h ****
1612:Drivers/CMSIS/Include/cmsis_gcc.h ****
1613:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ################### Compiler specific Intrinsics ########################### */
1614:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
1615:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated SIMD instructions
1616:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
1617:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1618:Drivers/CMSIS/Include/cmsis_gcc.h ****
1619:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
1620:Drivers/CMSIS/Include/cmsis_gcc.h ****
1621:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
ARM GAS /tmp/ccnDQoMC.s page 37
1622:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1623:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1624:Drivers/CMSIS/Include/cmsis_gcc.h ****
1625:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1626:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1627:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1628:Drivers/CMSIS/Include/cmsis_gcc.h ****
1629:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
1630:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1631:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1632:Drivers/CMSIS/Include/cmsis_gcc.h ****
1633:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1634:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1635:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1636:Drivers/CMSIS/Include/cmsis_gcc.h ****
1637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
1638:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1639:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1640:Drivers/CMSIS/Include/cmsis_gcc.h ****
1641:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1642:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1643:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1644:Drivers/CMSIS/Include/cmsis_gcc.h ****
1645:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
1646:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1647:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1648:Drivers/CMSIS/Include/cmsis_gcc.h ****
1649:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1650:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1651:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1652:Drivers/CMSIS/Include/cmsis_gcc.h ****
1653:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
1654:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1655:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1656:Drivers/CMSIS/Include/cmsis_gcc.h ****
1657:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1658:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1659:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1660:Drivers/CMSIS/Include/cmsis_gcc.h ****
1661:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
1662:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1663:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1664:Drivers/CMSIS/Include/cmsis_gcc.h ****
1665:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1666:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1667:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1668:Drivers/CMSIS/Include/cmsis_gcc.h ****
1669:Drivers/CMSIS/Include/cmsis_gcc.h ****
1670:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
1671:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1672:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1673:Drivers/CMSIS/Include/cmsis_gcc.h ****
1674:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1675:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1676:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1677:Drivers/CMSIS/Include/cmsis_gcc.h ****
1678:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
ARM GAS /tmp/ccnDQoMC.s page 38
1679:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1680:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1681:Drivers/CMSIS/Include/cmsis_gcc.h ****
1682:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1683:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1684:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1685:Drivers/CMSIS/Include/cmsis_gcc.h ****
1686:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
1687:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1688:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1689:Drivers/CMSIS/Include/cmsis_gcc.h ****
1690:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1691:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1692:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1693:Drivers/CMSIS/Include/cmsis_gcc.h ****
1694:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
1695:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1696:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1697:Drivers/CMSIS/Include/cmsis_gcc.h ****
1698:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1699:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1700:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1701:Drivers/CMSIS/Include/cmsis_gcc.h ****
1702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
1703:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1704:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1705:Drivers/CMSIS/Include/cmsis_gcc.h ****
1706:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1707:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1708:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1709:Drivers/CMSIS/Include/cmsis_gcc.h ****
1710:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
1711:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1712:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1713:Drivers/CMSIS/Include/cmsis_gcc.h ****
1714:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1715:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1716:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1717:Drivers/CMSIS/Include/cmsis_gcc.h ****
1718:Drivers/CMSIS/Include/cmsis_gcc.h ****
1719:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
1720:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1721:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1722:Drivers/CMSIS/Include/cmsis_gcc.h ****
1723:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1724:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1725:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1726:Drivers/CMSIS/Include/cmsis_gcc.h ****
1727:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
1728:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1729:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1730:Drivers/CMSIS/Include/cmsis_gcc.h ****
1731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1732:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1733:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1734:Drivers/CMSIS/Include/cmsis_gcc.h ****
1735:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
ARM GAS /tmp/ccnDQoMC.s page 39
1736:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1737:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1738:Drivers/CMSIS/Include/cmsis_gcc.h ****
1739:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1740:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1741:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1742:Drivers/CMSIS/Include/cmsis_gcc.h ****
1743:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
1744:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1745:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1746:Drivers/CMSIS/Include/cmsis_gcc.h ****
1747:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1748:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1749:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1750:Drivers/CMSIS/Include/cmsis_gcc.h ****
1751:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
1752:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1754:Drivers/CMSIS/Include/cmsis_gcc.h ****
1755:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1756:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1757:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1758:Drivers/CMSIS/Include/cmsis_gcc.h ****
1759:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
1760:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1761:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1762:Drivers/CMSIS/Include/cmsis_gcc.h ****
1763:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1764:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1765:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1766:Drivers/CMSIS/Include/cmsis_gcc.h ****
1767:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
1768:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1769:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1770:Drivers/CMSIS/Include/cmsis_gcc.h ****
1771:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1772:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1773:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1774:Drivers/CMSIS/Include/cmsis_gcc.h ****
1775:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
1776:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1777:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1778:Drivers/CMSIS/Include/cmsis_gcc.h ****
1779:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
83 .loc 3 1779 0
84 0004 0024 movs r4, #0
85 .LVL6:
86 .L10:
87 .LBE27:
88 .LBE26:
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** {
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /* C = |A| */
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** in = *pSrc++;
89 .loc 2 162 0
90 0006 30F9023B ldrsh r3, [r0], #2
ARM GAS /tmp/ccnDQoMC.s page 40
91 .LVL7:
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #if defined (ARM_MATH_DSP)
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
92 .loc 2 164 0
93 000a 002B cmp r3, #0
94 000c 06DD ble .L19
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** {
95 .loc 2 157 0 discriminator 4
96 000e 013A subs r2, r2, #1
97 .LVL8:
98 .loc 2 164 0 discriminator 4
99 0010 21F8023B strh r3, [r1], #2 @ movhi
100 .LVL9:
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** {
101 .loc 2 157 0 discriminator 4
102 0014 F7D1 bne .L10
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #else
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #endif
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** /* Decrement loop counter */
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** blkCnt--;
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** }
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c ****
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** }
103 .loc 2 173 0
104 0016 5DF8044B ldr r4, [sp], #4
105 .LCFI1:
106 .cfi_remember_state
107 .cfi_restore 4
108 .cfi_def_cfa_offset 0
109 001a 7047 bx lr
110 .LVL10:
111 .L19:
112 .LCFI2:
113 .cfi_restore_state
114 .LBB29:
115 .LBB28:
116 .loc 3 1779 0 discriminator 1
117 .syntax unified
118 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
119 001c D4FA13F3 qsub16 r3, r4, r3
120 @ 0 "" 2
121 .LVL11:
122 .thumb
123 .syntax unified
124 .LBE28:
125 .LBE29:
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** {
126 .loc 2 157 0 discriminator 1
127 0020 013A subs r2, r2, #1
128 .LVL12:
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** #else
129 .loc 2 164 0 discriminator 1
130 0022 21F8023B strh r3, [r1], #2 @ movhi
131 .LVL13:
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c **** {
ARM GAS /tmp/ccnDQoMC.s page 41
132 .loc 2 157 0 discriminator 1
133 0026 EED1 bne .L10
134 .loc 2 173 0
135 0028 5DF8044B ldr r4, [sp], #4
136 .LCFI3:
137 .cfi_restore 4
138 .cfi_def_cfa_offset 0
139 002c 7047 bx lr
140 .LVL14:
141 .L16:
142 002e 7047 bx lr
143 .cfi_endproc
144 .LFE149:
146 .section .text.arm_abs_q31,"ax",%progbits
147 .align 1
148 .p2align 2,,3
149 .global arm_abs_q31
150 .syntax unified
151 .thumb
152 .thumb_func
153 .fpu fpv4-sp-d16
155 arm_abs_q31:
156 .LFB150:
157 .file 4 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * Title: arm_abs_q31.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * Description: Q31 vector absolute value
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** */
ARM GAS /tmp/ccnDQoMC.s page 42
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** @addtogroup BasicAbs
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** @brief Q31 vector absolute value.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** @param[in] pSrc points to the input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** @param[out] pDst points to the output vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** @param[in] blockSize number of samples in each vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** @return none
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** @par Scaling and Overflow Behavior
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** The function uses saturating arithmetic.
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positiv
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** */
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #if defined(ARM_MATH_MVEI)
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #include "arm_helium_utils.h"
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** void arm_abs_q31(
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** const q31_t * pSrc,
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** q31_t * pDst,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** uint32_t blockSize)
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** {
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** uint32_t blkCnt; /* Loop counters */
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** q31x4_t vecSrc;
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* Compute 4 outputs at a time */
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** blkCnt = blockSize >> 2;
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** while (blkCnt > 0U)
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** {
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /*
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * C = |A|
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * Calculate absolute and then store the results in the destination buffer.
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** */
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** vecSrc = vld1q(pSrc);
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** vst1q(pDst, vqabsq(vecSrc));
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /*
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * Decrement the blockSize loop counter
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** */
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** blkCnt--;
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /*
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * Advance vector source and destination pointers
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** */
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** pSrc += 4;
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** pDst += 4;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** }
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /*
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** * Tail
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** */
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** blkCnt = blockSize & 3;
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** if (blkCnt > 0U)
ARM GAS /tmp/ccnDQoMC.s page 43
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** {
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** vecSrc = vld1q(pSrc);
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** vstrwq_p(pDst, vqabsq(vecSrc), p0);
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** }
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** }
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #else
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** void arm_abs_q31(
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** const q31_t * pSrc,
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** q31_t * pDst,
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** uint32_t blockSize)
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** {
158 .loc 4 103 0
159 .cfi_startproc
160 @ args = 0, pretend = 0, frame = 0
161 @ frame_needed = 0, uses_anonymous_args = 0
162 @ link register save eliminated.
163 .LVL15:
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** uint32_t blkCnt; /* Loop counter */
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** q31_t in; /* Temporary variable */
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #if defined(ARM_MATH_NEON)
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** int32x4_t vec1;
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** int32x4_t res;
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* Compute 4 outputs at a time */
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** blkCnt = blockSize >> 2U;
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** while (blkCnt > 0U)
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** {
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* C = |A| */
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* Calculate absolute and then store the results in the destination buffer. */
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** vec1 = vld1q_s32(pSrc);
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** res = vqabsq_s32(vec1);
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** vst1q_s32(pDst, res);
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* Increment pointers */
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** pSrc += 4;
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** pDst += 4;
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* Decrement the blockSize loop counter */
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** blkCnt--;
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** }
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* Tail */
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** blkCnt = blockSize & 0x3;
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #else
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #if defined (ARM_MATH_LOOPUNROLL)
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** blkCnt = blockSize >> 2U;
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** while (blkCnt > 0U)
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** {
ARM GAS /tmp/ccnDQoMC.s page 44
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* C = |A| */
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destina
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** in = *pSrc++;
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #if defined (ARM_MATH_DSP)
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #else
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #endif
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** in = *pSrc++;
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #if defined (ARM_MATH_DSP)
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #else
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #endif
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** in = *pSrc++;
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #if defined (ARM_MATH_DSP)
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #else
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #endif
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** in = *pSrc++;
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #if defined (ARM_MATH_DSP)
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #else
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #endif
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* Decrement loop counter */
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** blkCnt--;
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** }
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* Loop unrolling: Compute remaining outputs */
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** blkCnt = blockSize % 0x4U;
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #else
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* Initialize blkCnt with number of samples */
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** blkCnt = blockSize;
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #endif /* #if defined (ARM_MATH_NEON) */
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** while (blkCnt > 0U)
164 .loc 4 188 0
165 0000 AAB1 cbz r2, .L27
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** uint32_t blkCnt; /* Loop counter */
166 .loc 4 103 0
167 0002 10B4 push {r4}
168 .LCFI4:
169 .cfi_def_cfa_offset 4
170 .cfi_offset 4, -4
171 .LBB30:
172 .LBB31:
ARM GAS /tmp/ccnDQoMC.s page 45
1780:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1781:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1782:Drivers/CMSIS/Include/cmsis_gcc.h ****
1783:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
1784:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1785:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1786:Drivers/CMSIS/Include/cmsis_gcc.h ****
1787:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1788:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1789:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1790:Drivers/CMSIS/Include/cmsis_gcc.h ****
1791:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
1792:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1793:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1794:Drivers/CMSIS/Include/cmsis_gcc.h ****
1795:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1796:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1797:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1798:Drivers/CMSIS/Include/cmsis_gcc.h ****
1799:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
1800:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1801:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1802:Drivers/CMSIS/Include/cmsis_gcc.h ****
1803:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1804:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1805:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1806:Drivers/CMSIS/Include/cmsis_gcc.h ****
1807:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
1808:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1809:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1810:Drivers/CMSIS/Include/cmsis_gcc.h ****
1811:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1812:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1813:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1814:Drivers/CMSIS/Include/cmsis_gcc.h ****
1815:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
1816:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1817:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1818:Drivers/CMSIS/Include/cmsis_gcc.h ****
1819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1820:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1821:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1822:Drivers/CMSIS/Include/cmsis_gcc.h ****
1823:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
1824:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1825:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1826:Drivers/CMSIS/Include/cmsis_gcc.h ****
1827:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1828:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1829:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1830:Drivers/CMSIS/Include/cmsis_gcc.h ****
1831:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
1832:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1833:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1834:Drivers/CMSIS/Include/cmsis_gcc.h ****
1835:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1836:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
ARM GAS /tmp/ccnDQoMC.s page 46
1837:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1838:Drivers/CMSIS/Include/cmsis_gcc.h ****
1839:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
1840:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1841:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1842:Drivers/CMSIS/Include/cmsis_gcc.h ****
1843:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1844:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1845:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1846:Drivers/CMSIS/Include/cmsis_gcc.h ****
1847:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
1848:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1849:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1850:Drivers/CMSIS/Include/cmsis_gcc.h ****
1851:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1852:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1853:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1854:Drivers/CMSIS/Include/cmsis_gcc.h ****
1855:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
1856:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1857:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1858:Drivers/CMSIS/Include/cmsis_gcc.h ****
1859:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1860:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1861:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1862:Drivers/CMSIS/Include/cmsis_gcc.h ****
1863:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
1864:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1865:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1866:Drivers/CMSIS/Include/cmsis_gcc.h ****
1867:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1868:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1869:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1870:Drivers/CMSIS/Include/cmsis_gcc.h ****
1871:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
1872:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1873:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1874:Drivers/CMSIS/Include/cmsis_gcc.h ****
1875:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1876:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1877:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1878:Drivers/CMSIS/Include/cmsis_gcc.h ****
1879:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
1880:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1881:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1882:Drivers/CMSIS/Include/cmsis_gcc.h ****
1883:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1884:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1885:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1886:Drivers/CMSIS/Include/cmsis_gcc.h ****
1887:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
1888:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1889:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1890:Drivers/CMSIS/Include/cmsis_gcc.h ****
1891:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1892:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1893:Drivers/CMSIS/Include/cmsis_gcc.h **** }
ARM GAS /tmp/ccnDQoMC.s page 47
1894:Drivers/CMSIS/Include/cmsis_gcc.h ****
1895:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
1896:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1897:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1898:Drivers/CMSIS/Include/cmsis_gcc.h ****
1899:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1900:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1901:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1902:Drivers/CMSIS/Include/cmsis_gcc.h ****
1903:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
1904:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1906:Drivers/CMSIS/Include/cmsis_gcc.h ****
1907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1908:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1909:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1910:Drivers/CMSIS/Include/cmsis_gcc.h ****
1911:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
1912:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1913:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1914:Drivers/CMSIS/Include/cmsis_gcc.h ****
1915:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1916:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1917:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1918:Drivers/CMSIS/Include/cmsis_gcc.h ****
1919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
1920:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1922:Drivers/CMSIS/Include/cmsis_gcc.h ****
1923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
1924:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1925:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1926:Drivers/CMSIS/Include/cmsis_gcc.h ****
1927:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SSAT16(ARG1,ARG2) \
1928:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \
1929:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t __RES, __ARG1 = (ARG1); \
1930:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1931:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \
1932:Drivers/CMSIS/Include/cmsis_gcc.h **** })
1933:Drivers/CMSIS/Include/cmsis_gcc.h ****
1934:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USAT16(ARG1,ARG2) \
1935:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \
1936:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1); \
1937:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1938:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \
1939:Drivers/CMSIS/Include/cmsis_gcc.h **** })
1940:Drivers/CMSIS/Include/cmsis_gcc.h ****
1941:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
1942:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1943:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1944:Drivers/CMSIS/Include/cmsis_gcc.h ****
1945:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
1946:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1947:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1948:Drivers/CMSIS/Include/cmsis_gcc.h ****
1949:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
1950:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccnDQoMC.s page 48
1951:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1952:Drivers/CMSIS/Include/cmsis_gcc.h ****
1953:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1954:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1955:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1956:Drivers/CMSIS/Include/cmsis_gcc.h ****
1957:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
1958:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1959:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1960:Drivers/CMSIS/Include/cmsis_gcc.h ****
1961:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
1962:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1963:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1964:Drivers/CMSIS/Include/cmsis_gcc.h ****
1965:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
1966:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1967:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1968:Drivers/CMSIS/Include/cmsis_gcc.h ****
1969:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1970:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1971:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1972:Drivers/CMSIS/Include/cmsis_gcc.h ****
1973:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
1974:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1975:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1976:Drivers/CMSIS/Include/cmsis_gcc.h ****
1977:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1978:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1979:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1980:Drivers/CMSIS/Include/cmsis_gcc.h ****
1981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
1982:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1984:Drivers/CMSIS/Include/cmsis_gcc.h ****
1985:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
1986:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1987:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1988:Drivers/CMSIS/Include/cmsis_gcc.h ****
1989:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
1990:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1991:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1992:Drivers/CMSIS/Include/cmsis_gcc.h ****
1993:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
1994:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1995:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1996:Drivers/CMSIS/Include/cmsis_gcc.h ****
1997:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
1998:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1999:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
2000:Drivers/CMSIS/Include/cmsis_gcc.h ****
2001:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
2002:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
2003:Drivers/CMSIS/Include/cmsis_gcc.h **** }
2004:Drivers/CMSIS/Include/cmsis_gcc.h ****
2005:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
2006:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2007:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{
ARM GAS /tmp/ccnDQoMC.s page 49
2008:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2];
2009:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64;
2010:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr;
2011:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc;
2012:Drivers/CMSIS/Include/cmsis_gcc.h ****
2013:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */
2014:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (o
2015:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */
2016:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (o
2017:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
2018:Drivers/CMSIS/Include/cmsis_gcc.h ****
2019:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64);
2020:Drivers/CMSIS/Include/cmsis_gcc.h **** }
2021:Drivers/CMSIS/Include/cmsis_gcc.h ****
2022:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
2023:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2024:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{
2025:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2];
2026:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64;
2027:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr;
2028:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc;
2029:Drivers/CMSIS/Include/cmsis_gcc.h ****
2030:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */
2031:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (
2032:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */
2033:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (
2034:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
2035:Drivers/CMSIS/Include/cmsis_gcc.h ****
2036:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64);
2037:Drivers/CMSIS/Include/cmsis_gcc.h **** }
2038:Drivers/CMSIS/Include/cmsis_gcc.h ****
2039:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
2040:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2041:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
2042:Drivers/CMSIS/Include/cmsis_gcc.h ****
2043:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
2044:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
2045:Drivers/CMSIS/Include/cmsis_gcc.h **** }
2046:Drivers/CMSIS/Include/cmsis_gcc.h ****
2047:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
2048:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2049:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
2050:Drivers/CMSIS/Include/cmsis_gcc.h ****
2051:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
2052:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
2053:Drivers/CMSIS/Include/cmsis_gcc.h **** }
2054:Drivers/CMSIS/Include/cmsis_gcc.h ****
2055:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
2056:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
2058:Drivers/CMSIS/Include/cmsis_gcc.h ****
2059:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
2060:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
2061:Drivers/CMSIS/Include/cmsis_gcc.h **** }
2062:Drivers/CMSIS/Include/cmsis_gcc.h ****
2063:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
2064:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccnDQoMC.s page 50
2065:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
2066:Drivers/CMSIS/Include/cmsis_gcc.h ****
2067:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
2068:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
2069:Drivers/CMSIS/Include/cmsis_gcc.h **** }
2070:Drivers/CMSIS/Include/cmsis_gcc.h ****
2071:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
2072:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2073:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{
2074:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2];
2075:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64;
2076:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr;
2077:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc;
2078:Drivers/CMSIS/Include/cmsis_gcc.h ****
2079:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */
2080:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (o
2081:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */
2082:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (o
2083:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
2084:Drivers/CMSIS/Include/cmsis_gcc.h ****
2085:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64);
2086:Drivers/CMSIS/Include/cmsis_gcc.h **** }
2087:Drivers/CMSIS/Include/cmsis_gcc.h ****
2088:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
2089:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2090:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{
2091:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2];
2092:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64;
2093:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr;
2094:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc;
2095:Drivers/CMSIS/Include/cmsis_gcc.h ****
2096:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */
2097:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (
2098:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */
2099:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (
2100:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
2101:Drivers/CMSIS/Include/cmsis_gcc.h ****
2102:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64);
2103:Drivers/CMSIS/Include/cmsis_gcc.h **** }
2104:Drivers/CMSIS/Include/cmsis_gcc.h ****
2105:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
2106:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2107:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
2108:Drivers/CMSIS/Include/cmsis_gcc.h ****
2109:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
2110:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
2111:Drivers/CMSIS/Include/cmsis_gcc.h **** }
2112:Drivers/CMSIS/Include/cmsis_gcc.h ****
2113:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
2114:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2115:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t result;
2116:Drivers/CMSIS/Include/cmsis_gcc.h ****
2117:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
2118:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
2119:Drivers/CMSIS/Include/cmsis_gcc.h **** }
2120:Drivers/CMSIS/Include/cmsis_gcc.h ****
2121:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2)
ARM GAS /tmp/ccnDQoMC.s page 51
2122:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2123:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t result;
2124:Drivers/CMSIS/Include/cmsis_gcc.h ****
2125:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
173 .loc 3 2125 0
174 0004 0024 movs r4, #0
175 .LVL16:
176 .L21:
177 .LBE31:
178 .LBE30:
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** {
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* C = |A| */
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destina
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** in = *pSrc++;
179 .loc 4 193 0
180 0006 50F8043B ldr r3, [r0], #4
181 .LVL17:
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #if defined (ARM_MATH_DSP)
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
182 .loc 4 195 0
183 000a 002B cmp r3, #0
184 000c 06DD ble .L30
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** {
185 .loc 4 188 0 discriminator 4
186 000e 013A subs r2, r2, #1
187 .LVL18:
188 .loc 4 195 0 discriminator 4
189 0010 41F8043B str r3, [r1], #4
190 .LVL19:
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** {
191 .loc 4 188 0 discriminator 4
192 0014 F7D1 bne .L21
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #else
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #endif
199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** /* Decrement loop counter */
201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** blkCnt--;
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** }
203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c ****
204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** }
193 .loc 4 204 0
194 0016 5DF8044B ldr r4, [sp], #4
195 .LCFI5:
196 .cfi_remember_state
197 .cfi_restore 4
198 .cfi_def_cfa_offset 0
199 001a 7047 bx lr
200 .LVL20:
201 .L30:
202 .LCFI6:
203 .cfi_restore_state
204 .LBB33:
205 .LBB32:
206 .loc 3 2125 0
207 .syntax unified
ARM GAS /tmp/ccnDQoMC.s page 52
208 @ 2125 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
209 001c 83FAA4F3 qsub r3, r4, r3
210 @ 0 "" 2
211 .LVL21:
212 .thumb
213 .syntax unified
214 .LBE32:
215 .LBE33:
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** {
216 .loc 4 188 0
217 0020 013A subs r2, r2, #1
218 .LVL22:
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** #else
219 .loc 4 195 0
220 0022 41F8043B str r3, [r1], #4
221 .LVL23:
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c **** {
222 .loc 4 188 0
223 0026 EED1 bne .L21
224 .loc 4 204 0
225 0028 5DF8044B ldr r4, [sp], #4
226 .LCFI7:
227 .cfi_restore 4
228 .cfi_def_cfa_offset 0
229 002c 7047 bx lr
230 .LVL24:
231 .L27:
232 002e 7047 bx lr
233 .cfi_endproc
234 .LFE150:
236 .section .text.arm_abs_q7,"ax",%progbits
237 .align 1
238 .p2align 2,,3
239 .global arm_abs_q7
240 .syntax unified
241 .thumb
242 .thumb_func
243 .fpu fpv4-sp-d16
245 arm_abs_q7:
246 .LFB151:
247 .file 5 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * Title: arm_abs_q7.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * Description: Q7 vector absolute value
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
ARM GAS /tmp/ccnDQoMC.s page 53
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** @addtogroup BasicAbs
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** @brief Q7 vector absolute value.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** @param[in] pSrc points to the input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** @param[out] pDst points to the output vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** @param[in] blockSize number of samples in each vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** @return none
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** @par Conditions for optimum performance
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** Input and output buffers should be aligned by 32-bit
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** @par Scaling and Overflow Behavior
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** The function uses saturating arithmetic.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** */
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #if defined(ARM_MATH_MVEI)
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #include "arm_helium_utils.h"
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** void arm_abs_q7(
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** const q7_t * pSrc,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** q7_t * pDst,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** uint32_t blockSize)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** {
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** uint32_t blkCnt; /* loop counters */
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** q7x16_t vecSrc;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /* Compute 16 outputs at a time */
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** blkCnt = blockSize >> 4;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** while (blkCnt > 0U)
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** {
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /*
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * C = |A|
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * Calculate absolute and then store the results in the destination buffer.
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** */
ARM GAS /tmp/ccnDQoMC.s page 54
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** vecSrc = vld1q(pSrc);
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** vst1q(pDst, vqabsq(vecSrc));
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /*
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * Decrement the blockSize loop counter
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** */
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** blkCnt--;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /*
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * advance vector source and destination pointers
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** */
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** pSrc += 16;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** pDst += 16;
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** }
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /*
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** * tail
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** */
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** blkCnt = blockSize & 0xF;
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** if (blkCnt > 0U)
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** {
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** mve_pred16_t p0 = vctp8q(blkCnt);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** vecSrc = vld1q(pSrc);
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** vstrbq_p(pDst, vqabsq(vecSrc), p0);
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** }
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** }
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #else
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** void arm_abs_q7(
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** const q7_t * pSrc,
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** q7_t * pDst,
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** uint32_t blockSize)
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** {
248 .loc 5 103 0
249 .cfi_startproc
250 @ args = 0, pretend = 0, frame = 0
251 @ frame_needed = 0, uses_anonymous_args = 0
252 @ link register save eliminated.
253 .LVL25:
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** uint32_t blkCnt; /* Loop counter */
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** q7_t in; /* Temporary input variable */
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #if defined (ARM_MATH_LOOPUNROLL)
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** blkCnt = blockSize >> 2U;
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** while (blkCnt > 0U)
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** {
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /* C = |A| */
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination b
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** in = *pSrc++;
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #if defined (ARM_MATH_DSP)
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #else
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #endif
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** in = *pSrc++;
ARM GAS /tmp/ccnDQoMC.s page 55
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #if defined (ARM_MATH_DSP)
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #else
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #endif
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** in = *pSrc++;
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #if defined (ARM_MATH_DSP)
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #else
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #endif
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** in = *pSrc++;
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #if defined (ARM_MATH_DSP)
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #else
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #endif
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /* Decrement loop counter */
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** blkCnt--;
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** }
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /* Loop unrolling: Compute remaining outputs */
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** blkCnt = blockSize % 0x4U;
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #else
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /* Initialize blkCnt with number of samples */
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** blkCnt = blockSize;
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** while (blkCnt > 0U)
254 .loc 5 159 0
255 0000 B2B1 cbz r2, .L40
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** uint32_t blkCnt; /* Loop counter */
256 .loc 5 103 0
257 0002 10B4 push {r4}
258 .LCFI8:
259 .cfi_def_cfa_offset 4
260 .cfi_offset 4, -4
261 0004 0244 add r2, r2, r0
262 .LVL26:
263 .LBB34:
264 .LBB35:
1682:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
265 .loc 3 1682 0
266 0006 0024 movs r4, #0
267 .LVL27:
268 .L33:
269 .LBE35:
270 .LBE34:
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** {
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /* C = |A| */
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
ARM GAS /tmp/ccnDQoMC.s page 56
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination b
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** in = *pSrc++;
271 .loc 5 164 0
272 0008 10F9013B ldrsb r3, [r0], #1
273 .LVL28:
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #if defined (ARM_MATH_DSP)
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *pDst++ = (in > 0) ? in : (q7_t) __QSUB8(0, in);
274 .loc 5 166 0
275 000c 002B cmp r3, #0
276 000e 06DD ble .L43
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** {
277 .loc 5 159 0 discriminator 4
278 0010 9042 cmp r0, r2
279 .loc 5 166 0 discriminator 4
280 0012 01F8013B strb r3, [r1], #1
281 .LVL29:
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** {
282 .loc 5 159 0 discriminator 4
283 0016 F7D1 bne .L33
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #else
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #endif
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** /* Decrement loop counter */
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** blkCnt--;
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** }
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c ****
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** }
284 .loc 5 175 0
285 0018 5DF8044B ldr r4, [sp], #4
286 .LCFI9:
287 .cfi_remember_state
288 .cfi_restore 4
289 .cfi_def_cfa_offset 0
290 001c 7047 bx lr
291 .LVL30:
292 .L43:
293 .LCFI10:
294 .cfi_restore_state
295 .LBB37:
296 .LBB36:
1682:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
297 .loc 3 1682 0 discriminator 1
298 .syntax unified
299 @ 1682 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
300 001e C4FA13F3 qsub8 r3, r4, r3
301 @ 0 "" 2
302 .LVL31:
303 .thumb
304 .syntax unified
305 .LBE36:
306 .LBE37:
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** {
307 .loc 5 159 0 discriminator 1
308 0022 9042 cmp r0, r2
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** #else
309 .loc 5 166 0 discriminator 1
ARM GAS /tmp/ccnDQoMC.s page 57
310 0024 01F8013B strb r3, [r1], #1
311 .LVL32:
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c **** {
312 .loc 5 159 0 discriminator 1
313 0028 EED1 bne .L33
314 .loc 5 175 0
315 002a 5DF8044B ldr r4, [sp], #4
316 .LCFI11:
317 .cfi_restore 4
318 .cfi_def_cfa_offset 0
319 002e 7047 bx lr
320 .LVL33:
321 .L40:
322 0030 7047 bx lr
323 .cfi_endproc
324 .LFE151:
326 0032 00BF .section .text.arm_add_f32,"ax",%progbits
327 .align 1
328 .p2align 2,,3
329 .global arm_add_f32
330 .syntax unified
331 .thumb
332 .thumb_func
333 .fpu fpv4-sp-d16
335 arm_add_f32:
336 .LFB152:
337 .file 6 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * Title: arm_add_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * Description: Floating-point vector addition
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
ARM GAS /tmp/ccnDQoMC.s page 58
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** @defgroup BasicAdd Vector Addition
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** Element-by-element addition of two vectors.
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** <pre>
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** </pre>
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** There are separate functions for floating-point, Q7, Q15, and Q31 data types.
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** */
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /**
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** @addtogroup BasicAdd
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** @{
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** */
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /**
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** @brief Floating-point vector addition.
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** @param[in] pSrcA points to first input vector
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** @param[in] pSrcB points to second input vector
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** @param[out] pDst points to output vector
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** @param[in] blockSize number of samples in each vector
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** @return none
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** */
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** #include "arm_helium_utils.h"
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** void arm_add_f32(
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** const float32_t * pSrcA,
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** const float32_t * pSrcB,
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** float32_t * pDst,
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** uint32_t blockSize)
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** {
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** uint32_t blkCnt; /* Loop counter */
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** f32x4_t vec1;
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** f32x4_t vec2;
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** f32x4_t res;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Compute 4 outputs at a time */
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** blkCnt = blockSize >> 2U;
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** while (blkCnt > 0U)
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** {
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* C = A + B */
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Add and then store the results in the destination buffer. */
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** vec1 = vld1q(pSrcA);
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** vec2 = vld1q(pSrcB);
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** res = vaddq(vec1, vec2);
ARM GAS /tmp/ccnDQoMC.s page 59
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** vst1q(pDst, res);
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Increment pointers */
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** pSrcA += 4;
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** pSrcB += 4;
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** pDst += 4;
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Decrement the loop counter */
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** blkCnt--;
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** }
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Tail */
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** blkCnt = blockSize & 0x3;
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** if (blkCnt > 0U)
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** {
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* C = A + B */
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** vec1 = vld1q(pSrcA);
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** vec2 = vld1q(pSrcB);
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** vstrwq_p(pDst, vaddq(vec1,vec2), p0);
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** }
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** }
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** #else
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** void arm_add_f32(
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** const float32_t * pSrcA,
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** const float32_t * pSrcB,
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** float32_t * pDst,
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** uint32_t blockSize)
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** {
338 .loc 6 119 0
339 .cfi_startproc
340 @ args = 0, pretend = 0, frame = 0
341 @ frame_needed = 0, uses_anonymous_args = 0
342 @ link register save eliminated.
343 .LVL34:
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** uint32_t blkCnt; /* Loop counter */
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** f32x4_t vec1;
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** f32x4_t vec2;
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** f32x4_t res;
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Compute 4 outputs at a time */
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** blkCnt = blockSize >> 2U;
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** while (blkCnt > 0U)
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** {
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* C = A + B */
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Add and then store the results in the destination buffer. */
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** vec1 = vld1q_f32(pSrcA);
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** vec2 = vld1q_f32(pSrcB);
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** res = vaddq_f32(vec1, vec2);
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** vst1q_f32(pDst, res);
ARM GAS /tmp/ccnDQoMC.s page 60
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Increment pointers */
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** pSrcA += 4;
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** pSrcB += 4;
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** pDst += 4;
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Decrement the loop counter */
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** blkCnt--;
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** }
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Tail */
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** blkCnt = blockSize & 0x3;
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** #else
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** blkCnt = blockSize >> 2U;
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** while (blkCnt > 0U)
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** {
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* C = A + B */
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Add and store result in destination buffer. */
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** *pDst++ = (*pSrcA++) + (*pSrcB++);
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** *pDst++ = (*pSrcA++) + (*pSrcB++);
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** *pDst++ = (*pSrcA++) + (*pSrcB++);
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** *pDst++ = (*pSrcA++) + (*pSrcB++);
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Decrement loop counter */
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** blkCnt--;
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** }
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Loop unrolling: Compute remaining outputs */
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** blkCnt = blockSize % 0x4U;
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** #else
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Initialize blkCnt with number of samples */
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** blkCnt = blockSize;
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** #endif /* #if defined(ARM_MATH_NEON) */
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** while (blkCnt > 0U)
344 .loc 6 183 0
345 0000 4BB1 cbz r3, .L44
346 .LVL35:
347 .L46:
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** {
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* C = A + B */
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Add and store result in destination buffer. */
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** *pDst++ = (*pSrcA++) + (*pSrcB++);
348 .loc 6 188 0
349 0002 F0EC017A vldmia.32 r0!, {s15}
350 .LVL36:
ARM GAS /tmp/ccnDQoMC.s page 61
351 0006 B1EC017A vldmia.32 r1!, {s14}
352 .LVL37:
353 000a 77EE877A vadd.f32 s15, s15, s14
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** {
354 .loc 6 183 0
355 000e 013B subs r3, r3, #1
356 .LVL38:
357 .loc 6 188 0
358 0010 E2EC017A vstmia.32 r2!, {s15}
359 .LVL39:
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** {
360 .loc 6 183 0
361 0014 F5D1 bne .L46
362 .L44:
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** /* Decrement loop counter */
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** blkCnt--;
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** }
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c ****
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c **** }
363 .loc 6 194 0
364 0016 7047 bx lr
365 .cfi_endproc
366 .LFE152:
368 .section .text.arm_add_q15,"ax",%progbits
369 .align 1
370 .p2align 2,,3
371 .global arm_add_q15
372 .syntax unified
373 .thumb
374 .thumb_func
375 .fpu fpv4-sp-d16
377 arm_add_q15:
378 .LFB153:
379 .file 7 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * Title: arm_add_q15.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * Description: Q15 vector addition
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * Unless required by applicable law or agreed to in writing, software
ARM GAS /tmp/ccnDQoMC.s page 62
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** @addtogroup BasicAdd
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** @brief Q15 vector addition.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** @param[in] pSrcA points to the first input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** @param[in] pSrcB points to the second input vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** @param[out] pDst points to the output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** The function uses saturating arithmetic.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** */
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #if defined(ARM_MATH_MVEI)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #include "arm_helium_utils.h"
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** void arm_add_q15(
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** const q15_t * pSrcA,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** const q15_t * pSrcB,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** q15_t * pDst,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** uint32_t blockSize)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** {
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** uint32_t blkCnt; /* loop counters */
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** q15x8_t vecA;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** q15x8_t vecB;
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /* Compute 8 outputs at a time */
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** blkCnt = blockSize >> 3;
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** while (blkCnt > 0U)
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** {
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /*
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * C = A + B
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * Add and then store the results in the destination buffer.
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** vecA = vld1q(pSrcA);
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** vecB = vld1q(pSrcB);
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** vst1q(pDst, vqaddq(vecA, vecB));
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /*
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * Decrement the blockSize loop counter
ARM GAS /tmp/ccnDQoMC.s page 63
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** */
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** blkCnt--;
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /*
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * advance vector source and destination pointers
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** */
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** pSrcA += 8;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** pSrcB += 8;
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** pDst += 8;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** }
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /*
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** * tail
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** */
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** blkCnt = blockSize & 7;
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** if (blkCnt > 0U)
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** {
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt);
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** vecA = vld1q(pSrcA);
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** vecB = vld1q(pSrcB);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** vstrhq_p(pDst, vqaddq(vecA, vecB), p0);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** }
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** }
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #else
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** void arm_add_q15(
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** const q15_t * pSrcA,
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** const q15_t * pSrcB,
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** q15_t * pDst,
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** uint32_t blockSize)
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** {
380 .loc 7 108 0
381 .cfi_startproc
382 @ args = 0, pretend = 0, frame = 0
383 @ frame_needed = 0, uses_anonymous_args = 0
384 @ link register save eliminated.
385 .LVL40:
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** uint32_t blkCnt; /* Loop counter */
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #if defined (ARM_MATH_LOOPUNROLL)
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #if defined (ARM_MATH_DSP)
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** q31_t inA1, inA2;
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** q31_t inB1, inB2;
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #endif
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** blkCnt = blockSize >> 2U;
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** while (blkCnt > 0U)
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** {
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /* C = A + B */
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #if defined (ARM_MATH_DSP)
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /* read 2 times 2 samples at a time from sourceA */
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /* read 2 times 2 samples at a time from sourceB */
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
ARM GAS /tmp/ccnDQoMC.s page 64
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /* Add and store 2 times 2 samples at a time */
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** write_q15x2_ia (&pDst, __QADD16(inA1, inB1));
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** write_q15x2_ia (&pDst, __QADD16(inA2, inB2));
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #else
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #endif
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /* Decrement loop counter */
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** blkCnt--;
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** }
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /* Loop unrolling: Compute remaining outputs */
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** blkCnt = blockSize % 0x4U;
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #else
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /* Initialize blkCnt with number of samples */
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** blkCnt = blockSize;
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** while (blkCnt > 0U)
386 .loc 7 157 0
387 0000 63B1 cbz r3, .L59
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** uint32_t blkCnt; /* Loop counter */
388 .loc 7 108 0
389 0002 30B4 push {r4, r5}
390 .LCFI12:
391 .cfi_def_cfa_offset 8
392 .cfi_offset 4, -8
393 .cfi_offset 5, -4
394 .LVL41:
395 .L53:
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** {
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /* C = A + B */
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /* Add and store result in destination buffer. */
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #if defined (ARM_MATH_DSP)
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
396 .loc 7 163 0
397 0004 30F9024B ldrsh r4, [r0], #2
398 .LVL42:
399 0008 31F9025B ldrsh r5, [r1], #2
400 .LVL43:
401 .LBB38:
402 .LBB39:
1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
403 .loc 3 1731 0
404 .syntax unified
405 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
406 000c 94FA15F4 qadd16 r4, r4, r5
407 @ 0 "" 2
ARM GAS /tmp/ccnDQoMC.s page 65
408 .LVL44:
409 .thumb
410 .syntax unified
411 .LBE39:
412 .LBE38:
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** {
413 .loc 7 157 0
414 0010 013B subs r3, r3, #1
415 .LVL45:
416 .loc 7 163 0
417 0012 22F8024B strh r4, [r2], #2 @ movhi
418 .LVL46:
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** {
419 .loc 7 157 0
420 0016 F5D1 bne .L53
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #else
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** #endif
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** /* Decrement loop counter */
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** blkCnt--;
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** }
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c ****
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c **** }
421 .loc 7 172 0
422 0018 30BC pop {r4, r5}
423 .LCFI13:
424 .cfi_restore 5
425 .cfi_restore 4
426 .cfi_def_cfa_offset 0
427 001a 7047 bx lr
428 .LVL47:
429 .L59:
430 001c 7047 bx lr
431 .cfi_endproc
432 .LFE153:
434 001e 00BF .section .text.arm_add_q31,"ax",%progbits
435 .align 1
436 .p2align 2,,3
437 .global arm_add_q31
438 .syntax unified
439 .thumb
440 .thumb_func
441 .fpu fpv4-sp-d16
443 arm_add_q31:
444 .LFB154:
445 .file 8 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * Title: arm_add_q31.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * Description: Q31 vector addition
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * -------------------------------------------------------------------- */
ARM GAS /tmp/ccnDQoMC.s page 66
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** @addtogroup BasicAdd
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** @brief Q31 vector addition.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** @param[in] pSrcA points to the first input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** @param[in] pSrcB points to the second input vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** @param[out] pDst points to the output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** The function uses saturating arithmetic.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** */
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** #if defined(ARM_MATH_MVEI)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** #include "arm_helium_utils.h"
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** void arm_add_q31(
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** const q31_t * pSrcA,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** const q31_t * pSrcB,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** q31_t * pDst,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** uint32_t blockSize)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** {
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** uint32_t blkCnt;
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** q31x4_t vecA;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** q31x4_t vecB;
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /* Compute 4 outputs at a time */
ARM GAS /tmp/ccnDQoMC.s page 67
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** blkCnt = blockSize >> 2;
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** while (blkCnt > 0U)
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** {
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /*
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * C = A + B
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * Add and then store the results in the destination buffer.
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** vecA = vld1q(pSrcA);
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** vecB = vld1q(pSrcB);
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** vst1q(pDst, vqaddq(vecA, vecB));
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /*
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * Decrement the blockSize loop counter
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** */
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** blkCnt--;
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /*
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * advance vector source and destination pointers
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** */
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** pSrcA += 4;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** pSrcB += 4;
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** pDst += 4;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** }
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /*
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** * tail
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** */
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** blkCnt = blockSize & 3;
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** if (blkCnt > 0U)
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** {
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt);
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** vecA = vld1q(pSrcA);
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** vecB = vld1q(pSrcB);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** vstrwq_p(pDst, vqaddq(vecA, vecB), p0);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** }
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** }
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** #else
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** void arm_add_q31(
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** const q31_t * pSrcA,
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** const q31_t * pSrcB,
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** q31_t * pDst,
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** uint32_t blockSize)
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** {
446 .loc 8 108 0
447 .cfi_startproc
448 @ args = 0, pretend = 0, frame = 0
449 @ frame_needed = 0, uses_anonymous_args = 0
450 @ link register save eliminated.
451 .LVL48:
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** uint32_t blkCnt; /* Loop counter */
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** #if defined (ARM_MATH_LOOPUNROLL)
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** blkCnt = blockSize >> 2U;
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** while (blkCnt > 0U)
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** {
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /* C = A + B */
ARM GAS /tmp/ccnDQoMC.s page 68
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /* Add and store result in destination buffer. */
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** *pDst++ = __QADD(*pSrcA++, *pSrcB++);
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** *pDst++ = __QADD(*pSrcA++, *pSrcB++);
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** *pDst++ = __QADD(*pSrcA++, *pSrcB++);
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** *pDst++ = __QADD(*pSrcA++, *pSrcB++);
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /* Decrement loop counter */
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** blkCnt--;
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** }
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /* Loop unrolling: Compute remaining outputs */
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** blkCnt = blockSize % 0x4U;
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** #else
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /* Initialize blkCnt with number of samples */
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** blkCnt = blockSize;
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** while (blkCnt > 0U)
452 .loc 8 143 0
453 0000 63B1 cbz r3, .L69
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** uint32_t blkCnt; /* Loop counter */
454 .loc 8 108 0
455 0002 30B4 push {r4, r5}
456 .LCFI14:
457 .cfi_def_cfa_offset 8
458 .cfi_offset 4, -8
459 .cfi_offset 5, -4
460 .LVL49:
461 .L63:
462 .LBB40:
463 .LBB41:
2117:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
464 .loc 3 2117 0
465 0004 50F8044B ldr r4, [r0], #4
466 .LVL50:
467 0008 51F8045B ldr r5, [r1], #4
468 .LVL51:
469 .syntax unified
470 @ 2117 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
471 000c 85FA84F4 qadd r4, r4, r5
472 @ 0 "" 2
473 .LVL52:
474 .thumb
475 .syntax unified
476 .LBE41:
477 .LBE40:
478 .loc 8 143 0
479 0010 013B subs r3, r3, #1
480 .LVL53:
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** {
ARM GAS /tmp/ccnDQoMC.s page 69
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /* C = A + B */
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /* Add and store result in destination buffer. */
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** *pDst++ = __QADD(*pSrcA++, *pSrcB++);
481 .loc 8 148 0
482 0012 42F8044B str r4, [r2], #4
483 .LVL54:
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** {
484 .loc 8 143 0
485 0016 F5D1 bne .L63
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** /* Decrement loop counter */
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** blkCnt--;
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** }
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c ****
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c **** }
486 .loc 8 154 0
487 0018 30BC pop {r4, r5}
488 .LCFI15:
489 .cfi_restore 5
490 .cfi_restore 4
491 .cfi_def_cfa_offset 0
492 001a 7047 bx lr
493 .LVL55:
494 .L69:
495 001c 7047 bx lr
496 .cfi_endproc
497 .LFE154:
499 001e 00BF .section .text.arm_add_q7,"ax",%progbits
500 .align 1
501 .p2align 2,,3
502 .global arm_add_q7
503 .syntax unified
504 .thumb
505 .thumb_func
506 .fpu fpv4-sp-d16
508 arm_add_q7:
509 .LFB155:
510 .file 9 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * Title: arm_add_q7.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * Description: Q7 vector addition
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * You may obtain a copy of the License at
ARM GAS /tmp/ccnDQoMC.s page 70
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** @addtogroup BasicAdd
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** @brief Q7 vector addition.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** @param[in] pSrcA points to the first input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** @param[in] pSrcB points to the second input vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** @param[out] pDst points to the output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** The function uses saturating arithmetic.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** */
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** #if defined(ARM_MATH_MVEI)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** #include "arm_helium_utils.h"
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** void arm_add_q7(
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** const q7_t * pSrcA,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** const q7_t * pSrcB,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** q7_t * pDst,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** uint32_t blockSize)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** {
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** uint32_t blkCnt; /* loop counters */
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** q7x16_t vecA;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** q7x16_t vecB;
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /* Compute 16 outputs at a time */
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** blkCnt = blockSize >> 4;
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** while (blkCnt > 0U)
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** {
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /*
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * C = A + B
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * Add and then store the results in the destination buffer.
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** vecA = vld1q(pSrcA);
ARM GAS /tmp/ccnDQoMC.s page 71
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** vecB = vld1q(pSrcB);
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** vst1q(pDst, vqaddq(vecA, vecB));
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /*
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * Decrement the blockSize loop counter
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** */
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** blkCnt--;
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /*
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * advance vector source and destination pointers
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** */
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** pSrcA += 16;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** pSrcB += 16;
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** pDst += 16;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** }
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /*
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** * tail
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** */
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** blkCnt = blockSize & 0xF;
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** if (blkCnt > 0U)
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** {
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** mve_pred16_t p0 = vctp8q(blkCnt);
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** vecA = vld1q(pSrcA);
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** vecB = vld1q(pSrcB);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** vstrbq_p(pDst, vqaddq(vecA, vecB), p0);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** }
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** }
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** #else
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** void arm_add_q7(
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** const q7_t * pSrcA,
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** const q7_t * pSrcB,
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** q7_t * pDst,
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** uint32_t blockSize)
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** {
511 .loc 9 107 0
512 .cfi_startproc
513 @ args = 0, pretend = 0, frame = 0
514 @ frame_needed = 0, uses_anonymous_args = 0
515 @ link register save eliminated.
516 .LVL56:
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** uint32_t blkCnt; /* Loop counter */
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** #if defined (ARM_MATH_LOOPUNROLL)
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** blkCnt = blockSize >> 2U;
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** while (blkCnt > 0U)
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** {
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /* C = A + B */
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** #if defined (ARM_MATH_DSP)
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /* Add and store result in destination buffer (4 samples at a time). */
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** write_q7x4_ia (&pDst, __QADD8 (read_q7x4_ia ((q7_t **) &pSrcA), read_q7x4_ia ((q7_t **) &pSrcB)
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** #else
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
ARM GAS /tmp/ccnDQoMC.s page 72
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** #endif
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /* Decrement loop counter */
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** blkCnt--;
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** }
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /* Loop unrolling: Compute remaining outputs */
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** blkCnt = blockSize % 0x4U;
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** #else
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /* Initialize blkCnt with number of samples */
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** blkCnt = blockSize;
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** while (blkCnt > 0U)
517 .loc 9 143 0
518 0000 73B1 cbz r3, .L79
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** uint32_t blkCnt; /* Loop counter */
519 .loc 9 107 0
520 0002 30B4 push {r4, r5}
521 .LCFI16:
522 .cfi_def_cfa_offset 8
523 .cfi_offset 4, -8
524 .cfi_offset 5, -4
525 0004 0344 add r3, r3, r0
526 .LVL57:
527 .L73:
528 .LBB42:
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** {
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /* C = A + B */
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /* Add and store result in destination buffer. */
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ + *pSrcB++, 8);
529 .loc 9 148 0
530 0006 10F9014B ldrsb r4, [r0], #1
531 .LVL58:
532 000a 11F9015B ldrsb r5, [r1], #1
533 .LVL59:
534 .LBE42:
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** {
535 .loc 9 143 0
536 000e 9842 cmp r0, r3
537 .LBB43:
538 .loc 9 148 0
539 0010 2C44 add r4, r4, r5
540 .syntax unified
541 @ 148 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c" 1
542 0012 04F30704 ssat r4, #8, r4
543 @ 0 "" 2
544 .LVL60:
545 .thumb
546 .syntax unified
547 .LBE43:
548 0016 02F8014B strb r4, [r2], #1
549 .LVL61:
ARM GAS /tmp/ccnDQoMC.s page 73
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** {
550 .loc 9 143 0
551 001a F4D1 bne .L73
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** /* Decrement loop counter */
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** blkCnt--;
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** }
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c ****
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c **** }
552 .loc 9 154 0
553 001c 30BC pop {r4, r5}
554 .LCFI17:
555 .cfi_restore 5
556 .cfi_restore 4
557 .cfi_def_cfa_offset 0
558 .LVL62:
559 001e 7047 bx lr
560 .LVL63:
561 .L79:
562 0020 7047 bx lr
563 .cfi_endproc
564 .LFE155:
566 .section .text.arm_and_u16,"ax",%progbits
567 .align 1
568 .p2align 2,,3
569 .global arm_and_u16
570 .syntax unified
571 .thumb
572 .thumb_func
573 .fpu fpv4-sp-d16
575 arm_and_u16:
576 .LFB156:
577 .file 10 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * Title: arm_and_u16.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * Description: uint16_t bitwise AND
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * $Date: 14 November 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ARM GAS /tmp/ccnDQoMC.s page 74
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** @defgroup And Vector bitwise AND
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** Compute the logical bitwise AND.
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** There are separate functions for uint32_t, uint16_t, and uint7_t data types.
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** */
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** /**
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** @addtogroup And
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** @{
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** */
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** /**
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** @brief Compute the logical bitwise AND of two fixed-point vectors.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** @param[in] pSrcA points to input vector A
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** @param[in] pSrcB points to input vector B
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** @param[out] pDst points to output vector
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** @param[in] blockSize number of samples in each vector
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** @return none
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** */
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** void arm_and_u16(
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** const uint16_t * pSrcA,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** const uint16_t * pSrcB,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** uint16_t * pDst,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** uint32_t blockSize)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** {
578 .loc 10 62 0
579 .cfi_startproc
580 @ args = 0, pretend = 0, frame = 0
581 @ frame_needed = 0, uses_anonymous_args = 0
582 .LVL64:
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** uint32_t blkCnt; /* Loop counter */
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** q15x8_t vecSrcA, vecSrcB;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** /* Compute 8 outputs at a time */
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** blkCnt = blockSize >> 3;
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** while (blkCnt > 0U)
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** {
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** vecSrcA = vld1q(pSrcA);
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** vecSrcB = vld1q(pSrcB);
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** vst1q(pDst, vandq_u16(vecSrcA, vecSrcB) );
ARM GAS /tmp/ccnDQoMC.s page 75
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** pSrcA += 8;
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** pSrcB += 8;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** pDst += 8;
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** /* Decrement the loop counter */
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** blkCnt--;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** }
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** /* Tail */
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** blkCnt = blockSize & 7;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** if (blkCnt > 0U)
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** {
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** mve_pred16_t p0 = vctp16q(blkCnt);
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** vecSrcA = vld1q(pSrcA);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** vecSrcB = vld1q(pSrcB);
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** vstrhq_p(pDst, vandq_u16(vecSrcA, vecSrcB), p0);
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** }
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** #else
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** uint16x8_t vecA, vecB;
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** /* Compute 8 outputs at a time */
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** blkCnt = blockSize >> 3U;
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** while (blkCnt > 0U)
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** {
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** vecA = vld1q_u16(pSrcA);
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** vecB = vld1q_u16(pSrcB);
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** vst1q_u16(pDst, vandq_u16(vecA, vecB) );
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** pSrcA += 8;
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** pSrcB += 8;
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** pDst += 8;
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** /* Decrement the loop counter */
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** blkCnt--;
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** }
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** /* Tail */
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** blkCnt = blockSize & 7;
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** #else
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** /* Initialize blkCnt with number of samples */
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** blkCnt = blockSize;
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** #endif
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** while (blkCnt > 0U)
583 .loc 10 125 0
584 0000 002B cmp r3, #0
585 0002 6AD0 beq .L104
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** uint32_t blkCnt; /* Loop counter */
586 .loc 10 62 0
587 0004 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr}
588 .LCFI18:
589 .cfi_def_cfa_offset 28
ARM GAS /tmp/ccnDQoMC.s page 76
590 .cfi_offset 4, -28
591 .cfi_offset 5, -24
592 .cfi_offset 6, -20
593 .cfi_offset 7, -16
594 .cfi_offset 8, -12
595 .cfi_offset 9, -8
596 .cfi_offset 14, -4
597 0008 141D adds r4, r2, #4
598 000a 8C42 cmp r4, r1
599 000c 8CBF ite hi
600 000e 0025 movhi r5, #0
601 0010 0125 movls r5, #1
602 0012 0E1D adds r6, r1, #4
603 0014 B242 cmp r2, r6
604 0016 28BF it cs
605 0018 45F00105 orrcs r5, r5, #1
606 001c 082B cmp r3, #8
607 001e 94BF ite ls
608 0020 0025 movls r5, #0
609 0022 05F00105 andhi r5, r5, #1
610 0026 002D cmp r5, #0
611 0028 47D0 beq .L96
612 002a 8442 cmp r4, r0
613 002c 8CBF ite hi
614 002e 0024 movhi r4, #0
615 0030 0124 movls r4, #1
616 0032 051D adds r5, r0, #4
617 0034 AA42 cmp r2, r5
618 0036 28BF it cs
619 0038 44F00104 orrcs r4, r4, #1
620 003c 002C cmp r4, #0
621 003e 3CD0 beq .L96
622 0040 C0F34004 ubfx r4, r0, #1, #1
623 0044 5E1E subs r6, r3, #1
624 0046 002C cmp r4, #0
625 0048 42D0 beq .L89
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** {
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** *pDst++ = (*pSrcA++)&(*pSrcB++);
626 .loc 10 127 0
627 004a 0F88 ldrh r7, [r1]
628 004c 0588 ldrh r5, [r0]
629 004e 3D40 ands r5, r5, r7
630 0050 1580 strh r5, [r2] @ movhi
631 0052 00F1020E add lr, r0, #2
632 .LVL65:
633 0056 01F1020C add ip, r1, #2
634 .LVL66:
635 005a 971C adds r7, r2, #2
636 .LVL67:
637 .L85:
638 005c 1B1B subs r3, r3, r4
639 .LVL68:
640 005e 6400 lsls r4, r4, #1
641 0060 2044 add r0, r0, r4
642 0062 2144 add r1, r1, r4
643 0064 2244 add r2, r2, r4
644 0066 4FEA5309 lsr r9, r3, #1
ARM GAS /tmp/ccnDQoMC.s page 77
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** {
645 .loc 10 125 0
646 006a 0025 movs r5, #0
647 .LVL69:
648 .L86:
649 .loc 10 127 0
650 006c 51F8044B ldr r4, [r1], #4 @ unaligned
651 0070 50F8048B ldr r8, [r0], #4
652 0074 0135 adds r5, r5, #1
653 0076 04EA0804 and r4, r4, r8
654 007a 4D45 cmp r5, r9
655 007c 42F8044B str r4, [r2], #4 @ unaligned
656 0080 F4D3 bcc .L86
657 0082 23F00102 bic r2, r3, #1
658 0086 5100 lsls r1, r2, #1
659 0088 9342 cmp r3, r2
660 008a 0EEB0104 add r4, lr, r1
661 008e 0CEB0100 add r0, ip, r1
662 0092 A6EB0206 sub r6, r6, r2
663 0096 3944 add r1, r1, r7
664 0098 0DD0 beq .L82
665 .LVL70:
666 009a 3EF81230 ldrh r3, [lr, r2, lsl #1]
667 009e 3CF81250 ldrh r5, [ip, r2, lsl #1]
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** {
668 .loc 10 125 0
669 00a2 012E cmp r6, #1
670 .loc 10 127 0
671 00a4 03EA0503 and r3, r3, r5
672 00a8 27F81230 strh r3, [r7, r2, lsl #1] @ movhi
673 .LVL71:
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** {
674 .loc 10 125 0
675 00ac 03D0 beq .L82
676 .LVL72:
677 .loc 10 127 0
678 00ae 6388 ldrh r3, [r4, #2]
679 00b0 4288 ldrh r2, [r0, #2]
680 00b2 1340 ands r3, r3, r2
681 00b4 4B80 strh r3, [r1, #2] @ movhi
682 .LVL73:
683 .L82:
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** /* Decrement the loop counter */
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** blkCnt--;
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** }
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** #endif /* if defined(ARM_MATH_MVEI) */
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** }
684 .loc 10 133 0
685 00b6 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc}
686 .LVL74:
687 .L96:
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
688 .loc 10 127 0
689 00ba 30F8024B ldrh r4, [r0], #2
690 .LVL75:
691 00be 31F8025B ldrh r5, [r1], #2
ARM GAS /tmp/ccnDQoMC.s page 78
692 .LVL76:
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** {
693 .loc 10 125 0
694 00c2 013B subs r3, r3, #1
695 .LVL77:
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c ****
696 .loc 10 127 0
697 00c4 04EA0504 and r4, r4, r5
698 00c8 22F8024B strh r4, [r2], #2 @ movhi
699 .LVL78:
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c **** {
700 .loc 10 125 0
701 00cc F5D1 bne .L96
702 00ce F2E7 b .L82
703 .LVL79:
704 .L89:
705 00d0 1E46 mov r6, r3
706 00d2 1746 mov r7, r2
707 00d4 8C46 mov ip, r1
708 00d6 8646 mov lr, r0
709 00d8 C0E7 b .L85
710 .L104:
711 .LCFI19:
712 .cfi_def_cfa_offset 0
713 .cfi_restore 4
714 .cfi_restore 5
715 .cfi_restore 6
716 .cfi_restore 7
717 .cfi_restore 8
718 .cfi_restore 9
719 .cfi_restore 14
720 00da 7047 bx lr
721 .cfi_endproc
722 .LFE156:
724 .section .text.arm_and_u32,"ax",%progbits
725 .align 1
726 .p2align 2,,3
727 .global arm_and_u32
728 .syntax unified
729 .thumb
730 .thumb_func
731 .fpu fpv4-sp-d16
733 arm_and_u32:
734 .LFB157:
735 .file 11 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * Title: arm_and_u32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * Description: uint32_t bitwise AND
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * $Date: 14 November 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
ARM GAS /tmp/ccnDQoMC.s page 79
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** @addtogroup And
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** @brief Compute the logical bitwise AND of two fixed-point vectors.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** @param[in] pSrcA points to input vector A
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** @param[in] pSrcB points to input vector B
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** @param[out] pDst points to output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** */
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** void arm_and_u32(
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** const uint32_t * pSrcA,
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** const uint32_t * pSrcB,
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** uint32_t * pDst,
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** uint32_t blockSize)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** {
736 .loc 11 54 0
737 .cfi_startproc
738 @ args = 0, pretend = 0, frame = 0
739 @ frame_needed = 0, uses_anonymous_args = 0
740 @ link register save eliminated.
741 .LVL80:
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** uint32_t blkCnt; /* Loop counter */
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** q31x4_t vecSrcA, vecSrcB;
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** /* Compute 4 outputs at a time */
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** blkCnt = blockSize >> 2;
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** while (blkCnt > 0U)
ARM GAS /tmp/ccnDQoMC.s page 80
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** {
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** vecSrcA = vld1q(pSrcA);
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** vecSrcB = vld1q(pSrcB);
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** vst1q(pDst, vandq_u32(vecSrcA, vecSrcB) );
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** pSrcA += 4;
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** pSrcB += 4;
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** pDst += 4;
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** /* Decrement the loop counter */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** blkCnt--;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** }
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** /* Tail */
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** blkCnt = blockSize & 3;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** if (blkCnt > 0U)
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** {
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** vecSrcA = vld1q(pSrcA);
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** vecSrcB = vld1q(pSrcB);
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** vstrwq_p(pDst, vandq_u32(vecSrcA, vecSrcB), p0);
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** }
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** #else
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** uint32x4_t vecA, vecB;
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** /* Compute 4 outputs at a time */
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** blkCnt = blockSize >> 2U;
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** while (blkCnt > 0U)
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** {
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** vecA = vld1q_u32(pSrcA);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** vecB = vld1q_u32(pSrcB);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** vst1q_u32(pDst, vandq_u32(vecA, vecB) );
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** pSrcA += 4;
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** pSrcB += 4;
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** pDst += 4;
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** /* Decrement the loop counter */
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** blkCnt--;
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** }
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** /* Tail */
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** blkCnt = blockSize & 3;
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** #else
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** /* Initialize blkCnt with number of samples */
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** blkCnt = blockSize;
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** #endif
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** while (blkCnt > 0U)
742 .loc 11 117 0
743 0000 63B1 cbz r3, .L115
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** uint32_t blkCnt; /* Loop counter */
ARM GAS /tmp/ccnDQoMC.s page 81
744 .loc 11 54 0
745 0002 30B4 push {r4, r5}
746 .LCFI20:
747 .cfi_def_cfa_offset 8
748 .cfi_offset 4, -8
749 .cfi_offset 5, -4
750 .LVL81:
751 .L109:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** {
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** *pDst++ = (*pSrcA++)&(*pSrcB++);
752 .loc 11 119 0
753 0004 50F8044B ldr r4, [r0], #4
754 .LVL82:
755 0008 51F8045B ldr r5, [r1], #4
756 .LVL83:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** {
757 .loc 11 117 0
758 000c 013B subs r3, r3, #1
759 .LVL84:
760 .loc 11 119 0
761 000e 04EA0504 and r4, r4, r5
762 0012 42F8044B str r4, [r2], #4
763 .LVL85:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** {
764 .loc 11 117 0
765 0016 F5D1 bne .L109
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c ****
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** /* Decrement the loop counter */
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** blkCnt--;
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** }
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** #endif /* if defined(ARM_MATH_MVEI) */
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c **** }
766 .loc 11 125 0
767 0018 30BC pop {r4, r5}
768 .LCFI21:
769 .cfi_restore 5
770 .cfi_restore 4
771 .cfi_def_cfa_offset 0
772 001a 7047 bx lr
773 .LVL86:
774 .L115:
775 001c 7047 bx lr
776 .cfi_endproc
777 .LFE157:
779 001e 00BF .section .text.arm_and_u8,"ax",%progbits
780 .align 1
781 .p2align 2,,3
782 .global arm_and_u8
783 .syntax unified
784 .thumb
785 .thumb_func
786 .fpu fpv4-sp-d16
788 arm_and_u8:
789 .LFB158:
790 .file 12 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * Project: CMSIS DSP Library
ARM GAS /tmp/ccnDQoMC.s page 82
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * Title: arm_and_u8.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * Description: uint8_t bitwise AND
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * $Date: 14 November 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** /**
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** @addtogroup And
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** @{
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** */
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** /**
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** @brief Compute the logical bitwise AND of two fixed-point vectors.
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** @param[in] pSrcA points to input vector A
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** @param[in] pSrcB points to input vector B
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** @param[out] pDst points to output vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** @param[in] blockSize number of samples in each vector
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** @return none
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** */
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** void arm_and_u8(
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** const uint8_t * pSrcA,
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** const uint8_t * pSrcB,
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** uint8_t * pDst,
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** uint32_t blockSize)
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
791 .loc 12 55 0
792 .cfi_startproc
793 @ args = 0, pretend = 0, frame = 0
794 @ frame_needed = 0, uses_anonymous_args = 0
ARM GAS /tmp/ccnDQoMC.s page 83
795 .LVL87:
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** uint32_t blkCnt; /* Loop counter */
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** q7x16_t vecSrcA, vecSrcB;
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** /* Compute 16 outputs at a time */
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** blkCnt = blockSize >> 4;
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** while (blkCnt > 0U)
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** vecSrcA = vld1q(pSrcA);
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** vecSrcB = vld1q(pSrcB);
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** vst1q(pDst, vandq_u8(vecSrcA, vecSrcB) );
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** pSrcA += 16;
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** pSrcB += 16;
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** pDst += 16;
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** /* Decrement the loop counter */
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** blkCnt--;
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** }
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** /* Tail */
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** blkCnt = blockSize & 0xF;
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** if (blkCnt > 0U)
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** mve_pred16_t p0 = vctp8q(blkCnt);
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** vecSrcA = vld1q(pSrcA);
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** vecSrcB = vld1q(pSrcB);
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** vstrbq_p(pDst, vandq_u8(vecSrcA, vecSrcB), p0);
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** }
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** #else
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** uint8x16_t vecA, vecB;
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** /* Compute 16 outputs at a time */
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** blkCnt = blockSize >> 4U;
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** while (blkCnt > 0U)
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** vecA = vld1q_u8(pSrcA);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** vecB = vld1q_u8(pSrcB);
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** vst1q_u8(pDst, vandq_u8(vecA, vecB) );
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** pSrcA += 16;
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** pSrcB += 16;
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** pDst += 16;
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** /* Decrement the loop counter */
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** blkCnt--;
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** }
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** /* Tail */
ARM GAS /tmp/ccnDQoMC.s page 84
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** blkCnt = blockSize & 0xF;
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** #else
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** /* Initialize blkCnt with number of samples */
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** blkCnt = blockSize;
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** #endif
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** while (blkCnt > 0U)
796 .loc 12 118 0
797 0000 002B cmp r3, #0
798 0002 00F0A680 beq .L157
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** uint32_t blkCnt; /* Loop counter */
799 .loc 12 55 0
800 0006 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr}
801 .LCFI22:
802 .cfi_def_cfa_offset 28
803 .cfi_offset 4, -28
804 .cfi_offset 5, -24
805 .cfi_offset 6, -20
806 .cfi_offset 7, -16
807 .cfi_offset 8, -12
808 .cfi_offset 9, -8
809 .cfi_offset 14, -4
810 000a 141D adds r4, r2, #4
811 000c 8C42 cmp r4, r1
812 000e 8CBF ite hi
813 0010 0025 movhi r5, #0
814 0012 0125 movls r5, #1
815 0014 0E1D adds r6, r1, #4
816 0016 B242 cmp r2, r6
817 0018 28BF it cs
818 001a 45F00105 orrcs r5, r5, #1
819 001e 082B cmp r3, #8
820 0020 94BF ite ls
821 0022 0025 movls r5, #0
822 0024 05F00105 andhi r5, r5, #1
823 0028 002D cmp r5, #0
824 002a 00F08580 beq .L119
825 002e 8442 cmp r4, r0
826 0030 8CBF ite hi
827 0032 0024 movhi r4, #0
828 0034 0124 movls r4, #1
829 0036 051D adds r5, r0, #4
830 0038 AA42 cmp r2, r5
831 003a 28BF it cs
832 003c 44F00104 orrcs r4, r4, #1
833 0040 002C cmp r4, #0
834 0042 79D0 beq .L119
835 0044 4442 negs r4, r0
836 0046 14F00304 ands r4, r4, #3
837 004a 03F1FF36 add r6, r3, #-1
838 004e 6ED0 beq .L126
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** *pDst++ = (*pSrcA++)&(*pSrcB++);
839 .loc 12 120 0
840 0050 0F78 ldrb r7, [r1] @ zero_extendqisi2
841 0052 0578 ldrb r5, [r0] @ zero_extendqisi2
842 0054 012C cmp r4, #1
ARM GAS /tmp/ccnDQoMC.s page 85
843 0056 05EA0705 and r5, r5, r7
844 005a 1570 strb r5, [r2]
845 005c 00F1010E add lr, r0, #1
846 .LVL88:
847 0060 01F1010C add ip, r1, #1
848 .LVL89:
849 0064 02F10107 add r7, r2, #1
850 .LVL90:
851 0068 18D0 beq .L120
852 .LVL91:
853 006a 4E78 ldrb r6, [r1, #1] @ zero_extendqisi2
854 .LVL92:
855 006c 4578 ldrb r5, [r0, #1] @ zero_extendqisi2
856 006e 032C cmp r4, #3
857 0070 05EA0605 and r5, r5, r6
858 0074 5570 strb r5, [r2, #1]
859 0076 00F1020E add lr, r0, #2
860 .LVL93:
861 007a 01F1020C add ip, r1, #2
862 .LVL94:
863 007e 02F10207 add r7, r2, #2
864 .LVL95:
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** /* Decrement the loop counter */
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** blkCnt--;
865 .loc 12 123 0
866 0082 A3F10206 sub r6, r3, #2
867 .LVL96:
868 0086 09D1 bne .L120
869 .LVL97:
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
870 .loc 12 120 0
871 0088 8E78 ldrb r6, [r1, #2] @ zero_extendqisi2
872 .LVL98:
873 008a 8578 ldrb r5, [r0, #2] @ zero_extendqisi2
874 008c 3540 ands r5, r5, r6
875 008e 9570 strb r5, [r2, #2]
876 0090 00F1030E add lr, r0, #3
877 .LVL99:
878 0094 01F1030C add ip, r1, #3
879 .LVL100:
880 0098 D71C adds r7, r2, #3
881 .LVL101:
882 .loc 12 123 0
883 009a DE1E subs r6, r3, #3
884 .LVL102:
885 .L120:
886 009c 1B1B subs r3, r3, r4
887 .LVL103:
888 009e 2044 add r0, r0, r4
889 00a0 2144 add r1, r1, r4
890 00a2 2244 add r2, r2, r4
891 00a4 4FEA9309 lsr r9, r3, #2
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
892 .loc 12 118 0
893 00a8 0025 movs r5, #0
894 .L122:
ARM GAS /tmp/ccnDQoMC.s page 86
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
895 .loc 12 120 0
896 00aa 51F8044B ldr r4, [r1], #4 @ unaligned
897 00ae 50F8048B ldr r8, [r0], #4
898 00b2 0135 adds r5, r5, #1
899 00b4 04EA0804 and r4, r4, r8
900 00b8 4D45 cmp r5, r9
901 00ba 42F8044B str r4, [r2], #4 @ unaligned
902 00be F4D3 bcc .L122
903 00c0 23F00302 bic r2, r3, #3
904 00c4 9342 cmp r3, r2
905 00c6 A6EB0206 sub r6, r6, r2
906 00ca 0EEB0204 add r4, lr, r2
907 00ce 0CEB0200 add r0, ip, r2
908 00d2 07EB0201 add r1, r7, r2
909 00d6 28D0 beq .L117
910 .LVL104:
911 00d8 1EF80230 ldrb r3, [lr, r2] @ zero_extendqisi2
912 00dc 1CF80250 ldrb r5, [ip, r2] @ zero_extendqisi2
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
913 .loc 12 118 0
914 00e0 012E cmp r6, #1
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
915 .loc 12 120 0
916 00e2 03EA0503 and r3, r3, r5
917 00e6 BB54 strb r3, [r7, r2]
918 .LVL105:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
919 .loc 12 118 0
920 00e8 1FD0 beq .L117
921 .LVL106:
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
922 .loc 12 120 0
923 00ea 6378 ldrb r3, [r4, #1] @ zero_extendqisi2
924 00ec 4278 ldrb r2, [r0, #1] @ zero_extendqisi2
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
925 .loc 12 118 0
926 00ee 022E cmp r6, #2
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
927 .loc 12 120 0
928 00f0 03EA0203 and r3, r3, r2
929 00f4 4B70 strb r3, [r1, #1]
930 .LVL107:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
931 .loc 12 118 0
932 00f6 18D0 beq .L117
933 .LVL108:
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
934 .loc 12 120 0
935 00f8 A378 ldrb r3, [r4, #2] @ zero_extendqisi2
936 00fa 8278 ldrb r2, [r0, #2] @ zero_extendqisi2
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
937 .loc 12 118 0
938 00fc 032E cmp r6, #3
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
939 .loc 12 120 0
940 00fe 03EA0203 and r3, r3, r2
ARM GAS /tmp/ccnDQoMC.s page 87
941 0102 8B70 strb r3, [r1, #2]
942 .LVL109:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
943 .loc 12 118 0
944 0104 11D0 beq .L117
945 .LVL110:
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
946 .loc 12 120 0
947 0106 E378 ldrb r3, [r4, #3] @ zero_extendqisi2
948 0108 C278 ldrb r2, [r0, #3] @ zero_extendqisi2
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
949 .loc 12 118 0
950 010a 042E cmp r6, #4
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
951 .loc 12 120 0
952 010c 03EA0203 and r3, r3, r2
953 0110 CB70 strb r3, [r1, #3]
954 .LVL111:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
955 .loc 12 118 0
956 0112 0AD0 beq .L117
957 .LVL112:
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
958 .loc 12 120 0
959 0114 2379 ldrb r3, [r4, #4] @ zero_extendqisi2
960 0116 0279 ldrb r2, [r0, #4] @ zero_extendqisi2
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
961 .loc 12 118 0
962 0118 052E cmp r6, #5
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
963 .loc 12 120 0
964 011a 03EA0203 and r3, r3, r2
965 011e 0B71 strb r3, [r1, #4]
966 .LVL113:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
967 .loc 12 118 0
968 0120 03D0 beq .L117
969 .LVL114:
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
970 .loc 12 120 0
971 0122 6379 ldrb r3, [r4, #5] @ zero_extendqisi2
972 0124 4279 ldrb r2, [r0, #5] @ zero_extendqisi2
973 0126 1340 ands r3, r3, r2
974 0128 4B71 strb r3, [r1, #5]
975 .LVL115:
976 .L117:
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** }
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** #endif /* if defined(ARM_MATH_MVEI) */
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** }
977 .loc 12 126 0
978 012a BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc}
979 .LVL116:
980 .L126:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
981 .loc 12 118 0
982 012e 1E46 mov r6, r3
983 0130 1746 mov r7, r2
ARM GAS /tmp/ccnDQoMC.s page 88
984 0132 8C46 mov ip, r1
985 0134 8646 mov lr, r0
986 0136 B1E7 b .L120
987 .L119:
988 0138 0344 add r3, r3, r0
989 .LVL117:
990 .L124:
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
991 .loc 12 120 0
992 013a 10F8014B ldrb r4, [r0], #1 @ zero_extendqisi2
993 .LVL118:
994 013e 11F8015B ldrb r5, [r1], #1 @ zero_extendqisi2
995 .LVL119:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
996 .loc 12 118 0
997 0142 8342 cmp r3, r0
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c ****
998 .loc 12 120 0
999 0144 04EA0504 and r4, r4, r5
1000 0148 02F8014B strb r4, [r2], #1
1001 .LVL120:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c **** {
1002 .loc 12 118 0
1003 014c F5D1 bne .L124
1004 .loc 12 126 0
1005 014e BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc}
1006 .LVL121:
1007 .L157:
1008 .LCFI23:
1009 .cfi_def_cfa_offset 0
1010 .cfi_restore 4
1011 .cfi_restore 5
1012 .cfi_restore 6
1013 .cfi_restore 7
1014 .cfi_restore 8
1015 .cfi_restore 9
1016 .cfi_restore 14
1017 0152 7047 bx lr
1018 .cfi_endproc
1019 .LFE158:
1021 .section .text.arm_dot_prod_f32,"ax",%progbits
1022 .align 1
1023 .p2align 2,,3
1024 .global arm_dot_prod_f32
1025 .syntax unified
1026 .thumb
1027 .thumb_func
1028 .fpu fpv4-sp-d16
1030 arm_dot_prod_f32:
1031 .LFB159:
1032 .file 13 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * Title: arm_dot_prod_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * Description: Floating-point dot product
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * $Date: 18. March 2019
ARM GAS /tmp/ccnDQoMC.s page 89
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** @defgroup BasicDotProd Vector Dot Product
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** Computes the dot product of two vectors.
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** The vectors are multiplied element-by-element and then summed.
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** <pre>
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** </pre>
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** There are separate functions for floating-point, Q7, Q15, and Q31 data types.
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** */
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /**
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** @addtogroup BasicDotProd
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** @{
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** */
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /**
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** @brief Dot product of floating-point vectors.
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** @param[in] pSrcA points to the first input vector.
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** @param[in] pSrcB points to the second input vector.
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** @param[in] blockSize number of samples in each vector.
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** @param[out] result output result returned here.
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** @return none
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** */
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
ARM GAS /tmp/ccnDQoMC.s page 90
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** #include "arm_helium_utils.h"
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** void arm_dot_prod_f32(
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** const float32_t * pSrcA,
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** const float32_t * pSrcB,
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** uint32_t blockSize,
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** float32_t * result)
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** {
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** f32x4_t vecA, vecB;
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** f32x4_t vecSum;
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** uint32_t blkCnt;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** float32_t sum = 0.0f;
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** vecSum = vdupq_n_f32(0.0f);
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Compute 4 outputs at a time */
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** blkCnt = blockSize >> 2U;
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** while (blkCnt > 0U)
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** {
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /*
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * Calculate dot product and then store the result in a temporary buffer.
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * and advance vector source and destination pointers
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** */
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** vecA = vld1q(pSrcA);
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** pSrcA += 4;
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** vecB = vld1q(pSrcB);
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** pSrcB += 4;
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** vecSum = vfmaq(vecSum, vecA, vecB);
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /*
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** * Decrement the blockSize loop counter
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** */
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** blkCnt --;
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** }
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** blkCnt = blockSize & 3;
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** if (blkCnt > 0U)
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** {
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** vecA = vld1q(pSrcA);
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** vecB = vld1q(pSrcB);
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** vecSum = vfmaq_m(vecSum, vecA, vecB, p0);
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** }
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** sum = vecAddAcrossF32Mve(vecSum);
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Store result in destination buffer */
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** *result = sum;
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** }
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** #else
ARM GAS /tmp/ccnDQoMC.s page 91
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** void arm_dot_prod_f32(
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** const float32_t * pSrcA,
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** const float32_t * pSrcB,
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** uint32_t blockSize,
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** float32_t * result)
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** {
1033 .loc 13 127 0
1034 .cfi_startproc
1035 @ args = 0, pretend = 0, frame = 0
1036 @ frame_needed = 0, uses_anonymous_args = 0
1037 @ link register save eliminated.
1038 .LVL122:
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** uint32_t blkCnt; /* Loop counter */
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** float32_t sum = 0.0f; /* Temporary return variable */
1039 .loc 13 129 0
1040 0000 DFED067A vldr.32 s15, .L165
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** f32x4_t vec1;
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** f32x4_t vec2;
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** f32x4_t accum = vdupq_n_f32(0);
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** f32x2_t tmp = vdup_n_f32(0);
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Compute 4 outputs at a time */
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** blkCnt = blockSize >> 2U;
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** vec1 = vld1q_f32(pSrcA);
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** vec2 = vld1q_f32(pSrcB);
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** while (blkCnt > 0U)
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** {
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* C = A[0]*B[0] + A[1]*B[1] + A[2]*B[2] + ... + A[blockSize-1]*B[blockSize-1] */
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Calculate dot product and then store the result in a temporary buffer. */
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** accum = vmlaq_f32(accum, vec1, vec2);
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Increment pointers */
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** pSrcA += 4;
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** pSrcB += 4;
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** vec1 = vld1q_f32(pSrcA);
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** vec2 = vld1q_f32(pSrcB);
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Decrement the loop counter */
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** blkCnt--;
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** }
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** #if __aarch64__
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** sum = vpadds_f32(vpadd_f32(vget_low_f32(accum), vget_high_f32(accum)));
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** #else
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** tmp = vpadd_f32(vget_low_f32(accum), vget_high_f32(accum));
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** sum = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1);
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** #endif
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Tail */
ARM GAS /tmp/ccnDQoMC.s page 92
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** blkCnt = blockSize & 0x3;
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** #else
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** blkCnt = blockSize >> 2U;
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** ** a second loop below computes the remaining 1 to 3 samples. */
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** while (blkCnt > 0U)
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** {
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Calculate dot product and store result in a temporary buffer. */
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** sum += (*pSrcA++) * (*pSrcB++);
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** sum += (*pSrcA++) * (*pSrcB++);
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** sum += (*pSrcA++) * (*pSrcB++);
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** sum += (*pSrcA++) * (*pSrcB++);
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Decrement loop counter */
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** blkCnt--;
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** }
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Loop unrolling: Compute remaining outputs */
198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** blkCnt = blockSize % 0x4U;
199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** #else
201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Initialize blkCnt with number of samples */
203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** blkCnt = blockSize;
204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** #endif /* #if defined(ARM_MATH_NEON) */
207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** while (blkCnt > 0U)
1041 .loc 13 208 0
1042 0004 3AB1 cbz r2, .L161
1043 .LVL123:
1044 .L162:
209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** {
210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Calculate dot product and store result in a temporary buffer. */
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** sum += (*pSrcA++) * (*pSrcB++);
1045 .loc 13 213 0
1046 0006 F0EC016A vldmia.32 r0!, {s13}
1047 .LVL124:
1048 000a B1EC017A vldmia.32 r1!, {s14}
1049 .LVL125:
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** {
1050 .loc 13 208 0
1051 000e 013A subs r2, r2, #1
1052 .LVL126:
ARM GAS /tmp/ccnDQoMC.s page 93
1053 .loc 13 213 0
1054 0010 E6EE877A vfma.f32 s15, s13, s14
1055 .LVL127:
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** {
1056 .loc 13 208 0
1057 0014 F7D1 bne .L162
1058 .LVL128:
1059 .L161:
214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Decrement loop counter */
216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** blkCnt--;
217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** }
218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c ****
219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** /* Store result in destination buffer */
220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** *result = sum;
1060 .loc 13 220 0
1061 0016 C3ED007A vstr.32 s15, [r3]
221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c **** }
1062 .loc 13 221 0
1063 001a 7047 bx lr
1064 .L166:
1065 .align 2
1066 .L165:
1067 001c 00000000 .word 0
1068 .cfi_endproc
1069 .LFE159:
1071 .section .text.arm_dot_prod_q15,"ax",%progbits
1072 .align 1
1073 .p2align 2,,3
1074 .global arm_dot_prod_q15
1075 .syntax unified
1076 .thumb
1077 .thumb_func
1078 .fpu fpv4-sp-d16
1080 arm_dot_prod_q15:
1081 .LFB160:
1082 .file 14 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * Title: arm_dot_prod_q15.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * Description: Q15 dot product
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * www.apache.org/licenses/LICENSE-2.0
ARM GAS /tmp/ccnDQoMC.s page 94
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** @addtogroup BasicDotProd
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** @brief Dot product of Q15 vectors.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** @param[in] pSrcA points to the first input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** @param[in] pSrcB points to the second input vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** @param[in] blockSize number of samples in each vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** @param[out] result output result returned here
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** results are added to a 64-bit accumulator in 34.30 format.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** Nonsaturating additions are used and given that there are 33 guard bits in the a
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** there is no risk of overflow.
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** The return result is in 34.30 format.
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** */
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** #if defined(ARM_MATH_MVEI)
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** #include "arm_helium_utils.h"
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** void arm_dot_prod_q15(
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** const q15_t * pSrcA,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** const q15_t * pSrcB,
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** uint32_t blockSize,
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** q63_t * result)
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** {
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** uint32_t blkCnt; /* loop counters */
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** q15x8_t vecA;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** q15x8_t vecB;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** q63_t sum = 0LL;
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /* Compute 8 outputs at a time */
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** blkCnt = blockSize >> 3;
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** while (blkCnt > 0U)
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** {
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /*
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * Calculate dot product and then store the result in a temporary buffer.
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** */
ARM GAS /tmp/ccnDQoMC.s page 95
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** vecA = vld1q(pSrcA);
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** vecB = vld1q(pSrcB);
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** sum = vmlaldavaq(sum, vecA, vecB);
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /*
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * Decrement the blockSize loop counter
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** */
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** blkCnt--;
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /*
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * advance vector source and destination pointers
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** */
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** pSrcA += 8;
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** pSrcB += 8;
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** }
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /*
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** * tail
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** */
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** blkCnt = blockSize & 7;
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** if (blkCnt > 0U)
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** {
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** vecA = vld1q(pSrcA);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** vecB = vld1q(pSrcB);
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** sum = vmlaldavaq_p(sum, vecA, vecB, p0);
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** }
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** *result = sum;
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** }
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** #else
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** void arm_dot_prod_q15(
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** const q15_t * pSrcA,
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** const q15_t * pSrcB,
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** uint32_t blockSize,
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** q63_t * result)
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** {
1083 .loc 14 112 0
1084 .cfi_startproc
1085 @ args = 0, pretend = 0, frame = 0
1086 @ frame_needed = 0, uses_anonymous_args = 0
1087 @ link register save eliminated.
1088 .LVL129:
1089 0000 F0B4 push {r4, r5, r6, r7}
1090 .LCFI24:
1091 .cfi_def_cfa_offset 16
1092 .cfi_offset 4, -16
1093 .cfi_offset 5, -12
1094 .cfi_offset 6, -8
1095 .cfi_offset 7, -4
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** uint32_t blkCnt; /* Loop counter */
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** q63_t sum = 0; /* Temporary return variable */
1096 .loc 14 114 0
1097 0002 0024 movs r4, #0
1098 0004 0025 movs r5, #0
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** #if defined (ARM_MATH_LOOPUNROLL)
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */
ARM GAS /tmp/ccnDQoMC.s page 96
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** blkCnt = blockSize >> 2U;
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** while (blkCnt > 0U)
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** {
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** #if defined (ARM_MATH_DSP)
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /* Calculate dot product and store result in a temporary buffer. */
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** sum = __SMLALD(read_q15x2_ia ((q15_t **) &pSrcA), read_q15x2_ia ((q15_t **) &pSrcB), sum);
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** sum = __SMLALD(read_q15x2_ia ((q15_t **) &pSrcA), read_q15x2_ia ((q15_t **) &pSrcB), sum);
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** #else
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** #endif
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /* Decrement loop counter */
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** blkCnt--;
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** }
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /* Loop unrolling: Compute remaining outputs */
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** blkCnt = blockSize % 0x4U;
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** #else
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /* Initialize blkCnt with number of samples */
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** blkCnt = blockSize;
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** while (blkCnt > 0U)
1099 .loc 14 150 0
1100 0006 3AB1 cbz r2, .L168
1101 .LVL130:
1102 .L169:
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** {
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /* Calculate dot product and store result in a temporary buffer. */
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** //#if defined (ARM_MATH_DSP)
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** // sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** //#else
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
1103 .loc 14 158 0
1104 0008 30F8027B ldrh r7, [r0], #2
1105 .LVL131:
1106 000c 31F8026B ldrh r6, [r1], #2
1107 .LVL132:
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** {
1108 .loc 14 150 0
1109 0010 013A subs r2, r2, #1
1110 .LVL133:
1111 .loc 14 158 0
1112 0012 C7FB8645 smlalbb r4, r5, r7, r6
1113 .LVL134:
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** {
ARM GAS /tmp/ccnDQoMC.s page 97
1114 .loc 14 150 0
1115 0016 F7D1 bne .L169
1116 .LVL135:
1117 .L168:
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** //#endif
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /* Decrement loop counter */
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** blkCnt--;
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** }
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c ****
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** /* Store result in destination buffer in 34.30 format */
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** *result = sum;
1118 .loc 14 166 0
1119 0018 C3E90045 strd r4, [r3]
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c **** }
1120 .loc 14 167 0
1121 001c F0BC pop {r4, r5, r6, r7}
1122 .LCFI25:
1123 .cfi_restore 7
1124 .cfi_restore 6
1125 .cfi_restore 5
1126 .cfi_restore 4
1127 .cfi_def_cfa_offset 0
1128 001e 7047 bx lr
1129 .cfi_endproc
1130 .LFE160:
1132 .section .text.arm_dot_prod_q31,"ax",%progbits
1133 .align 1
1134 .p2align 2,,3
1135 .global arm_dot_prod_q31
1136 .syntax unified
1137 .thumb
1138 .thumb_func
1139 .fpu fpv4-sp-d16
1141 arm_dot_prod_q31:
1142 .LFB161:
1143 .file 15 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * Title: arm_dot_prod_q31.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * Description: Q31 dot product
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * www.apache.org/licenses/LICENSE-2.0
ARM GAS /tmp/ccnDQoMC.s page 98
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** @addtogroup BasicDotProd
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** @brief Dot product of Q31 vectors.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** @param[in] pSrcA points to the first input vector.
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** @param[in] pSrcB points to the second input vector.
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** @param[in] blockSize number of samples in each vector.
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** @param[out] result output result returned here.
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** are truncated to 2.48 format by discarding the lower 14 bits.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** The 2.48 result is then added without saturation to a 64-bit accumulator in 16.4
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** There are 15 guard bits in the accumulator and there is no risk of overflow as l
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** the length of the vectors is less than 2^16 elements.
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** The return result is in 16.48 format.
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** */
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** #if defined(ARM_MATH_MVEI)
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** #include "arm_helium_utils.h"
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** void arm_dot_prod_q31(
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** const q31_t * pSrcA,
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** const q31_t * pSrcB,
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** uint32_t blockSize,
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** q63_t * result)
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** {
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** uint32_t blkCnt; /* loop counters */
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** q31x4_t vecA;
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** q31x4_t vecB;
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** q63_t sum = 0LL;
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /* Compute 4 outputs at a time */
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** blkCnt = blockSize >> 2;
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** while (blkCnt > 0U)
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** {
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /*
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
ARM GAS /tmp/ccnDQoMC.s page 99
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * Calculate dot product and then store the result in a temporary buffer.
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** */
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** vecA = vld1q(pSrcA);
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** vecB = vld1q(pSrcB);
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** sum = vrmlaldavhaq(sum, vecA, vecB);
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /*
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * Decrement the blockSize loop counter
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** */
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** blkCnt--;
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /*
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * advance vector source and destination pointers
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** */
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** pSrcA += 4;
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** pSrcB += 4;
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** }
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /*
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * tail
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** */
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** blkCnt = blockSize & 3;
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** if (blkCnt > 0U)
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** {
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt);
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** vecA = vld1q(pSrcA);
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** vecB = vld1q(pSrcB);
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** sum = vrmlaldavhaq_p(sum, vecA, vecB, p0);
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** }
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /*
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * vrmlaldavhaq provides extra intermediate accumulator headroom.
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * limiting the need of intermediate scaling
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * Scalar variant uses 2.48 accu format by right shifting accumulators by 14.
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** * 16.48 output conversion is performed outside the loop by scaling accu. by 6
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** */
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** *result = asrl(sum, (14 - 8));
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** }
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** #else
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** void arm_dot_prod_q31(
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** const q31_t * pSrcA,
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** const q31_t * pSrcB,
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** uint32_t blockSize,
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** q63_t * result)
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** {
1144 .loc 15 120 0
1145 .cfi_startproc
1146 @ args = 0, pretend = 0, frame = 0
1147 @ frame_needed = 0, uses_anonymous_args = 0
1148 @ link register save eliminated.
1149 .LVL136:
1150 0000 2DE9F003 push {r4, r5, r6, r7, r8, r9}
1151 .LCFI26:
1152 .cfi_def_cfa_offset 24
1153 .cfi_offset 4, -24
1154 .cfi_offset 5, -20
1155 .cfi_offset 6, -16
1156 .cfi_offset 7, -12
1157 .cfi_offset 8, -8
ARM GAS /tmp/ccnDQoMC.s page 100
1158 .cfi_offset 9, -4
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** uint32_t blkCnt; /* Loop counter */
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** q63_t sum = 0; /* Temporary return variable */
1159 .loc 15 122 0
1160 0004 4FF00008 mov r8, #0
1161 0008 4FF00009 mov r9, #0
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** #if defined (ARM_MATH_LOOPUNROLL)
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** blkCnt = blockSize >> 2U;
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** while (blkCnt > 0U)
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** {
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /* Calculate dot product and store result in a temporary buffer. */
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /* Decrement loop counter */
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** blkCnt--;
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** }
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /* Loop unrolling: Compute remaining outputs */
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** blkCnt = blockSize % 0x4U;
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** #else
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /* Initialize blkCnt with number of samples */
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** blkCnt = blockSize;
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** while (blkCnt > 0U)
1162 .loc 15 156 0
1163 000c 82B1 cbz r2, .L174
1164 .LVL137:
1165 .L175:
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** {
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /* Calculate dot product and store result in a temporary buffer. */
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
1166 .loc 15 161 0
1167 000e 50F8047B ldr r7, [r0], #4
1168 .LVL138:
1169 0012 51F8046B ldr r6, [r1], #4
1170 .LVL139:
1171 0016 87FB0667 smull r6, r7, r7, r6
1172 001a B40B lsrs r4, r6, #14
1173 001c 44EA8744 orr r4, r4, r7, lsl #18
ARM GAS /tmp/ccnDQoMC.s page 101
1174 0020 18EB0408 adds r8, r8, r4
1175 .LVL140:
1176 0024 4FEAA735 asr r5, r7, #14
1177 0028 49EB0509 adc r9, r9, r5
1178 .LVL141:
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** {
1179 .loc 15 156 0
1180 002c 013A subs r2, r2, #1
1181 .LVL142:
1182 002e EED1 bne .L175
1183 .LVL143:
1184 .L174:
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /* Decrement loop counter */
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** blkCnt--;
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** }
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c ****
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** /* Store result in destination buffer in 16.48 format */
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** *result = sum;
1185 .loc 15 168 0
1186 0030 C3E90089 strd r8, [r3]
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c **** }
1187 .loc 15 169 0
1188 0034 BDE8F003 pop {r4, r5, r6, r7, r8, r9}
1189 .LCFI27:
1190 .cfi_restore 9
1191 .cfi_restore 8
1192 .cfi_restore 7
1193 .cfi_restore 6
1194 .cfi_restore 5
1195 .cfi_restore 4
1196 .cfi_def_cfa_offset 0
1197 0038 7047 bx lr
1198 .cfi_endproc
1199 .LFE161:
1201 003a 00BF .section .text.arm_dot_prod_q7,"ax",%progbits
1202 .align 1
1203 .p2align 2,,3
1204 .global arm_dot_prod_q7
1205 .syntax unified
1206 .thumb
1207 .thumb_func
1208 .fpu fpv4-sp-d16
1210 arm_dot_prod_q7:
1211 .LFB162:
1212 .file 16 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * Title: arm_dot_prod_q7.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * Description: Q7 dot product
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /*
ARM GAS /tmp/ccnDQoMC.s page 102
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** @addtogroup BasicDotProd
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** @brief Dot product of Q7 vectors.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** @param[in] pSrcA points to the first input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** @param[in] pSrcB points to the second input vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** @param[in] blockSize number of samples in each vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** @param[out] result output result returned here
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** results are added to an accumulator in 18.14 format.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** Nonsaturating additions are used and there is no danger of wrap around as long a
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** the vectors are less than 2^18 elements long.
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** The return result is in 18.14 format.
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** */
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** #if defined(ARM_MATH_MVEI)
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** #include "arm_helium_utils.h"
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** void arm_dot_prod_q7(
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** const q7_t * pSrcA,
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** const q7_t * pSrcB,
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** uint32_t blockSize,
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** q31_t * result)
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** {
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** uint32_t blkCnt; /* loop counters */
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** q7x16_t vecA;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** q7x16_t vecB;
ARM GAS /tmp/ccnDQoMC.s page 103
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** q31_t sum = 0;
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* Compute 16 outputs at a time */
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** blkCnt = blockSize >> 4;
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** while (blkCnt > 0U)
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** {
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /*
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * Calculate dot product and then store the result in a temporary buffer.
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** */
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** vecA = vld1q(pSrcA);
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** vecB = vld1q(pSrcB);
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** sum = vmladavaq(sum, vecA, vecB);
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /*
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * Decrement the blockSize loop counter
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** */
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** blkCnt--;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /*
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * advance vector source and destination pointers
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** */
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** pSrcA += 16;
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** pSrcB += 16;
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** }
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /*
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** * tail
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** */
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** blkCnt = blockSize & 0xF;
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** if (blkCnt > 0U)
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** {
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** mve_pred16_t p0 = vctp8q(blkCnt);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** vecA = vld1q(pSrcA);
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** vecB = vld1q(pSrcB);
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** sum = vmladavaq_p(sum, vecA, vecB, p0);
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** }
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** *result = sum;
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** }
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** #else
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** void arm_dot_prod_q7(
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** const q7_t * pSrcA,
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** const q7_t * pSrcB,
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** uint32_t blockSize,
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** q31_t * result)
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** {
1213 .loc 16 112 0
1214 .cfi_startproc
1215 @ args = 0, pretend = 0, frame = 0
1216 @ frame_needed = 0, uses_anonymous_args = 0
1217 @ link register save eliminated.
1218 .LVL144:
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** uint32_t blkCnt; /* Loop counter */
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** q31_t sum = 0; /* Temporary return variable */
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** #if defined (ARM_MATH_LOOPUNROLL)
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** #if defined (ARM_MATH_DSP)
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** q31_t input1, input2; /* Temporary variables */
ARM GAS /tmp/ccnDQoMC.s page 104
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** q31_t inA1, inA2, inB1, inB2; /* Temporary variables */
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** #endif
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** blkCnt = blockSize >> 2U;
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** while (blkCnt > 0U)
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** {
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** #if defined (ARM_MATH_DSP)
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* read 4 samples at a time from sourceA */
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** input1 = read_q7x4_ia ((q7_t **) &pSrcA);
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* read 4 samples at a time from sourceB */
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** input2 = read_q7x4_ia ((q7_t **) &pSrcB);
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* extract two q7_t samples to q15_t samples */
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** inA1 = __SXTB16(__ROR(input1, 8));
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* extract reminaing two samples */
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** inA2 = __SXTB16(input1);
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* extract two q7_t samples to q15_t samples */
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** inB1 = __SXTB16(__ROR(input2, 8));
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* extract reminaing two samples */
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** inB2 = __SXTB16(input2);
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* multiply and accumulate two samples at a time */
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** sum = __SMLAD(inA1, inB1, sum);
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** sum = __SMLAD(inA2, inB2, sum);
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** #else
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** #endif
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* Decrement loop counter */
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** blkCnt--;
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** }
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* Loop unrolling: Compute remaining outputs */
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** blkCnt = blockSize % 0x4U;
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** #else
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* Initialize blkCnt with number of samples */
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** blkCnt = blockSize;
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** while (blkCnt > 0U)
1219 .loc 16 169 0
1220 0000 6AB1 cbz r2, .L185
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** uint32_t blkCnt; /* Loop counter */
1221 .loc 16 112 0
1222 0002 70B4 push {r4, r5, r6}
1223 .LCFI28:
1224 .cfi_def_cfa_offset 12
ARM GAS /tmp/ccnDQoMC.s page 105
1225 .cfi_offset 4, -12
1226 .cfi_offset 5, -8
1227 .cfi_offset 6, -4
1228 0004 8618 adds r6, r0, r2
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
1229 .loc 16 114 0
1230 0006 0022 movs r2, #0
1231 .LVL145:
1232 .L181:
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** {
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* Calculate dot product and store result in a temporary buffer. */
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** //#if defined (ARM_MATH_DSP)
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** // sum = __SMLAD(*pSrcA++, *pSrcB++, sum);
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** //#else
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
1233 .loc 16 177 0
1234 0008 10F9015B ldrsb r5, [r0], #1
1235 .LVL146:
1236 000c 11F9014B ldrsb r4, [r1], #1
1237 .LVL147:
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** {
1238 .loc 16 169 0
1239 0010 B042 cmp r0, r6
1240 .loc 16 177 0
1241 0012 15FB0422 smlabb r2, r5, r4, r2
1242 .LVL148:
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** {
1243 .loc 16 169 0
1244 0016 F7D1 bne .L181
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** //#endif
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* Decrement loop counter */
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** blkCnt--;
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** }
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c ****
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** /* Store result in destination buffer in 18.14 format */
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** *result = sum;
1245 .loc 16 185 0
1246 0018 1A60 str r2, [r3]
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** }
1247 .loc 16 186 0
1248 001a 70BC pop {r4, r5, r6}
1249 .LCFI29:
1250 .cfi_restore 6
1251 .cfi_restore 5
1252 .cfi_restore 4
1253 .cfi_def_cfa_offset 0
1254 001c 7047 bx lr
1255 .LVL149:
1256 .L185:
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c **** }
1257 .loc 16 185 0
1258 001e 1A60 str r2, [r3]
1259 0020 7047 bx lr
1260 .cfi_endproc
ARM GAS /tmp/ccnDQoMC.s page 106
1261 .LFE162:
1263 0022 00BF .section .text.arm_mult_f32,"ax",%progbits
1264 .align 1
1265 .p2align 2,,3
1266 .global arm_mult_f32
1267 .syntax unified
1268 .thumb
1269 .thumb_func
1270 .fpu fpv4-sp-d16
1272 arm_mult_f32:
1273 .LFB163:
1274 .file 17 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * Title: arm_mult_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * Description: Floating-point vector multiplication
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** @defgroup BasicMult Vector Multiplication
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** Element-by-element multiplication of two vectors.
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** <pre>
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** pDst[n] = pSrcA[n] * pSrcB[n], 0 <= n < blockSize.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** </pre>
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** There are separate functions for floating-point, Q7, Q15, and Q31 data types.
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** */
ARM GAS /tmp/ccnDQoMC.s page 107
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /**
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** @addtogroup BasicMult
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** @{
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** */
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /**
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** @brief Floating-point vector multiplication.
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** @param[in] pSrcA points to the first input vector.
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** @param[in] pSrcB points to the second input vector.
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** @param[out] pDst points to the output vector.
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** @param[in] blockSize number of samples in each vector.
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** @return none
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** */
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** #include "arm_helium_utils.h"
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** void arm_mult_f32(
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** const float32_t * pSrcA,
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** const float32_t * pSrcB,
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** float32_t * pDst,
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** uint32_t blockSize)
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** {
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** uint32_t blkCnt; /* Loop counter */
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** f32x4_t vec1;
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** f32x4_t vec2;
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** f32x4_t res;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Compute 4 outputs at a time */
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** blkCnt = blockSize >> 2U;
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** while (blkCnt > 0U)
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** {
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* C = A + B */
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Add and then store the results in the destination buffer. */
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** vec1 = vld1q(pSrcA);
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** vec2 = vld1q(pSrcB);
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** res = vmulq(vec1, vec2);
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** vst1q(pDst, res);
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Increment pointers */
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** pSrcA += 4;
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** pSrcB += 4;
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** pDst += 4;
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Decrement the loop counter */
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** blkCnt--;
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** }
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Tail */
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** blkCnt = blockSize & 0x3;
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** if (blkCnt > 0U)
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** {
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* C = A + B */
ARM GAS /tmp/ccnDQoMC.s page 108
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** vec1 = vld1q(pSrcA);
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** vec2 = vld1q(pSrcB);
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** vstrwq_p(pDst, vmulq(vec1,vec2), p0);
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** }
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** }
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** #else
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** void arm_mult_f32(
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** const float32_t * pSrcA,
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** const float32_t * pSrcB,
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** float32_t * pDst,
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** uint32_t blockSize)
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** {
1275 .loc 17 117 0
1276 .cfi_startproc
1277 @ args = 0, pretend = 0, frame = 0
1278 @ frame_needed = 0, uses_anonymous_args = 0
1279 @ link register save eliminated.
1280 .LVL150:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** uint32_t blkCnt; /* Loop counter */
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** f32x4_t vec1;
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** f32x4_t vec2;
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** f32x4_t res;
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Compute 4 outputs at a time */
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** blkCnt = blockSize >> 2U;
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** while (blkCnt > 0U)
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** {
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* C = A * B */
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Multiply the inputs and then store the results in the destination buffer. */
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** vec1 = vld1q_f32(pSrcA);
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** vec2 = vld1q_f32(pSrcB);
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** res = vmulq_f32(vec1, vec2);
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** vst1q_f32(pDst, res);
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Increment pointers */
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** pSrcA += 4;
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** pSrcB += 4;
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** pDst += 4;
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Decrement the loop counter */
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** blkCnt--;
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** }
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Tail */
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** blkCnt = blockSize & 0x3;
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** #else
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */
ARM GAS /tmp/ccnDQoMC.s page 109
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** blkCnt = blockSize >> 2U;
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** while (blkCnt > 0U)
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** {
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* C = A * B */
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Multiply inputs and store result in destination buffer. */
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** *pDst++ = (*pSrcA++) * (*pSrcB++);
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** *pDst++ = (*pSrcA++) * (*pSrcB++);
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** *pDst++ = (*pSrcA++) * (*pSrcB++);
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** *pDst++ = (*pSrcA++) * (*pSrcB++);
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Decrement loop counter */
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** blkCnt--;
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** }
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Loop unrolling: Compute remaining outputs */
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** blkCnt = blockSize % 0x4U;
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** #else
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Initialize blkCnt with number of samples */
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** blkCnt = blockSize;
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** #endif /* #if defined(ARM_MATH_NEON) */
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** while (blkCnt > 0U)
1281 .loc 17 184 0
1282 0000 4BB1 cbz r3, .L188
1283 .LVL151:
1284 .L190:
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** {
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* C = A * B */
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Multiply input and store result in destination buffer. */
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** *pDst++ = (*pSrcA++) * (*pSrcB++);
1285 .loc 17 189 0
1286 0002 F0EC017A vldmia.32 r0!, {s15}
1287 .LVL152:
1288 0006 B1EC017A vldmia.32 r1!, {s14}
1289 .LVL153:
1290 000a 67EE877A vmul.f32 s15, s15, s14
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** {
1291 .loc 17 184 0
1292 000e 013B subs r3, r3, #1
1293 .LVL154:
1294 .loc 17 189 0
1295 0010 E2EC017A vstmia.32 r2!, {s15}
1296 .LVL155:
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** {
1297 .loc 17 184 0
1298 0014 F5D1 bne .L190
1299 .L188:
ARM GAS /tmp/ccnDQoMC.s page 110
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** /* Decrement loop counter */
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** blkCnt--;
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** }
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c ****
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c **** }
1300 .loc 17 195 0
1301 0016 7047 bx lr
1302 .cfi_endproc
1303 .LFE163:
1305 .section .text.arm_mult_q15,"ax",%progbits
1306 .align 1
1307 .p2align 2,,3
1308 .global arm_mult_q15
1309 .syntax unified
1310 .thumb
1311 .thumb_func
1312 .fpu fpv4-sp-d16
1314 arm_mult_q15:
1315 .LFB164:
1316 .file 18 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * Title: arm_mult_q15.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * Description: Q15 vector multiplication
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** @addtogroup BasicMult
ARM GAS /tmp/ccnDQoMC.s page 111
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** @brief Q15 vector multiplication
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** @param[in] pSrcA points to first input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** @param[in] pSrcB points to second input vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** @param[out] pDst points to output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** The function uses saturating arithmetic.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** */
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #if defined(ARM_MATH_MVEI)
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #include "arm_helium_utils.h"
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** void arm_mult_q15(
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** const q15_t * pSrcA,
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** const q15_t * pSrcB,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** q15_t * pDst,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** uint32_t blockSize)
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** {
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** uint32_t blkCnt; /* loop counters */
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** q15x8_t vecA, vecB;
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* Compute 8 outputs at a time */
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** blkCnt = blockSize >> 3;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** while (blkCnt > 0U)
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** {
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /*
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * C = A * B
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * Multiply the inputs and then store the results in the destination buffer.
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** */
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** vecA = vld1q(pSrcA);
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** vecB = vld1q(pSrcB);
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** vst1q(pDst, vqdmulhq(vecA, vecB));
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /*
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * Decrement the blockSize loop counter
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** */
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** blkCnt--;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /*
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * advance vector source and destination pointers
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** */
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** pSrcA += 8;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** pSrcB += 8;
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** pDst += 8;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** }
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /*
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** * tail
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** */
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** blkCnt = blockSize & 7;
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** if (blkCnt > 0U)
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** {
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt);
ARM GAS /tmp/ccnDQoMC.s page 112
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** vecA = vld1q(pSrcA);
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** vecB = vld1q(pSrcB);
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** vstrhq_p(pDst, vqdmulhq(vecA, vecB), p0);
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** }
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** }
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #else
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** void arm_mult_q15(
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** const q15_t * pSrcA,
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** const q15_t * pSrcB,
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** q15_t * pDst,
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** uint32_t blockSize)
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** {
1317 .loc 18 106 0
1318 .cfi_startproc
1319 @ args = 0, pretend = 0, frame = 0
1320 @ frame_needed = 0, uses_anonymous_args = 0
1321 @ link register save eliminated.
1322 .LVL156:
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** uint32_t blkCnt; /* Loop counter */
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #if defined (ARM_MATH_LOOPUNROLL)
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #if defined (ARM_MATH_DSP)
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** q31_t inA1, inA2, inB1, inB2; /* Temporary input variables */
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** q15_t out1, out2, out3, out4; /* Temporary output variables */
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** q31_t mul1, mul2, mul3, mul4; /* Temporary variables */
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #endif
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** blkCnt = blockSize >> 2U;
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** while (blkCnt > 0U)
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** {
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* C = A * B */
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #if defined (ARM_MATH_DSP)
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* read 2 samples at a time from sourceA */
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* read 2 samples at a time from sourceB */
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* read 2 samples at a time from sourceA */
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* read 2 samples at a time from sourceB */
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* multiply mul = sourceA * sourceB */
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** mul2 = (q31_t) ((q15_t) (inA1 ) * (q15_t) (inB1 ));
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** mul4 = (q31_t) ((q15_t) (inA2 ) * (q15_t) (inB2 ));
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* saturate result to 16 bit */
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** out1 = (q15_t) __SSAT(mul1 >> 15, 16);
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** out2 = (q15_t) __SSAT(mul2 >> 15, 16);
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** out3 = (q15_t) __SSAT(mul3 >> 15, 16);
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** out4 = (q15_t) __SSAT(mul4 >> 15, 16);
ARM GAS /tmp/ccnDQoMC.s page 113
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* store result to destination */
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** write_q15x2_ia (&pDst, __PKHBT(out2, out1, 16));
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** write_q15x2_ia (&pDst, __PKHBT(out4, out3, 16));
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #else
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** write_q15x2_ia (&pDst, __PKHBT(out1, out2, 16));
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** write_q15x2_ia (&pDst, __PKHBT(out3, out4, 16));
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #else
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #endif
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* Decrement loop counter */
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** blkCnt--;
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** }
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* Loop unrolling: Compute remaining outputs */
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** blkCnt = blockSize % 0x4U;
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #else
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* Initialize blkCnt with number of samples */
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** blkCnt = blockSize;
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** while (blkCnt > 0U)
1323 .loc 18 176 0
1324 0000 83B1 cbz r3, .L203
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** uint32_t blkCnt; /* Loop counter */
1325 .loc 18 106 0
1326 0002 30B4 push {r4, r5}
1327 .LCFI30:
1328 .cfi_def_cfa_offset 8
1329 .cfi_offset 4, -8
1330 .cfi_offset 5, -4
1331 .LVL157:
1332 .L197:
1333 .LBB44:
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** {
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* C = A * B */
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* Multiply inputs and store result in destination buffer. */
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
1334 .loc 18 181 0
1335 0004 30F8024B ldrh r4, [r0], #2
1336 .LVL158:
1337 0008 31F8025B ldrh r5, [r1], #2
1338 .LVL159:
1339 .LBE44:
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** {
1340 .loc 18 176 0
ARM GAS /tmp/ccnDQoMC.s page 114
1341 000c 013B subs r3, r3, #1
1342 .LVL160:
1343 .LBB45:
1344 .loc 18 181 0
1345 000e 14FB05F4 smulbb r4, r4, r5
1346 0012 4FEAE434 asr r4, r4, #15
1347 .syntax unified
1348 @ 181 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c" 1
1349 0016 04F30F04 ssat r4, #16, r4
1350 @ 0 "" 2
1351 .LVL161:
1352 .thumb
1353 .syntax unified
1354 .LBE45:
1355 001a 22F8024B strh r4, [r2], #2 @ movhi
1356 .LVL162:
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** {
1357 .loc 18 176 0
1358 001e F1D1 bne .L197
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** /* Decrement loop counter */
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** blkCnt--;
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** }
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c ****
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c **** }
1359 .loc 18 187 0
1360 0020 30BC pop {r4, r5}
1361 .LCFI31:
1362 .cfi_restore 5
1363 .cfi_restore 4
1364 .cfi_def_cfa_offset 0
1365 .LVL163:
1366 0022 7047 bx lr
1367 .LVL164:
1368 .L203:
1369 0024 7047 bx lr
1370 .cfi_endproc
1371 .LFE164:
1373 0026 00BF .section .text.arm_mult_q31,"ax",%progbits
1374 .align 1
1375 .p2align 2,,3
1376 .global arm_mult_q31
1377 .syntax unified
1378 .thumb
1379 .thumb_func
1380 .fpu fpv4-sp-d16
1382 arm_mult_q31:
1383 .LFB165:
1384 .file 19 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * Title: arm_mult_q31.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * Description: Q31 vector multiplication
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** *
ARM GAS /tmp/ccnDQoMC.s page 115
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** @addtogroup BasicMult
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** @brief Q31 vector multiplication.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** @param[in] pSrcA points to the first input vector.
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** @param[in] pSrcB points to the second input vector.
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** @param[out] pDst points to the output vector.
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** @param[in] blockSize number of samples in each vector.
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** The function uses saturating arithmetic.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** */
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** #if defined(ARM_MATH_MVEI)
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** #include "arm_helium_utils.h"
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** void arm_mult_q31(
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** const q31_t * pSrcA,
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** const q31_t * pSrcB,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** q31_t * pDst,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** uint32_t blockSize)
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** {
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** uint32_t blkCnt; /* loop counters */
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** q31x4_t vecA, vecB;
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /* Compute 4 outputs at a time */
ARM GAS /tmp/ccnDQoMC.s page 116
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** blkCnt = blockSize >> 2;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** while (blkCnt > 0U)
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** {
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /*
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * C = A * B
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * Multiply the inputs and then store the results in the destination buffer.
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** */
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** vecA = vld1q(pSrcA);
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** vecB = vld1q(pSrcB);
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** vst1q(pDst, vqdmulhq(vecA, vecB));
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /*
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * Decrement the blockSize loop counter
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** */
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** blkCnt--;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /*
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * advance vector source and destination pointers
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** */
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** pSrcA += 4;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** pSrcB += 4;
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** pDst += 4;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** }
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /*
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** * tail
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** */
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** blkCnt = blockSize & 3;
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** if (blkCnt > 0U)
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** {
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt);
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** vecA = vld1q(pSrcA);
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** vecB = vld1q(pSrcB);
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** vstrwq_p(pDst, vqdmulhq(vecA, vecB), p0);
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** }
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** }
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** #else
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** void arm_mult_q31(
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** const q31_t * pSrcA,
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** const q31_t * pSrcB,
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** q31_t * pDst,
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** uint32_t blockSize)
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** {
1385 .loc 19 106 0
1386 .cfi_startproc
1387 @ args = 0, pretend = 0, frame = 0
1388 @ frame_needed = 0, uses_anonymous_args = 0
1389 @ link register save eliminated.
1390 .LVL165:
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** uint32_t blkCnt; /* Loop counter */
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** q31_t out; /* Temporary output variable */
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** #if defined (ARM_MATH_LOOPUNROLL)
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** blkCnt = blockSize >> 2U;
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** while (blkCnt > 0U)
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** {
ARM GAS /tmp/ccnDQoMC.s page 117
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /* C = A * B */
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /* Multiply inputs and store result in destination buffer. */
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** out = __SSAT(out, 31);
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** *pDst++ = out << 1U;
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** out = __SSAT(out, 31);
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** *pDst++ = out << 1U;
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** out = __SSAT(out, 31);
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** *pDst++ = out << 1U;
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** out = __SSAT(out, 31);
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** *pDst++ = out << 1U;
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /* Decrement loop counter */
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** blkCnt--;
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** }
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /* Loop unrolling: Compute remaining outputs */
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** blkCnt = blockSize % 0x4U;
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** #else
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /* Initialize blkCnt with number of samples */
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** blkCnt = blockSize;
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** while (blkCnt > 0U)
1391 .loc 19 150 0
1392 0000 83B1 cbz r3, .L213
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** uint32_t blkCnt; /* Loop counter */
1393 .loc 19 106 0
1394 0002 30B4 push {r4, r5}
1395 .LCFI32:
1396 .cfi_def_cfa_offset 8
1397 .cfi_offset 4, -8
1398 .cfi_offset 5, -4
1399 .LVL166:
1400 .L207:
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** {
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /* C = A * B */
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /* Multiply inputs and store result in destination buffer. */
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
1401 .loc 19 155 0
1402 0004 50F8044B ldr r4, [r0], #4
1403 .LVL167:
1404 0008 51F8045B ldr r5, [r1], #4
1405 .LVL168:
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** {
1406 .loc 19 150 0
ARM GAS /tmp/ccnDQoMC.s page 118
1407 000c 013B subs r3, r3, #1
1408 .LVL169:
1409 .loc 19 155 0
1410 000e 84FB0545 smull r4, r5, r4, r5
1411 .LBB46:
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** out = __SSAT(out, 31);
1412 .loc 19 156 0
1413 .syntax unified
1414 @ 156 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c" 1
1415 0012 05F31E04 ssat r4, #31, r5
1416 @ 0 "" 2
1417 .LVL170:
1418 .thumb
1419 .syntax unified
1420 .LBE46:
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** *pDst++ = out << 1U;
1421 .loc 19 157 0
1422 0016 4FEA4404 lsl r4, r4, #1
1423 .LVL171:
1424 001a 42F8044B str r4, [r2], #4
1425 .LVL172:
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** {
1426 .loc 19 150 0
1427 001e F1D1 bne .L207
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** /* Decrement loop counter */
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** blkCnt--;
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** }
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c ****
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c **** }
1428 .loc 19 163 0
1429 0020 30BC pop {r4, r5}
1430 .LCFI33:
1431 .cfi_restore 5
1432 .cfi_restore 4
1433 .cfi_def_cfa_offset 0
1434 0022 7047 bx lr
1435 .LVL173:
1436 .L213:
1437 0024 7047 bx lr
1438 .cfi_endproc
1439 .LFE165:
1441 0026 00BF .section .text.arm_mult_q7,"ax",%progbits
1442 .align 1
1443 .p2align 2,,3
1444 .global arm_mult_q7
1445 .syntax unified
1446 .thumb
1447 .thumb_func
1448 .fpu fpv4-sp-d16
1450 arm_mult_q7:
1451 .LFB166:
1452 .file 20 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * Title: arm_mult_q7.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * Description: Q7 vector multiplication
ARM GAS /tmp/ccnDQoMC.s page 119
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** @addtogroup BasicMult
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** @brief Q7 vector multiplication
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** @param[in] pSrcA points to the first input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** @param[in] pSrcB points to the second input vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** @param[out] pDst points to the output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** The function uses saturating arithmetic.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** */
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** #if defined(ARM_MATH_MVEI)
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** #include "arm_helium_utils.h"
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** void arm_mult_q7(
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** const q7_t * pSrcA,
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** const q7_t * pSrcB,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** q7_t * pDst,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** uint32_t blockSize)
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** {
ARM GAS /tmp/ccnDQoMC.s page 120
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** uint32_t blkCnt; /* loop counters */
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** q7x16_t vecA, vecB;
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /* Compute 16 outputs at a time */
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** blkCnt = blockSize >> 4;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** while (blkCnt > 0U)
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** {
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /*
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * C = A * B
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * Multiply the inputs and then store the results in the destination buffer.
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** */
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** vecA = vld1q(pSrcA);
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** vecB = vld1q(pSrcB);
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** vst1q(pDst, vqdmulhq(vecA, vecB));
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /*
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * Decrement the blockSize loop counter
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** */
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** blkCnt--;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /*
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * advance vector source and destination pointers
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** */
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** pSrcA += 16;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** pSrcB += 16;
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** pDst += 16;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** }
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /*
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** * tail
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** */
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** blkCnt = blockSize & 0xF;
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** if (blkCnt > 0U)
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** {
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** mve_pred16_t p0 = vctp8q(blkCnt);
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** vecA = vld1q(pSrcA);
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** vecB = vld1q(pSrcB);
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** vstrbq_p(pDst, vqdmulhq(vecA, vecB), p0);
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** }
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** }
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** #else
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** void arm_mult_q7(
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** const q7_t * pSrcA,
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** const q7_t * pSrcB,
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** q7_t * pDst,
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** uint32_t blockSize)
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** {
1453 .loc 20 106 0
1454 .cfi_startproc
1455 @ args = 0, pretend = 0, frame = 0
1456 @ frame_needed = 0, uses_anonymous_args = 0
1457 @ link register save eliminated.
1458 .LVL174:
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** uint32_t blkCnt; /* Loop counter */
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** #if defined (ARM_MATH_LOOPUNROLL)
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** #if defined (ARM_MATH_DSP)
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** q7_t out1, out2, out3, out4; /* Temporary output variables */
ARM GAS /tmp/ccnDQoMC.s page 121
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** #endif
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** blkCnt = blockSize >> 2U;
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** while (blkCnt > 0U)
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** {
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /* C = A * B */
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** #if defined (ARM_MATH_DSP)
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /* Multiply inputs and store results in temporary variables */
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /* Pack and store result in destination buffer (in single write) */
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** #else
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** #endif
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /* Decrement loop counter */
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** blkCnt--;
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** }
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /* Loop unrolling: Compute remaining outputs */
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** blkCnt = blockSize % 0x4U;
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** #else
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /* Initialize blkCnt with number of samples */
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** blkCnt = blockSize;
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** while (blkCnt > 0U)
1459 .loc 20 152 0
1460 0000 8BB1 cbz r3, .L223
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** uint32_t blkCnt; /* Loop counter */
1461 .loc 20 106 0
1462 0002 30B4 push {r4, r5}
1463 .LCFI34:
1464 .cfi_def_cfa_offset 8
1465 .cfi_offset 4, -8
1466 .cfi_offset 5, -4
1467 0004 0344 add r3, r3, r0
1468 .LVL175:
1469 .L217:
1470 .LBB47:
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** {
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /* C = A * B */
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /* Multiply input and store result in destination buffer. */
ARM GAS /tmp/ccnDQoMC.s page 122
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
1471 .loc 20 157 0
1472 0006 10F9014B ldrsb r4, [r0], #1
1473 .LVL176:
1474 000a 11F9015B ldrsb r5, [r1], #1
1475 .LVL177:
1476 .LBE47:
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** {
1477 .loc 20 152 0
1478 000e 9842 cmp r0, r3
1479 .LBB48:
1480 .loc 20 157 0
1481 0010 14FB05F4 smulbb r4, r4, r5
1482 0014 4FEAE414 asr r4, r4, #7
1483 .syntax unified
1484 @ 157 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c" 1
1485 0018 04F30704 ssat r4, #8, r4
1486 @ 0 "" 2
1487 .LVL178:
1488 .thumb
1489 .syntax unified
1490 .LBE48:
1491 001c 02F8014B strb r4, [r2], #1
1492 .LVL179:
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** {
1493 .loc 20 152 0
1494 0020 F1D1 bne .L217
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** /* Decrement loop counter */
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** blkCnt--;
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** }
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c ****
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c **** }
1495 .loc 20 163 0
1496 0022 30BC pop {r4, r5}
1497 .LCFI35:
1498 .cfi_restore 5
1499 .cfi_restore 4
1500 .cfi_def_cfa_offset 0
1501 .LVL180:
1502 0024 7047 bx lr
1503 .LVL181:
1504 .L223:
1505 0026 7047 bx lr
1506 .cfi_endproc
1507 .LFE166:
1509 .section .text.arm_negate_f32,"ax",%progbits
1510 .align 1
1511 .p2align 2,,3
1512 .global arm_negate_f32
1513 .syntax unified
1514 .thumb
1515 .thumb_func
1516 .fpu fpv4-sp-d16
1518 arm_negate_f32:
1519 .LFB167:
1520 .file 21 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c"
ARM GAS /tmp/ccnDQoMC.s page 123
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * Title: arm_negate_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * Description: Negates floating-point vectors
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** @defgroup BasicNegate Vector Negate
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** Negates the elements of a vector.
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** <pre>
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** pDst[n] = -pSrc[n], 0 <= n < blockSize.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** </pre>
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** The functions support in-place computation allowing the source and
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** destination pointers to reference the same memory buffer.
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** There are separate functions for floating-point, Q7, Q15, and Q31 data types.
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** */
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /**
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** @addtogroup BasicNegate
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** @{
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** */
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /**
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** @brief Negates the elements of a floating-point vector.
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** @param[in] pSrc points to input vector.
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** @param[out] pDst points to output vector.
ARM GAS /tmp/ccnDQoMC.s page 124
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** @param[in] blockSize number of samples in each vector.
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** @return none
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** */
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** #include "arm_helium_utils.h"
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** void arm_negate_f32(
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** const float32_t * pSrc,
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** float32_t * pDst,
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** uint32_t blockSize)
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** {
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** uint32_t blkCnt; /* Loop counter */
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** f32x4_t vec1;
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** f32x4_t res;
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Compute 4 outputs at a time */
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** blkCnt = blockSize >> 2U;
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** while (blkCnt > 0U)
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** {
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* C = |A| */
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Calculate absolute values and then store the results in the destination buffer. */
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** vec1 = vld1q(pSrc);
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** res = vnegq(vec1);
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** vst1q(pDst, res);
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Increment pointers */
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** pSrc += 4;
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** pDst += 4;
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Decrement the loop counter */
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** blkCnt--;
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** }
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Tail */
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** blkCnt = blockSize & 0x3;
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** if (blkCnt > 0U)
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** {
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* C = |A| */
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** vec1 = vld1q((float32_t const *) pSrc);
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** vstrwq_p(pDst, vnegq(vec1), p0);
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** }
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** }
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** #else
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** void arm_negate_f32(
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** const float32_t * pSrc,
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** float32_t * pDst,
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** uint32_t blockSize)
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** {
1521 .loc 21 112 0
1522 .cfi_startproc
ARM GAS /tmp/ccnDQoMC.s page 125
1523 @ args = 0, pretend = 0, frame = 0
1524 @ frame_needed = 0, uses_anonymous_args = 0
1525 @ link register save eliminated.
1526 .LVL182:
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** uint32_t blkCnt; /* Loop counter */
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** #if defined(ARM_MATH_NEON_EXPERIMENTAL) && !defined(ARM_MATH_AUTOVECTORIZE)
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** f32x4_t vec1;
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** f32x4_t res;
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Compute 4 outputs at a time */
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** blkCnt = blockSize >> 2U;
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** while (blkCnt > 0U)
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** {
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* C = -A */
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Negate and then store the results in the destination buffer. */
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** vec1 = vld1q_f32(pSrc);
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** res = vnegq_f32(vec1);
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** vst1q_f32(pDst, res);
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Increment pointers */
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** pSrc += 4;
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** pDst += 4;
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Decrement the loop counter */
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** blkCnt--;
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** }
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Tail */
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** blkCnt = blockSize & 0x3;
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** #else
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** blkCnt = blockSize >> 2U;
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** while (blkCnt > 0U)
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** {
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* C = -A */
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Negate and store result in destination buffer. */
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** *pDst++ = -*pSrc++;
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** *pDst++ = -*pSrc++;
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** *pDst++ = -*pSrc++;
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** *pDst++ = -*pSrc++;
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Decrement loop counter */
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** blkCnt--;
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** }
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Loop unrolling: Compute remaining outputs */
ARM GAS /tmp/ccnDQoMC.s page 126
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** blkCnt = blockSize % 0x4U;
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** #else
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Initialize blkCnt with number of samples */
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** blkCnt = blockSize;
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** #endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** while (blkCnt > 0U)
1527 .loc 21 176 0
1528 0000 3AB1 cbz r2, .L226
1529 .LVL183:
1530 .L228:
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** {
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* C = -A */
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Negate and store result in destination buffer. */
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** *pDst++ = -*pSrc++;
1531 .loc 21 181 0
1532 0002 F0EC017A vldmia.32 r0!, {s15}
1533 .LVL184:
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** {
1534 .loc 21 176 0
1535 0006 013A subs r2, r2, #1
1536 .LVL185:
1537 .loc 21 181 0
1538 0008 F1EE677A vneg.f32 s15, s15
1539 000c E1EC017A vstmia.32 r1!, {s15}
1540 .LVL186:
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** {
1541 .loc 21 176 0
1542 0010 F7D1 bne .L228
1543 .L226:
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** /* Decrement loop counter */
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** blkCnt--;
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** }
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c ****
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c **** }
1544 .loc 21 187 0
1545 0012 7047 bx lr
1546 .cfi_endproc
1547 .LFE167:
1549 .section .text.arm_negate_q15,"ax",%progbits
1550 .align 1
1551 .p2align 2,,3
1552 .global arm_negate_q15
1553 .syntax unified
1554 .thumb
1555 .thumb_func
1556 .fpu fpv4-sp-d16
1558 arm_negate_q15:
1559 .LFB168:
1560 .file 22 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /* ----------------------------------------------------------------------
ARM GAS /tmp/ccnDQoMC.s page 127
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * Title: arm_negate_q15.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * Description: Negates Q15 vectors
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** @addtogroup BasicNegate
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** @brief Negates the elements of a Q15 vector.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** @param[in] pSrc points to the input vector.
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** @param[out] pDst points to the output vector.
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** @param[in] blockSize number of samples in each vector.
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** @return none
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** @par Conditions for optimum performance
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** Input and output buffers should be aligned by 32-bit
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** @par Scaling and Overflow Behavior
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** The function uses saturating arithmetic.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** */
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** #if defined(ARM_MATH_MVEI)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** #include "arm_helium_utils.h"
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** void arm_negate_q15(
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** const q15_t * pSrc,
ARM GAS /tmp/ccnDQoMC.s page 128
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** q15_t * pDst,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** uint32_t blockSize)
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** {
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** uint32_t blkCnt; /* loop counters */
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** q15x8_t vecSrc;
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /* Compute 8 outputs at a time */
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** blkCnt = blockSize >> 3;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** while (blkCnt > 0U)
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** {
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /*
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * C = -A
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * Negate and then store the results in the destination buffer.
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** */
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** vecSrc = vld1q(pSrc);
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** vst1q(pDst, vqnegq(vecSrc));
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /*
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * Decrement the blockSize loop counter
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** */
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** blkCnt--;
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /*
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * advance vector source and destination pointers
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** */
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** pSrc += 8;
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** pDst += 8;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** }
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /*
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** * tail
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** */
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** blkCnt = blockSize & 7;
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** if (blkCnt > 0U)
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** {
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt);
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** vecSrc = vld1q(pSrc);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** vstrhq_p(pDst, vqnegq(vecSrc), p0);
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** }
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** }
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** #else
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** void arm_negate_q15(
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** const q15_t * pSrc,
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** q15_t * pDst,
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** uint32_t blockSize)
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** {
1561 .loc 22 102 0
1562 .cfi_startproc
1563 @ args = 0, pretend = 0, frame = 0
1564 @ frame_needed = 0, uses_anonymous_args = 0
1565 @ link register save eliminated.
1566 .LVL187:
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** uint32_t blkCnt; /* Loop counter */
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** q15_t in; /* Temporary input variable */
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** #if defined (ARM_MATH_LOOPUNROLL)
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** #if defined (ARM_MATH_DSP)
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** q31_t in1; /* Temporary input variables */
ARM GAS /tmp/ccnDQoMC.s page 129
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** #endif
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** blkCnt = blockSize >> 2U;
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** while (blkCnt > 0U)
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** {
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /* C = -A */
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** #if defined (ARM_MATH_DSP)
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /* Negate and store result in destination buffer (2 samples at a time). */
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** in1 = read_q15x2_ia ((q15_t **) &pSrc);
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** write_q15x2_ia (&pDst, __QSUB16(0, in1));
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** in1 = read_q15x2_ia ((q15_t **) &pSrc);
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** write_q15x2_ia (&pDst, __QSUB16(0, in1));
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** #else
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** in = *pSrc++;
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** in = *pSrc++;
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** in = *pSrc++;
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** in = *pSrc++;
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** #endif
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /* Decrement loop counter */
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** blkCnt--;
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** }
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /* Loop unrolling: Compute remaining outputs */
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** blkCnt = blockSize % 0x4U;
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** #else
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /* Initialize blkCnt with number of samples */
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** blkCnt = blockSize;
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** while (blkCnt > 0U)
1567 .loc 22 154 0
1568 0000 AAB1 cbz r2, .L240
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** uint32_t blkCnt; /* Loop counter */
1569 .loc 22 102 0
1570 0002 30B4 push {r4, r5}
1571 .LCFI36:
1572 .cfi_def_cfa_offset 8
1573 .cfi_offset 4, -8
1574 .cfi_offset 5, -4
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** {
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /* C = -A */
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
ARM GAS /tmp/ccnDQoMC.s page 130
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /* Negate and store result in destination buffer. */
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** in = *pSrc++;
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
1575 .loc 22 160 0
1576 0004 47F6FF75 movw r5, #32767
1577 .LVL188:
1578 .L234:
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
1579 .loc 22 159 0
1580 0008 30F9023B ldrsh r3, [r0], #2
1581 .LVL189:
1582 .loc 22 160 0
1583 000c 13F5004F cmn r3, #32768
1584 0010 C3F10004 rsb r4, r3, #0
1585 0014 05D0 beq .L236
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** {
1586 .loc 22 154 0
1587 0016 013A subs r2, r2, #1
1588 .LVL190:
1589 .loc 22 160 0
1590 0018 21F8024B strh r4, [r1], #2 @ movhi
1591 .LVL191:
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** {
1592 .loc 22 154 0
1593 001c F4D1 bne .L234
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** /* Decrement loop counter */
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** blkCnt--;
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** }
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** }
1594 .loc 22 166 0
1595 001e 30BC pop {r4, r5}
1596 .LCFI37:
1597 .cfi_remember_state
1598 .cfi_restore 5
1599 .cfi_restore 4
1600 .cfi_def_cfa_offset 0
1601 0020 7047 bx lr
1602 .LVL192:
1603 .L236:
1604 .LCFI38:
1605 .cfi_restore_state
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** {
1606 .loc 22 154 0
1607 0022 013A subs r2, r2, #1
1608 .LVL193:
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c ****
1609 .loc 22 160 0
1610 0024 21F8025B strh r5, [r1], #2 @ movhi
1611 .LVL194:
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c **** {
1612 .loc 22 154 0
1613 0028 EED1 bne .L234
1614 .loc 22 166 0
1615 002a 30BC pop {r4, r5}
1616 .LCFI39:
ARM GAS /tmp/ccnDQoMC.s page 131
1617 .cfi_restore 5
1618 .cfi_restore 4
1619 .cfi_def_cfa_offset 0
1620 002c 7047 bx lr
1621 .LVL195:
1622 .L240:
1623 002e 7047 bx lr
1624 .cfi_endproc
1625 .LFE168:
1627 .section .text.arm_negate_q31,"ax",%progbits
1628 .align 1
1629 .p2align 2,,3
1630 .global arm_negate_q31
1631 .syntax unified
1632 .thumb
1633 .thumb_func
1634 .fpu fpv4-sp-d16
1636 arm_negate_q31:
1637 .LFB169:
1638 .file 23 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * Title: arm_negate_q31.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * Description: Negates Q31 vectors
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** @addtogroup BasicNegate
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** @{
ARM GAS /tmp/ccnDQoMC.s page 132
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** @brief Negates the elements of a Q31 vector.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** @param[in] pSrc points to the input vector.
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** @param[out] pDst points to the output vector.
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** @param[in] blockSize number of samples in each vector.
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** @return none
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** @par Scaling and Overflow Behavior
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** The function uses saturating arithmetic.
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive val
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** */
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #if defined(ARM_MATH_MVEI)
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #include "arm_helium_utils.h"
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** void arm_negate_q31(
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** const q31_t * pSrc,
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** q31_t * pDst,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** uint32_t blockSize)
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** {
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** uint32_t blkCnt; /* loop counters */
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** q31x4_t vecSrc;
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /* Compute 4 outputs at a time */
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** blkCnt = blockSize >> 2;
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** while (blkCnt > 0U)
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** {
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /*
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * C = -A
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * Negate and then store the results in the destination buffer.
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** */
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** vecSrc = vld1q(pSrc);
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** vst1q(pDst, vqnegq(vecSrc));
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /*
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * Decrement the blockSize loop counter
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** */
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** blkCnt--;
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /*
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * advance vector source and destination pointers
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** */
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** pSrc += 4;
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** pDst += 4;
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** }
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /*
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** * tail
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** */
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** blkCnt = blockSize & 3;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** if (blkCnt > 0U)
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** {
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt);
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** vecSrc = vld1q(pSrc);
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** vstrwq_p(pDst, vqnegq(vecSrc), p0);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** }
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** }
ARM GAS /tmp/ccnDQoMC.s page 133
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #else
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** void arm_negate_q31(
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** const q31_t * pSrc,
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** q31_t * pDst,
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** uint32_t blockSize)
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** {
1639 .loc 23 101 0
1640 .cfi_startproc
1641 @ args = 0, pretend = 0, frame = 0
1642 @ frame_needed = 0, uses_anonymous_args = 0
1643 @ link register save eliminated.
1644 .LVL196:
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** uint32_t blkCnt; /* Loop counter */
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** q31_t in; /* Temporary input variable */
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #if defined (ARM_MATH_LOOPUNROLL)
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** blkCnt = blockSize >> 2U;
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** while (blkCnt > 0U)
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** {
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /* C = -A */
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /* Negate and store result in destination buffer. */
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** in = *pSrc++;
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #if defined (ARM_MATH_DSP)
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *pDst++ = __QSUB(0, in);
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #else
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #endif
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** in = *pSrc++;
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #if defined (ARM_MATH_DSP)
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *pDst++ = __QSUB(0, in);
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #else
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #endif
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** in = *pSrc++;
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #if defined (ARM_MATH_DSP)
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *pDst++ = __QSUB(0, in);
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #else
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #endif
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** in = *pSrc++;
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #if defined (ARM_MATH_DSP)
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *pDst++ = __QSUB(0, in);
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #else
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #endif
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /* Decrement loop counter */
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** blkCnt--;
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** }
ARM GAS /tmp/ccnDQoMC.s page 134
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /* Loop unrolling: Compute remaining outputs */
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** blkCnt = blockSize % 0x4U;
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #else
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /* Initialize blkCnt with number of samples */
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** blkCnt = blockSize;
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** while (blkCnt > 0U)
1645 .loc 23 157 0
1646 0000 62B1 cbz r2, .L251
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** uint32_t blkCnt; /* Loop counter */
1647 .loc 23 101 0
1648 0002 10B4 push {r4}
1649 .LCFI40:
1650 .cfi_def_cfa_offset 4
1651 .cfi_offset 4, -4
1652 .LBB49:
1653 .LBB50:
1654 .loc 3 2125 0
1655 0004 0024 movs r4, #0
1656 .LVL197:
1657 .L245:
1658 0006 50F8043B ldr r3, [r0], #4
1659 .LVL198:
1660 .syntax unified
1661 @ 2125 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1662 000a 83FAA4F3 qsub r3, r4, r3
1663 @ 0 "" 2
1664 .LVL199:
1665 .thumb
1666 .syntax unified
1667 .LBE50:
1668 .LBE49:
1669 .loc 23 157 0
1670 000e 013A subs r2, r2, #1
1671 .LVL200:
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** {
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /* C = -A */
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /* Negate and store result in destination buffer. */
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** in = *pSrc++;
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #if defined (ARM_MATH_DSP)
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *pDst++ = __QSUB(0, in);
1672 .loc 23 164 0
1673 0010 41F8043B str r3, [r1], #4
1674 .LVL201:
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** {
1675 .loc 23 157 0
1676 0014 F7D1 bne .L245
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #else
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** #endif
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
ARM GAS /tmp/ccnDQoMC.s page 135
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** /* Decrement loop counter */
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** blkCnt--;
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** }
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c ****
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c **** }
1677 .loc 23 173 0
1678 0016 5DF8044B ldr r4, [sp], #4
1679 .LCFI41:
1680 .cfi_restore 4
1681 .cfi_def_cfa_offset 0
1682 001a 7047 bx lr
1683 .LVL202:
1684 .L251:
1685 001c 7047 bx lr
1686 .cfi_endproc
1687 .LFE169:
1689 001e 00BF .section .text.arm_negate_q7,"ax",%progbits
1690 .align 1
1691 .p2align 2,,3
1692 .global arm_negate_q7
1693 .syntax unified
1694 .thumb
1695 .thumb_func
1696 .fpu fpv4-sp-d16
1698 arm_negate_q7:
1699 .LFB170:
1700 .file 24 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * Title: arm_negate_q7.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * Description: Negates Q7 vectors
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
ARM GAS /tmp/ccnDQoMC.s page 136
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** @addtogroup BasicNegate
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** @brief Negates the elements of a Q7 vector.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** @param[in] pSrc points to the input vector.
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** @param[out] pDst points to the output vector.
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** @param[in] blockSize number of samples in each vector.
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** @return none
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** @par Scaling and Overflow Behavior
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** The function uses saturating arithmetic.
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** The Q7 value -1 (0x80) is saturated to the maximum allowable positive value 0x7F
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** */
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #if defined(ARM_MATH_MVEI)
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #include "arm_helium_utils.h"
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** void arm_negate_q7(
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** const q7_t * pSrc,
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** q7_t * pDst,
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** uint32_t blockSize)
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** {
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** uint32_t blkCnt; /* loop counters */
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** q7x16_t vecSrc;
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /* Compute 16 outputs at a time */
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** blkCnt = blockSize >> 4;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** while (blkCnt > 0U)
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** {
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /*
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * C = -A
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * Negate and then store the results in the destination buffer.
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** */
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** vecSrc = vld1q(pSrc);
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** vst1q(pDst, vqnegq(vecSrc));
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /*
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * Decrement the blockSize loop counter
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** */
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** blkCnt--;
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /*
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * advance vector source and destination pointers
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** */
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** pSrc += 16;
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** pDst += 16;
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** }
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /*
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** * tail
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** */
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** blkCnt = blockSize & 0xF;
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** if (blkCnt > 0U)
ARM GAS /tmp/ccnDQoMC.s page 137
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** {
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** mve_pred16_t p0 = vctp8q(blkCnt);
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** vecSrc = vld1q(pSrc);
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** vstrbq_p(pDst, vqnegq(vecSrc), p0);
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** }
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** }
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #else
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** void arm_negate_q7(
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** const q7_t * pSrc,
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** q7_t * pDst,
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** uint32_t blockSize)
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** {
1701 .loc 24 100 0
1702 .cfi_startproc
1703 @ args = 0, pretend = 0, frame = 0
1704 @ frame_needed = 0, uses_anonymous_args = 0
1705 @ link register save eliminated.
1706 .LVL203:
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** uint32_t blkCnt; /* Loop counter */
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** q7_t in; /* Temporary input variable */
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #if defined (ARM_MATH_LOOPUNROLL)
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #if defined (ARM_MATH_DSP)
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** q31_t in1; /* Temporary input variable */
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #endif
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** blkCnt = blockSize >> 2U;
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** while (blkCnt > 0U)
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** {
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /* C = -A */
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #if defined (ARM_MATH_DSP)
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /* Negate and store result in destination buffer (4 samples at a time). */
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** in1 = read_q7x4_ia ((q7_t **) &pSrc);
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** write_q7x4_ia (&pDst, __QSUB8(0, in1));
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #else
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** in = *pSrc++;
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** in = *pSrc++;
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** in = *pSrc++;
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** in = *pSrc++;
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #endif
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /* Decrement loop counter */
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** blkCnt--;
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** }
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
ARM GAS /tmp/ccnDQoMC.s page 138
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /* Loop unrolling: Compute remaining outputs */
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** blkCnt = blockSize % 0x4U;
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #else
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /* Initialize blkCnt with number of samples */
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** blkCnt = blockSize;
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** while (blkCnt > 0U)
1707 .loc 24 149 0
1708 0000 6AB1 cbz r2, .L262
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** uint32_t blkCnt; /* Loop counter */
1709 .loc 24 100 0
1710 0002 10B4 push {r4}
1711 .LCFI42:
1712 .cfi_def_cfa_offset 4
1713 .cfi_offset 4, -4
1714 0004 0244 add r2, r2, r0
1715 .LVL204:
1716 .LBB51:
1717 .LBB52:
1682:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1718 .loc 3 1682 0
1719 0006 0024 movs r4, #0
1720 .LVL205:
1721 .L256:
1722 .LBE52:
1723 .LBE51:
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** {
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /* C = -A */
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /* Negate and store result in destination buffer. */
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** in = *pSrc++;
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #if defined (ARM_MATH_DSP)
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** *pDst++ = (q7_t) __QSUB8(0, in);
1724 .loc 24 157 0
1725 0008 10F9013B ldrsb r3, [r0], #1
1726 .LVL206:
1727 .LBB54:
1728 .LBB53:
1682:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1729 .loc 3 1682 0
1730 .syntax unified
1731 @ 1682 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1732 000c C4FA13F3 qsub8 r3, r4, r3
1733 @ 0 "" 2
1734 .LVL207:
1735 .thumb
1736 .syntax unified
1737 .LBE53:
1738 .LBE54:
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** {
1739 .loc 24 149 0
1740 0010 9042 cmp r0, r2
ARM GAS /tmp/ccnDQoMC.s page 139
1741 .loc 24 157 0
1742 0012 01F8013B strb r3, [r1], #1
1743 .LVL208:
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** {
1744 .loc 24 149 0
1745 0016 F7D1 bne .L256
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #else
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** #endif
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** /* Decrement loop counter */
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** blkCnt--;
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** }
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c ****
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c **** }
1746 .loc 24 166 0
1747 0018 5DF8044B ldr r4, [sp], #4
1748 .LCFI43:
1749 .cfi_restore 4
1750 .cfi_def_cfa_offset 0
1751 001c 7047 bx lr
1752 .LVL209:
1753 .L262:
1754 001e 7047 bx lr
1755 .cfi_endproc
1756 .LFE170:
1758 .section .text.arm_not_u16,"ax",%progbits
1759 .align 1
1760 .p2align 2,,3
1761 .global arm_not_u16
1762 .syntax unified
1763 .thumb
1764 .thumb_func
1765 .fpu fpv4-sp-d16
1767 arm_not_u16:
1768 .LFB171:
1769 .file 25 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * Title: arm_not_u16.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * Description: uint16_t bitwise NOT
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * $Date: 14 November 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * www.apache.org/licenses/LICENSE-2.0
ARM GAS /tmp/ccnDQoMC.s page 140
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** @defgroup Not Vector bitwise NOT
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** Compute the logical bitwise NOT.
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** There are separate functions for uint32_t, uint16_t, and uint8_t data types.
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** */
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** /**
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** @addtogroup Not
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** @{
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** */
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** /**
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** @brief Compute the logical bitwise NOT of a fixed-point vector.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** @param[in] pSrc points to input vector
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** @param[out] pDst points to output vector
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** @param[in] blockSize number of samples in each vector
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** @return none
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** */
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** void arm_not_u16(
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** const uint16_t * pSrc,
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** uint16_t * pDst,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** uint32_t blockSize)
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** {
1770 .loc 25 60 0
1771 .cfi_startproc
1772 @ args = 0, pretend = 0, frame = 0
1773 @ frame_needed = 0, uses_anonymous_args = 0
1774 @ link register save eliminated.
1775 .LVL210:
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** uint32_t blkCnt; /* Loop counter */
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** q15x8_t vecSrc;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** /* Compute 8 outputs at a time */
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** blkCnt = blockSize >> 3;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** while (blkCnt > 0U)
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** {
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** vecSrc = vld1q(pSrc);
ARM GAS /tmp/ccnDQoMC.s page 141
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** vst1q(pDst, vmvnq_u16(vecSrc) );
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** pSrc += 8;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** pDst += 8;
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** /* Decrement the loop counter */
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** blkCnt--;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** }
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** /* Tail */
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** blkCnt = blockSize & 7;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** if (blkCnt > 0U)
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** {
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** mve_pred16_t p0 = vctp16q(blkCnt);
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** vecSrc = vld1q(pSrc);
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** vstrhq_p(pDst, vmvnq_u16(vecSrc), p0);
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** }
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** #else
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** uint16x8_t inV;
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** /* Compute 8 outputs at a time */
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** blkCnt = blockSize >> 3U;
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** while (blkCnt > 0U)
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** {
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** inV = vld1q_u16(pSrc);
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** vst1q_u16(pDst, vmvnq_u16(inV) );
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** pSrc += 8;
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** pDst += 8;
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** /* Decrement the loop counter */
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** blkCnt--;
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** }
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** /* Tail */
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** blkCnt = blockSize & 7;
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** #else
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** /* Initialize blkCnt with number of samples */
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** blkCnt = blockSize;
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** #endif
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** while (blkCnt > 0U)
1776 .loc 25 118 0
1777 0000 002A cmp r2, #0
1778 0002 4DD0 beq .L287
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** uint32_t blkCnt; /* Loop counter */
1779 .loc 25 60 0
1780 0004 F0B4 push {r4, r5, r6, r7}
1781 .LCFI44:
1782 .cfi_def_cfa_offset 16
1783 .cfi_offset 4, -16
1784 .cfi_offset 5, -12
ARM GAS /tmp/ccnDQoMC.s page 142
1785 .cfi_offset 6, -8
1786 .cfi_offset 7, -4
1787 0006 0B1D adds r3, r1, #4
1788 0008 041D adds r4, r0, #4
1789 000a A142 cmp r1, r4
1790 000c 38BF it cc
1791 000e 9842 cmpcc r0, r3
1792 0010 31D3 bcc .L279
1793 0012 092A cmp r2, #9
1794 0014 2FD9 bls .L279
1795 0016 C0F34003 ubfx r3, r0, #1, #1
1796 001a 551E subs r5, r2, #1
1797 001c 002B cmp r3, #0
1798 001e 3BD0 beq .L272
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** {
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** *pDst++ = ~(*pSrc++);
1799 .loc 25 120 0
1800 0020 0488 ldrh r4, [r0]
1801 0022 E443 mvns r4, r4
1802 0024 0C80 strh r4, [r1] @ movhi
1803 0026 871C adds r7, r0, #2
1804 .LVL211:
1805 0028 8E1C adds r6, r1, #2
1806 .LVL212:
1807 .L268:
1808 002a D21A subs r2, r2, r3
1809 .LVL213:
1810 002c 5B00 lsls r3, r3, #1
1811 002e 1844 add r0, r0, r3
1812 0030 1944 add r1, r1, r3
1813 0032 4FEA520C lsr ip, r2, #1
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** {
1814 .loc 25 118 0
1815 0036 0024 movs r4, #0
1816 .LVL214:
1817 .L269:
1818 .loc 25 120 0
1819 0038 50F8043B ldr r3, [r0], #4
1820 003c 0134 adds r4, r4, #1
1821 003e DB43 mvns r3, r3
1822 0040 6445 cmp r4, ip
1823 0042 41F8043B str r3, [r1], #4 @ unaligned
1824 0046 F7D3 bcc .L269
1825 0048 22F00103 bic r3, r2, #1
1826 004c 5900 lsls r1, r3, #1
1827 004e 9A42 cmp r2, r3
1828 0050 07EB0100 add r0, r7, r1
1829 0054 A5EB0305 sub r5, r5, r3
1830 0058 3144 add r1, r1, r6
1831 005a 0AD0 beq .L265
1832 .LVL215:
1833 005c 37F81320 ldrh r2, [r7, r3, lsl #1]
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** {
1834 .loc 25 118 0
1835 0060 012D cmp r5, #1
1836 .loc 25 120 0
1837 0062 6FEA0202 mvn r2, r2
ARM GAS /tmp/ccnDQoMC.s page 143
1838 0066 26F81320 strh r2, [r6, r3, lsl #1] @ movhi
1839 .LVL216:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** {
1840 .loc 25 118 0
1841 006a 02D0 beq .L265
1842 .LVL217:
1843 .loc 25 120 0
1844 006c 4388 ldrh r3, [r0, #2]
1845 006e DB43 mvns r3, r3
1846 0070 4B80 strh r3, [r1, #2] @ movhi
1847 .LVL218:
1848 .L265:
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** /* Decrement the loop counter */
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** blkCnt--;
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** }
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** #endif /* if defined(ARM_MATH_MVEI) */
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** }
1849 .loc 25 126 0
1850 0072 F0BC pop {r4, r5, r6, r7}
1851 .LCFI45:
1852 .cfi_remember_state
1853 .cfi_restore 7
1854 .cfi_restore 6
1855 .cfi_restore 5
1856 .cfi_restore 4
1857 .cfi_def_cfa_offset 0
1858 0074 7047 bx lr
1859 .LVL219:
1860 .L279:
1861 .LCFI46:
1862 .cfi_restore_state
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
1863 .loc 25 120 0
1864 0076 30F8023B ldrh r3, [r0], #2
1865 .LVL220:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** {
1866 .loc 25 118 0
1867 007a 013A subs r2, r2, #1
1868 .LVL221:
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
1869 .loc 25 120 0
1870 007c 6FEA0303 mvn r3, r3
1871 0080 21F8023B strh r3, [r1], #2 @ movhi
1872 .LVL222:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** {
1873 .loc 25 118 0
1874 0084 F5D0 beq .L265
1875 .LVL223:
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
1876 .loc 25 120 0
1877 0086 30F8023B ldrh r3, [r0], #2
1878 .LVL224:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** {
1879 .loc 25 118 0
1880 008a 013A subs r2, r2, #1
1881 .LVL225:
ARM GAS /tmp/ccnDQoMC.s page 144
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c ****
1882 .loc 25 120 0
1883 008c 6FEA0303 mvn r3, r3
1884 0090 21F8023B strh r3, [r1], #2 @ movhi
1885 .LVL226:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c **** {
1886 .loc 25 118 0
1887 0094 EFD1 bne .L279
1888 0096 ECE7 b .L265
1889 .LVL227:
1890 .L272:
1891 0098 1546 mov r5, r2
1892 009a 0E46 mov r6, r1
1893 009c 0746 mov r7, r0
1894 009e C4E7 b .L268
1895 .L287:
1896 .LCFI47:
1897 .cfi_def_cfa_offset 0
1898 .cfi_restore 4
1899 .cfi_restore 5
1900 .cfi_restore 6
1901 .cfi_restore 7
1902 00a0 7047 bx lr
1903 .cfi_endproc
1904 .LFE171:
1906 00a2 00BF .section .text.arm_not_u32,"ax",%progbits
1907 .align 1
1908 .p2align 2,,3
1909 .global arm_not_u32
1910 .syntax unified
1911 .thumb
1912 .thumb_func
1913 .fpu fpv4-sp-d16
1915 arm_not_u32:
1916 .LFB172:
1917 .file 26 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * Title: arm_not_u32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * Description: uint32_t bitwise NOT
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * $Date: 14 November 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** *
ARM GAS /tmp/ccnDQoMC.s page 145
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** @addtogroup Not
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** @brief Compute the logical bitwise NOT of a fixed-point vector.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** @param[in] pSrc points to input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** @param[out] pDst points to output vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** @param[in] blockSize number of samples in each vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** @return none
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** */
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** void arm_not_u32(
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** const uint32_t * pSrc,
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** uint32_t * pDst,
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** uint32_t blockSize)
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** {
1918 .loc 26 52 0
1919 .cfi_startproc
1920 @ args = 0, pretend = 0, frame = 0
1921 @ frame_needed = 0, uses_anonymous_args = 0
1922 @ link register save eliminated.
1923 .LVL228:
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** uint32_t blkCnt; /* Loop counter */
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** q31x4_t vecSrc;
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** /* Compute 8 outputs at a time */
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** blkCnt = blockSize >> 2;
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** while (blkCnt > 0U)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** {
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** vecSrc = vld1q(pSrc);
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** vst1q(pDst, vmvnq_u32(vecSrc) );
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** pSrc += 4;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** pDst += 4;
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** /* Decrement the loop counter */
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** blkCnt--;
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** }
ARM GAS /tmp/ccnDQoMC.s page 146
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** /* Tail */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** blkCnt = blockSize & 3;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** if (blkCnt > 0U)
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** {
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** vecSrc = vld1q(pSrc);
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** vstrwq_p(pDst, vmvnq_u32(vecSrc), p0);
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** }
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** #else
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** uint32x4_t inV;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** /* Compute 4 outputs at a time */
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** blkCnt = blockSize >> 2U;
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** while (blkCnt > 0U)
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** {
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** inV = vld1q_u32(pSrc);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** vst1q_u32(pDst, vmvnq_u32(inV) );
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** pSrc += 4;
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** pDst += 4;
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** /* Decrement the loop counter */
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** blkCnt--;
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** }
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** /* Tail */
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** blkCnt = blockSize & 3;
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** #else
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** /* Initialize blkCnt with number of samples */
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** blkCnt = blockSize;
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** #endif
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** while (blkCnt > 0U)
1924 .loc 26 110 0
1925 0000 3AB1 cbz r2, .L291
1926 .LVL229:
1927 .L293:
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** {
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** *pDst++ = ~(*pSrc++);
1928 .loc 26 112 0
1929 0002 50F8043B ldr r3, [r0], #4
1930 .LVL230:
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** {
1931 .loc 26 110 0
1932 0006 013A subs r2, r2, #1
1933 .LVL231:
1934 .loc 26 112 0
1935 0008 6FEA0303 mvn r3, r3
1936 000c 41F8043B str r3, [r1], #4
1937 .LVL232:
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** {
1938 .loc 26 110 0
ARM GAS /tmp/ccnDQoMC.s page 147
1939 0010 F7D1 bne .L293
1940 .L291:
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c ****
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** /* Decrement the loop counter */
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** blkCnt--;
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** }
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** #endif /* if defined(ARM_MATH_MVEI) */
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c **** }
1941 .loc 26 118 0
1942 0012 7047 bx lr
1943 .cfi_endproc
1944 .LFE172:
1946 .section .text.arm_not_u8,"ax",%progbits
1947 .align 1
1948 .p2align 2,,3
1949 .global arm_not_u8
1950 .syntax unified
1951 .thumb
1952 .thumb_func
1953 .fpu fpv4-sp-d16
1955 arm_not_u8:
1956 .LFB173:
1957 .file 27 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * Title: arm_not_u8.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * Description: uint8_t bitwise NOT
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * $Date: 14 November 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
ARM GAS /tmp/ccnDQoMC.s page 148
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** @addtogroup Not
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** @brief Compute the logical bitwise NOT of a fixed-point vector.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** @param[in] pSrc points to input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** @param[out] pDst points to output vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** @param[in] blockSize number of samples in each vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** @return none
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** */
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** void arm_not_u8(
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** const uint8_t * pSrc,
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** uint8_t * pDst,
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** uint32_t blockSize)
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
1958 .loc 27 52 0
1959 .cfi_startproc
1960 @ args = 0, pretend = 0, frame = 0
1961 @ frame_needed = 0, uses_anonymous_args = 0
1962 @ link register save eliminated.
1963 .LVL233:
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** uint32_t blkCnt; /* Loop counter */
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** q7x16_t vecSrc;
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** /* Compute 16 outputs at a time */
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** blkCnt = blockSize >> 4;
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** while (blkCnt > 0U)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** vecSrc = vld1q(pSrc);
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** vst1q(pDst, vmvnq_u8(vecSrc) );
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** pSrc += 16;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** pDst += 16;
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** /* Decrement the loop counter */
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** blkCnt--;
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** }
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** /* Tail */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** blkCnt = blockSize & 0xF;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** if (blkCnt > 0U)
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** mve_pred16_t p0 = vctp8q(blkCnt);
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** vecSrc = vld1q(pSrc);
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** vstrbq_p(pDst, vmvnq_u8(vecSrc), p0);
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** }
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** #else
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** uint8x16_t inV;
ARM GAS /tmp/ccnDQoMC.s page 149
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** /* Compute 16 outputs at a time */
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** blkCnt = blockSize >> 4U;
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** while (blkCnt > 0U)
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** inV = vld1q_u8(pSrc);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** vst1q_u8(pDst, vmvnq_u8(inV) );
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** pSrc += 16;
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** pDst += 16;
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** /* Decrement the loop counter */
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** blkCnt--;
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** }
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** /* Tail */
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** blkCnt = blockSize & 0xF;
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** #else
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** /* Initialize blkCnt with number of samples */
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** blkCnt = blockSize;
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** #endif
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** while (blkCnt > 0U)
1964 .loc 27 110 0
1965 0000 002A cmp r2, #0
1966 0002 74D0 beq .L338
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** uint32_t blkCnt; /* Loop counter */
1967 .loc 27 52 0
1968 0004 F0B4 push {r4, r5, r6, r7}
1969 .LCFI48:
1970 .cfi_def_cfa_offset 16
1971 .cfi_offset 4, -16
1972 .cfi_offset 5, -12
1973 .cfi_offset 6, -8
1974 .cfi_offset 7, -4
1975 0006 0B1D adds r3, r1, #4
1976 0008 041D adds r4, r0, #4
1977 000a A142 cmp r1, r4
1978 000c 38BF it cc
1979 000e 9842 cmpcc r0, r3
1980 0010 63D3 bcc .L300
1981 0012 082A cmp r2, #8
1982 0014 61D9 bls .L300
1983 0016 4342 negs r3, r0
1984 0018 13F00303 ands r3, r3, #3
1985 001c 02F1FF36 add r6, r2, #-1
1986 0020 57D0 beq .L307
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** *pDst++ = ~(*pSrc++);
1987 .loc 27 112 0
1988 0022 0478 ldrb r4, [r0] @ zero_extendqisi2
1989 0024 012B cmp r3, #1
1990 0026 6FEA0404 mvn r4, r4
1991 002a 0C70 strb r4, [r1]
1992 002c 00F1010C add ip, r0, #1
ARM GAS /tmp/ccnDQoMC.s page 150
1993 .LVL234:
1994 0030 01F10107 add r7, r1, #1
1995 .LVL235:
1996 0034 12D0 beq .L301
1997 .LVL236:
1998 0036 4478 ldrb r4, [r0, #1] @ zero_extendqisi2
1999 0038 032B cmp r3, #3
2000 003a 6FEA0404 mvn r4, r4
2001 003e 4C70 strb r4, [r1, #1]
2002 0040 00F1020C add ip, r0, #2
2003 .LVL237:
2004 0044 01F10207 add r7, r1, #2
2005 .LVL238:
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** /* Decrement the loop counter */
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** blkCnt--;
2006 .loc 27 115 0
2007 0048 A2F10206 sub r6, r2, #2
2008 .LVL239:
2009 004c 06D1 bne .L301
2010 .LVL240:
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
2011 .loc 27 112 0
2012 004e 8478 ldrb r4, [r0, #2] @ zero_extendqisi2
2013 0050 E443 mvns r4, r4
2014 0052 8C70 strb r4, [r1, #2]
2015 0054 00F1030C add ip, r0, #3
2016 .LVL241:
2017 0058 CF1C adds r7, r1, #3
2018 .LVL242:
2019 .loc 27 115 0
2020 005a D61E subs r6, r2, #3
2021 .LVL243:
2022 .L301:
2023 005c D21A subs r2, r2, r3
2024 .LVL244:
2025 005e 1844 add r0, r0, r3
2026 0060 1944 add r1, r1, r3
2027 0062 9508 lsrs r5, r2, #2
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
2028 .loc 27 110 0
2029 0064 0024 movs r4, #0
2030 .L303:
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
2031 .loc 27 112 0
2032 0066 50F8043B ldr r3, [r0], #4
2033 006a 0134 adds r4, r4, #1
2034 006c DB43 mvns r3, r3
2035 006e AC42 cmp r4, r5
2036 0070 41F8043B str r3, [r1], #4 @ unaligned
2037 0074 F7D3 bcc .L303
2038 0076 22F00303 bic r3, r2, #3
2039 007a 9A42 cmp r2, r3
2040 007c A6EB0306 sub r6, r6, r3
2041 0080 0CEB0300 add r0, ip, r3
2042 0084 07EB0301 add r1, r7, r3
2043 0088 21D0 beq .L298
ARM GAS /tmp/ccnDQoMC.s page 151
2044 .LVL245:
2045 008a 1CF80320 ldrb r2, [ip, r3] @ zero_extendqisi2
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
2046 .loc 27 110 0
2047 008e 012E cmp r6, #1
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
2048 .loc 27 112 0
2049 0090 6FEA0202 mvn r2, r2
2050 0094 FA54 strb r2, [r7, r3]
2051 .LVL246:
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
2052 .loc 27 110 0
2053 0096 1AD0 beq .L298
2054 .LVL247:
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
2055 .loc 27 112 0
2056 0098 4378 ldrb r3, [r0, #1] @ zero_extendqisi2
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
2057 .loc 27 110 0
2058 009a 022E cmp r6, #2
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
2059 .loc 27 112 0
2060 009c 6FEA0303 mvn r3, r3
2061 00a0 4B70 strb r3, [r1, #1]
2062 .LVL248:
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
2063 .loc 27 110 0
2064 00a2 14D0 beq .L298
2065 .LVL249:
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
2066 .loc 27 112 0
2067 00a4 8378 ldrb r3, [r0, #2] @ zero_extendqisi2
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
2068 .loc 27 110 0
2069 00a6 032E cmp r6, #3
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
2070 .loc 27 112 0
2071 00a8 6FEA0303 mvn r3, r3
2072 00ac 8B70 strb r3, [r1, #2]
2073 .LVL250:
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
2074 .loc 27 110 0
2075 00ae 0ED0 beq .L298
2076 .LVL251:
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
2077 .loc 27 112 0
2078 00b0 C378 ldrb r3, [r0, #3] @ zero_extendqisi2
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
2079 .loc 27 110 0
2080 00b2 042E cmp r6, #4
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
2081 .loc 27 112 0
2082 00b4 6FEA0303 mvn r3, r3
2083 00b8 CB70 strb r3, [r1, #3]
2084 .LVL252:
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
2085 .loc 27 110 0
ARM GAS /tmp/ccnDQoMC.s page 152
2086 00ba 08D0 beq .L298
2087 .LVL253:
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
2088 .loc 27 112 0
2089 00bc 0379 ldrb r3, [r0, #4] @ zero_extendqisi2
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
2090 .loc 27 110 0
2091 00be 052E cmp r6, #5
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
2092 .loc 27 112 0
2093 00c0 6FEA0303 mvn r3, r3
2094 00c4 0B71 strb r3, [r1, #4]
2095 .LVL254:
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
2096 .loc 27 110 0
2097 00c6 02D0 beq .L298
2098 .LVL255:
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
2099 .loc 27 112 0
2100 00c8 4379 ldrb r3, [r0, #5] @ zero_extendqisi2
2101 00ca DB43 mvns r3, r3
2102 00cc 4B71 strb r3, [r1, #5]
2103 .LVL256:
2104 .L298:
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** }
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** #endif /* if defined(ARM_MATH_MVEI) */
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** }
2105 .loc 27 118 0
2106 00ce F0BC pop {r4, r5, r6, r7}
2107 .LCFI49:
2108 .cfi_remember_state
2109 .cfi_restore 7
2110 .cfi_restore 6
2111 .cfi_restore 5
2112 .cfi_restore 4
2113 .cfi_def_cfa_offset 0
2114 00d0 7047 bx lr
2115 .LVL257:
2116 .L307:
2117 .LCFI50:
2118 .cfi_restore_state
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
2119 .loc 27 110 0
2120 00d2 1646 mov r6, r2
2121 00d4 0F46 mov r7, r1
2122 00d6 8446 mov ip, r0
2123 00d8 C0E7 b .L301
2124 .L300:
2125 00da 0244 add r2, r2, r0
2126 .LVL258:
2127 .L305:
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
2128 .loc 27 112 0
2129 00dc 10F8013B ldrb r3, [r0], #1 @ zero_extendqisi2
2130 .LVL259:
2131 00e0 DB43 mvns r3, r3
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
ARM GAS /tmp/ccnDQoMC.s page 153
2132 .loc 27 110 0
2133 00e2 8242 cmp r2, r0
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c ****
2134 .loc 27 112 0
2135 00e4 01F8013B strb r3, [r1], #1
2136 .LVL260:
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c **** {
2137 .loc 27 110 0
2138 00e8 F8D1 bne .L305
2139 .loc 27 118 0
2140 00ea F0BC pop {r4, r5, r6, r7}
2141 .LCFI51:
2142 .cfi_restore 7
2143 .cfi_restore 6
2144 .cfi_restore 5
2145 .cfi_restore 4
2146 .cfi_def_cfa_offset 0
2147 00ec 7047 bx lr
2148 .LVL261:
2149 .L338:
2150 00ee 7047 bx lr
2151 .cfi_endproc
2152 .LFE173:
2154 .section .text.arm_offset_f32,"ax",%progbits
2155 .align 1
2156 .p2align 2,,3
2157 .global arm_offset_f32
2158 .syntax unified
2159 .thumb
2160 .thumb_func
2161 .fpu fpv4-sp-d16
2163 arm_offset_f32:
2164 .LFB174:
2165 .file 28 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * Title: arm_offset_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * Description: Floating-point vector offset
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
ARM GAS /tmp/ccnDQoMC.s page 154
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** @defgroup BasicOffset Vector Offset
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** Adds a constant offset to each element of a vector.
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** <pre>
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** pDst[n] = pSrc[n] + offset, 0 <= n < blockSize.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** </pre>
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** The functions support in-place computation allowing the source and
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** destination pointers to reference the same memory buffer.
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** There are separate functions for floating-point, Q7, Q15, and Q31 data types.
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** */
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /**
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** @addtogroup BasicOffset
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** @{
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** */
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /**
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** @brief Adds a constant offset to a floating-point vector.
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** @param[in] pSrc points to the input vector
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** @param[in] offset is the offset to be added
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** @param[out] pDst points to the output vector
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** @param[in] blockSize number of samples in each vector
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** @return none
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** */
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** #include "arm_helium_utils.h"
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** void arm_offset_f32(
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** const float32_t * pSrc,
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** float32_t offset,
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** float32_t * pDst,
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** uint32_t blockSize)
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** {
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** uint32_t blkCnt; /* Loop counter */
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** f32x4_t vec1;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** f32x4_t res;
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Compute 4 outputs at a time */
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** blkCnt = blockSize >> 2U;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** while (blkCnt > 0U)
ARM GAS /tmp/ccnDQoMC.s page 155
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** {
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* C = A + offset */
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Add offset and then store the results in the destination buffer. */
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** vec1 = vld1q(pSrc);
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** res = vaddq(vec1,offset);
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** vst1q(pDst, res);
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Increment pointers */
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** pSrc += 4;
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** pDst += 4;
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Decrement the loop counter */
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** blkCnt--;
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** }
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Tail */
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** blkCnt = blockSize & 0x3;
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** if (blkCnt > 0U)
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** {
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** vec1 = vld1q((float32_t const *) pSrc);
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** vstrwq_p(pDst, vaddq(vec1, offset), p0);
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** }
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** }
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** #else
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** void arm_offset_f32(
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** const float32_t * pSrc,
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** float32_t offset,
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** float32_t * pDst,
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** uint32_t blockSize)
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** {
2166 .loc 28 116 0
2167 .cfi_startproc
2168 @ args = 0, pretend = 0, frame = 0
2169 @ frame_needed = 0, uses_anonymous_args = 0
2170 @ link register save eliminated.
2171 .LVL262:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** uint32_t blkCnt; /* Loop counter */
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** #if defined(ARM_MATH_NEON_EXPERIMENTAL) && !defined(ARM_MATH_AUTOVECTORIZE)
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** f32x4_t vec1;
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** f32x4_t res;
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Compute 4 outputs at a time */
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** blkCnt = blockSize >> 2U;
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** while (blkCnt > 0U)
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** {
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* C = A + offset */
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Add offset and then store the results in the destination buffer. */
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** vec1 = vld1q_f32(pSrc);
ARM GAS /tmp/ccnDQoMC.s page 156
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** res = vaddq_f32(vec1,vdupq_n_f32(offset));
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** vst1q_f32(pDst, res);
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Increment pointers */
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** pSrc += 4;
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** pDst += 4;
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Decrement the loop counter */
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** blkCnt--;
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** }
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Tail */
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** blkCnt = blockSize & 0x3;
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** #else
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** blkCnt = blockSize >> 2U;
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** while (blkCnt > 0U)
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** {
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* C = A + offset */
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Add offset and store result in destination buffer. */
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** *pDst++ = (*pSrc++) + offset;
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** *pDst++ = (*pSrc++) + offset;
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** *pDst++ = (*pSrc++) + offset;
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** *pDst++ = (*pSrc++) + offset;
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Decrement loop counter */
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** blkCnt--;
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** }
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Loop unrolling: Compute remaining outputs */
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** blkCnt = blockSize % 0x4U;
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** #else
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Initialize blkCnt with number of samples */
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** blkCnt = blockSize;
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** #endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** while (blkCnt > 0U)
2172 .loc 28 180 0
2173 0000 3AB1 cbz r2, .L341
2174 .LVL263:
2175 .L343:
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** {
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* C = A + offset */
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Add offset and store result in destination buffer. */
ARM GAS /tmp/ccnDQoMC.s page 157
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** *pDst++ = (*pSrc++) + offset;
2176 .loc 28 185 0
2177 0002 F0EC017A vldmia.32 r0!, {s15}
2178 .LVL264:
2179 0006 77EE807A vadd.f32 s15, s15, s0
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** {
2180 .loc 28 180 0
2181 000a 013A subs r2, r2, #1
2182 .LVL265:
2183 .loc 28 185 0
2184 000c E1EC017A vstmia.32 r1!, {s15}
2185 .LVL266:
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** {
2186 .loc 28 180 0
2187 0010 F7D1 bne .L343
2188 .L341:
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** /* Decrement loop counter */
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** blkCnt--;
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** }
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c ****
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c **** }
2189 .loc 28 191 0
2190 0012 7047 bx lr
2191 .cfi_endproc
2192 .LFE174:
2194 .section .text.arm_offset_q15,"ax",%progbits
2195 .align 1
2196 .p2align 2,,3
2197 .global arm_offset_q15
2198 .syntax unified
2199 .thumb
2200 .thumb_func
2201 .fpu fpv4-sp-d16
2203 arm_offset_q15:
2204 .LFB175:
2205 .file 29 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * Title: arm_offset_q15.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * Description: Q15 vector offset
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * www.apache.org/licenses/LICENSE-2.0
ARM GAS /tmp/ccnDQoMC.s page 158
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** @addtogroup BasicOffset
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** @brief Adds a constant offset to a Q15 vector.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** @param[in] pSrc points to the input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** @param[in] offset is the offset to be added
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** @param[out] pDst points to the output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** The function uses saturating arithmetic.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** */
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #if defined(ARM_MATH_MVEI)
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #include "arm_helium_utils.h"
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** void arm_offset_q15(
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** const q15_t * pSrc,
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** q15_t offset,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** q15_t * pDst,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** uint32_t blockSize)
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** {
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** uint32_t blkCnt; /* loop counters */
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** q15x8_t vecSrc;
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /* Compute 8 outputs at a time */
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** blkCnt = blockSize >> 3;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** while (blkCnt > 0U)
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** {
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /*
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * C = A + offset
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * Add offset and then store the result in the destination buffer.
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** */
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** vecSrc = vld1q(pSrc);
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** vst1q(pDst, vqaddq(vecSrc, offset));
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /*
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * Decrement the blockSize loop counter
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** */
ARM GAS /tmp/ccnDQoMC.s page 159
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** blkCnt--;
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /*
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * advance vector source and destination pointers
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** */
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** pSrc += 8;
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** pDst += 8;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** }
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /*
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** * tail
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** */
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** blkCnt = blockSize & 7;
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** if (blkCnt > 0U)
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** {
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt);
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** vecSrc = vld1q(pSrc);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** vstrhq_p(pDst, vqaddq(vecSrc, offset), p0);
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** }
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** }
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #else
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** void arm_offset_q15(
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** const q15_t * pSrc,
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** q15_t offset,
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** q15_t * pDst,
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** uint32_t blockSize)
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** {
2206 .loc 29 104 0
2207 .cfi_startproc
2208 @ args = 0, pretend = 0, frame = 0
2209 @ frame_needed = 0, uses_anonymous_args = 0
2210 @ link register save eliminated.
2211 .LVL267:
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** uint32_t blkCnt; /* Loop counter */
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #if defined (ARM_MATH_LOOPUNROLL)
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #if defined (ARM_MATH_DSP)
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** q31_t offset_packed; /* Offset packed to 32 bit */
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /* Offset is packed to 32 bit in order to use SIMD32 for addition */
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** offset_packed = __PKHBT(offset, offset, 16);
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #endif
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** blkCnt = blockSize >> 2U;
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** while (blkCnt > 0U)
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** {
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /* C = A + offset */
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #if defined (ARM_MATH_DSP)
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /* Add offset and store result in destination buffer (2 samples at a time). */
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** write_q15x2_ia (&pDst, __QADD16(read_q15x2_ia ((q15_t **) &pSrc), offset_packed));
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** write_q15x2_ia (&pDst, __QADD16(read_q15x2_ia ((q15_t **) &pSrc), offset_packed));
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #else
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
ARM GAS /tmp/ccnDQoMC.s page 160
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #endif
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /* Decrement loop counter */
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** blkCnt--;
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** }
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /* Loop unrolling: Compute remaining outputs */
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** blkCnt = blockSize % 0x4U;
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #else
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /* Initialize blkCnt with number of samples */
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** blkCnt = blockSize;
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** while (blkCnt > 0U)
2212 .loc 29 148 0
2213 0000 5BB1 cbz r3, .L356
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** uint32_t blkCnt; /* Loop counter */
2214 .loc 29 104 0
2215 0002 10B4 push {r4}
2216 .LCFI52:
2217 .cfi_def_cfa_offset 4
2218 .cfi_offset 4, -4
2219 .LVL268:
2220 .L350:
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** {
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /* C = A + offset */
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /* Add offset and store result in destination buffer. */
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #if defined (ARM_MATH_DSP)
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
2221 .loc 29 154 0
2222 0004 30F9024B ldrsh r4, [r0], #2
2223 .LVL269:
2224 .LBB55:
2225 .LBB56:
1731:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
2226 .loc 3 1731 0
2227 .syntax unified
2228 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2229 0008 94FA11F4 qadd16 r4, r4, r1
2230 @ 0 "" 2
2231 .LVL270:
2232 .thumb
2233 .syntax unified
2234 .LBE56:
2235 .LBE55:
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** {
2236 .loc 29 148 0
2237 000c 013B subs r3, r3, #1
2238 .LVL271:
2239 .loc 29 154 0
ARM GAS /tmp/ccnDQoMC.s page 161
2240 000e 22F8024B strh r4, [r2], #2 @ movhi
2241 .LVL272:
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** {
2242 .loc 29 148 0
2243 0012 F7D1 bne .L350
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #else
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** #endif
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** /* Decrement loop counter */
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** blkCnt--;
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** }
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c ****
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c **** }
2244 .loc 29 163 0
2245 0014 5DF8044B ldr r4, [sp], #4
2246 .LCFI53:
2247 .cfi_restore 4
2248 .cfi_def_cfa_offset 0
2249 0018 7047 bx lr
2250 .LVL273:
2251 .L356:
2252 001a 7047 bx lr
2253 .cfi_endproc
2254 .LFE175:
2256 .section .text.arm_offset_q31,"ax",%progbits
2257 .align 1
2258 .p2align 2,,3
2259 .global arm_offset_q31
2260 .syntax unified
2261 .thumb
2262 .thumb_func
2263 .fpu fpv4-sp-d16
2265 arm_offset_q31:
2266 .LFB176:
2267 .file 30 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * Title: arm_offset_q31.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * Description: Q31 vector offset
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *
ARM GAS /tmp/ccnDQoMC.s page 162
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** @addtogroup BasicOffset
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** @brief Adds a constant offset to a Q31 vector.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** @param[in] pSrc points to the input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** @param[in] offset is the offset to be added
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** @param[out] pDst points to the output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** The function uses saturating arithmetic.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** */
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #if defined(ARM_MATH_MVEI)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #include "arm_helium_utils.h"
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** void arm_offset_q31(
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** const q31_t * pSrc,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** q31_t offset,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** q31_t * pDst,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** uint32_t blockSize)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** {
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** uint32_t blkCnt; /* loop counters */
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** q31x4_t vecSrc;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /* Compute 4 outputs at a time */
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** blkCnt = blockSize >> 2;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** while (blkCnt > 0U)
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** {
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /*
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * C = A + offset
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * Add offset and then store the result in the destination buffer.
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** */
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** vecSrc = vld1q(pSrc);
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** vst1q(pDst, vqaddq(vecSrc, offset));
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /*
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * Decrement the blockSize loop counter
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** */
ARM GAS /tmp/ccnDQoMC.s page 163
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** blkCnt--;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /*
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * advance vector source and destination pointers
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** */
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** pSrc += 4;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** pDst += 4;
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** }
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /*
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** * tail
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** */
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** blkCnt = blockSize & 3;
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** if (blkCnt > 0U)
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** {
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** vecSrc = vld1q(pSrc);
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** vstrwq_p(pDst, vqaddq(vecSrc, offset), p0);
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** }
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** }
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #else
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** void arm_offset_q31(
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** const q31_t * pSrc,
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** q31_t offset,
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** q31_t * pDst,
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** uint32_t blockSize)
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** {
2268 .loc 30 104 0
2269 .cfi_startproc
2270 @ args = 0, pretend = 0, frame = 0
2271 @ frame_needed = 0, uses_anonymous_args = 0
2272 @ link register save eliminated.
2273 .LVL274:
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** uint32_t blkCnt; /* Loop counter */
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #if defined (ARM_MATH_LOOPUNROLL)
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** blkCnt = blockSize >> 2U;
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** while (blkCnt > 0U)
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** {
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /* C = A + offset */
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /* Add offset and store result in destination buffer. */
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #if defined (ARM_MATH_DSP)
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *pDst++ = __QADD(*pSrc++, offset);
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #else
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #endif
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #if defined (ARM_MATH_DSP)
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *pDst++ = __QADD(*pSrc++, offset);
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #else
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #endif
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #if defined (ARM_MATH_DSP)
ARM GAS /tmp/ccnDQoMC.s page 164
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *pDst++ = __QADD(*pSrc++, offset);
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #else
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #endif
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #if defined (ARM_MATH_DSP)
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *pDst++ = __QADD(*pSrc++, offset);
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #else
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #endif
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /* Decrement loop counter */
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** blkCnt--;
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** }
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /* Loop unrolling: Compute remaining outputs */
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** blkCnt = blockSize % 0x4U;
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #else
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /* Initialize blkCnt with number of samples */
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** blkCnt = blockSize;
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** while (blkCnt > 0U)
2274 .loc 30 155 0
2275 0000 5BB1 cbz r3, .L366
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** uint32_t blkCnt; /* Loop counter */
2276 .loc 30 104 0
2277 0002 10B4 push {r4}
2278 .LCFI54:
2279 .cfi_def_cfa_offset 4
2280 .cfi_offset 4, -4
2281 .LVL275:
2282 .L360:
2283 .LBB57:
2284 .LBB58:
2117:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
2285 .loc 3 2117 0
2286 0004 50F8044B ldr r4, [r0], #4
2287 .LVL276:
2288 .syntax unified
2289 @ 2117 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2290 0008 81FA84F4 qadd r4, r4, r1
2291 @ 0 "" 2
2292 .LVL277:
2293 .thumb
2294 .syntax unified
2295 .LBE58:
2296 .LBE57:
2297 .loc 30 155 0
2298 000c 013B subs r3, r3, #1
2299 .LVL278:
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** {
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /* C = A + offset */
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
ARM GAS /tmp/ccnDQoMC.s page 165
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /* Add offset and store result in destination buffer. */
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #if defined (ARM_MATH_DSP)
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *pDst++ = __QADD(*pSrc++, offset);
2300 .loc 30 161 0
2301 000e 42F8044B str r4, [r2], #4
2302 .LVL279:
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** {
2303 .loc 30 155 0
2304 0012 F7D1 bne .L360
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #else
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** #endif
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** /* Decrement loop counter */
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** blkCnt--;
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** }
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c ****
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c **** }
2305 .loc 30 170 0
2306 0014 5DF8044B ldr r4, [sp], #4
2307 .LCFI55:
2308 .cfi_restore 4
2309 .cfi_def_cfa_offset 0
2310 0018 7047 bx lr
2311 .LVL280:
2312 .L366:
2313 001a 7047 bx lr
2314 .cfi_endproc
2315 .LFE176:
2317 .section .text.arm_offset_q7,"ax",%progbits
2318 .align 1
2319 .p2align 2,,3
2320 .global arm_offset_q7
2321 .syntax unified
2322 .thumb
2323 .thumb_func
2324 .fpu fpv4-sp-d16
2326 arm_offset_q7:
2327 .LFB177:
2328 .file 31 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * Title: arm_offset_q7.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * Description: Q7 vector offset
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * not use this file except in compliance with the License.
ARM GAS /tmp/ccnDQoMC.s page 166
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** @addtogroup BasicOffset
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** @brief Adds a constant offset to a Q7 vector.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** @param[in] pSrc points to the input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** @param[in] offset is the offset to be added
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** @param[out] pDst points to the output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** The function uses saturating arithmetic.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** */
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** #if defined(ARM_MATH_MVEI)
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** #include "arm_helium_utils.h"
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** void arm_offset_q7(
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** const q7_t * pSrc,
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** q7_t offset,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** q7_t * pDst,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** uint32_t blockSize)
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** {
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** uint32_t blkCnt; /* loop counters */
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** q7x16_t vecSrc;
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /* Compute 16 outputs at a time */
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** blkCnt = blockSize >> 4;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** while (blkCnt > 0U)
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** {
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /*
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * C = A + offset
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * Add offset and then store the result in the destination buffer.
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** */
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** vecSrc = vld1q(pSrc);
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** vst1q(pDst, vqaddq(vecSrc, offset));
ARM GAS /tmp/ccnDQoMC.s page 167
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /*
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * Decrement the blockSize loop counter
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** */
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** blkCnt--;
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /*
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * advance vector source and destination pointers
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** */
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** pSrc += 16;
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** pDst += 16;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** }
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /*
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** * tail
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** */
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** blkCnt = blockSize & 0xF;
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** if (blkCnt > 0U)
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** {
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** mve_pred16_t p0 = vctp8q(blkCnt);
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** vecSrc = vld1q(pSrc);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** vstrbq_p(pDst, vqaddq(vecSrc, offset), p0);
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** }
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** }
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** #else
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** void arm_offset_q7(
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** const q7_t * pSrc,
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** q7_t offset,
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** q7_t * pDst,
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** uint32_t blockSize)
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** {
2329 .loc 31 103 0
2330 .cfi_startproc
2331 @ args = 0, pretend = 0, frame = 0
2332 @ frame_needed = 0, uses_anonymous_args = 0
2333 @ link register save eliminated.
2334 .LVL281:
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** uint32_t blkCnt; /* Loop counter */
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** #if defined (ARM_MATH_LOOPUNROLL)
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** #if defined (ARM_MATH_DSP)
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** q31_t offset_packed; /* Offset packed to 32 bit */
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /* Offset is packed to 32 bit in order to use SIMD32 for addition */
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** offset_packed = __PACKq7(offset, offset, offset, offset);
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** #endif
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** blkCnt = blockSize >> 2U;
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** while (blkCnt > 0U)
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** {
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /* C = A + offset */
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** #if defined (ARM_MATH_DSP)
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /* Add offset and store result in destination buffer (4 samples at a time). */
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** write_q7x4_ia (&pDst, __QADD8(read_q7x4_ia ((q7_t **) &pSrc), offset_packed));
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** #else
ARM GAS /tmp/ccnDQoMC.s page 168
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** #endif
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /* Decrement loop counter */
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** blkCnt--;
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** }
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /* Loop unrolling: Compute remaining outputs */
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** blkCnt = blockSize % 0x4U;
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** #else
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /* Initialize blkCnt with number of samples */
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** blkCnt = blockSize;
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** while (blkCnt > 0U)
2335 .loc 31 146 0
2336 0000 6BB1 cbz r3, .L376
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** uint32_t blkCnt; /* Loop counter */
2337 .loc 31 103 0
2338 0002 10B4 push {r4}
2339 .LCFI56:
2340 .cfi_def_cfa_offset 4
2341 .cfi_offset 4, -4
2342 0004 0344 add r3, r3, r0
2343 .LVL282:
2344 .L370:
2345 .LBB59:
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** {
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /* C = A + offset */
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /* Add offset and store result in destination buffer. */
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8);
2346 .loc 31 151 0
2347 0006 10F9014B ldrsb r4, [r0], #1
2348 .LVL283:
2349 .LBE59:
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** {
2350 .loc 31 146 0
2351 000a 9842 cmp r0, r3
2352 .LBB60:
2353 .loc 31 151 0
2354 000c 0C44 add r4, r4, r1
2355 .syntax unified
2356 @ 151 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c" 1
2357 000e 04F30704 ssat r4, #8, r4
2358 @ 0 "" 2
2359 .LVL284:
2360 .thumb
2361 .syntax unified
2362 .LBE60:
2363 0012 02F8014B strb r4, [r2], #1
ARM GAS /tmp/ccnDQoMC.s page 169
2364 .LVL285:
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** {
2365 .loc 31 146 0
2366 0016 F6D1 bne .L370
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** /* Decrement loop counter */
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** blkCnt--;
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** }
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c ****
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c **** }
2367 .loc 31 157 0
2368 0018 5DF8044B ldr r4, [sp], #4
2369 .LCFI57:
2370 .cfi_restore 4
2371 .cfi_def_cfa_offset 0
2372 .LVL286:
2373 001c 7047 bx lr
2374 .LVL287:
2375 .L376:
2376 001e 7047 bx lr
2377 .cfi_endproc
2378 .LFE177:
2380 .section .text.arm_or_u16,"ax",%progbits
2381 .align 1
2382 .p2align 2,,3
2383 .global arm_or_u16
2384 .syntax unified
2385 .thumb
2386 .thumb_func
2387 .fpu fpv4-sp-d16
2389 arm_or_u16:
2390 .LFB178:
2391 .file 32 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * Title: arm_or_u16.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * Description: uint16_t bitwise inclusive OR
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * $Date: 14 November 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ARM GAS /tmp/ccnDQoMC.s page 170
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** @defgroup Or Vector bitwise inclusive OR
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** Compute the logical bitwise OR.
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** There are separate functions for uint32_t, uint16_t, and uint8_t data types.
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** */
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** /**
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** @addtogroup Or
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** @{
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** */
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** /**
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** @brief Compute the logical bitwise OR of two fixed-point vectors.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** @param[in] pSrcA points to input vector A
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** @param[in] pSrcB points to input vector B
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** @param[out] pDst points to output vector
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** @param[in] blockSize number of samples in each vector
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** @return none
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** */
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** void arm_or_u16(
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** const uint16_t * pSrcA,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** const uint16_t * pSrcB,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** uint16_t * pDst,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** uint32_t blockSize)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** {
2392 .loc 32 62 0
2393 .cfi_startproc
2394 @ args = 0, pretend = 0, frame = 0
2395 @ frame_needed = 0, uses_anonymous_args = 0
2396 .LVL288:
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** uint32_t blkCnt; /* Loop counter */
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** q15x8_t vecSrcA, vecSrcB;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** /* Compute 8 outputs at a time */
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** blkCnt = blockSize >> 3;
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** while (blkCnt > 0U)
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** {
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** vecSrcA = vld1q(pSrcA);
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** vecSrcB = vld1q(pSrcB);
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** vst1q(pDst, vorrq_u16(vecSrcA, vecSrcB) );
ARM GAS /tmp/ccnDQoMC.s page 171
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** pSrcA += 8;
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** pSrcB += 8;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** pDst += 8;
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** /* Decrement the loop counter */
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** blkCnt--;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** }
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** /* Tail */
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** blkCnt = blockSize & 7;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** if (blkCnt > 0U)
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** {
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** mve_pred16_t p0 = vctp16q(blkCnt);
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** vecSrcA = vld1q(pSrcA);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** vecSrcB = vld1q(pSrcB);
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** vstrhq_p(pDst, vorrq_u16(vecSrcA, vecSrcB), p0);
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** }
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** #else
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** uint16x8_t vecA, vecB;
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** /* Compute 8 outputs at a time */
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** blkCnt = blockSize >> 3U;
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** while (blkCnt > 0U)
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** {
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** vecA = vld1q_u16(pSrcA);
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** vecB = vld1q_u16(pSrcB);
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** vst1q_u16(pDst, vorrq_u16(vecA, vecB) );
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** pSrcA += 8;
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** pSrcB += 8;
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** pDst += 8;
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** /* Decrement the loop counter */
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** blkCnt--;
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** }
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** /* Tail */
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** blkCnt = blockSize & 7;
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** #else
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** /* Initialize blkCnt with number of samples */
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** blkCnt = blockSize;
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** #endif
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** while (blkCnt > 0U)
2397 .loc 32 125 0
2398 0000 002B cmp r3, #0
2399 0002 6AD0 beq .L401
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** uint32_t blkCnt; /* Loop counter */
2400 .loc 32 62 0
2401 0004 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr}
2402 .LCFI58:
2403 .cfi_def_cfa_offset 28
ARM GAS /tmp/ccnDQoMC.s page 172
2404 .cfi_offset 4, -28
2405 .cfi_offset 5, -24
2406 .cfi_offset 6, -20
2407 .cfi_offset 7, -16
2408 .cfi_offset 8, -12
2409 .cfi_offset 9, -8
2410 .cfi_offset 14, -4
2411 0008 141D adds r4, r2, #4
2412 000a 8C42 cmp r4, r1
2413 000c 8CBF ite hi
2414 000e 0025 movhi r5, #0
2415 0010 0125 movls r5, #1
2416 0012 0E1D adds r6, r1, #4
2417 0014 B242 cmp r2, r6
2418 0016 28BF it cs
2419 0018 45F00105 orrcs r5, r5, #1
2420 001c 082B cmp r3, #8
2421 001e 94BF ite ls
2422 0020 0025 movls r5, #0
2423 0022 05F00105 andhi r5, r5, #1
2424 0026 002D cmp r5, #0
2425 0028 47D0 beq .L393
2426 002a 8442 cmp r4, r0
2427 002c 8CBF ite hi
2428 002e 0024 movhi r4, #0
2429 0030 0124 movls r4, #1
2430 0032 051D adds r5, r0, #4
2431 0034 AA42 cmp r2, r5
2432 0036 28BF it cs
2433 0038 44F00104 orrcs r4, r4, #1
2434 003c 002C cmp r4, #0
2435 003e 3CD0 beq .L393
2436 0040 C0F34004 ubfx r4, r0, #1, #1
2437 0044 5E1E subs r6, r3, #1
2438 0046 002C cmp r4, #0
2439 0048 42D0 beq .L386
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** {
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** *pDst++ = (*pSrcA++)|(*pSrcB++);
2440 .loc 32 127 0
2441 004a 0F88 ldrh r7, [r1]
2442 004c 0588 ldrh r5, [r0]
2443 004e 3D43 orrs r5, r5, r7
2444 0050 1580 strh r5, [r2] @ movhi
2445 0052 00F1020E add lr, r0, #2
2446 .LVL289:
2447 0056 01F1020C add ip, r1, #2
2448 .LVL290:
2449 005a 971C adds r7, r2, #2
2450 .LVL291:
2451 .L382:
2452 005c 1B1B subs r3, r3, r4
2453 .LVL292:
2454 005e 6400 lsls r4, r4, #1
2455 0060 2044 add r0, r0, r4
2456 0062 2144 add r1, r1, r4
2457 0064 2244 add r2, r2, r4
2458 0066 4FEA5309 lsr r9, r3, #1
ARM GAS /tmp/ccnDQoMC.s page 173
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** {
2459 .loc 32 125 0
2460 006a 0025 movs r5, #0
2461 .LVL293:
2462 .L383:
2463 .loc 32 127 0
2464 006c 51F8044B ldr r4, [r1], #4 @ unaligned
2465 0070 50F8048B ldr r8, [r0], #4
2466 0074 0135 adds r5, r5, #1
2467 0076 44EA0804 orr r4, r4, r8
2468 007a 4D45 cmp r5, r9
2469 007c 42F8044B str r4, [r2], #4 @ unaligned
2470 0080 F4D3 bcc .L383
2471 0082 23F00102 bic r2, r3, #1
2472 0086 5100 lsls r1, r2, #1
2473 0088 9342 cmp r3, r2
2474 008a 0EEB0104 add r4, lr, r1
2475 008e 0CEB0100 add r0, ip, r1
2476 0092 A6EB0206 sub r6, r6, r2
2477 0096 3944 add r1, r1, r7
2478 0098 0DD0 beq .L379
2479 .LVL294:
2480 009a 3EF81230 ldrh r3, [lr, r2, lsl #1]
2481 009e 3CF81250 ldrh r5, [ip, r2, lsl #1]
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** {
2482 .loc 32 125 0
2483 00a2 012E cmp r6, #1
2484 .loc 32 127 0
2485 00a4 43EA0503 orr r3, r3, r5
2486 00a8 27F81230 strh r3, [r7, r2, lsl #1] @ movhi
2487 .LVL295:
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** {
2488 .loc 32 125 0
2489 00ac 03D0 beq .L379
2490 .LVL296:
2491 .loc 32 127 0
2492 00ae 6388 ldrh r3, [r4, #2]
2493 00b0 4288 ldrh r2, [r0, #2]
2494 00b2 1343 orrs r3, r3, r2
2495 00b4 4B80 strh r3, [r1, #2] @ movhi
2496 .LVL297:
2497 .L379:
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** /* Decrement the loop counter */
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** blkCnt--;
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** }
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** #endif /* if defined(ARM_MATH_MVEI) */
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** }
2498 .loc 32 133 0
2499 00b6 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc}
2500 .LVL298:
2501 .L393:
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
2502 .loc 32 127 0
2503 00ba 30F8024B ldrh r4, [r0], #2
2504 .LVL299:
2505 00be 31F8025B ldrh r5, [r1], #2
ARM GAS /tmp/ccnDQoMC.s page 174
2506 .LVL300:
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** {
2507 .loc 32 125 0
2508 00c2 013B subs r3, r3, #1
2509 .LVL301:
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c ****
2510 .loc 32 127 0
2511 00c4 44EA0504 orr r4, r4, r5
2512 00c8 22F8024B strh r4, [r2], #2 @ movhi
2513 .LVL302:
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c **** {
2514 .loc 32 125 0
2515 00cc F5D1 bne .L393
2516 00ce F2E7 b .L379
2517 .LVL303:
2518 .L386:
2519 00d0 1E46 mov r6, r3
2520 00d2 1746 mov r7, r2
2521 00d4 8C46 mov ip, r1
2522 00d6 8646 mov lr, r0
2523 00d8 C0E7 b .L382
2524 .L401:
2525 .LCFI59:
2526 .cfi_def_cfa_offset 0
2527 .cfi_restore 4
2528 .cfi_restore 5
2529 .cfi_restore 6
2530 .cfi_restore 7
2531 .cfi_restore 8
2532 .cfi_restore 9
2533 .cfi_restore 14
2534 00da 7047 bx lr
2535 .cfi_endproc
2536 .LFE178:
2538 .section .text.arm_or_u32,"ax",%progbits
2539 .align 1
2540 .p2align 2,,3
2541 .global arm_or_u32
2542 .syntax unified
2543 .thumb
2544 .thumb_func
2545 .fpu fpv4-sp-d16
2547 arm_or_u32:
2548 .LFB179:
2549 .file 33 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * Title: arm_or_u32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * Description: uint32_t bitwise inclusive OR
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * $Date: 14 November 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
ARM GAS /tmp/ccnDQoMC.s page 175
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** @addtogroup Or
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** @brief Compute the logical bitwise OR of two fixed-point vectors.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** @param[in] pSrcA points to input vector A
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** @param[in] pSrcB points to input vector B
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** @param[out] pDst points to output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** */
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** void arm_or_u32(
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** const uint32_t * pSrcA,
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** const uint32_t * pSrcB,
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** uint32_t * pDst,
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** uint32_t blockSize)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** {
2550 .loc 33 54 0
2551 .cfi_startproc
2552 @ args = 0, pretend = 0, frame = 0
2553 @ frame_needed = 0, uses_anonymous_args = 0
2554 @ link register save eliminated.
2555 .LVL304:
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** uint32_t blkCnt; /* Loop counter */
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** q31x4_t vecSrcA, vecSrcB;
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** /* Compute 4 outputs at a time */
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** blkCnt = blockSize >> 2;
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** while (blkCnt > 0U)
ARM GAS /tmp/ccnDQoMC.s page 176
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** {
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** vecSrcA = vld1q(pSrcA);
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** vecSrcB = vld1q(pSrcB);
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** vst1q(pDst, vorrq_u32(vecSrcA, vecSrcB) );
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** pSrcA += 4;
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** pSrcB += 4;
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** pDst += 4;
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** /* Decrement the loop counter */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** blkCnt--;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** }
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** /* Tail */
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** blkCnt = blockSize & 3;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** if (blkCnt > 0U)
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** {
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** vecSrcA = vld1q(pSrcA);
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** vecSrcB = vld1q(pSrcB);
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** vstrwq_p(pDst, vorrq_u32(vecSrcA, vecSrcB), p0);
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** }
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** #else
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** uint32x4_t vecA, vecB;
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** /* Compute 4 outputs at a time */
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** blkCnt = blockSize >> 2U;
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** while (blkCnt > 0U)
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** {
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** vecA = vld1q_u32(pSrcA);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** vecB = vld1q_u32(pSrcB);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** vst1q_u32(pDst, vorrq_u32(vecA, vecB) );
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** pSrcA += 4;
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** pSrcB += 4;
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** pDst += 4;
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** /* Decrement the loop counter */
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** blkCnt--;
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** }
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** /* Tail */
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** blkCnt = blockSize & 3;
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** #else
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** /* Initialize blkCnt with number of samples */
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** blkCnt = blockSize;
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** #endif
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** while (blkCnt > 0U)
2556 .loc 33 117 0
2557 0000 63B1 cbz r3, .L412
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** uint32_t blkCnt; /* Loop counter */
ARM GAS /tmp/ccnDQoMC.s page 177
2558 .loc 33 54 0
2559 0002 30B4 push {r4, r5}
2560 .LCFI60:
2561 .cfi_def_cfa_offset 8
2562 .cfi_offset 4, -8
2563 .cfi_offset 5, -4
2564 .LVL305:
2565 .L406:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** {
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** *pDst++ = (*pSrcA++)|(*pSrcB++);
2566 .loc 33 119 0
2567 0004 50F8044B ldr r4, [r0], #4
2568 .LVL306:
2569 0008 51F8045B ldr r5, [r1], #4
2570 .LVL307:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** {
2571 .loc 33 117 0
2572 000c 013B subs r3, r3, #1
2573 .LVL308:
2574 .loc 33 119 0
2575 000e 44EA0504 orr r4, r4, r5
2576 0012 42F8044B str r4, [r2], #4
2577 .LVL309:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** {
2578 .loc 33 117 0
2579 0016 F5D1 bne .L406
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c ****
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** /* Decrement the loop counter */
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** blkCnt--;
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** }
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** #endif /* if defined(ARM_MATH_MVEI) */
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c **** }
2580 .loc 33 125 0
2581 0018 30BC pop {r4, r5}
2582 .LCFI61:
2583 .cfi_restore 5
2584 .cfi_restore 4
2585 .cfi_def_cfa_offset 0
2586 001a 7047 bx lr
2587 .LVL310:
2588 .L412:
2589 001c 7047 bx lr
2590 .cfi_endproc
2591 .LFE179:
2593 001e 00BF .section .text.arm_or_u8,"ax",%progbits
2594 .align 1
2595 .p2align 2,,3
2596 .global arm_or_u8
2597 .syntax unified
2598 .thumb
2599 .thumb_func
2600 .fpu fpv4-sp-d16
2602 arm_or_u8:
2603 .LFB180:
2604 .file 34 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * Project: CMSIS DSP Library
ARM GAS /tmp/ccnDQoMC.s page 178
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * Title: arm_or_u8.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * Description: uint8_t bitwise inclusive OR
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * $Date: 14 November 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** @addtogroup Or
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** @brief Compute the logical bitwise OR of two fixed-point vectors.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** @param[in] pSrcA points to input vector A
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** @param[in] pSrcB points to input vector B
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** @param[out] pDst points to output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** */
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** void arm_or_u8(
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** const uint8_t * pSrcA,
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** const uint8_t * pSrcB,
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** uint8_t * pDst,
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** uint32_t blockSize)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2605 .loc 34 54 0
2606 .cfi_startproc
2607 @ args = 0, pretend = 0, frame = 0
2608 @ frame_needed = 0, uses_anonymous_args = 0
2609 .LVL311:
ARM GAS /tmp/ccnDQoMC.s page 179
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** uint32_t blkCnt; /* Loop counter */
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** q7x16_t vecSrcA, vecSrcB;
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** /* Compute 16 outputs at a time */
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** blkCnt = blockSize >> 4;
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** while (blkCnt > 0U)
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** vecSrcA = vld1q(pSrcA);
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** vecSrcB = vld1q(pSrcB);
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** vst1q(pDst, vorrq_u8(vecSrcA, vecSrcB) );
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** pSrcA += 16;
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** pSrcB += 16;
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** pDst += 16;
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** /* Decrement the loop counter */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** blkCnt--;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** }
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** /* Tail */
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** blkCnt = blockSize & 0xF;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** if (blkCnt > 0U)
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** mve_pred16_t p0 = vctp8q(blkCnt);
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** vecSrcA = vld1q(pSrcA);
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** vecSrcB = vld1q(pSrcB);
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** vstrbq_p(pDst, vorrq_u8(vecSrcA, vecSrcB), p0);
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** }
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** #else
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** uint8x16_t vecA, vecB;
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** /* Compute 16 outputs at a time */
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** blkCnt = blockSize >> 4U;
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** while (blkCnt > 0U)
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** vecA = vld1q_u8(pSrcA);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** vecB = vld1q_u8(pSrcB);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** vst1q_u8(pDst, vorrq_u8(vecA, vecB) );
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** pSrcA += 16;
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** pSrcB += 16;
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** pDst += 16;
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** /* Decrement the loop counter */
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** blkCnt--;
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** }
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** /* Tail */
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** blkCnt = blockSize & 0xF;
ARM GAS /tmp/ccnDQoMC.s page 180
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** #else
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** /* Initialize blkCnt with number of samples */
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** blkCnt = blockSize;
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** #endif
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** while (blkCnt > 0U)
2610 .loc 34 117 0
2611 0000 002B cmp r3, #0
2612 0002 00F0A680 beq .L454
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** uint32_t blkCnt; /* Loop counter */
2613 .loc 34 54 0
2614 0006 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr}
2615 .LCFI62:
2616 .cfi_def_cfa_offset 28
2617 .cfi_offset 4, -28
2618 .cfi_offset 5, -24
2619 .cfi_offset 6, -20
2620 .cfi_offset 7, -16
2621 .cfi_offset 8, -12
2622 .cfi_offset 9, -8
2623 .cfi_offset 14, -4
2624 000a 141D adds r4, r2, #4
2625 000c 8C42 cmp r4, r1
2626 000e 8CBF ite hi
2627 0010 0025 movhi r5, #0
2628 0012 0125 movls r5, #1
2629 0014 0E1D adds r6, r1, #4
2630 0016 B242 cmp r2, r6
2631 0018 28BF it cs
2632 001a 45F00105 orrcs r5, r5, #1
2633 001e 082B cmp r3, #8
2634 0020 94BF ite ls
2635 0022 0025 movls r5, #0
2636 0024 05F00105 andhi r5, r5, #1
2637 0028 002D cmp r5, #0
2638 002a 00F08580 beq .L416
2639 002e 8442 cmp r4, r0
2640 0030 8CBF ite hi
2641 0032 0024 movhi r4, #0
2642 0034 0124 movls r4, #1
2643 0036 051D adds r5, r0, #4
2644 0038 AA42 cmp r2, r5
2645 003a 28BF it cs
2646 003c 44F00104 orrcs r4, r4, #1
2647 0040 002C cmp r4, #0
2648 0042 79D0 beq .L416
2649 0044 4442 negs r4, r0
2650 0046 14F00304 ands r4, r4, #3
2651 004a 03F1FF36 add r6, r3, #-1
2652 004e 6ED0 beq .L423
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** *pDst++ = (*pSrcA++)|(*pSrcB++);
2653 .loc 34 119 0
2654 0050 0F78 ldrb r7, [r1] @ zero_extendqisi2
2655 0052 0578 ldrb r5, [r0] @ zero_extendqisi2
2656 0054 012C cmp r4, #1
2657 0056 45EA0705 orr r5, r5, r7
ARM GAS /tmp/ccnDQoMC.s page 181
2658 005a 1570 strb r5, [r2]
2659 005c 00F1010E add lr, r0, #1
2660 .LVL312:
2661 0060 01F1010C add ip, r1, #1
2662 .LVL313:
2663 0064 02F10107 add r7, r2, #1
2664 .LVL314:
2665 0068 18D0 beq .L417
2666 .LVL315:
2667 006a 4E78 ldrb r6, [r1, #1] @ zero_extendqisi2
2668 .LVL316:
2669 006c 4578 ldrb r5, [r0, #1] @ zero_extendqisi2
2670 006e 032C cmp r4, #3
2671 0070 45EA0605 orr r5, r5, r6
2672 0074 5570 strb r5, [r2, #1]
2673 0076 00F1020E add lr, r0, #2
2674 .LVL317:
2675 007a 01F1020C add ip, r1, #2
2676 .LVL318:
2677 007e 02F10207 add r7, r2, #2
2678 .LVL319:
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** /* Decrement the loop counter */
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** blkCnt--;
2679 .loc 34 122 0
2680 0082 A3F10206 sub r6, r3, #2
2681 .LVL320:
2682 0086 09D1 bne .L417
2683 .LVL321:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
2684 .loc 34 119 0
2685 0088 8E78 ldrb r6, [r1, #2] @ zero_extendqisi2
2686 .LVL322:
2687 008a 8578 ldrb r5, [r0, #2] @ zero_extendqisi2
2688 008c 3543 orrs r5, r5, r6
2689 008e 9570 strb r5, [r2, #2]
2690 0090 00F1030E add lr, r0, #3
2691 .LVL323:
2692 0094 01F1030C add ip, r1, #3
2693 .LVL324:
2694 0098 D71C adds r7, r2, #3
2695 .LVL325:
2696 .loc 34 122 0
2697 009a DE1E subs r6, r3, #3
2698 .LVL326:
2699 .L417:
2700 009c 1B1B subs r3, r3, r4
2701 .LVL327:
2702 009e 2044 add r0, r0, r4
2703 00a0 2144 add r1, r1, r4
2704 00a2 2244 add r2, r2, r4
2705 00a4 4FEA9309 lsr r9, r3, #2
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2706 .loc 34 117 0
2707 00a8 0025 movs r5, #0
2708 .L419:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
ARM GAS /tmp/ccnDQoMC.s page 182
2709 .loc 34 119 0
2710 00aa 51F8044B ldr r4, [r1], #4 @ unaligned
2711 00ae 50F8048B ldr r8, [r0], #4
2712 00b2 0135 adds r5, r5, #1
2713 00b4 44EA0804 orr r4, r4, r8
2714 00b8 4D45 cmp r5, r9
2715 00ba 42F8044B str r4, [r2], #4 @ unaligned
2716 00be F4D3 bcc .L419
2717 00c0 23F00302 bic r2, r3, #3
2718 00c4 9342 cmp r3, r2
2719 00c6 A6EB0206 sub r6, r6, r2
2720 00ca 0EEB0204 add r4, lr, r2
2721 00ce 0CEB0200 add r0, ip, r2
2722 00d2 07EB0201 add r1, r7, r2
2723 00d6 28D0 beq .L414
2724 .LVL328:
2725 00d8 1EF80230 ldrb r3, [lr, r2] @ zero_extendqisi2
2726 00dc 1CF80250 ldrb r5, [ip, r2] @ zero_extendqisi2
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2727 .loc 34 117 0
2728 00e0 012E cmp r6, #1
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
2729 .loc 34 119 0
2730 00e2 43EA0503 orr r3, r3, r5
2731 00e6 BB54 strb r3, [r7, r2]
2732 .LVL329:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2733 .loc 34 117 0
2734 00e8 1FD0 beq .L414
2735 .LVL330:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
2736 .loc 34 119 0
2737 00ea 6378 ldrb r3, [r4, #1] @ zero_extendqisi2
2738 00ec 4278 ldrb r2, [r0, #1] @ zero_extendqisi2
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2739 .loc 34 117 0
2740 00ee 022E cmp r6, #2
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
2741 .loc 34 119 0
2742 00f0 43EA0203 orr r3, r3, r2
2743 00f4 4B70 strb r3, [r1, #1]
2744 .LVL331:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2745 .loc 34 117 0
2746 00f6 18D0 beq .L414
2747 .LVL332:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
2748 .loc 34 119 0
2749 00f8 A378 ldrb r3, [r4, #2] @ zero_extendqisi2
2750 00fa 8278 ldrb r2, [r0, #2] @ zero_extendqisi2
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2751 .loc 34 117 0
2752 00fc 032E cmp r6, #3
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
2753 .loc 34 119 0
2754 00fe 43EA0203 orr r3, r3, r2
2755 0102 8B70 strb r3, [r1, #2]
ARM GAS /tmp/ccnDQoMC.s page 183
2756 .LVL333:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2757 .loc 34 117 0
2758 0104 11D0 beq .L414
2759 .LVL334:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
2760 .loc 34 119 0
2761 0106 E378 ldrb r3, [r4, #3] @ zero_extendqisi2
2762 0108 C278 ldrb r2, [r0, #3] @ zero_extendqisi2
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2763 .loc 34 117 0
2764 010a 042E cmp r6, #4
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
2765 .loc 34 119 0
2766 010c 43EA0203 orr r3, r3, r2
2767 0110 CB70 strb r3, [r1, #3]
2768 .LVL335:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2769 .loc 34 117 0
2770 0112 0AD0 beq .L414
2771 .LVL336:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
2772 .loc 34 119 0
2773 0114 2379 ldrb r3, [r4, #4] @ zero_extendqisi2
2774 0116 0279 ldrb r2, [r0, #4] @ zero_extendqisi2
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2775 .loc 34 117 0
2776 0118 052E cmp r6, #5
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
2777 .loc 34 119 0
2778 011a 43EA0203 orr r3, r3, r2
2779 011e 0B71 strb r3, [r1, #4]
2780 .LVL337:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2781 .loc 34 117 0
2782 0120 03D0 beq .L414
2783 .LVL338:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
2784 .loc 34 119 0
2785 0122 6379 ldrb r3, [r4, #5] @ zero_extendqisi2
2786 0124 4279 ldrb r2, [r0, #5] @ zero_extendqisi2
2787 0126 1343 orrs r3, r3, r2
2788 0128 4B71 strb r3, [r1, #5]
2789 .LVL339:
2790 .L414:
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** }
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** #endif /* if defined(ARM_MATH_MVEI) */
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** }
2791 .loc 34 125 0
2792 012a BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc}
2793 .LVL340:
2794 .L423:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2795 .loc 34 117 0
2796 012e 1E46 mov r6, r3
2797 0130 1746 mov r7, r2
2798 0132 8C46 mov ip, r1
ARM GAS /tmp/ccnDQoMC.s page 184
2799 0134 8646 mov lr, r0
2800 0136 B1E7 b .L417
2801 .L416:
2802 0138 0344 add r3, r3, r0
2803 .LVL341:
2804 .L421:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
2805 .loc 34 119 0
2806 013a 10F8014B ldrb r4, [r0], #1 @ zero_extendqisi2
2807 .LVL342:
2808 013e 11F8015B ldrb r5, [r1], #1 @ zero_extendqisi2
2809 .LVL343:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2810 .loc 34 117 0
2811 0142 8342 cmp r3, r0
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c ****
2812 .loc 34 119 0
2813 0144 44EA0504 orr r4, r4, r5
2814 0148 02F8014B strb r4, [r2], #1
2815 .LVL344:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c **** {
2816 .loc 34 117 0
2817 014c F5D1 bne .L421
2818 .loc 34 125 0
2819 014e BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc}
2820 .LVL345:
2821 .L454:
2822 .LCFI63:
2823 .cfi_def_cfa_offset 0
2824 .cfi_restore 4
2825 .cfi_restore 5
2826 .cfi_restore 6
2827 .cfi_restore 7
2828 .cfi_restore 8
2829 .cfi_restore 9
2830 .cfi_restore 14
2831 0152 7047 bx lr
2832 .cfi_endproc
2833 .LFE180:
2835 .section .text.arm_scale_f32,"ax",%progbits
2836 .align 1
2837 .p2align 2,,3
2838 .global arm_scale_f32
2839 .syntax unified
2840 .thumb
2841 .thumb_func
2842 .fpu fpv4-sp-d16
2844 arm_scale_f32:
2845 .LFB181:
2846 .file 35 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * Title: arm_scale_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * Description: Multiplies a floating-point vector by a scalar
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * $Revision: V1.6.0
ARM GAS /tmp/ccnDQoMC.s page 185
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** @defgroup BasicScale Vector Scale
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** Multiply a vector by a scalar value. For floating-point data, the algorithm used is:
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** <pre>
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** pDst[n] = pSrc[n] * scale, 0 <= n < blockSize.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** </pre>
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** The shift allows the gain of the scaling operation to exceed 1.0.
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** The algorithm used with fixed-point data is:
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** <pre>
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** pDst[n] = (pSrc[n] * scaleFract) << shift, 0 <= n < blockSize.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** </pre>
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** The overall scale factor applied to the fixed-point data is
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** <pre>
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** scale = scaleFract * 2^shift.
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** </pre>
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** The functions support in-place computation allowing the source and destination
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** pointers to reference the same memory buffer.
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** */
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /**
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** @addtogroup BasicScale
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** @{
ARM GAS /tmp/ccnDQoMC.s page 186
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** */
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /**
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** @brief Multiplies a floating-point vector by a scalar.
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** @param[in] pSrc points to the input vector
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** @param[in] scale scale factor to be applied
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** @param[out] pDst points to the output vector
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** @param[in] blockSize number of samples in each vector
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** @return none
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** #include "arm_helium_utils.h"
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** void arm_scale_f32(
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** const float32_t * pSrc,
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** float32_t scale,
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** float32_t * pDst,
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** uint32_t blockSize)
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** {
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** uint32_t blkCnt; /* Loop counter */
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** f32x4_t vec1;
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** f32x4_t res;
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Compute 4 outputs at a time */
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** blkCnt = blockSize >> 2U;
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** while (blkCnt > 0U)
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** {
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* C = A + offset */
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Add offset and then store the results in the destination buffer. */
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** vec1 = vld1q(pSrc);
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** res = vmulq(vec1,scale);
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** vst1q(pDst, res);
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Increment pointers */
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** pSrc += 4;
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** pDst += 4;
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Decrement the loop counter */
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** blkCnt--;
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** }
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Tail */
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** blkCnt = blockSize & 0x3;
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** if (blkCnt > 0U)
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** {
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** vec1 = vld1q((float32_t const *) pSrc);
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** vstrwq_p(pDst, vmulq(vec1, scale), p0);
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** }
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
ARM GAS /tmp/ccnDQoMC.s page 187
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** }
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** #else
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** void arm_scale_f32(
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** const float32_t *pSrc,
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** float32_t scale,
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** float32_t *pDst,
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** uint32_t blockSize)
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** {
2847 .loc 35 130 0
2848 .cfi_startproc
2849 @ args = 0, pretend = 0, frame = 0
2850 @ frame_needed = 0, uses_anonymous_args = 0
2851 @ link register save eliminated.
2852 .LVL346:
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** uint32_t blkCnt; /* Loop counter */
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** #if defined(ARM_MATH_NEON_EXPERIMENTAL)
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** f32x4_t vec1;
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** f32x4_t res;
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Compute 4 outputs at a time */
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** blkCnt = blockSize >> 2U;
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** while (blkCnt > 0U)
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** {
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* C = A * scale */
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Scale the input and then store the results in the destination buffer. */
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** vec1 = vld1q_f32(pSrc);
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** res = vmulq_f32(vec1, vdupq_n_f32(scale));
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** vst1q_f32(pDst, res);
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Increment pointers */
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** pSrc += 4;
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** pDst += 4;
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Decrement the loop counter */
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** blkCnt--;
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** }
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Tail */
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** blkCnt = blockSize & 0x3;
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** #else
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** #if defined (ARM_MATH_LOOPUNROLL)
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** blkCnt = blockSize >> 2U;
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** while (blkCnt > 0U)
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** {
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** float32_t in1, in2, in3, in4;
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* C = A * scale */
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Scale input and store result in destination buffer. */
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** in1 = (*pSrc++) * scale;
ARM GAS /tmp/ccnDQoMC.s page 188
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** in2 = (*pSrc++) * scale;
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** in3 = (*pSrc++) * scale;
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** in4 = (*pSrc++) * scale;
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** *pDst++ = in1;
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** *pDst++ = in2;
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** *pDst++ = in3;
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** *pDst++ = in4;
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Decrement loop counter */
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** blkCnt--;
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** }
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Loop unrolling: Compute remaining outputs */
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** blkCnt = blockSize % 0x4U;
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** #else
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Initialize blkCnt with number of samples */
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** blkCnt = blockSize;
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** #endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** while (blkCnt > 0U)
2853 .loc 35 200 0
2854 0000 3AB1 cbz r2, .L457
2855 .LVL347:
2856 .L459:
201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** {
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* C = A * scale */
203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Scale input and store result in destination buffer. */
205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** *pDst++ = (*pSrc++) * scale;
2857 .loc 35 205 0
2858 0002 F0EC017A vldmia.32 r0!, {s15}
2859 .LVL348:
2860 0006 67EE807A vmul.f32 s15, s15, s0
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** {
2861 .loc 35 200 0
2862 000a 013A subs r2, r2, #1
2863 .LVL349:
2864 .loc 35 205 0
2865 000c E1EC017A vstmia.32 r1!, {s15}
2866 .LVL350:
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** {
2867 .loc 35 200 0
2868 0010 F7D1 bne .L459
2869 .L457:
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** /* Decrement loop counter */
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** blkCnt--;
209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** }
210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c ****
ARM GAS /tmp/ccnDQoMC.s page 189
211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c **** }
2870 .loc 35 211 0
2871 0012 7047 bx lr
2872 .cfi_endproc
2873 .LFE181:
2875 .section .text.arm_scale_q15,"ax",%progbits
2876 .align 1
2877 .p2align 2,,3
2878 .global arm_scale_q15
2879 .syntax unified
2880 .thumb
2881 .thumb_func
2882 .fpu fpv4-sp-d16
2884 arm_scale_q15:
2885 .LFB182:
2886 .file 36 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * Title: arm_scale_q15.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * Description: Multiplies a Q15 vector by a scalar
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** @addtogroup BasicScale
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** @brief Multiplies a Q15 vector by a scalar.
ARM GAS /tmp/ccnDQoMC.s page 190
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** @param[in] pSrc points to the input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** @param[in] scaleFract fractional portion of the scale value
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** @param[in] shift number of bits to shift the result by
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** @param[out] pDst points to the output vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** @param[in] blockSize number of samples in each vector
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** @return none
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** @par Scaling and Overflow Behavior
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** These are multiplied to yield a 2.30 intermediate result and this is shifted wit
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** */
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** #if defined(ARM_MATH_MVEI)
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** #include "arm_helium_utils.h"
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** void arm_scale_q15(
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** const q15_t * pSrc,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** q15_t scaleFract,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** int8_t shift,
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** q15_t * pDst,
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** uint32_t blockSize)
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** {
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** uint32_t blkCnt; /* loop counters */
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** q15x8_t vecSrc;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** q15x8_t vecDst;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* Compute 8 outputs at a time */
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** blkCnt = blockSize >> 3;
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** while (blkCnt > 0U)
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** {
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /*
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * C = A * scale
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * Scale the input and then store the result in the destination buffer.
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** */
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** vecSrc = vld1q(pSrc);
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** vecDst = vmulhq(vecSrc, vdupq_n_s16(scaleFract));
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** vecDst = vqshlq_r(vecDst, shift + 1);
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** vst1q(pDst, vecDst);
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /*
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * Decrement the blockSize loop counter
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** */
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** blkCnt--;
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /*
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * advance vector source and destination pointers
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** */
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** pSrc += 8;
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** pDst += 8;
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** }
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /*
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * tail
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** */
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** blkCnt = blockSize & 7;
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** if (blkCnt > 0U)
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** {
ARM GAS /tmp/ccnDQoMC.s page 191
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt);;
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** vecSrc = vld1q(pSrc);
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** vecDst = vmulhq(vecSrc, vdupq_n_s16(scaleFract));
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** vecDst = vqshlq_r(vecDst, shift + 1);
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** vstrhq_p(pDst, vecDst, p0);
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** }
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** }
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** #else
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** void arm_scale_q15(
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** const q15_t *pSrc,
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** q15_t scaleFract,
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** int8_t shift,
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** q15_t *pDst,
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** uint32_t blockSize)
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** {
2887 .loc 36 116 0
2888 .cfi_startproc
2889 @ args = 4, pretend = 0, frame = 0
2890 @ frame_needed = 0, uses_anonymous_args = 0
2891 @ link register save eliminated.
2892 .LVL351:
2893 0000 30B4 push {r4, r5}
2894 .LCFI64:
2895 .cfi_def_cfa_offset 8
2896 .cfi_offset 4, -8
2897 .cfi_offset 5, -4
2898 .loc 36 116 0
2899 0002 029D ldr r5, [sp, #8]
2900 .LVL352:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** uint32_t blkCnt; /* Loop counter */
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** int8_t kShift = 15 - shift; /* Shift to apply after scaling */
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** #if defined (ARM_MATH_LOOPUNROLL)
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** #if defined (ARM_MATH_DSP)
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** q31_t inA1, inA2;
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** q31_t out1, out2, out3, out4; /* Temporary output variables */
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** q15_t in1, in2, in3, in4; /* Temporary input variables */
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** #endif
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** #endif
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** #if defined (ARM_MATH_LOOPUNROLL)
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** blkCnt = blockSize >> 2U;
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** while (blkCnt > 0U)
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** {
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* C = A * scale */
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** #if defined (ARM_MATH_DSP)
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* read 2 times 2 samples at a time from source */
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** inA1 = read_q15x2_ia ((q15_t **) &pSrc);
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** inA2 = read_q15x2_ia ((q15_t **) &pSrc);
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
ARM GAS /tmp/ccnDQoMC.s page 192
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* Scale inputs and store result in temporary variables
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** * in single cycle by packing the outputs */
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** out2 = (q31_t) ((q15_t) (inA1 ) * scaleFract);
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** out4 = (q31_t) ((q15_t) (inA2 ) * scaleFract);
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* apply shifting */
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** out1 = out1 >> kShift;
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** out2 = out2 >> kShift;
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** out3 = out3 >> kShift;
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** out4 = out4 >> kShift;
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* saturate the output */
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** in1 = (q15_t) (__SSAT(out1, 16));
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** in2 = (q15_t) (__SSAT(out2, 16));
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** in3 = (q15_t) (__SSAT(out3, 16));
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** in4 = (q15_t) (__SSAT(out4, 16));
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* store result to destination */
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** write_q15x2_ia (&pDst, __PKHBT(in2, in1, 16));
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** write_q15x2_ia (&pDst, __PKHBT(in4, in3, 16));
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** #else
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** #endif
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* Decrement loop counter */
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** blkCnt--;
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** }
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* Loop unrolling: Compute remaining outputs */
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** blkCnt = blockSize % 0x4U;
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** #else
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* Initialize blkCnt with number of samples */
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** blkCnt = blockSize;
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** while (blkCnt > 0U)
2901 .loc 36 185 0
2902 0004 75B1 cbz r5, .L464
2903 0006 C2F10F02 rsb r2, r2, #15
2904 .LVL353:
2905 000a 52B2 sxtb r2, r2
2906 .LVL354:
2907 .L466:
2908 .LBB61:
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** {
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* C = A * scale */
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* Scale input and store result in destination buffer. */
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
ARM GAS /tmp/ccnDQoMC.s page 193
2909 .loc 36 190 0
2910 000c 30F8024B ldrh r4, [r0], #2
2911 .LVL355:
2912 .LBE61:
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** {
2913 .loc 36 185 0
2914 0010 013D subs r5, r5, #1
2915 .LVL356:
2916 .LBB62:
2917 .loc 36 190 0
2918 0012 14FB01F4 smulbb r4, r4, r1
2919 0016 44FA02F4 asr r4, r4, r2
2920 .syntax unified
2921 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c" 1
2922 001a 04F30F04 ssat r4, #16, r4
2923 @ 0 "" 2
2924 .LVL357:
2925 .thumb
2926 .syntax unified
2927 .LBE62:
2928 001e 23F8024B strh r4, [r3], #2 @ movhi
2929 .LVL358:
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** {
2930 .loc 36 185 0
2931 0022 F3D1 bne .L466
2932 .LVL359:
2933 .L464:
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** /* Decrement loop counter */
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** blkCnt--;
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** }
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c ****
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c **** }
2934 .loc 36 196 0
2935 0024 30BC pop {r4, r5}
2936 .LCFI65:
2937 .cfi_restore 5
2938 .cfi_restore 4
2939 .cfi_def_cfa_offset 0
2940 .LVL360:
2941 0026 7047 bx lr
2942 .cfi_endproc
2943 .LFE182:
2945 .section .text.arm_scale_q31,"ax",%progbits
2946 .align 1
2947 .p2align 2,,3
2948 .global arm_scale_q31
2949 .syntax unified
2950 .thumb
2951 .thumb_func
2952 .fpu fpv4-sp-d16
2954 arm_scale_q31:
2955 .LFB183:
2956 .file 37 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * Title: arm_scale_q31.c
ARM GAS /tmp/ccnDQoMC.s page 194
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * Description: Multiplies a Q31 vector by a scalar
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** @addtogroup BasicScale
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** @brief Multiplies a Q31 vector by a scalar.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** @param[in] pSrc points to the input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** @param[in] scaleFract fractional portion of the scale value
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** @param[in] shift number of bits to shift the result by
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** @param[out] pDst points to the output vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** @param[in] blockSize number of samples in each vector
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** @return none
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** @par Scaling and Overflow Behavior
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** These are multiplied to yield a 2.62 intermediate result and this is shifted wit
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** */
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** #if defined(ARM_MATH_MVEI)
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** #include "arm_helium_utils.h"
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** void arm_scale_q31(
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** const q31_t * pSrc,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** q31_t scaleFract,
ARM GAS /tmp/ccnDQoMC.s page 195
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** int8_t shift,
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** q31_t * pDst,
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** uint32_t blockSize)
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** uint32_t blkCnt; /* loop counters */
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** q31x4_t vecSrc;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** q31x4_t vecDst;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* Compute 4 outputs at a time */
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** blkCnt = blockSize >> 2;
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** while (blkCnt > 0U)
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /*
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * C = A * scale
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * Scale the input and then store the result in the destination buffer.
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** */
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** vecSrc = vld1q(pSrc);
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** vecDst = vmulhq(vecSrc, vdupq_n_s32(scaleFract));
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** vecDst = vqshlq_r(vecDst, shift + 1);
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** vst1q(pDst, vecDst);
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /*
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * Decrement the blockSize loop counter
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** */
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** blkCnt--;
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /*
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * advance vector source and destination pointers
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** */
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** pSrc += 4;
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** pDst += 4;
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** }
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /*
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** * tail
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** */
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** blkCnt = blockSize & 3;
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** if (blkCnt > 0U)
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** vecSrc = vld1q(pSrc);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** vecDst = vmulhq(vecSrc, vdupq_n_s32(scaleFract));
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** vecDst = vqshlq_r(vecDst, shift + 1);
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** vstrwq_p(pDst, vecDst, p0);
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** }
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** }
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** #else
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** void arm_scale_q31(
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** const q31_t *pSrc,
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** q31_t scaleFract,
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** int8_t shift,
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** q31_t *pDst,
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** uint32_t blockSize)
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
2957 .loc 37 112 0
2958 .cfi_startproc
2959 @ args = 4, pretend = 0, frame = 0
2960 @ frame_needed = 0, uses_anonymous_args = 0
2961 .LVL361:
ARM GAS /tmp/ccnDQoMC.s page 196
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** uint32_t blkCnt; /* Loop counter */
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** q31_t in, out; /* Temporary variables */
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** int8_t kShift = shift + 1; /* Shift to apply after scaling */
2962 .loc 37 115 0
2963 0000 0132 adds r2, r2, #1
2964 .LVL362:
2965 0002 52B2 sxtb r2, r2
2966 .LVL363:
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** uint32_t blkCnt; /* Loop counter */
2967 .loc 37 112 0
2968 0004 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr}
2969 .LCFI66:
2970 .cfi_def_cfa_offset 28
2971 .cfi_offset 4, -28
2972 .cfi_offset 5, -24
2973 .cfi_offset 6, -20
2974 .cfi_offset 7, -16
2975 .cfi_offset 8, -12
2976 .cfi_offset 9, -8
2977 .cfi_offset 14, -4
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** int8_t sign = (kShift & 0x80);
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** #if defined (ARM_MATH_LOOPUNROLL)
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** blkCnt = blockSize >> 2U;
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** if (sign == 0U)
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** while (blkCnt > 0U)
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* C = A * scale */
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* Scale input and store result in destination buffer. */
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = *pSrc++; /* read input from source */
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32; /* multiply input with scaler value */
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = in << kShift; /* apply shifting */
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** if (in != (out >> kShift)) /* saturate the result */
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = 0x7FFFFFFF ^ (in >> 31);
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *pDst++ = out; /* Store result destination */
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = *pSrc++;
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32;
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = in << kShift;
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** if (in != (out >> kShift))
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = 0x7FFFFFFF ^ (in >> 31);
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *pDst++ = out;
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = *pSrc++;
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32;
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = in << kShift;
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** if (in != (out >> kShift))
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = 0x7FFFFFFF ^ (in >> 31);
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *pDst++ = out;
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = *pSrc++;
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32;
ARM GAS /tmp/ccnDQoMC.s page 197
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = in << kShift;
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** if (in != (out >> kShift))
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = 0x7FFFFFFF ^ (in >> 31);
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *pDst++ = out;
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* Decrement loop counter */
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** blkCnt--;
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** }
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** }
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** else
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** while (blkCnt > 0U)
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* C = A * scale */
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* Scale input and store result in destination buffer. */
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = *pSrc++; /* read four inputs from source */
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32; /* multiply input with scaler value */
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = in >> -kShift; /* apply shifting */
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *pDst++ = out; /* Store result destination */
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = *pSrc++;
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32;
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = in >> -kShift;
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *pDst++ = out;
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = *pSrc++;
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32;
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = in >> -kShift;
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *pDst++ = out;
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = *pSrc++;
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32;
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = in >> -kShift;
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *pDst++ = out;
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* Decrement loop counter */
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** blkCnt--;
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** }
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** }
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* Loop unrolling: Compute remaining outputs */
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** blkCnt = blockSize % 0x4U;
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** #else
198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* Initialize blkCnt with number of samples */
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** blkCnt = blockSize;
201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** if (sign == 0U)
2978 .loc 37 204 0
2979 0008 002A cmp r2, #0
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** uint32_t blkCnt; /* Loop counter */
2980 .loc 37 112 0
2981 000a 079E ldr r6, [sp, #28]
ARM GAS /tmp/ccnDQoMC.s page 198
2982 .LVL364:
2983 .loc 37 204 0
2984 000c 1ADB blt .L485
205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** while (blkCnt > 0U)
2985 .loc 37 206 0
2986 000e 8EB1 cbz r6, .L472
207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* C = A * scale */
209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* Scale input and store result in destination buffer. */
211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = *pSrc++;
212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32;
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = in << kShift;
214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** if (in != (out >> kShift))
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = 0x7FFFFFFF ^ (in >> 31);
2987 .loc 37 215 0
2988 0010 6FF0004E mvn lr, #-2147483648
2989 .L476:
2990 .LVL365:
212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = in << kShift;
2991 .loc 37 212 0
2992 0014 50F8044B ldr r4, [r0], #4
2993 .LVL366:
2994 0018 81FB0489 smull r8, r9, r1, r4
2995 .LVL367:
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** if (in != (out >> kShift))
2996 .loc 37 213 0
2997 001c 09FA02F4 lsl r4, r9, r2
2998 .LVL368:
214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = 0x7FFFFFFF ^ (in >> 31);
2999 .loc 37 214 0
3000 0020 44FA02F7 asr r7, r4, r2
3001 0024 4F45 cmp r7, r9
3002 .loc 37 215 0
3003 0026 8EEAE97C eor ip, lr, r9, asr #31
214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = 0x7FFFFFFF ^ (in >> 31);
3004 .loc 37 214 0
3005 002a 05D0 beq .L477
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
3006 .loc 37 206 0
3007 002c 013E subs r6, r6, #1
3008 .LVL369:
216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *pDst++ = out;
3009 .loc 37 216 0
3010 002e 43F804CB str ip, [r3], #4
3011 .LVL370:
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
3012 .loc 37 206 0
3013 0032 EFD1 bne .L476
3014 .LVL371:
3015 .L472:
217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* Decrement loop counter */
219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** blkCnt--;
220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** }
221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** }
ARM GAS /tmp/ccnDQoMC.s page 199
222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** else
223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** while (blkCnt > 0U)
225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* C = A * scale */
227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* Scale input and store result in destination buffer. */
229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = *pSrc++;
230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** in = ((q63_t) in * scaleFract) >> 32;
231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = in >> -kShift;
232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *pDst++ = out;
233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** /* Decrement loop counter */
235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** blkCnt--;
236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** }
237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** }
238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** }
3016 .loc 37 239 0
3017 0034 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc}
3018 .LVL372:
3019 .L477:
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
3020 .loc 37 206 0
3021 0038 013E subs r6, r6, #1
3022 .LVL373:
216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *pDst++ = out;
3023 .loc 37 216 0
3024 003a 43F8044B str r4, [r3], #4
3025 .LVL374:
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
3026 .loc 37 206 0
3027 003e E9D1 bne .L476
3028 .loc 37 239 0
3029 0040 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc}
3030 .LVL375:
3031 .L485:
224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
3032 .loc 37 224 0
3033 0044 002E cmp r6, #0
3034 0046 F5D0 beq .L472
3035 0048 5242 negs r2, r2
3036 .LVL376:
3037 .L479:
230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** out = in >> -kShift;
3038 .loc 37 230 0
3039 004a 50F8044B ldr r4, [r0], #4
3040 .LVL377:
3041 004e 81FB0445 smull r4, r5, r1, r4
3042 .LVL378:
231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** *pDst++ = out;
3043 .loc 37 231 0
3044 0052 45FA02F4 asr r4, r5, r2
3045 .LVL379:
224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
3046 .loc 37 224 0
3047 0056 013E subs r6, r6, #1
ARM GAS /tmp/ccnDQoMC.s page 200
3048 .LVL380:
232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c ****
3049 .loc 37 232 0
3050 0058 43F8044B str r4, [r3], #4
3051 .LVL381:
224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c **** {
3052 .loc 37 224 0
3053 005c F5D1 bne .L479
3054 .loc 37 239 0
3055 005e BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc}
3056 .cfi_endproc
3057 .LFE183:
3059 0062 00BF .section .text.arm_scale_q7,"ax",%progbits
3060 .align 1
3061 .p2align 2,,3
3062 .global arm_scale_q7
3063 .syntax unified
3064 .thumb
3065 .thumb_func
3066 .fpu fpv4-sp-d16
3068 arm_scale_q7:
3069 .LFB184:
3070 .file 38 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * Title: arm_scale_q7.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * Description: Multiplies a Q7 vector by a scalar
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
ARM GAS /tmp/ccnDQoMC.s page 201
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** @addtogroup BasicScale
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** @brief Multiplies a Q7 vector by a scalar.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** @param[in] pSrc points to the input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** @param[in] scaleFract fractional portion of the scale value
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** @param[in] shift number of bits to shift the result by
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** @param[out] pDst points to the output vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** @param[in] blockSize number of samples in each vector
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** @return none
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** @par Scaling and Overflow Behavior
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** These are multiplied to yield a 2.14 intermediate result and this is shifted wit
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** */
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** #if defined(ARM_MATH_MVEI)
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** #include "arm_helium_utils.h"
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** void arm_scale_q7(
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** const q7_t * pSrc,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** q7_t scaleFract,
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** int8_t shift,
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** q7_t * pDst,
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** uint32_t blockSize)
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** {
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** uint32_t blkCnt; /* loop counters */
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** q7x16_t vecSrc;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** q7x16_t vecDst;
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /* Compute 16 outputs at a time */
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** blkCnt = blockSize >> 4;
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** while (blkCnt > 0U)
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** {
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /*
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * C = A * scale
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * Scale the input and then store the result in the destination buffer.
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** */
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** vecSrc = vld1q(pSrc);
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** vecDst = vmulhq(vecSrc, vdupq_n_s8(scaleFract));
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** vecDst = vqshlq_r(vecDst, shift + 1);
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** vst1q(pDst, vecDst);
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /*
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * Decrement the blockSize loop counter
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** */
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** blkCnt--;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /*
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * advance vector source and destination pointers
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** */
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** pSrc += 16;
ARM GAS /tmp/ccnDQoMC.s page 202
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** pDst += 16;
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** }
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /*
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** * tail
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** */
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** blkCnt = blockSize & 0xF;
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** if (blkCnt > 0U)
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** {
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** mve_pred16_t p0 = vctp8q(blkCnt);
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** vecSrc = vld1q(pSrc);
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** vecDst = vmulhq(vecSrc, vdupq_n_s8(scaleFract));
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** vecDst = vqshlq_r(vecDst, shift + 1);
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** vstrbq_p(pDst, vecDst, p0);
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** }
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** }
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** #else
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** void arm_scale_q7(
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** const q7_t * pSrc,
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** q7_t scaleFract,
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** int8_t shift,
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** q7_t * pDst,
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** uint32_t blockSize)
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** {
3071 .loc 38 116 0
3072 .cfi_startproc
3073 @ args = 4, pretend = 0, frame = 0
3074 @ frame_needed = 0, uses_anonymous_args = 0
3075 @ link register save eliminated.
3076 .LVL382:
3077 0000 30B4 push {r4, r5}
3078 .LCFI67:
3079 .cfi_def_cfa_offset 8
3080 .cfi_offset 4, -8
3081 .cfi_offset 5, -4
3082 .loc 38 116 0
3083 0002 029D ldr r5, [sp, #8]
3084 .LVL383:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** uint32_t blkCnt; /* Loop counter */
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** int8_t kShift = 7 - shift; /* Shift to apply after scaling */
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** #if defined (ARM_MATH_LOOPUNROLL)
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** #if defined (ARM_MATH_DSP)
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** q7_t in1, in2, in3, in4; /* Temporary input variables */
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** q7_t out1, out2, out3, out4; /* Temporary output variables */
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** #endif
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** blkCnt = blockSize >> 2U;
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** while (blkCnt > 0U)
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** {
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /* C = A * scale */
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** #if defined (ARM_MATH_DSP)
ARM GAS /tmp/ccnDQoMC.s page 203
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /* Reading 4 inputs from memory */
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** in1 = *pSrc++;
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** in2 = *pSrc++;
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** in3 = *pSrc++;
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** in4 = *pSrc++;
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /* Scale inputs and store result in the temporary variable. */
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /* Pack and store result in destination buffer (in single write) */
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** #else
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** #endif
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /* Decrement loop counter */
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** blkCnt--;
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** }
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /* Loop unrolling: Compute remaining outputs */
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** blkCnt = blockSize % 0x4U;
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** #else
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /* Initialize blkCnt with number of samples */
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** blkCnt = blockSize;
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** while (blkCnt > 0U)
3085 .loc 38 170 0
3086 0004 7DB1 cbz r5, .L486
3087 0006 C2F10702 rsb r2, r2, #7
3088 .LVL384:
3089 000a 52B2 sxtb r2, r2
3090 000c 0544 add r5, r5, r0
3091 .LVL385:
3092 .L488:
3093 .LBB63:
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** {
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /* C = A * scale */
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /* Scale input and store result in destination buffer. */
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
3094 .loc 38 175 0
3095 000e 10F9014B ldrsb r4, [r0], #1
3096 .LVL386:
3097 0012 14FB01F4 smulbb r4, r4, r1
3098 .LBE63:
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** {
3099 .loc 38 170 0
ARM GAS /tmp/ccnDQoMC.s page 204
3100 0016 A842 cmp r0, r5
3101 .LBB64:
3102 .loc 38 175 0
3103 0018 44FA02F4 asr r4, r4, r2
3104 .syntax unified
3105 @ 175 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c" 1
3106 001c 04F30704 ssat r4, #8, r4
3107 @ 0 "" 2
3108 .LVL387:
3109 .thumb
3110 .syntax unified
3111 .LBE64:
3112 0020 03F8014B strb r4, [r3], #1
3113 .LVL388:
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** {
3114 .loc 38 170 0
3115 0024 F3D1 bne .L488
3116 .LVL389:
3117 .L486:
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** /* Decrement loop counter */
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** blkCnt--;
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** }
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c ****
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c **** }
3118 .loc 38 181 0
3119 0026 30BC pop {r4, r5}
3120 .LCFI68:
3121 .cfi_restore 5
3122 .cfi_restore 4
3123 .cfi_def_cfa_offset 0
3124 .LVL390:
3125 0028 7047 bx lr
3126 .cfi_endproc
3127 .LFE184:
3129 002a 00BF .section .text.arm_shift_q15,"ax",%progbits
3130 .align 1
3131 .p2align 2,,3
3132 .global arm_shift_q15
3133 .syntax unified
3134 .thumb
3135 .thumb_func
3136 .fpu fpv4-sp-d16
3138 arm_shift_q15:
3139 .LFB185:
3140 .file 39 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * Title: arm_shift_q15.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * Description: Shifts the elements of a Q15 vector by a specified number of bits
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /*
ARM GAS /tmp/ccnDQoMC.s page 205
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** @addtogroup BasicShift
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** @brief Shifts the elements of a Q15 vector a specified number of bits
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** @param[in] pSrc points to the input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative valu
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** @param[out] pDst points to the output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** The function uses saturating arithmetic.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** */
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #if defined(ARM_MATH_MVEI)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #include "arm_helium_utils.h"
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** void arm_shift_q15(
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** const q15_t * pSrc,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** int8_t shiftBits,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** q15_t * pDst,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** uint32_t blockSize)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** uint32_t blkCnt; /* loop counters */
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** q15x8_t vecSrc;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** q15x8_t vecDst;
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* Compute 8 outputs at a time */
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** blkCnt = blockSize >> 3;
ARM GAS /tmp/ccnDQoMC.s page 206
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** while (blkCnt > 0U)
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /*
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * C = A (>> or <<) shiftBits
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * Shift the input and then store the result in the destination buffer.
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** vecSrc = vld1q(pSrc);
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** vecDst = vqshlq_r(vecSrc, shiftBits);
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** vst1q(pDst, vecDst);
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /*
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * Decrement the blockSize loop counter
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** */
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** blkCnt--;
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /*
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * advance vector source and destination pointers
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** */
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** pSrc += 8;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** pDst += 8;
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** }
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /*
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** * tail
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** */
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** blkCnt = blockSize & 7;
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** if (blkCnt > 0U)
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt);
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** vecSrc = vld1q(pSrc);
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** vecDst = vqshlq_r(vecSrc, shiftBits);
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** vstrhq_p(pDst, vecDst, p0);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** }
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** }
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #else
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** void arm_shift_q15(
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** const q15_t * pSrc,
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** int8_t shiftBits,
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** q15_t * pDst,
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** uint32_t blockSize)
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
3141 .loc 39 107 0
3142 .cfi_startproc
3143 @ args = 0, pretend = 0, frame = 0
3144 @ frame_needed = 0, uses_anonymous_args = 0
3145 @ link register save eliminated.
3146 .LVL391:
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** uint32_t blkCnt; /* Loop counter */
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #if defined (ARM_MATH_LOOPUNROLL)
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #if defined (ARM_MATH_DSP)
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** q15_t in1, in2; /* Temporary input variables */
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #endif
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** blkCnt = blockSize >> 2U;
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
ARM GAS /tmp/ccnDQoMC.s page 207
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* If the shift value is positive then do right shift else left shift */
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** if (sign == 0U)
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** while (blkCnt > 0U)
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* C = A << shiftBits */
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #if defined (ARM_MATH_DSP)
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* read 2 samples from source */
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** in1 = *pSrc++;
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** in2 = *pSrc++;
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* Shift the inputs and then store the results in the destination buffer. */
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** write_q15x2_ia (&pDst, __PKHBT(__SSAT((in1 << shiftBits), 16),
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** __SSAT((in2 << shiftBits), 16), 16));
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #else
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** write_q15x2_ia (&pDst, __PKHBT(__SSAT((in2 << shiftBits), 16),
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** __SSAT((in1 << shiftBits), 16), 16));
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* read 2 samples from source */
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** in1 = *pSrc++;
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** in2 = *pSrc++;
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** write_q15x2_ia (&pDst, __PKHBT(__SSAT((in1 << shiftBits), 16),
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** __SSAT((in2 << shiftBits), 16), 16));
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #else
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** write_q15x2_ia (&pDst, __PKHBT(__SSAT((in2 << shiftBits), 16),
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** __SSAT((in1 << shiftBits), 16), 16));
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #else
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #endif
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* Decrement loop counter */
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** blkCnt--;
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** }
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** }
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** else
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** while (blkCnt > 0U)
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* C = A >> shiftBits */
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #if defined (ARM_MATH_DSP)
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* read 2 samples from source */
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** in1 = *pSrc++;
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** in2 = *pSrc++;
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* Shift the inputs and then store the results in the destination buffer. */
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN
ARM GAS /tmp/ccnDQoMC.s page 208
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** write_q15x2_ia (&pDst, __PKHBT((in1 >> -shiftBits),
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** (in2 >> -shiftBits), 16));
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #else
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** write_q15x2_ia (&pDst, __PKHBT((in2 >> -shiftBits),
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** (in1 >> -shiftBits), 16));
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* read 2 samples from source */
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** in1 = *pSrc++;
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** in2 = *pSrc++;
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** write_q15x2_ia (&pDst, __PKHBT((in1 >> -shiftBits),
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** (in2 >> -shiftBits), 16));
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #else
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** write_q15x2_ia (&pDst, __PKHBT((in2 >> -shiftBits),
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** (in1 >> -shiftBits), 16));
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #else
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *pDst++ = (*pSrc++ >> -shiftBits);
198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *pDst++ = (*pSrc++ >> -shiftBits);
199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *pDst++ = (*pSrc++ >> -shiftBits);
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *pDst++ = (*pSrc++ >> -shiftBits);
201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #endif
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* Decrement loop counter */
204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** blkCnt--;
205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** }
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** }
207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* Loop unrolling: Compute remaining outputs */
209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** blkCnt = blockSize % 0x4U;
210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #else
212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* Initialize blkCnt with number of samples */
214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** blkCnt = blockSize;
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* If the shift value is positive then do right shift else left shift */
219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** if (sign == 0U)
3147 .loc 39 219 0
3148 0000 0029 cmp r1, #0
3149 .LVL392:
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** uint32_t blkCnt; /* Loop counter */
3150 .loc 39 107 0
3151 0002 10B4 push {r4}
3152 .LCFI69:
3153 .cfi_def_cfa_offset 4
3154 .cfi_offset 4, -4
3155 .loc 39 219 0
3156 0004 0DDB blt .L506
220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** while (blkCnt > 0U)
3157 .loc 39 221 0
ARM GAS /tmp/ccnDQoMC.s page 209
3158 0006 4BB1 cbz r3, .L494
3159 .LVL393:
3160 .L498:
3161 .LBB65:
222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* C = A << shiftBits */
224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* Shift input and store result in destination buffer. */
226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
3162 .loc 39 226 0
3163 0008 30F9024B ldrsh r4, [r0], #2
3164 .LVL394:
3165 .LBE65:
221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
3166 .loc 39 221 0
3167 000c 013B subs r3, r3, #1
3168 .LVL395:
3169 .LBB66:
3170 .loc 39 226 0
3171 000e 04FA01F4 lsl r4, r4, r1
3172 .syntax unified
3173 @ 226 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c" 1
3174 0012 04F30F04 ssat r4, #16, r4
3175 @ 0 "" 2
3176 .LVL396:
3177 .thumb
3178 .syntax unified
3179 .LBE66:
3180 0016 22F8024B strh r4, [r2], #2 @ movhi
3181 .LVL397:
221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
3182 .loc 39 221 0
3183 001a F5D1 bne .L498
3184 .LVL398:
3185 .L494:
227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* Decrement loop counter */
229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** blkCnt--;
230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** }
231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** }
232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** else
233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** while (blkCnt > 0U)
235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* C = A >> shiftBits */
237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* Shift input and store result in destination buffer. */
239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** *pDst++ = (*pSrc++ >> -shiftBits);
240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** /* Decrement loop counter */
242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** blkCnt--;
243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** }
244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** }
245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** }
3186 .loc 39 246 0
3187 001c 5DF8044B ldr r4, [sp], #4
ARM GAS /tmp/ccnDQoMC.s page 210
3188 .LCFI70:
3189 .cfi_remember_state
3190 .cfi_restore 4
3191 .cfi_def_cfa_offset 0
3192 0020 7047 bx lr
3193 .LVL399:
3194 .L506:
3195 .LCFI71:
3196 .cfi_restore_state
234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
3197 .loc 39 234 0
3198 0022 002B cmp r3, #0
3199 0024 FAD0 beq .L494
3200 0026 4942 negs r1, r1
3201 .LVL400:
3202 .L499:
239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
3203 .loc 39 239 0
3204 0028 30F9024B ldrsh r4, [r0], #2
3205 .LVL401:
234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
3206 .loc 39 234 0
3207 002c 013B subs r3, r3, #1
3208 .LVL402:
239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c ****
3209 .loc 39 239 0
3210 002e 44FA01F4 asr r4, r4, r1
3211 0032 22F8024B strh r4, [r2], #2 @ movhi
3212 .LVL403:
234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c **** {
3213 .loc 39 234 0
3214 0036 F7D1 bne .L499
3215 .loc 39 246 0
3216 0038 5DF8044B ldr r4, [sp], #4
3217 .LCFI72:
3218 .cfi_restore 4
3219 .cfi_def_cfa_offset 0
3220 003c 7047 bx lr
3221 .cfi_endproc
3222 .LFE185:
3224 003e 00BF .section .text.arm_shift_q31,"ax",%progbits
3225 .align 1
3226 .p2align 2,,3
3227 .global arm_shift_q31
3228 .syntax unified
3229 .thumb
3230 .thumb_func
3231 .fpu fpv4-sp-d16
3233 arm_shift_q31:
3234 .LFB186:
3235 .file 40 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * Title: arm_shift_q31.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * Description: Shifts the elements of a Q31 vector by a specified number of bits
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * $Date: 18. March 2019
ARM GAS /tmp/ccnDQoMC.s page 211
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /**
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** @defgroup BasicShift Vector Shift
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** Shifts the elements of a fixed-point vector by a specified number of bits.
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** There are separate functions for Q7, Q15, and Q31 data types.
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** The underlying algorithm used is:
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** <pre>
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** pDst[n] = pSrc[n] << shift, 0 <= n < blockSize.
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** </pre>
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** If <code>shift</code> is positive then the elements of the vector are shifted to the left.
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** If <code>shift</code> is negative then the elements of the vector are shifted to the right.
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** The functions support in-place computation allowing the source and destination
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** pointers to reference the same memory buffer.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** */
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /**
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** @addtogroup BasicShift
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** @{
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** */
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /**
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** @brief Shifts the elements of a Q31 vector a specified number of bits.
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** @param[in] pSrc points to the input vector
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative valu
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** @param[out] pDst points to the output vector
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** @param[in] blockSize number of samples in the vector
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** @return none
ARM GAS /tmp/ccnDQoMC.s page 212
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** @par Scaling and Overflow Behavior
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** The function uses saturating arithmetic.
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** */
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** #if defined(ARM_MATH_MVEI)
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** #include "arm_helium_utils.h"
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** void arm_shift_q31(
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** const q31_t * pSrc,
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** int8_t shiftBits,
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** q31_t * pDst,
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** uint32_t blockSize)
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** uint32_t blkCnt; /* loop counters */
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** q31x4_t vecSrc;
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** q31x4_t vecDst;
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* Compute 4 outputs at a time */
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** blkCnt = blockSize >> 2;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** while (blkCnt > 0U)
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /*
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * C = A (>> or <<) shiftBits
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * Shift the input and then store the result in the destination buffer.
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** */
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** vecSrc = vld1q((q31_t const *) pSrc);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** vecDst = vqshlq_r(vecSrc, shiftBits);
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** vst1q(pDst, vecDst);
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /*
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * Decrement the blockSize loop counter
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** */
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** blkCnt--;
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /*
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * advance vector source and destination pointers
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** */
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** pSrc += 4;
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** pDst += 4;
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** }
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /*
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** * tail
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** */
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** blkCnt = blockSize & 3;
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** if (blkCnt > 0U)
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt);
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** vecSrc = vld1q((q31_t const *) pSrc);
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** vecDst = vqshlq_r(vecSrc, shiftBits);
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** vstrwq_p(pDst, vecDst, p0);
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** }
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** }
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** #else
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** void arm_shift_q31(
ARM GAS /tmp/ccnDQoMC.s page 213
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** const q31_t * pSrc,
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** int8_t shiftBits,
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** q31_t * pDst,
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** uint32_t blockSize)
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
3236 .loc 40 125 0
3237 .cfi_startproc
3238 @ args = 0, pretend = 0, frame = 0
3239 @ frame_needed = 0, uses_anonymous_args = 0
3240 .LVL404:
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** uint32_t blkCnt; /* Loop counter */
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** #if defined (ARM_MATH_LOOPUNROLL)
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** q31_t in, out; /* Temporary variables */
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** blkCnt = blockSize >> 2U;
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* If the shift value is positive then do right shift else left shift */
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** if (sign == 0U)
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** while (blkCnt > 0U)
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* C = A << shiftBits */
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* Shift input and store result in destination buffer. */
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** in = *pSrc++;
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** out = in << shiftBits;
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** if (in != (out >> shiftBits))
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** out = 0x7FFFFFFF ^ (in >> 31);
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *pDst++ = out;
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** in = *pSrc++;
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** out = in << shiftBits;
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** if (in != (out >> shiftBits))
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** out = 0x7FFFFFFF ^ (in >> 31);
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *pDst++ = out;
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** in = *pSrc++;
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** out = in << shiftBits;
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** if (in != (out >> shiftBits))
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** out = 0x7FFFFFFF ^ (in >> 31);
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *pDst++ = out;
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** in = *pSrc++;
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** out = in << shiftBits;
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** if (in != (out >> shiftBits))
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** out = 0x7FFFFFFF ^ (in >> 31);
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *pDst++ = out;
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* Decrement loop counter */
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** blkCnt--;
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** }
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** }
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** else
ARM GAS /tmp/ccnDQoMC.s page 214
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** while (blkCnt > 0U)
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* C = A >> shiftBits */
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* Shift input and store results in destination buffer. */
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *pDst++ = (*pSrc++ >> -shiftBits);
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *pDst++ = (*pSrc++ >> -shiftBits);
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *pDst++ = (*pSrc++ >> -shiftBits);
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *pDst++ = (*pSrc++ >> -shiftBits);
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* Decrement loop counter */
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** blkCnt--;
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** }
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** }
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* Loop unrolling: Compute remaining outputs */
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** blkCnt = blockSize % 0x4U;
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** #else
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* Initialize blkCnt with number of samples */
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** blkCnt = blockSize;
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* If the shift value is positive then do right shift else left shift */
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** if (sign == 0U)
3241 .loc 40 200 0
3242 0000 0029 cmp r1, #0
3243 .LVL405:
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** uint32_t blkCnt; /* Loop counter */
3244 .loc 40 125 0
3245 0002 2DE9F041 push {r4, r5, r6, r7, r8, lr}
3246 .LCFI73:
3247 .cfi_def_cfa_offset 24
3248 .cfi_offset 4, -24
3249 .cfi_offset 5, -20
3250 .cfi_offset 6, -16
3251 .cfi_offset 7, -12
3252 .cfi_offset 8, -8
3253 .cfi_offset 14, -4
3254 .loc 40 200 0
3255 0006 24DB blt .L520
201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** while (blkCnt > 0U)
3256 .loc 40 202 0
3257 0008 DBB1 cbz r3, .L507
3258 000a 043A subs r2, r2, #4
3259 .LVL406:
3260 000c A1F12008 sub r8, r1, #32
3261 0010 C1F1200E rsb lr, r1, #32
3262 .LBB67:
3263 .LBB68:
3264 .file 41 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /******************************************************************************
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @file arm_math.h
ARM GAS /tmp/ccnDQoMC.s page 215
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Public header file for CMSIS DSP Library
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @version V1.7.0
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @date 18. March 2019
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ******************************************************************************/
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /*
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved.
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * SPDX-License-Identifier: Apache-2.0
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * not use this file except in compliance with the License.
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * You may obtain a copy of the License at
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * www.apache.org/licenses/LICENSE-2.0
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Unless required by applicable law or agreed to in writing, software
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * See the License for the specific language governing permissions and
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * limitations under the License.
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \mainpage CMSIS DSP Software Library
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Introduction
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This user manual describes the CMSIS DSP software library,
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * a suite of common signal processing functions for use on Cortex-M and Cortex-A processor
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * based devices.
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library is divided into a number of functions each covering a specific category:
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Basic math functions
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Fast math functions
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Complex math functions
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Filtering functions
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Matrix functions
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Transform functions
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Motor control functions
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Statistical functions
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Support functions
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Interpolation functions
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Support Vector Machine functions (SVM)
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Bayes classifier functions
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Distance functions
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library has generally separate functions for operating on 8-bit integers, 16-bit integers,
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 32-bit integer and 32-bit floating-point values.
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Using the Library
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library installer contains prebuilt versions of the libraries in the <code>Lib</code> fold
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Here is the list of pre-built libraries :
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7lfdp_math.lib (Cortex-M7, Little endian, Double Precision Floating Point Unit)
ARM GAS /tmp/ccnDQoMC.s page 216
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7bfdp_math.lib (Cortex-M7, Big endian, Double Precision Floating Point Unit)
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7lfsp_math.lib (Cortex-M7, Little endian, Single Precision Floating Point Unit)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7bfsp_math.lib (Cortex-M7, Big endian and Single Precision Floating Point Unit on
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7l_math.lib (Cortex-M7, Little endian)
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7b_math.lib (Cortex-M7, Big endian)
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4lf_math.lib (Cortex-M4, Little endian, Floating Point Unit)
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4bf_math.lib (Cortex-M4, Big endian, Floating Point Unit)
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4l_math.lib (Cortex-M4, Little endian)
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4b_math.lib (Cortex-M4, Big endian)
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM3l_math.lib (Cortex-M3, Little endian)
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM3b_math.lib (Cortex-M3, Big endian)
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM0l_math.lib (Cortex-M0 / Cortex-M0+, Little endian)
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM0b_math.lib (Cortex-M0 / Cortex-M0+, Big endian)
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MBLl_math.lib (Armv8-M Baseline, Little endian)
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLl_math.lib (Armv8-M Mainline, Little endian)
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLlfsp_math.lib (Armv8-M Mainline, Little endian, Single Precision Floating Point
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLld_math.lib (Armv8-M Mainline, Little endian, DSP instructions)
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLldfsp_math.lib (Armv8-M Mainline, Little endian, DSP instructions, Single Precis
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library functions are declared in the public file <code>arm_math.h</code> which is placed
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Simply include this file and link the appropriate library in the application and begin calling
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * public header file <code> arm_math.h</code> for Cortex-M cores with little endian and big endi
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Examples
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * --------
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library ships with a number of examples which demonstrate how to use the library functions
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Toolchain Support
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library is now tested on Fast Models building with cmake.
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Core M0, M7, A5 are tested.
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Building the Library
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library installer contains a project file to rebuild libraries on MDK toolchain in the <co
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM_math.uvprojx
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The libraries can be built by opening the arm_cortexM_math.uvprojx project in MDK-ARM, selecti
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is also a work in progress cmake build. The README file is giving more details.
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Preprocessor Macros
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Each library project have different preprocessor macros.
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_BIG_ENDIAN:
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default libra
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
ARM GAS /tmp/ccnDQoMC.s page 217
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_MATRIX_CHECK:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_ROUNDING:
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_ROUNDING for rounding on support functions
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_LOOPUNROLL:
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_LOOPUNROLL to enable manual loop unrolling in DSP functions
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_NEON:
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_NEON to enable Neon versions of the DSP functions.
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * It is not enabled by default when Neon is available because performances are
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * dependent on the compiler and target architecture.
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_NEON_EXPERIMENTAL:
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * of some DSP functions. Experimental Neon versions currently do not have better
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * performances than the scalar versions.
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_HELIUM:
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * It implies the flags ARM_MATH_MVEF and ARM_MATH_MVEI and ARM_MATH_FLOAT16.
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_MVEF:
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Select Helium versions of the f32 algorithms.
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * It implies ARM_MATH_FLOAT16 and ARM_MATH_MVEI.
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_MVEI:
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Select Helium versions of the int and fixed point algorithms.
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_FLOAT16:
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Float16 implementations of some algorithms (Requires MVE extension).
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <hr>
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * CMSIS-DSP in ARM::CMSIS Pack
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * -----------------------------
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The following files relevant to CMSIS-DSP are present in the <b>ARM::CMSIS</b> Pack directorie
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |File/Folder |Content
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |---------------------------------|-----------------------------------------------------------
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\Documentation\\DSP | This documentation
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\DSP_Lib_TestSuite | DSP_Lib test suite
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Examples | Example projects demonstrating the usage of the library fu
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Include | DSP_Lib include files
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Lib | DSP_Lib binaries
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Projects | Projects to rebuild DSP_Lib binaries
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Source | DSP_Lib source files
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <hr>
ARM GAS /tmp/ccnDQoMC.s page 218
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Revision History of CMSIS-DSP
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Please refer to \ref ChangeLog_pg.
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupMath Basic Math Functions
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupFastMath Fast Math Functions
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions provides a fast approximation to sine, cosine, and square root.
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * As compared to most of the other functions in the CMSIS math library, the fast math functions
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * operate on individual values and not arrays.
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are separate functions for Q15, Q31, and floating-point data.
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupCmplxMath Complex Math Functions
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions operates on complex data vectors.
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The data in the complex arrays is stored in an interleaved fashion
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * (real, imag, real, imag, ...).
198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In the API functions, the number of samples in a complex array refers
199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * to the number of complex values; the array contains twice this number of
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * real values.
201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupFilters Filtering Functions
205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupMatrix Matrix Functions
209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions provides basic matrix math operations.
211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The functions operate on matrix data structures. For example,
212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the type
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * definition for the floating-point matrix structure is shown
214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * below:
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * typedef struct
217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * {
218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * uint16_t numRows; // number of rows of the matrix.
219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * uint16_t numCols; // number of columns of the matrix.
220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * float32_t *pData; // points to the data of the matrix.
221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * } arm_matrix_instance_f32;
222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are similar definitions for Q15 and Q31 data types.
224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The structure specifies the size of the matrix and then points to
226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * an array of data. The array is of size <code>numRows X numCols</code>
227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and the values are arranged in row order. That is, the
228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * matrix element (i, j) is stored at:
229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * pData[i*numCols + j]
ARM GAS /tmp/ccnDQoMC.s page 219
231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Init Functions
234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is an associated initialization function for each type of matrix
235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * data structure.
236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The initialization function sets the values of the internal structure fields.
237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to \ref arm_mat_init_f32(), \ref arm_mat_init_q31() and \ref arm_mat_init_q15()
238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * for floating-point, Q31 and Q15 types, respectively.
239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par
241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Use of the initialization function is optional. However, if initialization function is used
242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * then the instance structure cannot be placed into a const data section.
243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * To place the instance structure in a const data
244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * section, manually initialize the data structure. For example:
245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <code>arm_matrix_instance_f32 S = {nRows, nColumns, pData};</code>
247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <code>arm_matrix_instance_q31 S = {nRows, nColumns, pData};</code>
248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <code>arm_matrix_instance_q15 S = {nRows, nColumns, pData};</code>
249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where <code>nRows</code> specifies the number of rows, <code>nColumns</code>
251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * specifies the number of columns, and <code>pData</code> points to the
252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * data array.
253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Size Checking
255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * By default all of the matrix functions perform size checking on the input and
256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * output matrices. For example, the matrix addition function verifies that the
257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * two input matrices and the output matrix all have the same number of rows and
258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * columns. If the size check fails the functions return:
259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH
261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Otherwise the functions return
263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SUCCESS
265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is some overhead associated with this matrix size checking.
267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The matrix size checking is enabled via the \#define
268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_MATRIX_CHECK
270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * within the library project settings. By default this macro is defined
272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and size checking is enabled. By changing the project settings and
273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * undefining this macro size checking is eliminated and the functions
274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * run a bit faster. With size checking disabled the functions always
275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * return <code>ARM_MATH_SUCCESS</code>.
276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupTransforms Transform Functions
280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupController Controller Functions
284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupStats Statistics Functions
ARM GAS /tmp/ccnDQoMC.s page 220
288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupSupport Support Functions
292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupInterpolation Interpolation Functions
296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * These functions perform 1- and 2-dimensional interpolation of data.
297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Linear interpolation is used for 1-dimensional data and
298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * bilinear interpolation is used for 2-dimensional data.
299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupExamples Examples
303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupSVM SVM Functions
307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions is implementing SVM classification on 2 classes.
308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The training must be done from scikit-learn. The parameters can be easily
309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * generated from the scikit-learn object. Some examples are given in
310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * DSP/Testing/PatternGeneration/SVM.py
311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * If more than 2 classes are needed, the functions in this folder
313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * will have to be used, as building blocks, to do multi-class classification.
314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * No multi-class classification is provided in this SVM folder.
316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupBayes Bayesian estimators
322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Implement the naive gaussian Bayes estimator.
324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The training must be done from scikit-learn.
325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The parameters can be easily
327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * generated from the scikit-learn object. Some examples are given in
328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * DSP/Testing/PatternGeneration/Bayes.py
329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupDistance Distance functions
333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Distance functions for use with clustering algorithms.
335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are distance functions for float vectors and boolean vectors.
336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef _ARM_MATH_H
341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define _ARM_MATH_H
342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __cplusplus
344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** extern "C"
ARM GAS /tmp/ccnDQoMC.s page 221
345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Compiler specific diagnostic adjustment */
349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM )
350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __GNUC__ )
354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic push
355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wconversion"
357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ )
360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TI_ARM__ )
362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __CSMC__ )
364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TASKING__ )
366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( _MSC_VER )
368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #error Unknown compiler
371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Included for instrinsics definitions */
375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (_MSC_VER )
376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <stdint.h>
377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_FORCEINLINE static __forceinline
378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_INLINE static __inline
379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __ALIGNED(x) __declspec(align(x))
380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined (__GNUC_PYTHON__)
382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <stdint.h>
383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_FORCEINLINE static __attribute__((inline))
385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_INLINE static __attribute__((inline))
386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wunused-function"
387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wattributes"
388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include "cmsis_compiler.h"
391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <string.h>
396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <math.h>
397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <float.h>
398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <limits.h>
399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_MAX ((float64_t)DBL_MAX)
ARM GAS /tmp/ccnDQoMC.s page 222
402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_MAX ((float32_t)FLT_MAX)
403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_MAX ((float16_t)FLT_MAX)
406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_MIN (-DBL_MAX)
409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_MIN (-FLT_MAX)
410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_MIN (-(float16_t)FLT_MAX)
413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_ABSMAX ((float64_t)DBL_MAX)
416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_ABSMAX ((float32_t)FLT_MAX)
417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_ABSMAX ((float16_t)FLT_MAX)
420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_ABSMIN ((float64_t)0.0)
423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_ABSMIN ((float32_t)0.0)
424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_ABSMIN ((float16_t)0.0)
427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_MAX ((q31_t)(0x7FFFFFFFL))
430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_MAX ((q15_t)(0x7FFF))
431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_MAX ((q7_t)(0x7F))
432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_MIN ((q31_t)(0x80000000L))
433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_MIN ((q15_t)(0x8000))
434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_MIN ((q7_t)(0x80))
435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_ABSMAX ((q31_t)(0x7FFFFFFFL))
437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_ABSMAX ((q15_t)(0x7FFF))
438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_ABSMAX ((q7_t)(0x7F))
439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_ABSMIN ((q31_t)0)
440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_ABSMIN ((q15_t)0)
441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_ABSMIN ((q7_t)0)
442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* evaluate ARM DSP feature */
444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_DSP 1
446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON)
449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <arm_neon.h>
450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_HELIUM)
453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_MVEF
454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_FLOAT16
455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_MVEF)
458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_MVEI
ARM GAS /tmp/ccnDQoMC.s page 223
459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_FLOAT16
460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI)
463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <arm_mve.h>
464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for reciprocal calculation in Normalized LMS
469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define DELTA_Q31 ((q31_t)(0x100))
472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define DELTA_Q15 ((q15_t)0x5)
473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define INDEX_MASK 0x0000003F
474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef PI
475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define PI 3.14159265358979f
476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for SINE and COSINE Fast math approximations
480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_TABLE_SIZE 512
483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_Q31_SHIFT (32 - 10)
484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_Q15_SHIFT (16 - 10)
485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define CONTROLLER_Q31_SHIFT (32 - 9)
486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define TABLE_SPACING_Q31 0x400000
487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define TABLE_SPACING_Q15 0x80
488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for SINE and COSINE Controller functions
491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31(q31) Fixed value of 2/360 */
493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define INPUT_SPACING 0xB60B61
495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros for complex numbers
498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Dimension C vector space */
501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define CMPLX_DIM 2
502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Error status returned by some functions in the library.
505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef enum
508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SUCCESS = 0, /**< No error */
510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */
511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */
512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation
513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */
514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SINGULAR = -5, /**< Input matrix is singular and cannot be inverted */
515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */
ARM GAS /tmp/ccnDQoMC.s page 224
516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_status;
517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional data type in 1.7 format.
520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8_t q7_t;
522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional data type in 1.15 format.
525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16_t q15_t;
527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional data type in 1.31 format.
530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32_t q31_t;
532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit fractional data type in 1.63 format.
535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64_t q63_t;
537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point type definition.
540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float float32_t;
542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit floating-point type definition.
545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef double float64_t;
547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief vector types
550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) || defined (ARM_MATH_MVEI)
552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit fractional 128-bit vector data type in 1.63 format
554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64x2_t q63x2_t;
556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector data type in 1.31 format.
559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t q31x4_t;
561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector data type with 16-bit alignement in 1.15 format.
564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) int16x8_t q15x8_t;
566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector data type with 8-bit alignement in 1.7 format.
569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(1) int8x16_t q7x16_t;
571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
ARM GAS /tmp/ccnDQoMC.s page 225
573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector pair data type in 1.31 format.
574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x2_t q31x4x2_t;
576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector quadruplet data type in 1.31 format.
579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x4_t q31x4x4_t;
581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector pair data type in 1.15 format.
584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x2_t q15x8x2_t;
586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector quadruplet data type in 1.15 format.
589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x4_t q15x8x4_t;
591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector pair data type in 1.7 format.
594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x2_t q7x16x2_t;
596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector quadruplet data type in 1.7 format.
599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x4_t q7x16x4_t;
601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional data type in 9.23 format.
604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32_t q23_t;
606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector data type in 9.23 format.
609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t q23x4_t;
611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit status 128-bit vector data type.
614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64x2_t status64x2_t;
616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit status 128-bit vector data type.
619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t status32x4_t;
621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit status 128-bit vector data type.
624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8_t status16x8_t;
626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit status 128-bit vector data type.
629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
ARM GAS /tmp/ccnDQoMC.s page 226
630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16_t status8x16_t;
631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF) /* floating point vector*/
636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector type
638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4_t f32x4_t;
640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector data type
644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) float16x8_t f16x8_t;
646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector pair data type
650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x2_t f32x4x2_t;
652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector quadruplet data type
655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x4_t f32x4x4_t;
657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector pair data type
661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x2_t f16x8x2_t;
663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector quadruplet data type
666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x4_t f16x8x4_t;
668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit ubiquitous 128-bit vector data type
672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any32x4_t
674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32x4_t f;
676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32x4_t i;
677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any32x4_t;
678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit ubiquitous 128-bit vector data type
682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any16x8_t
684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float16x8_t f;
686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int16x8_t i;
ARM GAS /tmp/ccnDQoMC.s page 227
687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any16x8_t;
688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON)
693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector data type in 1.31 format.
695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2_t q31x2_t;
697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector data type in 1.15 format.
700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) int16x4_t q15x4_t;
702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector data type in 1.7 format.
705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(1) int8x8_t q7x8_t;
707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit float 64-bit vector data type.
710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2_t f32x2_t;
712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit float 64-bit vector data type.
716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) float16x4_t f16x4_t;
718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector triplet data type
722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x3_t f32x4x3_t;
724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector triplet data type
728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x3_t f16x8x3_t;
730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector triplet data type in 1.31 format
734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x3_t q31x4x3_t;
736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector triplet data type in 1.15 format
739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x3_t q15x8x3_t;
741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector triplet data type in 1.7 format
ARM GAS /tmp/ccnDQoMC.s page 228
744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x3_t q7x16x3_t;
746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector pair data type
749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x2_t f32x2x2_t;
751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector triplet data type
754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x3_t f32x2x3_t;
756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector quadruplet data type
759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x4_t f32x2x4_t;
761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector pair data type
765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x2_t f16x4x2_t;
767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector triplet data type
770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x3_t f16x4x3_t;
772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector quadruplet data type
775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x4_t f16x4x4_t;
777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector pair data type in 1.31 format
781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2x2_t q31x2x2_t;
783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector triplet data type in 1.31 format
786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2x3_t q31x2x3_t;
788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector quadruplet data type in 1.31 format
791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x3_t q31x2x4_t;
793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector pair data type in 1.15 format
796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x2_t q15x4x2_t;
798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector triplet data type in 1.15 format
ARM GAS /tmp/ccnDQoMC.s page 229
801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x2_t q15x4x3_t;
803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector quadruplet data type in 1.15 format
806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x3_t q15x4x4_t;
808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector pair data type in 1.7 format
811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x2_t q7x8x2_t;
813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector triplet data type in 1.7 format
816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x3_t q7x8x3_t;
818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector quadruplet data type in 1.7 format
821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x4_t q7x8x4_t;
823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit ubiquitous 64-bit vector data type
826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any32x2_t
828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32x2_t f;
830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32x2_t i;
831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any32x2_t;
832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit ubiquitous 64-bit vector data type
836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any16x4_t
838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float16x4_t f;
840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int16x4_t i;
841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any16x4_t;
842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit status 64-bit vector data type.
846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t status32x2_t;
848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit status 64-bit vector data type.
851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8_t status16x4_t;
853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit status 64-bit vector data type.
856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16_t status8x8_t;
ARM GAS /tmp/ccnDQoMC.s page 230
858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief definition to read/write two 16 bit values.
865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @deprecated
866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM )
868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t __packed
869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __GNUC__ )
872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ )
874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t __packed
875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TI_ARM__ )
876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __CSMC__ )
878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TASKING__ )
880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE __un(aligned) int32_t
881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined(_MSC_VER )
882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #error Unknown compiler
885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr))
888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_CONST(addr) ( (__SIMD32_TYPE * ) (addr))
889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE * ) (addr))
890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD64(addr) (*( int64_t **) & (addr))
891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define STEP(x) (x) <= 0 ? 0 : 1
893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define SQ(x) ((x) * (x))
894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* SIMD replacement */
896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer.
900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2 (
904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pQ15)
905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, pQ15, 4);
910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = (pQ15[1] << 16) | (pQ15[0] & 0x0FFFF) ;
912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
ARM GAS /tmp/ccnDQoMC.s page 231
915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer and increment pointer afterwards.
919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2_ia (
923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15)
924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ15, 4);
929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF);
931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 += 2;
934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer and decrement pointer afterwards.
939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2_da (
943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15)
944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ15, 4);
949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF);
951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 -= 2;
954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 2 Q15 to Q15 pointer and increment pointer afterwards.
959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value
961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none
962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q15x2_ia (
964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15,
965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value)
966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value;
968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (*pQ15, &val, 4);
970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ15)[0] = (val & 0x0FFFF);
ARM GAS /tmp/ccnDQoMC.s page 232
972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ15)[1] = (val >> 16) & 0x0FFFF;
973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 += 2;
976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 2 Q15 to Q15 pointer.
980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value
982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none
983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q15x2 (
985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pQ15,
986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value)
987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value;
989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (pQ15, &val, 4);
992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** pQ15[0] = val & 0x0FFFF;
994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** pQ15[1] = val >> 16;
995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 4 Q7 from Q7 pointer and increment pointer afterwards.
1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value
1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q7x4_ia (
1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7)
1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ7, 4);
1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val =(((*pQ7)[3] & 0x0FF) << 24) | (((*pQ7)[2] & 0x0FF) << 16) | (((*pQ7)[1] & 0x0FF) << 8) |
1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 += 4;
1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 4 Q7 from Q7 pointer and decrement pointer afterwards.
1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value
1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q7x4_da (
1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7)
1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
ARM GAS /tmp/ccnDQoMC.s page 233
1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ7, 4);
1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((((*pQ7)[3]) & 0x0FF) << 24) | ((((*pQ7)[2]) & 0x0FF) << 16) | ((((*pQ7)[1]) & 0x0FF) <<
1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 -= 4;
1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 4 Q7 to Q7 pointer and increment pointer afterwards.
1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value
1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value
1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none
1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q7x4_ia (
1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7,
1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value)
1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value;
1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (*pQ7, &val, 4);
1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[0] = val & 0x0FF;
1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[1] = (val >> 8) & 0x0FF;
1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[2] = (val >> 16) & 0x0FF;
1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[3] = (val >> 24) & 0x0FF;
1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
1060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 += 4;
1061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /*
1064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** Normally those kind of definitions are in a compiler file
1066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** in Core or Core_A.
1067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** But for MSVC compiler it is a bit special. The goal is very specific
1069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** to CMSIS-DSP and only to allow the use of this library from other
1070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** systems like Python or Matlab.
1071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** MSVC is not going to be used to cross-compile to ARM. So, having a MSVC
1073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** compiler file in Core or Core_A would not make sense.
1074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( _MSC_VER ) || defined(__GNUC_PYTHON__)
1077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t data)
1078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (data == 0U) { return 32U; }
1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t count = 0U;
1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t mask = 0x80000000U;
1083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while ((data & mask) == 0U)
1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
ARM GAS /tmp/ccnDQoMC.s page 234
1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** count += 1U;
1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** mask = mask >> 1U;
1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return count;
1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
1093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if ((sat >= 1U) && (sat <= 32U))
1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
1097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const int32_t min = -1 - max ;
1098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (val > max)
1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return max;
1101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (val < min)
1103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return min;
1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return val;
1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
1111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (sat <= 31U)
1113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t max = ((1U << sat) - 1U);
1115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (val > (int32_t)max)
1116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return max;
1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (val < 0)
1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return 0U;
1122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (uint32_t)val;
1125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
1127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef ARM_MATH_DSP
1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief definition to pack two 16 bit values.
1131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \
1133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) )
1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \
1135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) )
1136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief definition to pack four 8 bit values.
1140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef ARM_MATH_BIG_ENDIAN
1142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \
ARM GAS /tmp/ccnDQoMC.s page 235
1143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \
1144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
1145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v3) << 24) & (int32_t)0xFF000000) )
1146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
1147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \
1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \
1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
1150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v0) << 24) & (int32_t)0xFF000000) )
1151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
1152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q63 to Q31 values.
1156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t clip_q63_to_q31(
1158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t x)
1159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
3265 .loc 41 1161 0
3266 0014 6FF0004C mvn ip, #-2147483648
3267 .LVL407:
3268 .L511:
3269 .LBE68:
3270 .LBE67:
203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* C = A << shiftBits */
205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* Shift input and store result in destination buffer. */
207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *pDst++ = clip_q63_to_q31((q63_t) *pSrc++ << shiftBits);
3271 .loc 40 207 0
3272 0018 50F8044B ldr r4, [r0], #4
3273 .LVL408:
3274 001c E717 asrs r7, r4, #31
3275 001e 04FA08F6 lsl r6, r4, r8
3276 0022 07FA01F5 lsl r5, r7, r1
3277 0026 3543 orrs r5, r5, r6
3278 0028 24FA0EF6 lsr r6, r4, lr
3279 002c 3543 orrs r5, r5, r6
3280 002e 8C40 lsls r4, r4, r1
3281 .LVL409:
3282 .LBB70:
3283 .LBB69:
3284 .loc 41 1161 0
3285 0030 B5EBE47F cmp r5, r4, asr #31
3286 0034 8CEAE576 eor r6, ip, r5, asr #31
3287 0038 05D0 beq .L512
3288 .LBE69:
3289 .LBE70:
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
3290 .loc 40 202 0
3291 003a 013B subs r3, r3, #1
3292 .LVL410:
3293 .loc 40 207 0
3294 003c 42F8046F str r6, [r2, #4]!
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
3295 .loc 40 202 0
ARM GAS /tmp/ccnDQoMC.s page 236
3296 0040 EAD1 bne .L511
3297 .LVL411:
3298 .L507:
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* Decrement loop counter */
210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** blkCnt--;
211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** }
212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** }
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** else
214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** while (blkCnt > 0U)
216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* C = A >> shiftBits */
218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* Shift input and store result in destination buffer. */
220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** *pDst++ = (*pSrc++ >> -shiftBits);
221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** /* Decrement loop counter */
223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** blkCnt--;
224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** }
225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** }
226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** }
3299 .loc 40 227 0
3300 0042 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
3301 .LVL412:
3302 .L512:
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
3303 .loc 40 202 0
3304 0046 013B subs r3, r3, #1
3305 .LVL413:
207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
3306 .loc 40 207 0
3307 0048 42F8044F str r4, [r2, #4]!
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
3308 .loc 40 202 0
3309 004c E4D1 bne .L511
3310 .loc 40 227 0
3311 004e BDE8F081 pop {r4, r5, r6, r7, r8, pc}
3312 .LVL414:
3313 .L520:
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
3314 .loc 40 215 0
3315 0052 002B cmp r3, #0
3316 0054 F5D0 beq .L507
3317 0056 4942 negs r1, r1
3318 .LVL415:
3319 .L514:
220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
3320 .loc 40 220 0
3321 0058 50F8044B ldr r4, [r0], #4
3322 .LVL416:
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
3323 .loc 40 215 0
3324 005c 013B subs r3, r3, #1
3325 .LVL417:
220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c ****
ARM GAS /tmp/ccnDQoMC.s page 237
3326 .loc 40 220 0
3327 005e 44FA01F4 asr r4, r4, r1
3328 0062 42F8044B str r4, [r2], #4
3329 .LVL418:
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c **** {
3330 .loc 40 215 0
3331 0066 F7D1 bne .L514
3332 .loc 40 227 0
3333 0068 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
3334 .cfi_endproc
3335 .LFE186:
3337 .section .text.arm_shift_q7,"ax",%progbits
3338 .align 1
3339 .p2align 2,,3
3340 .global arm_shift_q7
3341 .syntax unified
3342 .thumb
3343 .thumb_func
3344 .fpu fpv4-sp-d16
3346 arm_shift_q7:
3347 .LFB187:
3348 .file 42 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * Title: arm_shift_q7.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * Description: Processing function for the Q7 Shifting
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /**
ARM GAS /tmp/ccnDQoMC.s page 238
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** @addtogroup BasicShift
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** @brief Shifts the elements of a Q7 vector a specified number of bits
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** @param[in] pSrc points to the input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative valu
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** @param[out] pDst points to the output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** @par onditions for optimum performance
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** Input and output buffers should be aligned by 32-bit
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** @par Scaling and Overflow Behavior
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** The function uses saturating arithmetic.
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** */
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #if defined(ARM_MATH_MVEI)
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #include "arm_helium_utils.h"
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** void arm_shift_q7(
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** const q7_t * pSrc,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** int8_t shiftBits,
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** q7_t * pDst,
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** uint32_t blockSize)
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** uint32_t blkCnt; /* loop counters */
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** q7x16_t vecSrc;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** q7x16_t vecDst;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* Compute 16 outputs at a time */
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** blkCnt = blockSize >> 4;
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** while (blkCnt > 0U)
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /*
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * C = A (>> or <<) shiftBits
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * Shift the input and then store the result in the destination buffer.
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** */
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** vecSrc = vld1q(pSrc);
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** vecDst = vqshlq_r(vecSrc, shiftBits);
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** vst1q(pDst, vecDst);
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /*
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * Decrement the blockSize loop counter
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** */
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** blkCnt--;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /*
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * advance vector source and destination pointers
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** */
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** pSrc += 16;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** pDst += 16;
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** }
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /*
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** * tail
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** */
ARM GAS /tmp/ccnDQoMC.s page 239
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** blkCnt = blockSize & 0xF;
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** if (blkCnt > 0U)
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** mve_pred16_t p0 = vctp8q(blkCnt);
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** vecSrc = vld1q(pSrc);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** vecDst = vqshlq_r(vecSrc, shiftBits);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** vstrbq_p(pDst, vecDst, p0);
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** }
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** }
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #else
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** void arm_shift_q7(
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** const q7_t * pSrc,
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** int8_t shiftBits,
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** q7_t * pDst,
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** uint32_t blockSize)
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
3349 .loc 42 109 0
3350 .cfi_startproc
3351 @ args = 0, pretend = 0, frame = 0
3352 @ frame_needed = 0, uses_anonymous_args = 0
3353 @ link register save eliminated.
3354 .LVL419:
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** uint32_t blkCnt; /* Loop counter */
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #if defined (ARM_MATH_LOOPUNROLL)
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #if defined (ARM_MATH_DSP)
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** q7_t in1, in2, in3, in4; /* Temporary input variables */
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #endif
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** blkCnt = blockSize >> 2U;
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* If the shift value is positive then do right shift else left shift */
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** if (sign == 0U)
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** while (blkCnt > 0U)
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* C = A << shiftBits */
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #if defined (ARM_MATH_DSP)
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* Read 4 inputs */
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** in1 = *pSrc++;
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** in2 = *pSrc++;
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** in3 = *pSrc++;
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** in4 = *pSrc++;
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* Pack and store result in destination buffer (in single write) */
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** write_q7x4_ia (&pDst, __PACKq7(__SSAT((in1 << shiftBits), 8),
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** __SSAT((in2 << shiftBits), 8),
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** __SSAT((in3 << shiftBits), 8),
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** __SSAT((in4 << shiftBits), 8) ));
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #else
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
ARM GAS /tmp/ccnDQoMC.s page 240
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #endif
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* Decrement loop counter */
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** blkCnt--;
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** }
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** }
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** else
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** while (blkCnt > 0U)
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* C = A >> shiftBits */
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #if defined (ARM_MATH_DSP)
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* Read 4 inputs */
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** in1 = *pSrc++;
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** in2 = *pSrc++;
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** in3 = *pSrc++;
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** in4 = *pSrc++;
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* Pack and store result in destination buffer (in single write) */
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** write_q7x4_ia (&pDst, __PACKq7((in1 >> -shiftBits),
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** (in2 >> -shiftBits),
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** (in3 >> -shiftBits),
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** (in4 >> -shiftBits) ));
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #else
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *pDst++ = (*pSrc++ >> -shiftBits);
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *pDst++ = (*pSrc++ >> -shiftBits);
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *pDst++ = (*pSrc++ >> -shiftBits);
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *pDst++ = (*pSrc++ >> -shiftBits);
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #endif
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* Decrement loop counter */
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** blkCnt--;
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** }
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** }
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* Loop unrolling: Compute remaining outputs */
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** blkCnt = blockSize % 0x4U;
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #else
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* Initialize blkCnt with number of samples */
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** blkCnt = blockSize;
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* If the shift value is positive then do right shift else left shift */
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** if (sign == 0U)
3355 .loc 42 193 0
3356 0000 0029 cmp r1, #0
3357 .LVL420:
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** uint32_t blkCnt; /* Loop counter */
3358 .loc 42 109 0
3359 0002 10B4 push {r4}
3360 .LCFI74:
ARM GAS /tmp/ccnDQoMC.s page 241
3361 .cfi_def_cfa_offset 4
3362 .cfi_offset 4, -4
3363 .loc 42 193 0
3364 0004 0EDB blt .L533
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** while (blkCnt > 0U)
3365 .loc 42 195 0
3366 0006 53B1 cbz r3, .L521
3367 0008 0344 add r3, r3, r0
3368 .LVL421:
3369 .L525:
3370 .LBB71:
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* C = A << shiftBits */
198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* Shift input and store result in destination buffer. */
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
3371 .loc 42 200 0
3372 000a 10F9014B ldrsb r4, [r0], #1
3373 .LVL422:
3374 .LBE71:
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
3375 .loc 42 195 0
3376 000e 8342 cmp r3, r0
3377 .LBB72:
3378 .loc 42 200 0
3379 0010 04FA01F4 lsl r4, r4, r1
3380 .syntax unified
3381 @ 200 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c" 1
3382 0014 04F30704 ssat r4, #8, r4
3383 @ 0 "" 2
3384 .LVL423:
3385 .thumb
3386 .syntax unified
3387 .LBE72:
3388 0018 02F8014B strb r4, [r2], #1
3389 .LVL424:
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
3390 .loc 42 195 0
3391 001c F5D1 bne .L525
3392 .LVL425:
3393 .L521:
201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* Decrement loop counter */
203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** blkCnt--;
204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** }
205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** }
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** else
207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** while (blkCnt > 0U)
209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* C = A >> shiftBits */
211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* Shift input and store result in destination buffer. */
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** *pDst++ = (*pSrc++ >> -shiftBits);
214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** /* Decrement loop counter */
ARM GAS /tmp/ccnDQoMC.s page 242
216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** blkCnt--;
217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** }
218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** }
219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** }
3394 .loc 42 220 0
3395 001e 5DF8044B ldr r4, [sp], #4
3396 .LCFI75:
3397 .cfi_remember_state
3398 .cfi_restore 4
3399 .cfi_def_cfa_offset 0
3400 0022 7047 bx lr
3401 .LVL426:
3402 .L533:
3403 .LCFI76:
3404 .cfi_restore_state
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
3405 .loc 42 208 0
3406 0024 002B cmp r3, #0
3407 0026 FAD0 beq .L521
3408 0028 4942 negs r1, r1
3409 002a 0344 add r3, r3, r0
3410 .LVL427:
3411 .L526:
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
3412 .loc 42 213 0
3413 002c 10F9014B ldrsb r4, [r0], #1
3414 .LVL428:
3415 0030 0C41 asrs r4, r4, r1
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
3416 .loc 42 208 0
3417 0032 9842 cmp r0, r3
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c ****
3418 .loc 42 213 0
3419 0034 02F8014B strb r4, [r2], #1
3420 .LVL429:
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c **** {
3421 .loc 42 208 0
3422 0038 F8D1 bne .L526
3423 .loc 42 220 0
3424 003a 5DF8044B ldr r4, [sp], #4
3425 .LCFI77:
3426 .cfi_restore 4
3427 .cfi_def_cfa_offset 0
3428 003e 7047 bx lr
3429 .cfi_endproc
3430 .LFE187:
3432 .section .text.arm_sub_f32,"ax",%progbits
3433 .align 1
3434 .p2align 2,,3
3435 .global arm_sub_f32
3436 .syntax unified
3437 .thumb
3438 .thumb_func
3439 .fpu fpv4-sp-d16
3441 arm_sub_f32:
3442 .LFB188:
ARM GAS /tmp/ccnDQoMC.s page 243
3443 .file 43 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * Title: arm_sub_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * Description: Floating-point vector subtraction
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** @defgroup BasicSub Vector Subtraction
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** Element-by-element subtraction of two vectors.
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** <pre>
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** pDst[n] = pSrcA[n] - pSrcB[n], 0 <= n < blockSize.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** </pre>
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** There are separate functions for floating-point, Q7, Q15, and Q31 data types.
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** */
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /**
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** @addtogroup BasicSub
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** @{
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** */
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /**
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** @brief Floating-point vector subtraction.
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** @param[in] pSrcA points to the first input vector
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** @param[in] pSrcB points to the second input vector
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** @param[out] pDst points to the output vector
ARM GAS /tmp/ccnDQoMC.s page 244
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** @param[in] blockSize number of samples in each vector
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** @return none
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** */
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** #include "arm_helium_utils.h"
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** void arm_sub_f32(
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** const float32_t * pSrcA,
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** const float32_t * pSrcB,
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** float32_t * pDst,
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** uint32_t blockSize)
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** {
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** uint32_t blkCnt; /* Loop counter */
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** f32x4_t vec1;
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** f32x4_t vec2;
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** f32x4_t res;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Compute 4 outputs at a time */
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** blkCnt = blockSize >> 2U;
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** while (blkCnt > 0U)
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** {
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* C = A + B */
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Add and then store the results in the destination buffer. */
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** vec1 = vld1q(pSrcA);
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** vec2 = vld1q(pSrcB);
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** res = vsubq(vec1, vec2);
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** vst1q(pDst, res);
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Increment pointers */
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** pSrcA += 4;
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** pSrcB += 4;
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** pDst += 4;
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Decrement the loop counter */
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** blkCnt--;
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** }
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Tail */
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** blkCnt = blockSize & 0x3;
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** if (blkCnt > 0U)
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** {
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* C = A + B */
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** vec1 = vld1q(pSrcA);
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** vec2 = vld1q(pSrcB);
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** vstrwq_p(pDst, vsubq(vec1,vec2), p0);
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** }
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** }
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** #else
ARM GAS /tmp/ccnDQoMC.s page 245
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** void arm_sub_f32(
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** const float32_t * pSrcA,
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** const float32_t * pSrcB,
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** float32_t * pDst,
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** uint32_t blockSize)
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** {
3444 .loc 43 119 0
3445 .cfi_startproc
3446 @ args = 0, pretend = 0, frame = 0
3447 @ frame_needed = 0, uses_anonymous_args = 0
3448 @ link register save eliminated.
3449 .LVL430:
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** uint32_t blkCnt; /* Loop counter */
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** f32x4_t vec1;
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** f32x4_t vec2;
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** f32x4_t res;
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Compute 4 outputs at a time */
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** blkCnt = blockSize >> 2U;
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** while (blkCnt > 0U)
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** {
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* C = A - B */
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Subtract and then store the results in the destination buffer. */
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** vec1 = vld1q_f32(pSrcA);
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** vec2 = vld1q_f32(pSrcB);
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** res = vsubq_f32(vec1, vec2);
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** vst1q_f32(pDst, res);
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Increment pointers */
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** pSrcA += 4;
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** pSrcB += 4;
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** pDst += 4;
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Decrement the loop counter */
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** blkCnt--;
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** }
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Tail */
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** blkCnt = blockSize & 0x3;
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** #else
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** blkCnt = blockSize >> 2U;
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** while (blkCnt > 0U)
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** {
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* C = A - B */
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Subtract and store result in destination buffer. */
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** *pDst++ = (*pSrcA++) - (*pSrcB++);
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
ARM GAS /tmp/ccnDQoMC.s page 246
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** *pDst++ = (*pSrcA++) - (*pSrcB++);
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** *pDst++ = (*pSrcA++) - (*pSrcB++);
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** *pDst++ = (*pSrcA++) - (*pSrcB++);
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Decrement loop counter */
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** blkCnt--;
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** }
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Loop unrolling: Compute remaining outputs */
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** blkCnt = blockSize % 0x4U;
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** #else
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Initialize blkCnt with number of samples */
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** blkCnt = blockSize;
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** #endif /* #if defined(ARM_MATH_NEON) */
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** while (blkCnt > 0U)
3450 .loc 43 186 0
3451 0000 4BB1 cbz r3, .L534
3452 .LVL431:
3453 .L536:
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** {
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* C = A - B */
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Subtract and store result in destination buffer. */
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** *pDst++ = (*pSrcA++) - (*pSrcB++);
3454 .loc 43 191 0
3455 0002 F0EC017A vldmia.32 r0!, {s15}
3456 .LVL432:
3457 0006 B1EC017A vldmia.32 r1!, {s14}
3458 .LVL433:
3459 000a 77EEC77A vsub.f32 s15, s15, s14
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** {
3460 .loc 43 186 0
3461 000e 013B subs r3, r3, #1
3462 .LVL434:
3463 .loc 43 191 0
3464 0010 E2EC017A vstmia.32 r2!, {s15}
3465 .LVL435:
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** {
3466 .loc 43 186 0
3467 0014 F5D1 bne .L536
3468 .L534:
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** /* Decrement loop counter */
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** blkCnt--;
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** }
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c ****
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c **** }
3469 .loc 43 197 0
3470 0016 7047 bx lr
3471 .cfi_endproc
ARM GAS /tmp/ccnDQoMC.s page 247
3472 .LFE188:
3474 .section .text.arm_sub_q15,"ax",%progbits
3475 .align 1
3476 .p2align 2,,3
3477 .global arm_sub_q15
3478 .syntax unified
3479 .thumb
3480 .thumb_func
3481 .fpu fpv4-sp-d16
3483 arm_sub_q15:
3484 .LFB189:
3485 .file 44 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * Title: arm_sub_q15.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * Description: Q15 vector subtraction
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** @addtogroup BasicSub
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** @brief Q15 vector subtraction.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** @param[in] pSrcA points to the first input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** @param[in] pSrcB points to the second input vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** @param[out] pDst points to the output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** @param[in] blockSize number of samples in each vector
ARM GAS /tmp/ccnDQoMC.s page 248
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** The function uses saturating arithmetic.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** */
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #if defined(ARM_MATH_MVEI)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #include "arm_helium_utils.h"
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** void arm_sub_q15(
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** const q15_t * pSrcA,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** const q15_t * pSrcB,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** q15_t * pDst,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** uint32_t blockSize)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** {
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** uint32_t blkCnt; /* loop counters */
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** q15x8_t vecA;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** q15x8_t vecB;
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /* Compute 8 outputs at a time */
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** blkCnt = blockSize >> 3;
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** while (blkCnt > 0U)
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** {
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /*
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * C = A - B
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * Subtract and then store the results in the destination buffer.
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** vecA = vld1q(pSrcA);
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** vecB = vld1q(pSrcB);
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** vst1q(pDst, vqsubq(vecA, vecB));
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /*
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * Decrement the blockSize loop counter
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** */
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** blkCnt--;
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /*
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * advance vector source and destination pointers
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** */
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** pSrcA += 8;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** pSrcB += 8;
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** pDst += 8;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** }
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /*
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** * tail
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** */
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** blkCnt = blockSize & 7;
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** if (blkCnt > 0U)
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** {
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** mve_pred16_t p0 = vctp16q(blkCnt);
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** vecA = vld1q(pSrcA);
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** vecB = vld1q(pSrcB);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** vstrhq_p(pDst, vqsubq(vecA, vecB), p0);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** }
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** }
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
ARM GAS /tmp/ccnDQoMC.s page 249
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #else
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** void arm_sub_q15(
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** const q15_t * pSrcA,
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** const q15_t * pSrcB,
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** q15_t * pDst,
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** uint32_t blockSize)
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** {
3486 .loc 44 109 0
3487 .cfi_startproc
3488 @ args = 0, pretend = 0, frame = 0
3489 @ frame_needed = 0, uses_anonymous_args = 0
3490 @ link register save eliminated.
3491 .LVL436:
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** uint32_t blkCnt; /* Loop counter */
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #if defined (ARM_MATH_LOOPUNROLL)
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #if defined (ARM_MATH_DSP)
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** q31_t inA1, inA2;
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** q31_t inB1, inB2;
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #endif
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** blkCnt = blockSize >> 2U;
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** while (blkCnt > 0U)
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** {
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /* C = A - B */
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #if defined (ARM_MATH_DSP)
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /* read 2 times 2 samples at a time from sourceA */
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /* read 2 times 2 samples at a time from sourceB */
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /* Subtract and store 2 times 2 samples at a time */
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** write_q15x2_ia (&pDst, __QSUB16(inA1, inB1));
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** write_q15x2_ia (&pDst, __QSUB16(inA2, inB2));
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #else
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #endif
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /* Decrement loop counter */
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** blkCnt--;
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** }
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /* Loop unrolling: Compute remaining outputs */
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** blkCnt = blockSize % 0x4U;
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #else
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /* Initialize blkCnt with number of samples */
ARM GAS /tmp/ccnDQoMC.s page 250
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** blkCnt = blockSize;
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** while (blkCnt > 0U)
3492 .loc 44 158 0
3493 0000 63B1 cbz r3, .L549
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** uint32_t blkCnt; /* Loop counter */
3494 .loc 44 109 0
3495 0002 30B4 push {r4, r5}
3496 .LCFI78:
3497 .cfi_def_cfa_offset 8
3498 .cfi_offset 4, -8
3499 .cfi_offset 5, -4
3500 .LVL437:
3501 .L543:
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** {
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /* C = A - B */
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /* Subtract and store result in destination buffer. */
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #if defined (ARM_MATH_DSP)
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++);
3502 .loc 44 164 0
3503 0004 30F9024B ldrsh r4, [r0], #2
3504 .LVL438:
3505 0008 31F9025B ldrsh r5, [r1], #2
3506 .LVL439:
3507 .LBB73:
3508 .LBB74:
1779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
3509 .loc 3 1779 0
3510 .syntax unified
3511 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
3512 000c D4FA15F4 qsub16 r4, r4, r5
3513 @ 0 "" 2
3514 .LVL440:
3515 .thumb
3516 .syntax unified
3517 .LBE74:
3518 .LBE73:
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** {
3519 .loc 44 158 0
3520 0010 013B subs r3, r3, #1
3521 .LVL441:
3522 .loc 44 164 0
3523 0012 22F8024B strh r4, [r2], #2 @ movhi
3524 .LVL442:
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** {
3525 .loc 44 158 0
3526 0016 F5D1 bne .L543
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #else
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** #endif
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** /* Decrement loop counter */
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** blkCnt--;
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** }
ARM GAS /tmp/ccnDQoMC.s page 251
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c ****
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c **** }
3527 .loc 44 173 0
3528 0018 30BC pop {r4, r5}
3529 .LCFI79:
3530 .cfi_restore 5
3531 .cfi_restore 4
3532 .cfi_def_cfa_offset 0
3533 001a 7047 bx lr
3534 .LVL443:
3535 .L549:
3536 001c 7047 bx lr
3537 .cfi_endproc
3538 .LFE189:
3540 001e 00BF .section .text.arm_sub_q31,"ax",%progbits
3541 .align 1
3542 .p2align 2,,3
3543 .global arm_sub_q31
3544 .syntax unified
3545 .thumb
3546 .thumb_func
3547 .fpu fpv4-sp-d16
3549 arm_sub_q31:
3550 .LFB190:
3551 .file 45 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * Title: arm_sub_q31.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * Description: Q31 vector subtraction
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** @ingroup groupMath
ARM GAS /tmp/ccnDQoMC.s page 252
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** @addtogroup BasicSub
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** @brief Q31 vector subtraction.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** @param[in] pSrcA points to the first input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** @param[in] pSrcB points to the second input vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** @param[out] pDst points to the output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** The function uses saturating arithmetic.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** */
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** #if defined(ARM_MATH_MVEI)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** #include "arm_helium_utils.h"
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** void arm_sub_q31(
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** const q31_t * pSrcA,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** const q31_t * pSrcB,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** q31_t * pDst,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** uint32_t blockSize)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** {
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** uint32_t blkCnt;
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** q31x4_t vecA;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** q31x4_t vecB;
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /* Compute 4 outputs at a time */
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** blkCnt = blockSize >> 2;
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** while (blkCnt > 0U)
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** {
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /*
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * C = A + B
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * Add and then store the results in the destination buffer.
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** vecA = vld1q(pSrcA);
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** vecB = vld1q(pSrcB);
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** vst1q(pDst, vqsubq(vecA, vecB));
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /*
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * Decrement the blockSize loop counter
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** */
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** blkCnt--;
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /*
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * advance vector source and destination pointers
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** */
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** pSrcA += 4;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** pSrcB += 4;
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** pDst += 4;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** }
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /*
ARM GAS /tmp/ccnDQoMC.s page 253
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** * tail
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** */
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** blkCnt = blockSize & 3;
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** if (blkCnt > 0U)
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** {
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** mve_pred16_t p0 = vctp32q(blkCnt);
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** vecA = vld1q(pSrcA);
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** vecB = vld1q(pSrcB);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** vstrwq_p(pDst, vqsubq(vecA, vecB), p0);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** }
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** }
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** #else
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** void arm_sub_q31(
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** const q31_t * pSrcA,
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** const q31_t * pSrcB,
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** q31_t * pDst,
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** uint32_t blockSize)
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** {
3552 .loc 45 108 0
3553 .cfi_startproc
3554 @ args = 0, pretend = 0, frame = 0
3555 @ frame_needed = 0, uses_anonymous_args = 0
3556 @ link register save eliminated.
3557 .LVL444:
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** uint32_t blkCnt; /* Loop counter */
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** #if defined (ARM_MATH_LOOPUNROLL)
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** blkCnt = blockSize >> 2U;
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** while (blkCnt > 0U)
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** {
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /* C = A - B */
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /* Subtract and store result in destination buffer. */
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /* Decrement loop counter */
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** blkCnt--;
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** }
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /* Loop unrolling: Compute remaining outputs */
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** blkCnt = blockSize % 0x4U;
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** #else
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /* Initialize blkCnt with number of samples */
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** blkCnt = blockSize;
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
ARM GAS /tmp/ccnDQoMC.s page 254
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** while (blkCnt > 0U)
3558 .loc 45 143 0
3559 0000 63B1 cbz r3, .L559
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** uint32_t blkCnt; /* Loop counter */
3560 .loc 45 108 0
3561 0002 30B4 push {r4, r5}
3562 .LCFI80:
3563 .cfi_def_cfa_offset 8
3564 .cfi_offset 4, -8
3565 .cfi_offset 5, -4
3566 .LVL445:
3567 .L553:
3568 .LBB75:
3569 .LBB76:
3570 .loc 3 2125 0
3571 0004 50F8044B ldr r4, [r0], #4
3572 .LVL446:
3573 0008 51F8045B ldr r5, [r1], #4
3574 .LVL447:
3575 .syntax unified
3576 @ 2125 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
3577 000c 85FAA4F4 qsub r4, r4, r5
3578 @ 0 "" 2
3579 .LVL448:
3580 .thumb
3581 .syntax unified
3582 .LBE76:
3583 .LBE75:
3584 .loc 45 143 0
3585 0010 013B subs r3, r3, #1
3586 .LVL449:
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** {
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /* C = A - B */
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /* Subtract and store result in destination buffer. */
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
3587 .loc 45 148 0
3588 0012 42F8044B str r4, [r2], #4
3589 .LVL450:
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** {
3590 .loc 45 143 0
3591 0016 F5D1 bne .L553
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** /* Decrement loop counter */
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** blkCnt--;
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** }
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c ****
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c **** }
3592 .loc 45 154 0
3593 0018 30BC pop {r4, r5}
3594 .LCFI81:
3595 .cfi_restore 5
3596 .cfi_restore 4
3597 .cfi_def_cfa_offset 0
3598 001a 7047 bx lr
ARM GAS /tmp/ccnDQoMC.s page 255
3599 .LVL451:
3600 .L559:
3601 001c 7047 bx lr
3602 .cfi_endproc
3603 .LFE190:
3605 001e 00BF .section .text.arm_sub_q7,"ax",%progbits
3606 .align 1
3607 .p2align 2,,3
3608 .global arm_sub_q7
3609 .syntax unified
3610 .thumb
3611 .thumb_func
3612 .fpu fpv4-sp-d16
3614 arm_sub_q7:
3615 .LFB191:
3616 .file 46 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * Title: arm_sub_q7.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * Description: Q7 vector subtraction
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * $Date: 18. March 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** @addtogroup BasicSub
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** @brief Q7 vector subtraction.
ARM GAS /tmp/ccnDQoMC.s page 256
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** @param[in] pSrcA points to the first input vector
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** @param[in] pSrcB points to the second input vector
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** @param[out] pDst points to the output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** @par Scaling and Overflow Behavior
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** The function uses saturating arithmetic.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** */
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** #if defined(ARM_MATH_MVEI)
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** #include "arm_helium_utils.h"
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** void arm_sub_q7(
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** const q7_t * pSrcA,
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** const q7_t * pSrcB,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** q7_t * pDst,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** uint32_t blockSize)
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** {
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** uint32_t blkCnt; /* loop counters */
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** q7x16_t vecA;
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** q7x16_t vecB;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /* Compute 16 outputs at a time */
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** blkCnt = blockSize >> 4;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** while (blkCnt > 0U)
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** {
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /*
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * C = A - B
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * Subtract and then store the results in the destination buffer.
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** */
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** vecA = vld1q(pSrcA);
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** vecB = vld1q(pSrcB);
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** vst1q(pDst, vqsubq(vecA, vecB));
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /*
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * Decrement the blockSize loop counter
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** */
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** blkCnt--;
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /*
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * advance vector source and destination pointers
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** */
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** pSrcA += 16;
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** pSrcB += 16;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** pDst += 16;
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** }
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /*
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** * tail
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** */
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** blkCnt = blockSize & 0xF;
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** if (blkCnt > 0U)
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** {
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** mve_pred16_t p0 = vctp8q(blkCnt);
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** vecA = vld1q(pSrcA);
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** vecB = vld1q(pSrcB);
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** vstrbq_p(pDst, vqsubq(vecA, vecB), p0);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** }
ARM GAS /tmp/ccnDQoMC.s page 257
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** }
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** #else
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** void arm_sub_q7(
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** const q7_t * pSrcA,
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** const q7_t * pSrcB,
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** q7_t * pDst,
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** uint32_t blockSize)
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** {
3617 .loc 46 106 0
3618 .cfi_startproc
3619 @ args = 0, pretend = 0, frame = 0
3620 @ frame_needed = 0, uses_anonymous_args = 0
3621 @ link register save eliminated.
3622 .LVL452:
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** uint32_t blkCnt; /* Loop counter */
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** #if defined (ARM_MATH_LOOPUNROLL)
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** blkCnt = blockSize >> 2U;
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** while (blkCnt > 0U)
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** {
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /* C = A - B */
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** #if defined (ARM_MATH_DSP)
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /* Subtract and store result in destination buffer (4 samples at a time). */
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** write_q7x4_ia (&pDst, __QSUB8(read_q7x4_ia ((q7_t **) &pSrcA), read_q7x4_ia ((q7_t **) &pSrcB))
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** #else
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** #endif
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /* Decrement loop counter */
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** blkCnt--;
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** }
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /* Loop unrolling: Compute remaining outputs */
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** blkCnt = blockSize % 0x4U;
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** #else
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /* Initialize blkCnt with number of samples */
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** blkCnt = blockSize;
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** while (blkCnt > 0U)
3623 .loc 46 142 0
3624 0000 7BB1 cbz r3, .L569
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** uint32_t blkCnt; /* Loop counter */
3625 .loc 46 106 0
3626 0002 30B4 push {r4, r5}
3627 .LCFI82:
3628 .cfi_def_cfa_offset 8
ARM GAS /tmp/ccnDQoMC.s page 258
3629 .cfi_offset 4, -8
3630 .cfi_offset 5, -4
3631 0004 0344 add r3, r3, r0
3632 .LVL453:
3633 .L563:
3634 .LBB77:
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** {
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /* C = A - B */
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /* Subtract and store result in destination buffer. */
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
3635 .loc 46 147 0
3636 0006 10F9014B ldrsb r4, [r0], #1
3637 .LVL454:
3638 000a 11F9015B ldrsb r5, [r1], #1
3639 .LVL455:
3640 .LBE77:
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** {
3641 .loc 46 142 0
3642 000e 9842 cmp r0, r3
3643 .LBB78:
3644 .loc 46 147 0
3645 0010 A4EB0504 sub r4, r4, r5
3646 .syntax unified
3647 @ 147 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c" 1
3648 0014 04F30704 ssat r4, #8, r4
3649 @ 0 "" 2
3650 .LVL456:
3651 .thumb
3652 .syntax unified
3653 .LBE78:
3654 0018 02F8014B strb r4, [r2], #1
3655 .LVL457:
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** {
3656 .loc 46 142 0
3657 001c F3D1 bne .L563
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** /* Decrement loop counter */
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** blkCnt--;
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** }
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c ****
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c **** }
3658 .loc 46 153 0
3659 001e 30BC pop {r4, r5}
3660 .LCFI83:
3661 .cfi_restore 5
3662 .cfi_restore 4
3663 .cfi_def_cfa_offset 0
3664 .LVL458:
3665 0020 7047 bx lr
3666 .LVL459:
3667 .L569:
3668 0022 7047 bx lr
3669 .cfi_endproc
3670 .LFE191:
3672 .section .text.arm_xor_u16,"ax",%progbits
3673 .align 1
ARM GAS /tmp/ccnDQoMC.s page 259
3674 .p2align 2,,3
3675 .global arm_xor_u16
3676 .syntax unified
3677 .thumb
3678 .thumb_func
3679 .fpu fpv4-sp-d16
3681 arm_xor_u16:
3682 .LFB192:
3683 .file 47 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * Title: arm_xor_u16.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * Description: uint16_t bitwise exclusive OR
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * $Date: 14 November 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** @defgroup Xor Vector bitwise exclusive OR
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** Compute the logical bitwise XOR.
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** There are separate functions for uint32_t, uint16_t, and uint8_t data types.
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** */
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** /**
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** @addtogroup Xor
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** @{
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** */
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** /**
ARM GAS /tmp/ccnDQoMC.s page 260
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** @brief Compute the logical bitwise XOR of two fixed-point vectors.
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** @param[in] pSrcA points to input vector A
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** @param[in] pSrcB points to input vector B
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** @param[out] pDst points to output vector
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** @param[in] blockSize number of samples in each vector
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** @return none
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** */
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** void arm_xor_u16(
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** const uint16_t * pSrcA,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** const uint16_t * pSrcB,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** uint16_t * pDst,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** uint32_t blockSize)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** {
3684 .loc 47 62 0
3685 .cfi_startproc
3686 @ args = 0, pretend = 0, frame = 0
3687 @ frame_needed = 0, uses_anonymous_args = 0
3688 .LVL460:
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** uint32_t blkCnt; /* Loop counter */
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** q15x8_t vecSrcA, vecSrcB;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** /* Compute 8 outputs at a time */
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** blkCnt = blockSize >> 3;
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** while (blkCnt > 0U)
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** {
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** vecSrcA = vld1q(pSrcA);
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** vecSrcB = vld1q(pSrcB);
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** vst1q(pDst, veorq_u16(vecSrcA, vecSrcB) );
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** pSrcA += 8;
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** pSrcB += 8;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** pDst += 8;
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** /* Decrement the loop counter */
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** blkCnt--;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** }
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** /* Tail */
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** blkCnt = blockSize & 7;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** if (blkCnt > 0U)
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** {
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** mve_pred16_t p0 = vctp16q(blkCnt);
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** vecSrcA = vld1q(pSrcA);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** vecSrcB = vld1q(pSrcB);
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** vstrhq_p(pDst, veorq_u16(vecSrcA, vecSrcB), p0);
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** }
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** #else
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** uint16x8_t vecA, vecB;
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** /* Compute 8 outputs at a time */
ARM GAS /tmp/ccnDQoMC.s page 261
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** blkCnt = blockSize >> 3U;
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** while (blkCnt > 0U)
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** {
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** vecA = vld1q_u16(pSrcA);
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** vecB = vld1q_u16(pSrcB);
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** vst1q_u16(pDst, veorq_u16(vecA, vecB) );
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** pSrcA += 8;
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** pSrcB += 8;
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** pDst += 8;
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** /* Decrement the loop counter */
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** blkCnt--;
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** }
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** /* Tail */
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** blkCnt = blockSize & 7;
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** #else
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** /* Initialize blkCnt with number of samples */
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** blkCnt = blockSize;
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** #endif
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** while (blkCnt > 0U)
3689 .loc 47 125 0
3690 0000 002B cmp r3, #0
3691 0002 6AD0 beq .L594
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** uint32_t blkCnt; /* Loop counter */
3692 .loc 47 62 0
3693 0004 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr}
3694 .LCFI84:
3695 .cfi_def_cfa_offset 28
3696 .cfi_offset 4, -28
3697 .cfi_offset 5, -24
3698 .cfi_offset 6, -20
3699 .cfi_offset 7, -16
3700 .cfi_offset 8, -12
3701 .cfi_offset 9, -8
3702 .cfi_offset 14, -4
3703 0008 141D adds r4, r2, #4
3704 000a 8C42 cmp r4, r1
3705 000c 8CBF ite hi
3706 000e 0025 movhi r5, #0
3707 0010 0125 movls r5, #1
3708 0012 0E1D adds r6, r1, #4
3709 0014 B242 cmp r2, r6
3710 0016 28BF it cs
3711 0018 45F00105 orrcs r5, r5, #1
3712 001c 082B cmp r3, #8
3713 001e 94BF ite ls
3714 0020 0025 movls r5, #0
3715 0022 05F00105 andhi r5, r5, #1
3716 0026 002D cmp r5, #0
3717 0028 47D0 beq .L586
3718 002a 8442 cmp r4, r0
3719 002c 8CBF ite hi
ARM GAS /tmp/ccnDQoMC.s page 262
3720 002e 0024 movhi r4, #0
3721 0030 0124 movls r4, #1
3722 0032 051D adds r5, r0, #4
3723 0034 AA42 cmp r2, r5
3724 0036 28BF it cs
3725 0038 44F00104 orrcs r4, r4, #1
3726 003c 002C cmp r4, #0
3727 003e 3CD0 beq .L586
3728 0040 C0F34004 ubfx r4, r0, #1, #1
3729 0044 5E1E subs r6, r3, #1
3730 0046 002C cmp r4, #0
3731 0048 42D0 beq .L579
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** {
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** *pDst++ = (*pSrcA++)^(*pSrcB++);
3732 .loc 47 127 0
3733 004a 0F88 ldrh r7, [r1]
3734 004c 0588 ldrh r5, [r0]
3735 004e 7D40 eors r5, r5, r7
3736 0050 1580 strh r5, [r2] @ movhi
3737 0052 00F1020E add lr, r0, #2
3738 .LVL461:
3739 0056 01F1020C add ip, r1, #2
3740 .LVL462:
3741 005a 971C adds r7, r2, #2
3742 .LVL463:
3743 .L575:
3744 005c 1B1B subs r3, r3, r4
3745 .LVL464:
3746 005e 6400 lsls r4, r4, #1
3747 0060 2044 add r0, r0, r4
3748 0062 2144 add r1, r1, r4
3749 0064 2244 add r2, r2, r4
3750 0066 4FEA5309 lsr r9, r3, #1
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** {
3751 .loc 47 125 0
3752 006a 0025 movs r5, #0
3753 .LVL465:
3754 .L576:
3755 .loc 47 127 0
3756 006c 51F8044B ldr r4, [r1], #4 @ unaligned
3757 0070 50F8048B ldr r8, [r0], #4
3758 0074 0135 adds r5, r5, #1
3759 0076 84EA0804 eor r4, r4, r8
3760 007a 4D45 cmp r5, r9
3761 007c 42F8044B str r4, [r2], #4 @ unaligned
3762 0080 F4D3 bcc .L576
3763 0082 23F00102 bic r2, r3, #1
3764 0086 5100 lsls r1, r2, #1
3765 0088 9342 cmp r3, r2
3766 008a 0EEB0104 add r4, lr, r1
3767 008e 0CEB0100 add r0, ip, r1
3768 0092 A6EB0206 sub r6, r6, r2
3769 0096 3944 add r1, r1, r7
3770 0098 0DD0 beq .L572
3771 .LVL466:
3772 009a 3EF81230 ldrh r3, [lr, r2, lsl #1]
3773 009e 3CF81250 ldrh r5, [ip, r2, lsl #1]
ARM GAS /tmp/ccnDQoMC.s page 263
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** {
3774 .loc 47 125 0
3775 00a2 012E cmp r6, #1
3776 .loc 47 127 0
3777 00a4 83EA0503 eor r3, r3, r5
3778 00a8 27F81230 strh r3, [r7, r2, lsl #1] @ movhi
3779 .LVL467:
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** {
3780 .loc 47 125 0
3781 00ac 03D0 beq .L572
3782 .LVL468:
3783 .loc 47 127 0
3784 00ae 6388 ldrh r3, [r4, #2]
3785 00b0 4288 ldrh r2, [r0, #2]
3786 00b2 5340 eors r3, r3, r2
3787 00b4 4B80 strh r3, [r1, #2] @ movhi
3788 .LVL469:
3789 .L572:
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** /* Decrement the loop counter */
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** blkCnt--;
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** }
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** #endif /* if defined(ARM_MATH_MVEI) */
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** }
3790 .loc 47 133 0
3791 00b6 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc}
3792 .LVL470:
3793 .L586:
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
3794 .loc 47 127 0
3795 00ba 30F8024B ldrh r4, [r0], #2
3796 .LVL471:
3797 00be 31F8025B ldrh r5, [r1], #2
3798 .LVL472:
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** {
3799 .loc 47 125 0
3800 00c2 013B subs r3, r3, #1
3801 .LVL473:
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c ****
3802 .loc 47 127 0
3803 00c4 84EA0504 eor r4, r4, r5
3804 00c8 22F8024B strh r4, [r2], #2 @ movhi
3805 .LVL474:
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c **** {
3806 .loc 47 125 0
3807 00cc F5D1 bne .L586
3808 00ce F2E7 b .L572
3809 .LVL475:
3810 .L579:
3811 00d0 1E46 mov r6, r3
3812 00d2 1746 mov r7, r2
3813 00d4 8C46 mov ip, r1
3814 00d6 8646 mov lr, r0
3815 00d8 C0E7 b .L575
3816 .L594:
3817 .LCFI85:
3818 .cfi_def_cfa_offset 0
ARM GAS /tmp/ccnDQoMC.s page 264
3819 .cfi_restore 4
3820 .cfi_restore 5
3821 .cfi_restore 6
3822 .cfi_restore 7
3823 .cfi_restore 8
3824 .cfi_restore 9
3825 .cfi_restore 14
3826 00da 7047 bx lr
3827 .cfi_endproc
3828 .LFE192:
3830 .section .text.arm_xor_u32,"ax",%progbits
3831 .align 1
3832 .p2align 2,,3
3833 .global arm_xor_u32
3834 .syntax unified
3835 .thumb
3836 .thumb_func
3837 .fpu fpv4-sp-d16
3839 arm_xor_u32:
3840 .LFB193:
3841 .file 48 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * Title: arm_xor_u32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * Description: uint32_t bitwise exclusive OR
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * $Date: 14 November 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** * limitations under the License.
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** @addtogroup Xor
ARM GAS /tmp/ccnDQoMC.s page 265
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** @brief Compute the logical bitwise XOR of two fixed-point vectors.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** @param[in] pSrcA points to input vector A
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** @param[in] pSrcB points to input vector B
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** @param[out] pDst points to output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** */
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** void arm_xor_u32(
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** const uint32_t * pSrcA,
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** const uint32_t * pSrcB,
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** uint32_t * pDst,
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** uint32_t blockSize)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** {
3842 .loc 48 54 0
3843 .cfi_startproc
3844 @ args = 0, pretend = 0, frame = 0
3845 @ frame_needed = 0, uses_anonymous_args = 0
3846 @ link register save eliminated.
3847 .LVL476:
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** uint32_t blkCnt; /* Loop counter */
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** q31x4_t vecSrcA, vecSrcB;
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** /* Compute 4 outputs at a time */
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** blkCnt = blockSize >> 2;
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** while (blkCnt > 0U)
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** {
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** vecSrcA = vld1q(pSrcA);
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** vecSrcB = vld1q(pSrcB);
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** vst1q(pDst, veorq_u32(vecSrcA, vecSrcB) );
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** pSrcA += 4;
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** pSrcB += 4;
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** pDst += 4;
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** /* Decrement the loop counter */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** blkCnt--;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** }
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** /* Tail */
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** blkCnt = blockSize & 3;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** if (blkCnt > 0U)
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** {
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** vecSrcA = vld1q(pSrcA);
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** vecSrcB = vld1q(pSrcB);
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** vstrwq_p(pDst, veorq_u32(vecSrcA, vecSrcB), p0);
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** }
ARM GAS /tmp/ccnDQoMC.s page 266
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** #else
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** uint32x4_t vecA, vecB;
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** /* Compute 4 outputs at a time */
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** blkCnt = blockSize >> 2U;
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** while (blkCnt > 0U)
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** {
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** vecA = vld1q_u32(pSrcA);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** vecB = vld1q_u32(pSrcB);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** vst1q_u32(pDst, veorq_u32(vecA, vecB) );
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** pSrcA += 4;
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** pSrcB += 4;
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** pDst += 4;
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** /* Decrement the loop counter */
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** blkCnt--;
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** }
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** /* Tail */
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** blkCnt = blockSize & 3;
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** #else
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** /* Initialize blkCnt with number of samples */
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** blkCnt = blockSize;
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** #endif
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** while (blkCnt > 0U)
3848 .loc 48 117 0
3849 0000 63B1 cbz r3, .L605
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** uint32_t blkCnt; /* Loop counter */
3850 .loc 48 54 0
3851 0002 30B4 push {r4, r5}
3852 .LCFI86:
3853 .cfi_def_cfa_offset 8
3854 .cfi_offset 4, -8
3855 .cfi_offset 5, -4
3856 .LVL477:
3857 .L599:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** {
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** *pDst++ = (*pSrcA++)^(*pSrcB++);
3858 .loc 48 119 0
3859 0004 50F8044B ldr r4, [r0], #4
3860 .LVL478:
3861 0008 51F8045B ldr r5, [r1], #4
3862 .LVL479:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** {
3863 .loc 48 117 0
3864 000c 013B subs r3, r3, #1
3865 .LVL480:
3866 .loc 48 119 0
3867 000e 84EA0504 eor r4, r4, r5
3868 0012 42F8044B str r4, [r2], #4
3869 .LVL481:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** {
ARM GAS /tmp/ccnDQoMC.s page 267
3870 .loc 48 117 0
3871 0016 F5D1 bne .L599
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c ****
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** /* Decrement the loop counter */
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** blkCnt--;
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** }
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** #endif /* if defined(ARM_MATH_MVEI) */
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c **** }
3872 .loc 48 125 0
3873 0018 30BC pop {r4, r5}
3874 .LCFI87:
3875 .cfi_restore 5
3876 .cfi_restore 4
3877 .cfi_def_cfa_offset 0
3878 001a 7047 bx lr
3879 .LVL482:
3880 .L605:
3881 001c 7047 bx lr
3882 .cfi_endproc
3883 .LFE193:
3885 001e 00BF .section .text.arm_xor_u8,"ax",%progbits
3886 .align 1
3887 .p2align 2,,3
3888 .global arm_xor_u8
3889 .syntax unified
3890 .thumb
3891 .thumb_func
3892 .fpu fpv4-sp-d16
3894 arm_xor_u8:
3895 .LFB194:
3896 .file 49 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * Title: arm_xor_u8.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * Description: uint8_t bitwise exclusive OR
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * $Date: 14 November 2019
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * $Revision: V1.6.0
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** *
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * Target Processor: Cortex-M cores
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * -------------------------------------------------------------------- */
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** /*
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * SPDX-License-Identifier: Apache-2.0
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * not use this file except in compliance with the License.
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * You may obtain a copy of the License at
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * www.apache.org/licenses/LICENSE-2.0
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** *
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * Unless required by applicable law or agreed to in writing, software
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * See the License for the specific language governing permissions and
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** * limitations under the License.
ARM GAS /tmp/ccnDQoMC.s page 268
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** */
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** #include "arm_math.h"
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** @ingroup groupMath
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** */
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** @addtogroup Xor
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** /**
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** @brief Compute the logical bitwise XOR of two fixed-point vectors.
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** @param[in] pSrcA points to input vector A
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** @param[in] pSrcB points to input vector B
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** @param[out] pDst points to output vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** @param[in] blockSize number of samples in each vector
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** @return none
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** */
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** void arm_xor_u8(
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** const uint8_t * pSrcA,
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** const uint8_t * pSrcB,
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** uint8_t * pDst,
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** uint32_t blockSize)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
3897 .loc 49 54 0
3898 .cfi_startproc
3899 @ args = 0, pretend = 0, frame = 0
3900 @ frame_needed = 0, uses_anonymous_args = 0
3901 .LVL483:
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** uint32_t blkCnt; /* Loop counter */
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** q7x16_t vecSrcA, vecSrcB;
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** /* Compute 16 outputs at a time */
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** blkCnt = blockSize >> 4;
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** while (blkCnt > 0U)
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** vecSrcA = vld1q(pSrcA);
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** vecSrcB = vld1q(pSrcB);
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** vst1q(pDst, veorq_u8(vecSrcA, vecSrcB) );
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** pSrcA += 16;
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** pSrcB += 16;
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** pDst += 16;
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** /* Decrement the loop counter */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** blkCnt--;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** }
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** /* Tail */
ARM GAS /tmp/ccnDQoMC.s page 269
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** blkCnt = blockSize & 0xF;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** if (blkCnt > 0U)
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** mve_pred16_t p0 = vctp8q(blkCnt);
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** vecSrcA = vld1q(pSrcA);
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** vecSrcB = vld1q(pSrcB);
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** vstrbq_p(pDst, veorq_u8(vecSrcA, vecSrcB), p0);
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** }
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** #else
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** uint8x16_t vecA, vecB;
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** /* Compute 16 outputs at a time */
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** blkCnt = blockSize >> 4U;
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** while (blkCnt > 0U)
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** vecA = vld1q_u8(pSrcA);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** vecB = vld1q_u8(pSrcB);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** vst1q_u8(pDst, veorq_u8(vecA, vecB) );
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** pSrcA += 16;
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** pSrcB += 16;
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** pDst += 16;
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** /* Decrement the loop counter */
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** blkCnt--;
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** }
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** /* Tail */
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** blkCnt = blockSize & 0xF;
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** #else
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** /* Initialize blkCnt with number of samples */
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** blkCnt = blockSize;
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** #endif
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** while (blkCnt > 0U)
3902 .loc 49 117 0
3903 0000 002B cmp r3, #0
3904 0002 00F0A680 beq .L647
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** uint32_t blkCnt; /* Loop counter */
3905 .loc 49 54 0
3906 0006 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr}
3907 .LCFI88:
3908 .cfi_def_cfa_offset 28
3909 .cfi_offset 4, -28
3910 .cfi_offset 5, -24
3911 .cfi_offset 6, -20
3912 .cfi_offset 7, -16
3913 .cfi_offset 8, -12
3914 .cfi_offset 9, -8
3915 .cfi_offset 14, -4
3916 000a 141D adds r4, r2, #4
3917 000c 8C42 cmp r4, r1
3918 000e 8CBF ite hi
ARM GAS /tmp/ccnDQoMC.s page 270
3919 0010 0025 movhi r5, #0
3920 0012 0125 movls r5, #1
3921 0014 0E1D adds r6, r1, #4
3922 0016 B242 cmp r2, r6
3923 0018 28BF it cs
3924 001a 45F00105 orrcs r5, r5, #1
3925 001e 082B cmp r3, #8
3926 0020 94BF ite ls
3927 0022 0025 movls r5, #0
3928 0024 05F00105 andhi r5, r5, #1
3929 0028 002D cmp r5, #0
3930 002a 00F08580 beq .L609
3931 002e 8442 cmp r4, r0
3932 0030 8CBF ite hi
3933 0032 0024 movhi r4, #0
3934 0034 0124 movls r4, #1
3935 0036 051D adds r5, r0, #4
3936 0038 AA42 cmp r2, r5
3937 003a 28BF it cs
3938 003c 44F00104 orrcs r4, r4, #1
3939 0040 002C cmp r4, #0
3940 0042 79D0 beq .L609
3941 0044 4442 negs r4, r0
3942 0046 14F00304 ands r4, r4, #3
3943 004a 03F1FF36 add r6, r3, #-1
3944 004e 6ED0 beq .L616
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** *pDst++ = (*pSrcA++)^(*pSrcB++);
3945 .loc 49 119 0
3946 0050 0F78 ldrb r7, [r1] @ zero_extendqisi2
3947 0052 0578 ldrb r5, [r0] @ zero_extendqisi2
3948 0054 012C cmp r4, #1
3949 0056 85EA0705 eor r5, r5, r7
3950 005a 1570 strb r5, [r2]
3951 005c 00F1010E add lr, r0, #1
3952 .LVL484:
3953 0060 01F1010C add ip, r1, #1
3954 .LVL485:
3955 0064 02F10107 add r7, r2, #1
3956 .LVL486:
3957 0068 18D0 beq .L610
3958 .LVL487:
3959 006a 4E78 ldrb r6, [r1, #1] @ zero_extendqisi2
3960 .LVL488:
3961 006c 4578 ldrb r5, [r0, #1] @ zero_extendqisi2
3962 006e 032C cmp r4, #3
3963 0070 85EA0605 eor r5, r5, r6
3964 0074 5570 strb r5, [r2, #1]
3965 0076 00F1020E add lr, r0, #2
3966 .LVL489:
3967 007a 01F1020C add ip, r1, #2
3968 .LVL490:
3969 007e 02F10207 add r7, r2, #2
3970 .LVL491:
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** /* Decrement the loop counter */
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** blkCnt--;
ARM GAS /tmp/ccnDQoMC.s page 271
3971 .loc 49 122 0
3972 0082 A3F10206 sub r6, r3, #2
3973 .LVL492:
3974 0086 09D1 bne .L610
3975 .LVL493:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
3976 .loc 49 119 0
3977 0088 8E78 ldrb r6, [r1, #2] @ zero_extendqisi2
3978 .LVL494:
3979 008a 8578 ldrb r5, [r0, #2] @ zero_extendqisi2
3980 008c 7540 eors r5, r5, r6
3981 008e 9570 strb r5, [r2, #2]
3982 0090 00F1030E add lr, r0, #3
3983 .LVL495:
3984 0094 01F1030C add ip, r1, #3
3985 .LVL496:
3986 0098 D71C adds r7, r2, #3
3987 .LVL497:
3988 .loc 49 122 0
3989 009a DE1E subs r6, r3, #3
3990 .LVL498:
3991 .L610:
3992 009c 1B1B subs r3, r3, r4
3993 .LVL499:
3994 009e 2044 add r0, r0, r4
3995 00a0 2144 add r1, r1, r4
3996 00a2 2244 add r2, r2, r4
3997 00a4 4FEA9309 lsr r9, r3, #2
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
3998 .loc 49 117 0
3999 00a8 0025 movs r5, #0
4000 .L612:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
4001 .loc 49 119 0
4002 00aa 51F8044B ldr r4, [r1], #4 @ unaligned
4003 00ae 50F8048B ldr r8, [r0], #4
4004 00b2 0135 adds r5, r5, #1
4005 00b4 84EA0804 eor r4, r4, r8
4006 00b8 4D45 cmp r5, r9
4007 00ba 42F8044B str r4, [r2], #4 @ unaligned
4008 00be F4D3 bcc .L612
4009 00c0 23F00302 bic r2, r3, #3
4010 00c4 9342 cmp r3, r2
4011 00c6 A6EB0206 sub r6, r6, r2
4012 00ca 0EEB0204 add r4, lr, r2
4013 00ce 0CEB0200 add r0, ip, r2
4014 00d2 07EB0201 add r1, r7, r2
4015 00d6 28D0 beq .L607
4016 .LVL500:
4017 00d8 1EF80230 ldrb r3, [lr, r2] @ zero_extendqisi2
4018 00dc 1CF80250 ldrb r5, [ip, r2] @ zero_extendqisi2
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
4019 .loc 49 117 0
4020 00e0 012E cmp r6, #1
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
4021 .loc 49 119 0
4022 00e2 83EA0503 eor r3, r3, r5
ARM GAS /tmp/ccnDQoMC.s page 272
4023 00e6 BB54 strb r3, [r7, r2]
4024 .LVL501:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
4025 .loc 49 117 0
4026 00e8 1FD0 beq .L607
4027 .LVL502:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
4028 .loc 49 119 0
4029 00ea 6378 ldrb r3, [r4, #1] @ zero_extendqisi2
4030 00ec 4278 ldrb r2, [r0, #1] @ zero_extendqisi2
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
4031 .loc 49 117 0
4032 00ee 022E cmp r6, #2
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
4033 .loc 49 119 0
4034 00f0 83EA0203 eor r3, r3, r2
4035 00f4 4B70 strb r3, [r1, #1]
4036 .LVL503:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
4037 .loc 49 117 0
4038 00f6 18D0 beq .L607
4039 .LVL504:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
4040 .loc 49 119 0
4041 00f8 A378 ldrb r3, [r4, #2] @ zero_extendqisi2
4042 00fa 8278 ldrb r2, [r0, #2] @ zero_extendqisi2
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
4043 .loc 49 117 0
4044 00fc 032E cmp r6, #3
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
4045 .loc 49 119 0
4046 00fe 83EA0203 eor r3, r3, r2
4047 0102 8B70 strb r3, [r1, #2]
4048 .LVL505:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
4049 .loc 49 117 0
4050 0104 11D0 beq .L607
4051 .LVL506:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
4052 .loc 49 119 0
4053 0106 E378 ldrb r3, [r4, #3] @ zero_extendqisi2
4054 0108 C278 ldrb r2, [r0, #3] @ zero_extendqisi2
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
4055 .loc 49 117 0
4056 010a 042E cmp r6, #4
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
4057 .loc 49 119 0
4058 010c 83EA0203 eor r3, r3, r2
4059 0110 CB70 strb r3, [r1, #3]
4060 .LVL507:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
4061 .loc 49 117 0
4062 0112 0AD0 beq .L607
4063 .LVL508:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
4064 .loc 49 119 0
4065 0114 2379 ldrb r3, [r4, #4] @ zero_extendqisi2
ARM GAS /tmp/ccnDQoMC.s page 273
4066 0116 0279 ldrb r2, [r0, #4] @ zero_extendqisi2
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
4067 .loc 49 117 0
4068 0118 052E cmp r6, #5
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
4069 .loc 49 119 0
4070 011a 83EA0203 eor r3, r3, r2
4071 011e 0B71 strb r3, [r1, #4]
4072 .LVL509:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
4073 .loc 49 117 0
4074 0120 03D0 beq .L607
4075 .LVL510:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
4076 .loc 49 119 0
4077 0122 6379 ldrb r3, [r4, #5] @ zero_extendqisi2
4078 0124 4279 ldrb r2, [r0, #5] @ zero_extendqisi2
4079 0126 5340 eors r3, r3, r2
4080 0128 4B71 strb r3, [r1, #5]
4081 .LVL511:
4082 .L607:
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** }
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** #endif /* if defined(ARM_MATH_MVEI) */
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** }
4083 .loc 49 125 0
4084 012a BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc}
4085 .LVL512:
4086 .L616:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
4087 .loc 49 117 0
4088 012e 1E46 mov r6, r3
4089 0130 1746 mov r7, r2
4090 0132 8C46 mov ip, r1
4091 0134 8646 mov lr, r0
4092 0136 B1E7 b .L610
4093 .L609:
4094 0138 0344 add r3, r3, r0
4095 .LVL513:
4096 .L614:
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
4097 .loc 49 119 0
4098 013a 10F8014B ldrb r4, [r0], #1 @ zero_extendqisi2
4099 .LVL514:
4100 013e 11F8015B ldrb r5, [r1], #1 @ zero_extendqisi2
4101 .LVL515:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
4102 .loc 49 117 0
4103 0142 8342 cmp r3, r0
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c ****
4104 .loc 49 119 0
4105 0144 84EA0504 eor r4, r4, r5
4106 0148 02F8014B strb r4, [r2], #1
4107 .LVL516:
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c **** {
4108 .loc 49 117 0
4109 014c F5D1 bne .L614
4110 .loc 49 125 0
ARM GAS /tmp/ccnDQoMC.s page 274
4111 014e BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc}
4112 .LVL517:
4113 .L647:
4114 .LCFI89:
4115 .cfi_def_cfa_offset 0
4116 .cfi_restore 4
4117 .cfi_restore 5
4118 .cfi_restore 6
4119 .cfi_restore 7
4120 .cfi_restore 8
4121 .cfi_restore 9
4122 .cfi_restore 14
4123 0152 7047 bx lr
4124 .cfi_endproc
4125 .LFE194:
4127 .text
4128 .Letext0:
4129 .file 50 "/usr/include/newlib/machine/_default_types.h"
4130 .file 51 "/usr/include/newlib/sys/_stdint.h"
4131 .file 52 "/usr/include/newlib/sys/lock.h"
4132 .file 53 "/usr/include/newlib/sys/_types.h"
4133 .file 54 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h"
4134 .file 55 "/usr/include/newlib/sys/reent.h"
4135 .file 56 "/usr/include/newlib/math.h"
ARM GAS /tmp/ccnDQoMC.s page 275
DEFINED SYMBOLS
*ABS*:0000000000000000 BasicMathFunctions.c
/tmp/ccnDQoMC.s:16 .text.arm_abs_f32:0000000000000000 $t
/tmp/ccnDQoMC.s:24 .text.arm_abs_f32:0000000000000000 arm_abs_f32
/tmp/ccnDQoMC.s:56 .text.arm_abs_q15:0000000000000000 $t
/tmp/ccnDQoMC.s:64 .text.arm_abs_q15:0000000000000000 arm_abs_q15
/tmp/ccnDQoMC.s:147 .text.arm_abs_q31:0000000000000000 $t
/tmp/ccnDQoMC.s:155 .text.arm_abs_q31:0000000000000000 arm_abs_q31
/tmp/ccnDQoMC.s:237 .text.arm_abs_q7:0000000000000000 $t
/tmp/ccnDQoMC.s:245 .text.arm_abs_q7:0000000000000000 arm_abs_q7
/tmp/ccnDQoMC.s:327 .text.arm_add_f32:0000000000000000 $t
/tmp/ccnDQoMC.s:335 .text.arm_add_f32:0000000000000000 arm_add_f32
/tmp/ccnDQoMC.s:369 .text.arm_add_q15:0000000000000000 $t
/tmp/ccnDQoMC.s:377 .text.arm_add_q15:0000000000000000 arm_add_q15
/tmp/ccnDQoMC.s:435 .text.arm_add_q31:0000000000000000 $t
/tmp/ccnDQoMC.s:443 .text.arm_add_q31:0000000000000000 arm_add_q31
/tmp/ccnDQoMC.s:500 .text.arm_add_q7:0000000000000000 $t
/tmp/ccnDQoMC.s:508 .text.arm_add_q7:0000000000000000 arm_add_q7
/tmp/ccnDQoMC.s:567 .text.arm_and_u16:0000000000000000 $t
/tmp/ccnDQoMC.s:575 .text.arm_and_u16:0000000000000000 arm_and_u16
/tmp/ccnDQoMC.s:725 .text.arm_and_u32:0000000000000000 $t
/tmp/ccnDQoMC.s:733 .text.arm_and_u32:0000000000000000 arm_and_u32
/tmp/ccnDQoMC.s:780 .text.arm_and_u8:0000000000000000 $t
/tmp/ccnDQoMC.s:788 .text.arm_and_u8:0000000000000000 arm_and_u8
/tmp/ccnDQoMC.s:1022 .text.arm_dot_prod_f32:0000000000000000 $t
/tmp/ccnDQoMC.s:1030 .text.arm_dot_prod_f32:0000000000000000 arm_dot_prod_f32
/tmp/ccnDQoMC.s:1067 .text.arm_dot_prod_f32:000000000000001c $d
/tmp/ccnDQoMC.s:1072 .text.arm_dot_prod_q15:0000000000000000 $t
/tmp/ccnDQoMC.s:1080 .text.arm_dot_prod_q15:0000000000000000 arm_dot_prod_q15
/tmp/ccnDQoMC.s:1133 .text.arm_dot_prod_q31:0000000000000000 $t
/tmp/ccnDQoMC.s:1141 .text.arm_dot_prod_q31:0000000000000000 arm_dot_prod_q31
/tmp/ccnDQoMC.s:1202 .text.arm_dot_prod_q7:0000000000000000 $t
/tmp/ccnDQoMC.s:1210 .text.arm_dot_prod_q7:0000000000000000 arm_dot_prod_q7
/tmp/ccnDQoMC.s:1264 .text.arm_mult_f32:0000000000000000 $t
/tmp/ccnDQoMC.s:1272 .text.arm_mult_f32:0000000000000000 arm_mult_f32
/tmp/ccnDQoMC.s:1306 .text.arm_mult_q15:0000000000000000 $t
/tmp/ccnDQoMC.s:1314 .text.arm_mult_q15:0000000000000000 arm_mult_q15
/tmp/ccnDQoMC.s:1374 .text.arm_mult_q31:0000000000000000 $t
/tmp/ccnDQoMC.s:1382 .text.arm_mult_q31:0000000000000000 arm_mult_q31
/tmp/ccnDQoMC.s:1442 .text.arm_mult_q7:0000000000000000 $t
/tmp/ccnDQoMC.s:1450 .text.arm_mult_q7:0000000000000000 arm_mult_q7
/tmp/ccnDQoMC.s:1510 .text.arm_negate_f32:0000000000000000 $t
/tmp/ccnDQoMC.s:1518 .text.arm_negate_f32:0000000000000000 arm_negate_f32
/tmp/ccnDQoMC.s:1550 .text.arm_negate_q15:0000000000000000 $t
/tmp/ccnDQoMC.s:1558 .text.arm_negate_q15:0000000000000000 arm_negate_q15
/tmp/ccnDQoMC.s:1628 .text.arm_negate_q31:0000000000000000 $t
/tmp/ccnDQoMC.s:1636 .text.arm_negate_q31:0000000000000000 arm_negate_q31
/tmp/ccnDQoMC.s:1690 .text.arm_negate_q7:0000000000000000 $t
/tmp/ccnDQoMC.s:1698 .text.arm_negate_q7:0000000000000000 arm_negate_q7
/tmp/ccnDQoMC.s:1759 .text.arm_not_u16:0000000000000000 $t
/tmp/ccnDQoMC.s:1767 .text.arm_not_u16:0000000000000000 arm_not_u16
/tmp/ccnDQoMC.s:1907 .text.arm_not_u32:0000000000000000 $t
/tmp/ccnDQoMC.s:1915 .text.arm_not_u32:0000000000000000 arm_not_u32
/tmp/ccnDQoMC.s:1947 .text.arm_not_u8:0000000000000000 $t
/tmp/ccnDQoMC.s:1955 .text.arm_not_u8:0000000000000000 arm_not_u8
/tmp/ccnDQoMC.s:2155 .text.arm_offset_f32:0000000000000000 $t
/tmp/ccnDQoMC.s:2163 .text.arm_offset_f32:0000000000000000 arm_offset_f32
ARM GAS /tmp/ccnDQoMC.s page 276
/tmp/ccnDQoMC.s:2195 .text.arm_offset_q15:0000000000000000 $t
/tmp/ccnDQoMC.s:2203 .text.arm_offset_q15:0000000000000000 arm_offset_q15
/tmp/ccnDQoMC.s:2257 .text.arm_offset_q31:0000000000000000 $t
/tmp/ccnDQoMC.s:2265 .text.arm_offset_q31:0000000000000000 arm_offset_q31
/tmp/ccnDQoMC.s:2318 .text.arm_offset_q7:0000000000000000 $t
/tmp/ccnDQoMC.s:2326 .text.arm_offset_q7:0000000000000000 arm_offset_q7
/tmp/ccnDQoMC.s:2381 .text.arm_or_u16:0000000000000000 $t
/tmp/ccnDQoMC.s:2389 .text.arm_or_u16:0000000000000000 arm_or_u16
/tmp/ccnDQoMC.s:2539 .text.arm_or_u32:0000000000000000 $t
/tmp/ccnDQoMC.s:2547 .text.arm_or_u32:0000000000000000 arm_or_u32
/tmp/ccnDQoMC.s:2594 .text.arm_or_u8:0000000000000000 $t
/tmp/ccnDQoMC.s:2602 .text.arm_or_u8:0000000000000000 arm_or_u8
/tmp/ccnDQoMC.s:2836 .text.arm_scale_f32:0000000000000000 $t
/tmp/ccnDQoMC.s:2844 .text.arm_scale_f32:0000000000000000 arm_scale_f32
/tmp/ccnDQoMC.s:2876 .text.arm_scale_q15:0000000000000000 $t
/tmp/ccnDQoMC.s:2884 .text.arm_scale_q15:0000000000000000 arm_scale_q15
/tmp/ccnDQoMC.s:2946 .text.arm_scale_q31:0000000000000000 $t
/tmp/ccnDQoMC.s:2954 .text.arm_scale_q31:0000000000000000 arm_scale_q31
/tmp/ccnDQoMC.s:3060 .text.arm_scale_q7:0000000000000000 $t
/tmp/ccnDQoMC.s:3068 .text.arm_scale_q7:0000000000000000 arm_scale_q7
/tmp/ccnDQoMC.s:3130 .text.arm_shift_q15:0000000000000000 $t
/tmp/ccnDQoMC.s:3138 .text.arm_shift_q15:0000000000000000 arm_shift_q15
/tmp/ccnDQoMC.s:3225 .text.arm_shift_q31:0000000000000000 $t
/tmp/ccnDQoMC.s:3233 .text.arm_shift_q31:0000000000000000 arm_shift_q31
/tmp/ccnDQoMC.s:3338 .text.arm_shift_q7:0000000000000000 $t
/tmp/ccnDQoMC.s:3346 .text.arm_shift_q7:0000000000000000 arm_shift_q7
/tmp/ccnDQoMC.s:3433 .text.arm_sub_f32:0000000000000000 $t
/tmp/ccnDQoMC.s:3441 .text.arm_sub_f32:0000000000000000 arm_sub_f32
/tmp/ccnDQoMC.s:3475 .text.arm_sub_q15:0000000000000000 $t
/tmp/ccnDQoMC.s:3483 .text.arm_sub_q15:0000000000000000 arm_sub_q15
/tmp/ccnDQoMC.s:3541 .text.arm_sub_q31:0000000000000000 $t
/tmp/ccnDQoMC.s:3549 .text.arm_sub_q31:0000000000000000 arm_sub_q31
/tmp/ccnDQoMC.s:3606 .text.arm_sub_q7:0000000000000000 $t
/tmp/ccnDQoMC.s:3614 .text.arm_sub_q7:0000000000000000 arm_sub_q7
/tmp/ccnDQoMC.s:3673 .text.arm_xor_u16:0000000000000000 $t
/tmp/ccnDQoMC.s:3681 .text.arm_xor_u16:0000000000000000 arm_xor_u16
/tmp/ccnDQoMC.s:3831 .text.arm_xor_u32:0000000000000000 $t
/tmp/ccnDQoMC.s:3839 .text.arm_xor_u32:0000000000000000 arm_xor_u32
/tmp/ccnDQoMC.s:3886 .text.arm_xor_u8:0000000000000000 $t
/tmp/ccnDQoMC.s:3894 .text.arm_xor_u8:0000000000000000 arm_xor_u8
NO UNDEFINED SYMBOLS
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