790 lines
31 KiB
Plaintext
790 lines
31 KiB
Plaintext
ARM GAS /tmp/ccXNdRAn.s page 1
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1 .cpu cortex-m4
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2 .eabi_attribute 27, 1
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3 .eabi_attribute 28, 1
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4 .eabi_attribute 20, 1
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5 .eabi_attribute 21, 1
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6 .eabi_attribute 23, 3
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7 .eabi_attribute 24, 1
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8 .eabi_attribute 25, 1
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9 .eabi_attribute 26, 1
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10 .eabi_attribute 30, 2
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11 .eabi_attribute 34, 1
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12 .eabi_attribute 18, 4
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13 .file "ComplexMathFunctions.c"
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14 .text
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15 .section .text.arm_cmplx_conj_f32,"ax",%progbits
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16 .align 1
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17 .p2align 2,,3
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18 .global arm_cmplx_conj_f32
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19 .arch armv7e-m
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20 .syntax unified
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21 .thumb
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22 .thumb_func
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23 .fpu fpv4-sp-d16
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25 arm_cmplx_conj_f32:
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26 @ args = 0, pretend = 0, frame = 0
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27 @ frame_needed = 0, uses_anonymous_args = 0
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28 @ link register save eliminated.
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29 0000 82B1 cbz r2, .L1
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30 0002 0830 adds r0, r0, #8
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31 0004 0831 adds r1, r1, #8
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32 .L3:
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33 0006 0831 adds r1, r1, #8
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34 0008 50F8083C ldr r3, [r0, #-8] @ float
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35 000c 41F8103C str r3, [r1, #-16] @ float
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36 0010 50ED017A vldr.32 s15, [r0, #-4]
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37 0014 013A subs r2, r2, #1
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38 0016 F1EE677A vneg.f32 s15, s15
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39 001a 00F10800 add r0, r0, #8
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40 001e 41ED037A vstr.32 s15, [r1, #-12]
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41 0022 F0D1 bne .L3
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42 .L1:
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43 0024 7047 bx lr
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45 0026 00BF .section .text.arm_cmplx_conj_q15,"ax",%progbits
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46 .align 1
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47 .p2align 2,,3
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48 .global arm_cmplx_conj_q15
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49 .syntax unified
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50 .thumb
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51 .thumb_func
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52 .fpu fpv4-sp-d16
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54 arm_cmplx_conj_q15:
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55 @ args = 0, pretend = 0, frame = 0
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56 @ frame_needed = 0, uses_anonymous_args = 0
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57 0000 A2B1 cbz r2, .L17
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58 0002 10B5 push {r4, lr}
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59 0004 0023 movs r3, #0
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60 0006 841C adds r4, r0, #2
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ARM GAS /tmp/ccXNdRAn.s page 2
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61 0008 01F1020E add lr, r1, #2
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62 .L11:
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63 000c 30F923C0 ldrsh ip, [r0, r3, lsl #2]
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64 0010 21F823C0 strh ip, [r1, r3, lsl #2] @ movhi
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65 0014 34F923C0 ldrsh ip, [r4, r3, lsl #2]
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66 0018 CCF1000C rsb ip, ip, #0
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67 .syntax unified
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68 @ 193 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
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69 001c 0CF30F0C ssat ip, #16, ip
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70 @ 0 "" 2
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71 .thumb
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72 .syntax unified
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73 0020 2EF823C0 strh ip, [lr, r3, lsl #2] @ movhi
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74 0024 0133 adds r3, r3, #1
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75 0026 9342 cmp r3, r2
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76 0028 F0D1 bne .L11
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77 002a 10BD pop {r4, pc}
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78 .L17:
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79 002c 7047 bx lr
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81 002e 00BF .section .text.arm_cmplx_conj_q31,"ax",%progbits
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82 .align 1
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83 .p2align 2,,3
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84 .global arm_cmplx_conj_q31
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85 .syntax unified
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86 .thumb
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87 .thumb_func
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88 .fpu fpv4-sp-d16
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90 arm_cmplx_conj_q31:
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91 @ args = 0, pretend = 0, frame = 0
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92 @ frame_needed = 0, uses_anonymous_args = 0
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93 0000 9AB1 cbz r2, .L28
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94 0002 0023 movs r3, #0
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95 0004 30B5 push {r4, r5, lr}
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96 0006 9C46 mov ip, r3
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97 0008 051D adds r5, r0, #4
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98 000a 01F1040E add lr, r1, #4
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99 .L22:
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100 000e 50F83340 ldr r4, [r0, r3, lsl #3]
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101 0012 41F83340 str r4, [r1, r3, lsl #3]
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102 0016 55F83340 ldr r4, [r5, r3, lsl #3]
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103 .syntax unified
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104 @ 2125 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
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105 001a 84FAACF4 qsub r4, ip, r4
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106 @ 0 "" 2
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107 .thumb
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108 .syntax unified
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109 001e 4EF83340 str r4, [lr, r3, lsl #3]
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110 0022 0133 adds r3, r3, #1
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111 0024 9342 cmp r3, r2
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112 0026 F2D1 bne .L22
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113 0028 30BD pop {r4, r5, pc}
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114 .L28:
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115 002a 7047 bx lr
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117 .section .text.arm_cmplx_dot_prod_f32,"ax",%progbits
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118 .align 1
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119 .p2align 2,,3
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120 .global arm_cmplx_dot_prod_f32
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ARM GAS /tmp/ccXNdRAn.s page 3
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121 .syntax unified
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122 .thumb
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123 .thumb_func
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124 .fpu fpv4-sp-d16
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126 arm_cmplx_dot_prod_f32:
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127 @ args = 4, pretend = 0, frame = 0
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128 @ frame_needed = 0, uses_anonymous_args = 0
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129 @ link register save eliminated.
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130 0000 DFED157A vldr.32 s15, .L36
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131 0004 FAB1 cbz r2, .L34
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132 0006 0830 adds r0, r0, #8
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133 0008 B0EE677A vmov.f32 s14, s15
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134 000c 0831 adds r1, r1, #8
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135 .L33:
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136 000e 10ED026A vldr.32 s12, [r0, #-8]
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137 0012 51ED026A vldr.32 s13, [r1, #-8]
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138 0016 51ED015A vldr.32 s11, [r1, #-4]
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139 001a A6EE267A vfma.f32 s14, s12, s13
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140 001e 013A subs r2, r2, #1
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141 0020 01F10801 add r1, r1, #8
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142 0024 E6EE257A vfma.f32 s15, s12, s11
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143 0028 00F10800 add r0, r0, #8
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144 002c 10ED036A vldr.32 s12, [r0, #-12]
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145 0030 A6EE657A vfms.f32 s14, s12, s11
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146 0034 E6EE267A vfma.f32 s15, s12, s13
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147 0038 E9D1 bne .L33
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148 003a 83ED007A vstr.32 s14, [r3]
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149 003e 009B ldr r3, [sp]
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150 0040 C3ED007A vstr.32 s15, [r3]
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151 0044 7047 bx lr
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152 .L34:
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153 0046 B0EE677A vmov.f32 s14, s15
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154 004a 83ED007A vstr.32 s14, [r3]
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155 004e 009B ldr r3, [sp]
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156 0050 C3ED007A vstr.32 s15, [r3]
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157 0054 7047 bx lr
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158 .L37:
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159 0056 00BF .align 2
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160 .L36:
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161 0058 00000000 .word 0
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163 .section .text.arm_cmplx_dot_prod_q15,"ax",%progbits
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164 .align 1
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165 .p2align 2,,3
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166 .global arm_cmplx_dot_prod_q15
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167 .syntax unified
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168 .thumb
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169 .thumb_func
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170 .fpu fpv4-sp-d16
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172 arm_cmplx_dot_prod_q15:
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173 @ args = 4, pretend = 0, frame = 16
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174 @ frame_needed = 0, uses_anonymous_args = 0
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175 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
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176 0004 85B0 sub sp, sp, #20
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177 0006 0393 str r3, [sp, #12]
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178 0008 C2B3 cbz r2, .L41
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179 000a 0024 movs r4, #0
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180 000c 0025 movs r5, #0
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ARM GAS /tmp/ccXNdRAn.s page 4
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181 000e CDE90045 strd r4, [sp]
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182 0012 8F1C adds r7, r1, #2
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183 0014 0023 movs r3, #0
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184 0016 00F10208 add r8, r0, #2
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185 001a A246 mov r10, r4
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186 001c AB46 mov fp, r5
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187 001e BE46 mov lr, r7
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188 .L40:
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189 0020 DDE90067 ldrd r6, [sp]
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190 0024 30F923C0 ldrsh ip, [r0, r3, lsl #2]
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191 0028 3EF92340 ldrsh r4, [lr, r3, lsl #2]
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192 002c 38F92390 ldrsh r9, [r8, r3, lsl #2]
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193 0030 31F92350 ldrsh r5, [r1, r3, lsl #2]
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194 0034 CCFB8467 smlalbb r6, r7, ip, r4
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195 0038 C5FB8967 smlalbb r6, r7, r5, r9
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196 003c CDE90067 strd r6, [sp]
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197 0040 5646 mov r6, r10
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198 0042 5F46 mov r7, fp
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199 0044 04FB09F4 mul r4, r4, r9
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200 0048 CCFB8567 smlalbb r6, r7, ip, r5
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201 004c B6EB040A subs r10, r6, r4
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202 0050 03F10103 add r3, r3, #1
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203 0054 67EBE47B sbc fp, r7, r4, asr #31
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204 0058 9A42 cmp r2, r3
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205 005a E1D1 bne .L40
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206 005c DDE90001 ldrd r0, [sp]
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207 0060 4FEA9A13 lsr r3, r10, #6
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208 0064 8209 lsrs r2, r0, #6
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209 0066 43EA8B63 orr r3, r3, fp, lsl #26
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210 006a 42EA8162 orr r2, r2, r1, lsl #26
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211 .L39:
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212 006e 0399 ldr r1, [sp, #12]
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213 0070 0B60 str r3, [r1]
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214 0072 0E9B ldr r3, [sp, #56]
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215 0074 1A60 str r2, [r3]
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216 0076 05B0 add sp, sp, #20
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217 @ sp needed
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218 0078 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
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219 .L41:
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220 007c 1346 mov r3, r2
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221 007e F6E7 b .L39
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223 .section .text.arm_cmplx_dot_prod_q31,"ax",%progbits
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224 .align 1
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225 .p2align 2,,3
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226 .global arm_cmplx_dot_prod_q31
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227 .syntax unified
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228 .thumb
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229 .thumb_func
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230 .fpu fpv4-sp-d16
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232 arm_cmplx_dot_prod_q31:
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233 @ args = 4, pretend = 0, frame = 16
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234 @ frame_needed = 0, uses_anonymous_args = 0
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235 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
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236 0004 85B0 sub sp, sp, #20
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237 0006 0393 str r3, [sp, #12]
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238 0008 002A cmp r2, #0
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239 000a 46D0 beq .L47
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ARM GAS /tmp/ccXNdRAn.s page 5
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240 000c 031D adds r3, r0, #4
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241 000e 4FF0000C mov ip, #0
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242 0012 0193 str r3, [sp, #4]
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243 0014 0B1D adds r3, r1, #4
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244 0016 6446 mov r4, ip
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245 0018 E046 mov r8, ip
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246 001a 6646 mov r6, ip
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247 001c E646 mov lr, ip
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248 001e 0293 str r3, [sp, #8]
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249 .L46:
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250 0020 50F83C90 ldr r9, [r0, ip, lsl #3]
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251 0024 51F83C30 ldr r3, [r1, ip, lsl #3]
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252 0028 029D ldr r5, [sp, #8]
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253 002a 019F ldr r7, [sp, #4]
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254 002c 55F83C50 ldr r5, [r5, ip, lsl #3]
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255 0030 57F83C70 ldr r7, [r7, ip, lsl #3]
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256 0034 89FB03BA smull fp, r10, r9, r3
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257 0038 4FEA9B3B lsr fp, fp, #14
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258 003c 4BEA8A4B orr fp, fp, r10, lsl #18
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259 0040 1BEB0606 adds r6, fp, r6
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260 0044 4EEBAA3E adc lr, lr, r10, asr #14
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261 0048 89FB059A smull r9, r10, r9, r5
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262 004c 4FEA9939 lsr r9, r9, #14
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263 0050 49EA8A49 orr r9, r9, r10, lsl #18
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264 0054 19EB0404 adds r4, r9, r4
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265 0058 85FB0759 smull r5, r9, r5, r7
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266 005c 4FEA9535 lsr r5, r5, #14
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267 0060 83FB0737 smull r3, r7, r3, r7
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268 0064 45EA8945 orr r5, r5, r9, lsl #18
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269 0068 4FEA9333 lsr r3, r3, #14
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270 006c 48EBAA38 adc r8, r8, r10, asr #14
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271 0070 43EA8743 orr r3, r3, r7, lsl #18
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272 0074 761B subs r6, r6, r5
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273 0076 0CF1010C add ip, ip, #1
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274 007a 6EEBA93E sbc lr, lr, r9, asr #14
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275 007e 1C19 adds r4, r3, r4
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276 0080 48EBA738 adc r8, r8, r7, asr #14
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277 0084 6245 cmp r2, ip
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278 0086 CBD1 bne .L46
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279 .L45:
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280 0088 039B ldr r3, [sp, #12]
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281 008a C3E9006E strd r6, lr, [r3]
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282 008e 0E9B ldr r3, [sp, #56]
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283 0090 C3E90048 strd r4, r8, [r3]
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284 0094 05B0 add sp, sp, #20
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285 @ sp needed
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286 0096 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
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287 .L47:
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288 009a 1446 mov r4, r2
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289 009c 9046 mov r8, r2
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290 009e 1646 mov r6, r2
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291 00a0 9646 mov lr, r2
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292 00a2 F1E7 b .L45
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294 .section .text.arm_cmplx_mag_f32,"ax",%progbits
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295 .align 1
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296 .p2align 2,,3
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297 .global arm_cmplx_mag_f32
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ARM GAS /tmp/ccXNdRAn.s page 6
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298 .syntax unified
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299 .thumb
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300 .thumb_func
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301 .fpu fpv4-sp-d16
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303 arm_cmplx_mag_f32:
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304 @ args = 0, pretend = 0, frame = 16
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305 @ frame_needed = 0, uses_anonymous_args = 0
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306 0000 1AB3 cbz r2, .L68
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307 0002 10B5 push {r4, lr}
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308 0004 0830 adds r0, r0, #8
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309 0006 84B0 sub sp, sp, #16
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310 0008 0024 movs r4, #0
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311 .L58:
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312 000a 10ED010A vldr.32 s0, [r0, #-4]
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313 000e 50ED027A vldr.32 s15, [r0, #-8]
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314 0012 20EE000A vmul.f32 s0, s0, s0
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315 0016 0431 adds r1, r1, #4
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316 0018 A7EEA70A vfma.f32 s0, s15, s15
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317 001c B5EEC00A vcmpe.f32 s0, #0
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318 0020 F1EE10FA vmrs APSR_nzcv, FPSCR
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319 0024 0EDB blt .L65
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320 0026 B5EE400A vcmp.f32 s0, #0
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321 002a F1EE10FA vmrs APSR_nzcv, FPSCR
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322 002e 0DD4 bmi .L66
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323 0030 F1EEC07A vsqrt.f32 s15, s0
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324 .L56:
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325 0034 41ED017A vstr.32 s15, [r1, #-4]
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326 .L57:
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327 0038 013A subs r2, r2, #1
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328 003a 00F10800 add r0, r0, #8
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329 003e E4D1 bne .L58
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330 0040 04B0 add sp, sp, #16
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331 @ sp needed
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332 0042 10BD pop {r4, pc}
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333 .L65:
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334 0044 41F8044C str r4, [r1, #-4] @ float
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335 0048 F6E7 b .L57
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336 .L68:
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337 004a 7047 bx lr
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338 .L66:
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339 004c CDE90212 strd r1, r2, [sp, #8]
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340 0050 0190 str r0, [sp, #4]
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341 0052 FFF7FEFF bl sqrtf
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342 0056 DDE90212 ldrd r1, r2, [sp, #8]
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343 005a 0198 ldr r0, [sp, #4]
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344 005c F0EE407A vmov.f32 s15, s0
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345 0060 E8E7 b .L56
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347 0062 00BF .section .text.arm_cmplx_mag_q15,"ax",%progbits
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348 .align 1
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349 .p2align 2,,3
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350 .global arm_cmplx_mag_q15
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351 .syntax unified
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352 .thumb
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353 .thumb_func
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354 .fpu fpv4-sp-d16
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356 arm_cmplx_mag_q15:
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357 @ args = 0, pretend = 0, frame = 0
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ARM GAS /tmp/ccXNdRAn.s page 7
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358 @ frame_needed = 0, uses_anonymous_args = 0
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359 0000 82B1 cbz r2, .L79
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360 0002 70B5 push {r4, r5, r6, lr}
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361 0004 0646 mov r6, r0
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362 0006 0D46 mov r5, r1
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363 0008 1446 mov r4, r2
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364 .L73:
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365 000a 56F8043B ldr r3, [r6], #4 @ unaligned
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366 .syntax unified
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367 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
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368 000e 23FB03F3 smuad r3, r3, r3
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369 @ 0 "" 2
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370 .thumb
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371 .syntax unified
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372 0012 2946 mov r1, r5
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373 0014 5814 asrs r0, r3, #17
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374 0016 FFF7FEFF bl arm_sqrt_q15
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375 001a 013C subs r4, r4, #1
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376 001c 05F10205 add r5, r5, #2
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377 0020 F3D1 bne .L73
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||
378 0022 70BD pop {r4, r5, r6, pc}
|
||
379 .L79:
|
||
380 0024 7047 bx lr
|
||
382 0026 00BF .section .text.arm_cmplx_mag_q31,"ax",%progbits
|
||
383 .align 1
|
||
384 .p2align 2,,3
|
||
385 .global arm_cmplx_mag_q31
|
||
386 .syntax unified
|
||
387 .thumb
|
||
388 .thumb_func
|
||
389 .fpu fpv4-sp-d16
|
||
391 arm_cmplx_mag_q31:
|
||
392 @ args = 0, pretend = 0, frame = 0
|
||
393 @ frame_needed = 0, uses_anonymous_args = 0
|
||
394 0000 C2B1 cbz r2, .L90
|
||
395 0002 70B5 push {r4, r5, r6, lr}
|
||
396 0004 0E46 mov r6, r1
|
||
397 0006 1546 mov r5, r2
|
||
398 0008 00F10804 add r4, r0, #8
|
||
399 .L84:
|
||
400 000c 54E90203 ldrd r0, r3, [r4, #-8]
|
||
401 0010 83FB033C smull r3, ip, r3, r3
|
||
402 0014 80FB0002 smull r0, r2, r0, r0
|
||
403 0018 4FEA6C00 asr r0, ip, #1
|
||
404 001c 3146 mov r1, r6
|
||
405 001e 00EB6200 add r0, r0, r2, asr #1
|
||
406 0022 FFF7FEFF bl arm_sqrt_q31
|
||
407 0026 013D subs r5, r5, #1
|
||
408 0028 06F10406 add r6, r6, #4
|
||
409 002c 04F10804 add r4, r4, #8
|
||
410 0030 ECD1 bne .L84
|
||
411 0032 70BD pop {r4, r5, r6, pc}
|
||
412 .L90:
|
||
413 0034 7047 bx lr
|
||
415 0036 00BF .section .text.arm_cmplx_mag_squared_f32,"ax",%progbits
|
||
416 .align 1
|
||
417 .p2align 2,,3
|
||
ARM GAS /tmp/ccXNdRAn.s page 8
|
||
|
||
|
||
418 .global arm_cmplx_mag_squared_f32
|
||
419 .syntax unified
|
||
420 .thumb
|
||
421 .thumb_func
|
||
422 .fpu fpv4-sp-d16
|
||
424 arm_cmplx_mag_squared_f32:
|
||
425 @ args = 0, pretend = 0, frame = 0
|
||
426 @ frame_needed = 0, uses_anonymous_args = 0
|
||
427 @ link register save eliminated.
|
||
428 0000 72B1 cbz r2, .L93
|
||
429 0002 0830 adds r0, r0, #8
|
||
430 .L95:
|
||
431 0004 50ED017A vldr.32 s15, [r0, #-4]
|
||
432 0008 10ED027A vldr.32 s14, [r0, #-8]
|
||
433 000c 67EEA77A vmul.f32 s15, s15, s15
|
||
434 0010 013A subs r2, r2, #1
|
||
435 0012 E7EE077A vfma.f32 s15, s14, s14
|
||
436 0016 00F10800 add r0, r0, #8
|
||
437 001a E1EC017A vstmia.32 r1!, {s15}
|
||
438 001e F1D1 bne .L95
|
||
439 .L93:
|
||
440 0020 7047 bx lr
|
||
442 0022 00BF .section .text.arm_cmplx_mag_squared_q15,"ax",%progbits
|
||
443 .align 1
|
||
444 .p2align 2,,3
|
||
445 .global arm_cmplx_mag_squared_q15
|
||
446 .syntax unified
|
||
447 .thumb
|
||
448 .thumb_func
|
||
449 .fpu fpv4-sp-d16
|
||
451 arm_cmplx_mag_squared_q15:
|
||
452 @ args = 0, pretend = 0, frame = 0
|
||
453 @ frame_needed = 0, uses_anonymous_args = 0
|
||
454 @ link register save eliminated.
|
||
455 0000 42B1 cbz r2, .L100
|
||
456 .L102:
|
||
457 0002 50F8043B ldr r3, [r0], #4 @ unaligned
|
||
458 .syntax unified
|
||
459 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
460 0006 23FB03F3 smuad r3, r3, r3
|
||
461 @ 0 "" 2
|
||
462 .thumb
|
||
463 .syntax unified
|
||
464 000a 5B14 asrs r3, r3, #17
|
||
465 000c 013A subs r2, r2, #1
|
||
466 000e 21F8023B strh r3, [r1], #2 @ movhi
|
||
467 0012 F6D1 bne .L102
|
||
468 .L100:
|
||
469 0014 7047 bx lr
|
||
471 0016 00BF .section .text.arm_cmplx_mag_squared_q31,"ax",%progbits
|
||
472 .align 1
|
||
473 .p2align 2,,3
|
||
474 .global arm_cmplx_mag_squared_q31
|
||
475 .syntax unified
|
||
476 .thumb
|
||
477 .thumb_func
|
||
478 .fpu fpv4-sp-d16
|
||
ARM GAS /tmp/ccXNdRAn.s page 9
|
||
|
||
|
||
480 arm_cmplx_mag_squared_q31:
|
||
481 @ args = 0, pretend = 0, frame = 0
|
||
482 @ frame_needed = 0, uses_anonymous_args = 0
|
||
483 0000 9AB1 cbz r2, .L115
|
||
484 0002 00B5 push {lr}
|
||
485 0004 00F1080E add lr, r0, #8
|
||
486 .L109:
|
||
487 0008 5EE90203 ldrd r0, r3, [lr, #-8]
|
||
488 000c 83FB03C3 smull ip, r3, r3, r3
|
||
489 0010 5B10 asrs r3, r3, #1
|
||
490 0012 80FB000C smull r0, ip, r0, r0
|
||
491 0016 03EB6C03 add r3, r3, ip, asr #1
|
||
492 001a 013A subs r2, r2, #1
|
||
493 001c 41F8043B str r3, [r1], #4
|
||
494 0020 0EF1080E add lr, lr, #8
|
||
495 0024 F0D1 bne .L109
|
||
496 0026 5DF804FB ldr pc, [sp], #4
|
||
497 .L115:
|
||
498 002a 7047 bx lr
|
||
500 .section .text.arm_cmplx_mult_cmplx_f32,"ax",%progbits
|
||
501 .align 1
|
||
502 .p2align 2,,3
|
||
503 .global arm_cmplx_mult_cmplx_f32
|
||
504 .syntax unified
|
||
505 .thumb
|
||
506 .thumb_func
|
||
507 .fpu fpv4-sp-d16
|
||
509 arm_cmplx_mult_cmplx_f32:
|
||
510 @ args = 0, pretend = 0, frame = 0
|
||
511 @ frame_needed = 0, uses_anonymous_args = 0
|
||
512 @ link register save eliminated.
|
||
513 0000 F3B1 cbz r3, .L118
|
||
514 0002 0830 adds r0, r0, #8
|
||
515 0004 0831 adds r1, r1, #8
|
||
516 0006 0832 adds r2, r2, #8
|
||
517 .L120:
|
||
518 0008 50ED017A vldr.32 s15, [r0, #-4]
|
||
519 000c 51ED025A vldr.32 s11, [r1, #-8]
|
||
520 0010 51ED016A vldr.32 s13, [r1, #-4]
|
||
521 0014 10ED026A vldr.32 s12, [r0, #-8]
|
||
522 0018 26EEE77A vnmul.f32 s14, s13, s15
|
||
523 001c 67EEA57A vmul.f32 s15, s15, s11
|
||
524 0020 A6EE257A vfma.f32 s14, s12, s11
|
||
525 0024 013B subs r3, r3, #1
|
||
526 0026 00F10800 add r0, r0, #8
|
||
527 002a E6EE267A vfma.f32 s15, s12, s13
|
||
528 002e 01F10801 add r1, r1, #8
|
||
529 0032 02F10802 add r2, r2, #8
|
||
530 0036 02ED047A vstr.32 s14, [r2, #-16]
|
||
531 003a 42ED037A vstr.32 s15, [r2, #-12]
|
||
532 003e E3D1 bne .L120
|
||
533 .L118:
|
||
534 0040 7047 bx lr
|
||
536 0042 00BF .section .text.arm_cmplx_mult_cmplx_q15,"ax",%progbits
|
||
537 .align 1
|
||
538 .p2align 2,,3
|
||
539 .global arm_cmplx_mult_cmplx_q15
|
||
ARM GAS /tmp/ccXNdRAn.s page 10
|
||
|
||
|
||
540 .syntax unified
|
||
541 .thumb
|
||
542 .thumb_func
|
||
543 .fpu fpv4-sp-d16
|
||
545 arm_cmplx_mult_cmplx_q15:
|
||
546 @ args = 0, pretend = 0, frame = 0
|
||
547 @ frame_needed = 0, uses_anonymous_args = 0
|
||
548 0000 3BB3 cbz r3, .L133
|
||
549 0002 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr}
|
||
550 0006 4FF0000C mov ip, #0
|
||
551 000a 871C adds r7, r0, #2
|
||
552 000c 8E1C adds r6, r1, #2
|
||
553 000e 951C adds r5, r2, #2
|
||
554 .L127:
|
||
555 0010 37F92CE0 ldrsh lr, [r7, ip, lsl #2]
|
||
556 0014 31F92C40 ldrsh r4, [r1, ip, lsl #2]
|
||
557 0018 36F92C80 ldrsh r8, [r6, ip, lsl #2]
|
||
558 001c 30F92CA0 ldrsh r10, [r0, ip, lsl #2]
|
||
559 0020 0AFB04F9 mul r9, r10, r4
|
||
560 0024 04FB0EF4 mul r4, r4, lr
|
||
561 0028 0EFB08FE mul lr, lr, r8
|
||
562 002c 4FEA6E4E asr lr, lr, #17
|
||
563 0030 0AFB08F8 mul r8, r10, r8
|
||
564 0034 6414 asrs r4, r4, #17
|
||
565 0036 CEEB694E rsb lr, lr, r9, asr #17
|
||
566 003a 04EB6844 add r4, r4, r8, asr #17
|
||
567 003e 22F82CE0 strh lr, [r2, ip, lsl #2] @ movhi
|
||
568 0042 25F82C40 strh r4, [r5, ip, lsl #2] @ movhi
|
||
569 0046 0CF1010C add ip, ip, #1
|
||
570 004a 6345 cmp r3, ip
|
||
571 004c E0D1 bne .L127
|
||
572 004e BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc}
|
||
573 .L133:
|
||
574 0052 7047 bx lr
|
||
576 .section .text.arm_cmplx_mult_cmplx_q31,"ax",%progbits
|
||
577 .align 1
|
||
578 .p2align 2,,3
|
||
579 .global arm_cmplx_mult_cmplx_q31
|
||
580 .syntax unified
|
||
581 .thumb
|
||
582 .thumb_func
|
||
583 .fpu fpv4-sp-d16
|
||
585 arm_cmplx_mult_cmplx_q31:
|
||
586 @ args = 0, pretend = 0, frame = 0
|
||
587 @ frame_needed = 0, uses_anonymous_args = 0
|
||
588 0000 3BB3 cbz r3, .L144
|
||
589 0002 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
|
||
590 0006 4FF0000C mov ip, #0
|
||
591 000a 00F10408 add r8, r0, #4
|
||
592 000e 0F1D adds r7, r1, #4
|
||
593 0010 161D adds r6, r2, #4
|
||
594 .L138:
|
||
595 0012 58F83C50 ldr r5, [r8, ip, lsl #3]
|
||
596 0016 51F83C40 ldr r4, [r1, ip, lsl #3]
|
||
597 001a 57F83CA0 ldr r10, [r7, ip, lsl #3]
|
||
598 001e 50F83CE0 ldr lr, [r0, ip, lsl #3]
|
||
599 0022 8EFB04B9 smull fp, r9, lr, r4
|
||
ARM GAS /tmp/ccXNdRAn.s page 11
|
||
|
||
|
||
600 0026 84FB05B4 smull fp, r4, r4, r5
|
||
601 002a 85FB0AB5 smull fp, r5, r5, r10
|
||
602 002e 6D10 asrs r5, r5, #1
|
||
603 0030 8EFB0AAE smull r10, lr, lr, r10
|
||
604 0034 6410 asrs r4, r4, #1
|
||
605 0036 C5EB6905 rsb r5, r5, r9, asr #1
|
||
606 003a 04EB6E04 add r4, r4, lr, asr #1
|
||
607 003e 42F83C50 str r5, [r2, ip, lsl #3]
|
||
608 0042 46F83C40 str r4, [r6, ip, lsl #3]
|
||
609 0046 0CF1010C add ip, ip, #1
|
||
610 004a 6345 cmp r3, ip
|
||
611 004c E1D1 bne .L138
|
||
612 004e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
|
||
613 .L144:
|
||
614 0052 7047 bx lr
|
||
616 .section .text.arm_cmplx_mult_real_f32,"ax",%progbits
|
||
617 .align 1
|
||
618 .p2align 2,,3
|
||
619 .global arm_cmplx_mult_real_f32
|
||
620 .syntax unified
|
||
621 .thumb
|
||
622 .thumb_func
|
||
623 .fpu fpv4-sp-d16
|
||
625 arm_cmplx_mult_real_f32:
|
||
626 @ args = 0, pretend = 0, frame = 0
|
||
627 @ frame_needed = 0, uses_anonymous_args = 0
|
||
628 @ link register save eliminated.
|
||
629 0000 A3B1 cbz r3, .L147
|
||
630 0002 0830 adds r0, r0, #8
|
||
631 0004 0832 adds r2, r2, #8
|
||
632 .L149:
|
||
633 0006 10ED027A vldr.32 s14, [r0, #-8]
|
||
634 000a F1EC016A vldmia.32 r1!, {s13}
|
||
635 000e 27EE267A vmul.f32 s14, s14, s13
|
||
636 0012 0830 adds r0, r0, #8
|
||
637 0014 02ED027A vstr.32 s14, [r2, #-8]
|
||
638 0018 50ED037A vldr.32 s15, [r0, #-12]
|
||
639 001c 67EEA67A vmul.f32 s15, s15, s13
|
||
640 0020 013B subs r3, r3, #1
|
||
641 0022 02F10802 add r2, r2, #8
|
||
642 0026 42ED037A vstr.32 s15, [r2, #-12]
|
||
643 002a ECD1 bne .L149
|
||
644 .L147:
|
||
645 002c 7047 bx lr
|
||
647 002e 00BF .section .text.arm_cmplx_mult_real_q15,"ax",%progbits
|
||
648 .align 1
|
||
649 .p2align 2,,3
|
||
650 .global arm_cmplx_mult_real_q15
|
||
651 .syntax unified
|
||
652 .thumb
|
||
653 .thumb_func
|
||
654 .fpu fpv4-sp-d16
|
||
656 arm_cmplx_mult_real_q15:
|
||
657 @ args = 0, pretend = 0, frame = 0
|
||
658 @ frame_needed = 0, uses_anonymous_args = 0
|
||
659 0000 EBB1 cbz r3, .L162
|
||
660 0002 F0B5 push {r4, r5, r6, r7, lr}
|
||
ARM GAS /tmp/ccXNdRAn.s page 12
|
||
|
||
|
||
661 0004 0024 movs r4, #0
|
||
662 0006 861C adds r6, r0, #2
|
||
663 0008 951C adds r5, r2, #2
|
||
664 .L156:
|
||
665 000a 31F9027B ldrsh r7, [r1], #2
|
||
666 000e 30F824E0 ldrh lr, [r0, r4, lsl #2]
|
||
667 0012 1EFB07FE smulbb lr, lr, r7
|
||
668 0016 4FEAEE3E asr lr, lr, #15
|
||
669 .syntax unified
|
||
670 @ 226 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_
|
||
671 001a 0EF30F0E ssat lr, #16, lr
|
||
672 @ 0 "" 2
|
||
673 .thumb
|
||
674 .syntax unified
|
||
675 001e 22F824E0 strh lr, [r2, r4, lsl #2] @ movhi
|
||
676 0022 36F824C0 ldrh ip, [r6, r4, lsl #2]
|
||
677 0026 1CFB07FC smulbb ip, ip, r7
|
||
678 002a 4FEAEC3C asr ip, ip, #15
|
||
679 .syntax unified
|
||
680 @ 227 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_
|
||
681 002e 0CF30F0C ssat ip, #16, ip
|
||
682 @ 0 "" 2
|
||
683 .thumb
|
||
684 .syntax unified
|
||
685 0032 25F824C0 strh ip, [r5, r4, lsl #2] @ movhi
|
||
686 0036 0134 adds r4, r4, #1
|
||
687 0038 A342 cmp r3, r4
|
||
688 003a E6D1 bne .L156
|
||
689 003c F0BD pop {r4, r5, r6, r7, pc}
|
||
690 .L162:
|
||
691 003e 7047 bx lr
|
||
693 .section .text.arm_cmplx_mult_real_q31,"ax",%progbits
|
||
694 .align 1
|
||
695 .p2align 2,,3
|
||
696 .global arm_cmplx_mult_real_q31
|
||
697 .syntax unified
|
||
698 .thumb
|
||
699 .thumb_func
|
||
700 .fpu fpv4-sp-d16
|
||
702 arm_cmplx_mult_real_q31:
|
||
703 @ args = 0, pretend = 0, frame = 0
|
||
704 @ frame_needed = 0, uses_anonymous_args = 0
|
||
705 0000 EBB1 cbz r3, .L173
|
||
706 0002 F0B5 push {r4, r5, r6, r7, lr}
|
||
707 0004 4FF0000C mov ip, #0
|
||
708 0008 061D adds r6, r0, #4
|
||
709 000a 151D adds r5, r2, #4
|
||
710 .L167:
|
||
711 000c 51F8044B ldr r4, [r1], #4
|
||
712 0010 50F83C70 ldr r7, [r0, ip, lsl #3]
|
||
713 0014 84FB07E7 smull lr, r7, r4, r7
|
||
714 .syntax unified
|
||
715 @ 187 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_
|
||
716 0018 07F31E07 ssat r7, #31, r7
|
||
717 @ 0 "" 2
|
||
718 .thumb
|
||
719 .syntax unified
|
||
ARM GAS /tmp/ccXNdRAn.s page 13
|
||
|
||
|
||
720 001c 7F00 lsls r7, r7, #1
|
||
721 001e 42F83C70 str r7, [r2, ip, lsl #3]
|
||
722 0022 56F83C70 ldr r7, [r6, ip, lsl #3]
|
||
723 0026 84FB07E4 smull lr, r4, r4, r7
|
||
724 .syntax unified
|
||
725 @ 188 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_
|
||
726 002a 04F31E04 ssat r4, #31, r4
|
||
727 @ 0 "" 2
|
||
728 .thumb
|
||
729 .syntax unified
|
||
730 002e 6400 lsls r4, r4, #1
|
||
731 0030 45F83C40 str r4, [r5, ip, lsl #3]
|
||
732 0034 0CF1010C add ip, ip, #1
|
||
733 0038 6345 cmp r3, ip
|
||
734 003a E7D1 bne .L167
|
||
735 003c F0BD pop {r4, r5, r6, r7, pc}
|
||
736 .L173:
|
||
737 003e 7047 bx lr
|
||
739 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)"
|
||
ARM GAS /tmp/ccXNdRAn.s page 14
|
||
|
||
|
||
DEFINED SYMBOLS
|
||
*ABS*:0000000000000000 ComplexMathFunctions.c
|
||
/tmp/ccXNdRAn.s:16 .text.arm_cmplx_conj_f32:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:25 .text.arm_cmplx_conj_f32:0000000000000000 arm_cmplx_conj_f32
|
||
/tmp/ccXNdRAn.s:46 .text.arm_cmplx_conj_q15:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:54 .text.arm_cmplx_conj_q15:0000000000000000 arm_cmplx_conj_q15
|
||
/tmp/ccXNdRAn.s:82 .text.arm_cmplx_conj_q31:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:90 .text.arm_cmplx_conj_q31:0000000000000000 arm_cmplx_conj_q31
|
||
/tmp/ccXNdRAn.s:118 .text.arm_cmplx_dot_prod_f32:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:126 .text.arm_cmplx_dot_prod_f32:0000000000000000 arm_cmplx_dot_prod_f32
|
||
/tmp/ccXNdRAn.s:161 .text.arm_cmplx_dot_prod_f32:0000000000000058 $d
|
||
/tmp/ccXNdRAn.s:164 .text.arm_cmplx_dot_prod_q15:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:172 .text.arm_cmplx_dot_prod_q15:0000000000000000 arm_cmplx_dot_prod_q15
|
||
/tmp/ccXNdRAn.s:224 .text.arm_cmplx_dot_prod_q31:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:232 .text.arm_cmplx_dot_prod_q31:0000000000000000 arm_cmplx_dot_prod_q31
|
||
/tmp/ccXNdRAn.s:295 .text.arm_cmplx_mag_f32:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:303 .text.arm_cmplx_mag_f32:0000000000000000 arm_cmplx_mag_f32
|
||
/tmp/ccXNdRAn.s:348 .text.arm_cmplx_mag_q15:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:356 .text.arm_cmplx_mag_q15:0000000000000000 arm_cmplx_mag_q15
|
||
/tmp/ccXNdRAn.s:383 .text.arm_cmplx_mag_q31:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:391 .text.arm_cmplx_mag_q31:0000000000000000 arm_cmplx_mag_q31
|
||
/tmp/ccXNdRAn.s:416 .text.arm_cmplx_mag_squared_f32:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:424 .text.arm_cmplx_mag_squared_f32:0000000000000000 arm_cmplx_mag_squared_f32
|
||
/tmp/ccXNdRAn.s:443 .text.arm_cmplx_mag_squared_q15:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:451 .text.arm_cmplx_mag_squared_q15:0000000000000000 arm_cmplx_mag_squared_q15
|
||
/tmp/ccXNdRAn.s:472 .text.arm_cmplx_mag_squared_q31:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:480 .text.arm_cmplx_mag_squared_q31:0000000000000000 arm_cmplx_mag_squared_q31
|
||
/tmp/ccXNdRAn.s:501 .text.arm_cmplx_mult_cmplx_f32:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:509 .text.arm_cmplx_mult_cmplx_f32:0000000000000000 arm_cmplx_mult_cmplx_f32
|
||
/tmp/ccXNdRAn.s:537 .text.arm_cmplx_mult_cmplx_q15:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:545 .text.arm_cmplx_mult_cmplx_q15:0000000000000000 arm_cmplx_mult_cmplx_q15
|
||
/tmp/ccXNdRAn.s:577 .text.arm_cmplx_mult_cmplx_q31:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:585 .text.arm_cmplx_mult_cmplx_q31:0000000000000000 arm_cmplx_mult_cmplx_q31
|
||
/tmp/ccXNdRAn.s:617 .text.arm_cmplx_mult_real_f32:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:625 .text.arm_cmplx_mult_real_f32:0000000000000000 arm_cmplx_mult_real_f32
|
||
/tmp/ccXNdRAn.s:648 .text.arm_cmplx_mult_real_q15:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:656 .text.arm_cmplx_mult_real_q15:0000000000000000 arm_cmplx_mult_real_q15
|
||
/tmp/ccXNdRAn.s:694 .text.arm_cmplx_mult_real_q31:0000000000000000 $t
|
||
/tmp/ccXNdRAn.s:702 .text.arm_cmplx_mult_real_q31:0000000000000000 arm_cmplx_mult_real_q31
|
||
|
||
UNDEFINED SYMBOLS
|
||
sqrtf
|
||
arm_sqrt_q15
|
||
arm_sqrt_q31
|