Files
squeow/squeow_sw/build/stm32g4xx_it.o

132 lines
20 KiB
Plaintext
Raw Normal View History

2025-06-28 00:58:29 +02:00
ELF(<00>H4(/.<00><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>pGpGpG<08><><EFBFBD><EFBFBD><EFBFBD><08><08>H<><48><EFBFBD><EFBFBD><08><00><08>H<><48><EFBFBD><EFBFBD><08><00><08>H<><48><EFBFBD><EFBFBD><08><00><08>H<><48><EFBFBD><EFBFBD>H<><48><EFBFBD><EFBFBD><08><08> H<><48><EFBFBD><EFBFBD> H<><48><EFBFBD><EFBFBD>F<><46> JxJ<78>O<EFBFBD><4F>C"Zc<5A>c<EFBFBD><63><EFBFBD><EFBFBD>K<18><08><><EFBFBD>O<EFBFBD><4F>BSc<53>c<EFBFBD><63><08>H<><48><EFBFBD><EFBFBD>K"p<08><08>H<><48><EFBFBD><EFBFBD><08><00> <0C><00>]8+<<08><05> 9Vq<05>!Op<07>,<07> int+i0<05><06>
$J<05>O0d<05><07><00><08> <09><04> 9
ISR<04><11>#
IER<04><11>#
CR<04><11># D<04><11># I<04><11># d<04><11># j<04><11># <0B><04><11>#
TR1<04><11>#
TR2<04><11>#$
TR3<04><11>#( l<04><11>#, ;<04><11>#0 @<04><11>#4 E<04><11>#8 J<04><11>#<
DR<04><11>#@ <0B><04><11>#D <0B><04><11>#H { <04><11>#L <0B><04>9#P <0B> <04><11>#` <0B> <04><11>#d <0B> <04><11>#h <0B> <04><11>#l <04>9#p g <04><11>#<23> l <04><11>#<23> q <04><11>#<23> v <04><11>#<23> <04>9#<23> <0B><04><11>#<23> <0B><04><11>#<23> <04><11>#<23> "<04><11>#<23> <0B><04><11>#<23> <0B> <04><11>#<23> C
<04><11>#<23> '<04><11>#<23><07>I<08><03><04><03> g <09> CCRi<11>#<0E>j<11>#Xk<11>#ql<11># <0F> mU o <09> ISRq<11>#
r<11>#2s<03> y  CCR{<13>#<0F>|<02> ~ 8 CSR<04><13># CFR<04><13>#<0F> <04>  <04> `O<04><13>#<0F><04>E <04> <09><0E><04><13>#8<04><13>#<0F><04>m<10><04> <09> CR1<04><11># CR2<04><11>#<0E>
<04><11>#<04><11># SR<04><11># EGR<04><11>#<0E><04><11>#<0E><04><11>#N
<04><11># CNT<04><11>#$ PSC<04><11>#( ARR<11>#, RCR<11>#0<11>#4<11>#8$<11>#<)<11>#@"<11>#D.<11>#H3<11>#L<0E> <11>#Pv
<11>#T ECR <11>#X<0E> <11>#\ AF1 <11>#` AF2<11>#d OR<11>#h<0E><11>#l DCR<11>#<23><0E><11>#<23><07><00><08><00><0F><03> 0 y CR1<11># CR2<11># CR3<11># BRR<11># p<11>#f<11># RQR <11># ISR!<11># ICR"<11># RDR#<11>#$ TDR$<11>#(X%<11>#,H&<03><<05><01>d # <03> <05><03>~ <2<01>{
f+5<03> . ] <0B> 0 <0C># 3 <0C># <0B>7 <0C># , : <0C># J= <0C># @ <0C># <0B> C <0C># <0B>H <0C>#<03> J<03><P<01><12><12>b  Ui<05>
`q<10> Vs<1B> # <0B>u]# Tw<19>#$ _
y<1E>#% j{<1A> #( <0B>
} <0B> #, <0B>  <0B> #0 l <07> <0B> #4 <0B><07> <0B> #8 <07><1A>#< <0B><07><1B> #@ ><07><1A>#D <0B><07>%<25> #H <0B><07>%<25> #L 0<07>$<24>#P <0B><07>%<25> #T <0B><07>%<25> #X O<07>$<24>#\<04><01> <17> <04><04> <04>8`<04><03>
<07><03> 1 M
<0B>
3 <0C># X6 <0C># ^9 <0C># * < <0C># _E
PZ q G \ <0C># >m <0C># <0B> p <0C># 1t <0C># K<08> <0C># u <08> <0C># <0B><08><13># <0B><08><13># j<08> <0C># <0B><08><13># O<08> <0C>#$ > <08> <0C>#( <0B><08> <0C>#, <0B>
<08> <0C>#0 <0B><08><13>#4  <08> <0C>#8 <0B>
<08><13>#<  <08>M
#@p<08>Y
<08> <09>  <08> <0C>#I<08> <0C>#<0F> <08>} l<08> 0 V<08>"0 #<0E><08>!q #<0E><08>"6 #TT<08>!<21>#X_
<08>!<21>#\<08>!<21>#`<0E> <08>!<21> #dI<04> <0F> <03> < <04>  . <09> <0B> 0 <0C># S
4 <0C># @ 7 <0C># <0B> > <0C># <0B> A <0C># <0B> L <0C>#<03> NT < ;<01> B<12> 1e
<12>C A<03> <05> < G& <12><12>z<0F> K & < QZ <12><12>
<12>&
U8 Z < [<01> v<12><12><12><12>K u<0F> cl L k NV n'N#<0E> o&<26> #; p&<26> #, q'T# T s&<26>#<_
t&<26> #=v u&t#># v&<26>#DV w&g #H<04>6 d<08>3 t<08>d3 <00><08>y<0F> <09><03> $
. , 
0 <0C># V
B <0C># 
E <0C># <0B>
H <0C># <0B>
O <0C># w
R <0C># B
V <0C># <0B>
Z <0C># G
^ <0C># :
a<03> (
f <09> <0B>
h <0C># >
m <0C># -
p <0C># 
s <0C># q
w <0C># !
z <0C># <0B>
} <0C># O
<EFBFBD> <0C># <0B>
<EFBFBD> <0C># (
<EFBFBD> <0C>#$<03>
<EFBFBD>8
<EFBFBD><12><05><03>
<EFBFBD><12><05><03>
<EFBFBD><12><00>
<EFBFBD><10> V
<EFBFBD><1D># <0B>
<EFBFBD>,# Y
<EFBFBD><1E>#( 
<EFBFBD><1D>#P <0B>
<EFBFBD><1C>#T 2
<EFBFBD><1C>#V 
<EFBFBD>N #X k
<EFBFBD><1C>#\ <0B>
<EFBFBD><1C>#^ <0B>
<EFBFBD><1C>#` <0B>
<EFBFBD><1C>#d 
<EFBFBD><1C>#h <0B>
<EFBFBD><1C>#j <0B>
<EFBFBD>#l <0B>
<EFBFBD>$#p <0B>
2025-01-28 19:01:22 +01:00
<EFBFBD>
2025-06-28 00:58:29 +02:00
<EFBFBD>#t <0B>
2025-01-28 19:01:22 +01:00
<EFBFBD>
2025-06-28 00:58:29 +02:00
<EFBFBD>#x%
6 #|
6 #<23>T
<1D>#<23>c
!<21>#<23><0E>
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
!<21>#<23>
!<21>#<23>y<04><01><17><04>
!<19> )<19>{ .<1B>3 =<1B><19> E< , F< <19> <11>1<<1A> <19> ?<1A><19> @<1A>A<1A> B<1A> <01>
2025-01-28 19:01:22 +01:00
2025-06-28 00:58:29 +02:00
rqq<04><01> -
<01><01><17>V <08><01><01><17>I v <09> <01><17><04>
<08><01><17>< <01><01>6 <01> ^90[<01>* V<00>: H@<01> <20><0E>d`<00><00>&w!a<01><00><01><00><00>!<01><00><01><00>!s<01><00><00>! <01><00>@<00>!<01> <01>e<00>"<01><01>}"<01><01>}"<01><01>}"<01> <01>}"<01>z}"<01> k}"<01>\}"<01> N}% UR$ > : ; 9 I$ > 5I&II!I/  : ; 9 
2025-01-28 19:01:22 +01:00
: ; 9 I8
: ; 9 I8
 : ;9  : ;9 I8
 : ;9 I8
2025-06-28 00:58:29 +02:00
: ;9 I : ;9 > I: ; 9 (  : ; 9  I ' I> I: ;9 4: ; 9 I? < .? : ;9 ' < .? : ; 9 ' I< .? : ;9 ' I< .? : ;9 ' < .? : ;9 ' @<06>B <1F><>1 4: ;9 I<06>B!.? : ; 9 ' @<06>B ".? : ; 9 ' @
<EFBFBD>B }}}}}H}%P,HP}}}}}}}}}}<00>HH<00><01> Src/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/machine/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sysDrivers/CMSIS/Device/ST/STM32G4xx/IncludeDrivers/STM32G4xx_HAL_Driver/IncIncstm32g4xx_it.c_default_types.h_stdint.hstm32g431xx.hstm32g4xx.hstm32g4xx_hal_def.hstm32g4xx_hal_dma.hstm32g4xx_hal_adc.hstm32g4xx_hal_tim.hstm32g4xx_hal_uart.hsqueow.hsqueow_ui.hstm32g4xx_hal.h<03> <03> <03> <03> <03> <03><03><03><03>$2<03>$@<03>$@<03>$@<03>$=@<03>$> J! . " K
.0   =
<03>$?><03>$@DMA1_Channel4_IRQHandlerDirectionChannelNStatehdma_adc2SQR1SQR2SQR3SQR4RGCRLockAdvancedInitRTORRxXferSizeDTR2huart1OneBitSamplingDMAMUX_RequestGenStatus_TypeDefHAL_TIM_CHANNEL_STATE_RESETCNDTRLowPowerAutoWaitAdvFeatureInitDMARui_volumehdma_usart1_rxStopBitsCCR1CCR2CCR3CCR4CCR5CCR6__uint8_tOverSamplingDMAmuxRequestGenStatusMaskNbrOfConversionHAL_TIM_CHANNEL_STATE_BUSYDMAMUX_Channel_TypeDefHAL_TIM_STATE_ERRORlong intPendSV_HandlerDebugMon_HandlerTIM_Base_InitTypeDefPrioritypRxBuffPtrErrorCodehdma_usart1_txHAL_LockTypeDefChannelHAL_TIM_StateTypeDefCPARsigned charuint8_tSwapHAL_TIM_IRQHandlerDMAmuxChannelStatusUART_AdvFeatureInitTypeDefTIM_TypeDefRESERVED0RESERVED1unsigned charRESERVED3RESERVED4RESERVED5RESERVED6RESERVED7RESERVED8RESERVED9hadc2DMA_TypeDefChannelIndexScanConvModePRESCTriggeredModeRESERVED2HAL_TIM_ACTIVE_CHANNEL_1HAL_TIM_ACTIVE_CHANNEL_2HAL_TIM_ACTIVE_CHANNEL_3HAL_TIM_ACTIVE_CHANNEL_4HAL_TIM_ACTIVE_CHANNEL_5CCMR1CCMR2CCMR3charIFCR__uint16_thdmarxOverrunDisableDMAmuxChannelStatusMaskUSART_TypeDefWordLengthADC1_2_IRQHandlerDMA1_Channel3_IRQHandlerMaskDMAMUX_RequestGen_TypeDefPrescalerPeriphIncAWD2CRXferAbortCallbackADC_TypeDef/home/fra/Documenti/tech/sviluppo/telecom/radio/squeow/squeow_swhdmatxhdmaHAL_TIM_STATE_BUSYCFGRChannelCountInstanceADC_OversamplingTypeDefHwFlowCtlHAL_DMA_BURST_STATE_RESETDIFSELDiscontinuousConvModelong unsigned intDMAmuxChannelHAL_TIM_CHANNEL_STATE_READYDMAmuxRequestGenDIERHAL_ADC_IRQHandlerDataInvertMSBFirstGainCompensationHAL_TIM_STATE_RESETDMABurstStateSMPR1SMPR2ADC_InitTypeDefvu_meterNbTxDataToProcessDMADisableonRxErrorTISELsys_tickDMA_HandleAutoBaudRateModeSrc/stm32g4xx_it.cRxXferCountDMAmuxRequestGenStatusMemDataAlignment__uint32_tlong long intTIM2_IRQHandlerPeriphDataAlignmentUSART1_IRQHandlerGTPRHAL_TIM_ACTIVE_CHANNEL_CLEAREDFifoModeExternalTrigConvEdgeContinuousConvModeDmaBaseAddressAWD3CRAutoReloadPreloadRGSRReceptionTypeHAL_DMA_STATE_TIMEOUT__UART_HandleTypeDefunsigned intRGCFRResolutionCFGR2NbrOfDiscConversiongStateParentCMARChannelStateParityHAL_DMA_STATE_RESETHardFault_HandlerHAL_IncTickInitDMAContinuousRequestsHAL_DMA_IRQHandlerHAL_UART_RxTypeTypeDefpTxBuffPtrContextQueueUART_HandleTypeDefMemIncbloccoUART_InitTypeDefHAL_TIM_ACTIVE_CHANNEL_6DISABLEXferErrorCallbacklong doubleRepetitionCounterModeHAL_TIM_ActiveChannelDMA_Channel_TypeDefNMI_HandlerTxXferSizeFunctionalStatelong long unsigned int__DMA_HandleTypeDefuint16_tHAL_TIM_DMABurstStateTypeDefRESERVED10CCERCounterModeStateHAL_TIM_STATE_TIMEOUTHAL_UNLOCKEDDMA_HandleTypeDefXferCpltCallbackOversamplingModeSamplingModeSMCRRatioHAL_DMA_BURST_STATE_READYHAL_UART_IRQHandlerNbRxDataToProcessOverrunHAL_UART_StateTypeDefTxXferCountExternalTrigConvAutoBaudRateEnableHAL_DMA_STATE_BUSYEOCSelectionHAL_TIM_STATE_READYOFR1OFR2OFR3OFR4ADC_InjectionConfigTypeDefRequestSysTick_HandlerRxStateDMA_InitTypeDefADC_HandleTypeDefBaudRateGNU C17 14.2.1 20241119 -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -march=armv7e-m+fp -g -gdwarf-2 -Og -fdata-sections -ffunction-sectionsHAL_UART_RxEventTypeTypeDefhtim2htim3CALFACTshort intHAL_TIM_ChannelStateTypeDefOversamplingHAL_DMA_StateTypeDefENABLEOversamplingStopResetPeriodClockPrescalerHAL_ADC_GetValueJDR1JDR2JDR3JDR4JSQRUsageFault_HandlerDataAlignMemManage_HandlerTIM_HandleTypeDefXferHalfCpltCallbackhadc1DMAMUX_ChannelStatus_TypeDefInjectionConfigDMA1_Channel2_IRQHandlerBDTRGCOMPRxPinLevelInvertTxPinLevelInvertuint32_tRightBitShiftHAL_LOCKEDshort unsigned intTIM3_IRQHandlerHAL_DMA_STATE_READYHAL_DMA_BURST_STATE_BUSYSVC_HandlerRxEventTypeRxISRBusFault_Handleradc_valTxISRClockDivisionGCC: (Arm GNU Toolchain 14.2.Rel1 (Build arm-14.52)) 14.2.1 20241119 <00><><EFBFBD><EFBFBD>|      
2023-07-02 17:09:41 +02:00
"<00><>  

2025-06-28 00:58:29 +02:00
       8 !#%')(+"4FWj v
<00> <00> <00><00><00><00><00>)8J]ciHy<00><00><00><00><00><00><00><00><00><00>stm32g4xx_it.c$t$dNMI_HandlerHardFault_HandlerMemManage_HandlerBusFault_HandlerUsageFault_HandlerSVC_HandlerDebugMon_HandlerPendSV_HandlerSysTick_HandlerHAL_IncTickDMA1_Channel2_IRQHandlerHAL_DMA_IRQHandlerhdma_adc2DMA1_Channel3_IRQHandlerhdma_usart1_rxDMA1_Channel4_IRQHandlerhdma_usart1_txADC1_2_IRQHandlerHAL_ADC_IRQHandlerhadc1hadc2TIM2_IRQHandlerHAL_TIM_IRQHandlerHAL_ADC_GetValuevu_meterhtim2bloccoui_volumeTIM3_IRQHandlerhtim3sys_tickUSART1_IRQHandlerHAL_UART_IRQHandlerhuart1
2025-01-28 19:01:22 +01:00
?
A B
A D
A F
H
HIJ
L
2025-06-28 00:58:29 +02:00
M"
N8O<I@PDQ
LST
V W- 2220%1,212?2F2K2Y2`2e2s2z2<00>2<00>2<00>2<00>2<00>22 2/2>2M2<00>2<00>2<00>2<00>2<00>2<00>2<00>2222-2<2K2Z2i2y2<00>2<00>2<00>2<00>2<00>2<00>2<00>2<00>2 22)2J2p2<00>2<00>2<00>2<00>2<00>2292P2a2x2<00>2<00>2<00>2<00>22 202<00>2<00>2<00>2<00>2<00>2<00>2<00>2<00>22 2_2<00>2<00>2<00>2 2i2z2<00>2<00>2<00>2<00>2<00>2<00>2<00>2<00>2<00>222!202?2N2^2x2~2<00>2<00>2<00>2<00>2<00>2<00>2<00>2<00>2<00>2<00>2 2 2' 26 2E 2T 2c 2r 2<00> 2<00> 2<00> 2<00> 2<00> 2
2
2/
2>
2N
2c
2r
2<00>
2<00>
2<00>
2<00>
2<00>
2<00>
2<00>
2<00>
2<00>
2 2 2& 25 2D 2S 2b 2r 2<00> 2<00> 2<00> 2<00> 2<00> 2<00> 2<00> 2 2 2 2= 2^ 2m 2| 2<00> 2<00> 2<00> 2<00> 2<00> 2<00> 2<00> 2<00> 2<00> 2<00> 2 2 2 2' 2H 2N 2T 2[ 2| 2<00> 2<00> 2<00> 2<00> 2<00> 2<00> 2<00> 2<00> 2<00> 2<00> 2<00> 2<00> 222.2>2<00>2<00>2<00>2<00>2<00>2<00>2<00>2<00>222-2B2Q2`2o2~2<00>2<00>2<00>2<00>2<00>2<00>2<00>2<00>222%242C2R2a2p22<00>2<00>2<00>2<00>2<00>2<00>2<00>2<00>222$242E2V2g2x2<00>2<00>2<00>2<00>2<00>2<00>2222$222@2N2]2y2<00>2<00>2<00>2<00>22 2)).')22;&?&C.M&X2a#e#i.s2.<00>.<00>#<00>#<00>#<00>2<00> <00> <00>.<00> <00> <00>2<00><00><00>.<00><00>2.2%)-.7B2JNR.\g2os}2<00><00><00>2<00><00><00>2<00> <00> <00>2<00> <00> <00>2<00> <00> <00>2<00><00>2  )) )) &$&,&0&@#D#L#P#d#h#o#s#<00> <00> <00> <00> <00><00><00><00><00><00><00><00><00><00><00><00>,  ( 0 8@HPX`hp x#<00>&<00>)      $ (,048<@DHLPTX\` d h#l#p&t&x)|) 9R k <00> <00><00><00><00><00>!: T#<00>&<00>)3$3(438 D3H T3X d3ht3x<00>3<00><00>3<00><00>3<00><00>3<00><00>3<00><00>3<00> 3#$3(&<3@).symtab.strtab.shstrtab.text.data.bss.text.NMI_Handler.text.HardFault_Handler.text.MemManage_Handler.text.BusFault_Handler.text.UsageFault_Handler.text.SVC_Handler.text.DebugMon_Handler.text.PendSV_Handler.rel.text.SysTick_Handler.rel.text.DMA1_Channel2_IRQHandler.rel.text.DMA1_Channel3_IRQHandler.rel.text.DMA1_Channel4_IRQHandler.rel.text.ADC1_2_IRQHandler.rel.text.TIM2_IRQHandler.rel.text.TIM3_IRQHandler.rel.text.USART1_IRQHandler.rel.debug_info.debug_abbrev.rel.debug_loc.rel.debug_aranges.rel.debug_ranges.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes4!4'4,4>6V8n:<00><<00>><00>@<00>B<00>D<00> @<00>6, <00>L<00> @<00>6,\ @<00>6,@l< @<00>6,c|_
,<00><00>/"<00> @(B ,<00>Q<00><00> @HC<00>,!<00><00>  @<00>C,#!q<00> @<00>D<00>,%-0[ 80g-FE<00>-PA @PE,)Rp/44/<00>-6 <00>4 PFb