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UI led

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This commit is contained in:
nzasch
2025-06-28 00:58:29 +02:00
parent b9232f66b0
commit 28b7af65b6
123 changed files with 105128 additions and 104148 deletions
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squeow_sw/Inc/main.h
+16 -18
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@@ -59,28 +59,26 @@ void Error_Handler(void);
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
#define TEMPERATURA_Pin GPIO_PIN_4
#define TEMPERATURA_GPIO_Port GPIOA
#define CORRENTE_Pin GPIO_PIN_5
#define CORRENTE_GPIO_Port GPIOA
#define DIRETTA_Pin GPIO_PIN_6
#define DIRETTA_GPIO_Port GPIOA
#define RIFLESSA_Pin GPIO_PIN_7
#define RIFLESSA_GPIO_Port GPIOA
#define AUDIO_IN_Pin GPIO_PIN_0
#define AUDIO_IN_GPIO_Port GPIOB
#define A5_Pin GPIO_PIN_4
#define A5_GPIO_Port GPIOA
#define A4_Pin GPIO_PIN_5
#define A4_GPIO_Port GPIOA
#define A3_Pin GPIO_PIN_6
#define A3_GPIO_Port GPIOA
#define A2_Pin GPIO_PIN_7
#define A2_GPIO_Port GPIOA
#define A1_Pin GPIO_PIN_0
#define A1_GPIO_Port GPIOB
#define T_SWDIO_Pin GPIO_PIN_13
#define T_SWDIO_GPIO_Port GPIOA
#define T_SWCLK_Pin GPIO_PIN_14
#define T_SWCLK_GPIO_Port GPIOA
#define AUDIO_OL_Pin GPIO_PIN_3
#define AUDIO_OL_GPIO_Port GPIOB
#define RESET_BTN_Pin GPIO_PIN_4
#define RESET_BTN_GPIO_Port GPIOB
#define TEMP_OL_Pin GPIO_PIN_5
#define TEMP_OL_GPIO_Port GPIOB
#define REFL_OL_Pin GPIO_PIN_6
#define REFL_OL_GPIO_Port GPIOB
#define G1_Pin GPIO_PIN_3
#define G1_GPIO_Port GPIOB
#define G2_Pin GPIO_PIN_4
#define G2_GPIO_Port GPIOB
#define G4_Pin GPIO_PIN_6
#define G4_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */
squeow_sw/Inc/si5351.h
-37
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@@ -1,37 +0,0 @@
#define SI5351_ADDRESS (0x60)
// #define SI5351_CRYSTAL_FREQ 12288000UL
#define SI5351_CRYSTAL_FREQ 19288000UL
#define SI5351_MIN_FREQ 3000
#define SI5351_MAX_FREQ 200000000
// #### registri ####
#define SI5351_OUT_ENABLE 3
#define SI5351_OUT_DIS_STATE 24
#define SI5351_INPUT_SOURCE 15
#define SI5351_CLK0_CONTROL 16
#define SI5351_CLK1_CONTROL 17
#define SI5351_CLK2_CONTROL 18
#define SI5351_PLLA 26
#define SI5351_PLLB 34
#define SI5351_MULTISYNTH0 42
#define SI5351_MULTISYNTH1 50
#define SI5351_MULTISYNTH2 58
#define SI5351_RESET 177
#define SI5351_CRYSTAL_LOAD 183
extern I2C_HandleTypeDef hi2c1;
void si5351_initialize(void);
void si5351_set_frequency(uint32_t freq, uint8_t pll);
void si5351_off_clk(uint8_t clk);
void si5351_on_clk(uint8_t clk);
extern uint8_t oeb;
squeow_sw/Inc/si5351.h
Symlink
+1
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@@ -0,0 +1 @@
../../../../../uC_driver/synth/si5351/si5351.h
squeow_sw/Inc/squeow.h
+52 -41
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@@ -1,57 +1,69 @@
#define SYS_TICK_PRESCALE_10HZ 0
#define SYS_TICK_PRESCALE_1HZ 10
// device presenti
#define SQUEOW_SYNTH
#define SQUEOW_PWM
#define SQUEOW_SONDA_TEMPERATURA
#define SQUEOW_SONDA_DIRETTA
#define SQUEOW_SONDA_RIFLESSA
// #define SQUEOW_SONDA_CORRENTE
#define STATO_AUDIO_DISCONNESSO 0
#define STATO_AUDIO_CONNESSO 1
#define STATO_AUDIO_RIPRODUZIONE 2
#define STATO_AUDIO_TONO 3
#define STATO_AUDIO_ADC 4
// secondo l'ordine di rank dell'ADC
#define SQUEOW_ADC_CORRENTE 0 // IN4 (pin 12, A2)
#define SQUEOW_ADC_TEMPERATURA 1 // IN3 (pin 11, A3)
#define SQUEOW_ADC_DIRETTA 2 // IN13 (pin 10, A4)
#define SQUEOW_ADC_RIFLESSA 3 // IN17 (pin 9, A5)
#define SAMPLES_BUFFER_SIZE (1024) ///< deve essere ^2
#define SAMPLES_BUFFER_SIZE_MASK (SAMPLES_BUFFER_SIZE - 1)
#define SINE_INCREMENT 0.314
// soglie
#define SOGLIA_CORRENTE 3096
#define SOGLIA_TEMPERATURA 3096
#define SOGLIA_DIRETTA 3096
#define SOGLIA_RIFLESSA 3096
// base dei tempi per operazioni lente, la base dei tempi è 100hz
#define SYS_TICK_PRESCALE_10HZ 10
#define SYS_TICK_PRESCALE_1HZ 100
// modalità di blocco
#define MODALITA_BLOCCO_PERMANENTE
// #define MODALITA_BLOCCO_TEMPORANEO
// #define MODALITA_BLOCCO_BASSA_POTENZA
#define TEMPO_BLOCCO_TEMPORANEO 1000
#define DIVISORE_BLOCCO_BASSA_POTENZA 2
#define DEFAULT_SYNTH_FREQUENCY 1359000UL
#define SOGLIA_TEMPERATURA 2048
#define SOGLIA_CORRENTE 2048
#define SOGLIA_DIRETTA 2048
#define SOGLIA_RIFLESSA 2048
// ################################################
#define max(x,y) (((x) >= (y)) ? (x) : (y))
// SYS
extern uint8_t sys_tick, sys_tick_prescale, pwm_tick;
extern volatile uint8_t sys_tick, sys_tick_prescale;
// UART
int serial_write(char *ptr, size_t len);
extern UART_HandleTypeDef huart1;
#define UART_RX_BUF_SIZE 64
#define UART_RX_BUF_SIZE 256
extern uint8_t UART_RX_buf[UART_RX_BUF_SIZE];
#define UART_TX_BUF_SIZE 256
extern uint8_t UART_TX_buf[UART_TX_BUF_SIZE];
extern uint8_t UART_TX_buf_lenght;
// SYNTH
extern uint32_t freq;
// ADC1
extern uint16_t adc1_valore;
// ADC2
extern uint16_t adc2_valori[4];
extern uint8_t adc2_done, adc_blocco, adc_allarmi[4];
// per usare buffer da 32 settare WORD nel canale DMA
extern uint32_t adc2_valori[4];
extern uint8_t adc2_done, blocco, blocco_fatto, codice_allarme;
// audio
extern uint16_t sample_value;
extern uint8_t stato_audio;
extern double sine_increment;
extern uint16_t samples_ringbuf[SAMPLES_BUFFER_SIZE]; ///< buffer ad anello dei dati RX
extern uint32_t samples_ringbuf_input_index, samples_ringbuf_output_index;
extern uint8_t usb_audio_tick;
// ADC
void adc_rileva_soglie(uint32_t *adc_valori);
void processa_blocco(void);
// VU
void adc_rileva_soglie(uint16_t *adc_valori);
// MOD
extern uint16_t pwm_value1, pwm_value2, pwm_value3, pwm_value4;
extern uint8_t rails_number;
extern UART_HandleTypeDef huart1;
extern ADC_HandleTypeDef hadc1;
@@ -59,12 +71,11 @@ extern ADC_HandleTypeDef hadc2;
// funzie
void squeow_init(void);
void squeow_synth_init(void);
void squeow_synth_set(uint32_t freq);
void squeow_synth_on(void);
void squeow_synth_off(void);
uint32_t sat_sub(uint16_t x, uint16_t y);
uint16_t u16_sine(void);
uint16_t u12_sine(void);
uint16_t u11_sine(void);
void store_sample(uint16_t sample);
void store_samples(uint16_t *data, uint32_t size);
uint16_t get_sample(void);
uint16_t get_adc_sample(void);
uint32_t ringbuf_increment(uint32_t *index, uint32_t buff_size_mask);
squeow_sw/Inc/squeow_ui.h
+39 -8
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@@ -1,18 +1,49 @@
#include <stdio.h>
#include <string.h>
extern uint8_t vu_on, vu_value, vu_tmp_value;
extern uint8_t adc_stampa;
#ifndef SQUEOW_UI_H
#define SQUEOW_UI_H
extern uint8_t uart_sent;
// #define SQUEOW_UI_TOSTA
#define SQUEOW_UI_SERIOW
#define SQUEOW_UI_LED
#define SQUEOW_LED_BLOCCO_LAMPO 10
#define SQUEOW_LED_BLOCCO_PAUSA 80
#define VU_METER_RILASCIO 1
#define VU_METER_SOGLIA_PICCO 2040
#define VU_METER_TEMPO_PICCO 10000 // base 40khz
// codice lampeggi
#define SQUEOW_CODICE_TEMPERATURA 1
#define SQUEOW_CODICE_RIFLESSA 2
#define SQUEOW_CODICE_DIRETTA 3
#define SQUEOW_CODICE_CORRENTE 4
extern uint16_t ui_volume;
extern volatile uint8_t uart_sent;
// ################
void squeow_ui_init(void);
int serial_write_DMA(char *ptr, int len);
int serial_write(char *ptr, int len);
void vu_stampa(void);
void stampa_adc();
void seriow_var_dump(void);
void seriow_stab_dump(void);
void seriow_log(uint8_t sev, char *msg);
void tosta_freq(void);
void tosta_log(uint8_t sev, char *msg);
void tosta_var_bars(void);
void led_blocco(uint8_t led_blocco_lampi);
void led_pwm_duty(uint8_t duty);
// #####
uint16_t vu_meter(uint16_t campione);
uint16_t riscala_valori(uint16_t valore_in, uint16_t valore_in_minimo, uint16_t valore_in_massimo, uint16_t valore_out_minimo, uint16_t valore_out_massimo);
#endif
squeow_sw/Inc/stm32g4xx_hal_conf.h
+1 -1
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@@ -115,7 +115,7 @@
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE (12288000UL) /*!< Value of the External oscillator in Hz */
#define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
squeow_sw/Inc/stm32g4xx_it.h
+1 -1
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@@ -22,7 +22,7 @@
#define __STM32G4xx_IT_H
#ifdef __cplusplus
extern "C" {
extern "C" {
#endif
/* Private includes ----------------------------------------------------------*/
squeow_sw/Makefile
+2 -4
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@@ -1,5 +1,5 @@
##########################################################################################################################
# File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Mon Jan 20 19:11:19 CET 2025]
# File automatically-generated by tool: [projectgenerator] version: [4.6.0.1-B1] date: [Sat Jun 28 00:34:16 CEST 2025]
##########################################################################################################################
# ------------------------------------------------
@@ -24,7 +24,6 @@ DEBUG = 1
# optimization
OPT = -Og
#######################################
# paths
#######################################
@@ -120,7 +119,6 @@ C_DEFS = \
-DUSE_HAL_DRIVER \
-DSTM32G431xx
# AS includes
AS_INCLUDES =
@@ -151,7 +149,7 @@ CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
# LDFLAGS
#######################################
# link script
LDSCRIPT = stm32g431kbtx_flash.ld
LDSCRIPT = STM32G431XX_FLASH.ld
# libraries
LIBS = -lc -lm -lnosys
squeow_sw/Src/main.c
+171 -43
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@@ -50,6 +50,7 @@ I2C_HandleTypeDef hi2c1;
TIM_HandleTypeDef htim2;
TIM_HandleTypeDef htim3;
TIM_HandleTypeDef htim8;
UART_HandleTypeDef huart1;
DMA_HandleTypeDef hdma_usart1_rx;
@@ -69,6 +70,7 @@ static void MX_TIM3_Init(void);
static void MX_ADC1_Init(void);
static void MX_ADC2_Init(void);
static void MX_USART1_UART_Init(void);
static void MX_TIM8_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@@ -114,11 +116,13 @@ int main(void)
MX_ADC1_Init();
MX_ADC2_Init();
MX_USART1_UART_Init();
MX_TIM8_Init();
/* USER CODE BEGIN 2 */
HAL_UARTEx_ReceiveToIdle_DMA(&huart1, (uint8_t *)&UART_RX_buf, UART_RX_BUF_SIZE);
// HAL_Delay(50);
// HAL_UARTEx_ReceiveToIdle_DMA(&huart1, (uint8_t *)&UART_RX_buf, UART_RX_BUF_SIZE);
// ADC1 audio
// ADC1 audio
HAL_ADC_Start_IT(&hadc1);
// timer audio e pwm
@@ -132,16 +136,32 @@ int main(void)
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_3);
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_4);
// timer led
HAL_TIM_Base_Start_IT(&htim8);
HAL_TIM_PWM_Start(&htim8, TIM_CHANNEL_3);
// serve, lo start nonfa partire i CHN
TIM_CCxChannelCmd(htim8.Instance, TIM_CHANNEL_3, TIM_CCxN_ENABLE);
squeow_init();
squeow_ui_init();
// prima lettura
/*
#ifdef SQUEOW_SYNTH
squeow_synth_init();
squeow_synth_set(DEFAULT_SYNTH_FREQUENCY);
squeow_synth_on();
#endif
*/
#ifdef SQUEOW_UI_SERIOW
seriow_stab_dump();
#endif
// prima lettura
HAL_ADC_Start_DMA(&hadc2, adc2_valori, 4);
squeow_synth_init();
// HAL_Delay(50);
squeow_synth_set(DEFAULT_SYNTH_FREQUENCY);
squeow_synth_on();
if (UART_TX_buf_lenght)
serial_write(UART_TX_buf, UART_TX_buf_lenght);
/* USER CODE END 2 */
/* Infinite loop */
@@ -151,20 +171,42 @@ int main(void)
/* USER CODE BEGIN 3 */
if (sys_tick) {
// 100hz
if (adc2_done) {
adc_rileva_soglie(adc2_valori);
HAL_ADC_Start_DMA(&hadc2, adc2_valori, 4);
adc2_done = 0;
}
if ((sys_tick_prescale > SYS_TICK_PRESCALE_1HZ) && (uart_sent||1)) {
seriow_var_dump();
sys_tick_prescale = 0;
squeow_synth_set(DEFAULT_SYNTH_FREQUENCY);
squeow_synth_on();
}
#ifdef SQUEOW_UI_LED
// visualizza LED volume con valore aggiornato da vu_meter
led_pwm_duty(ui_volume >> 3);
processa_blocco();
sys_tick_prescale++;
if (codice_allarme)
led_blocco(codice_allarme);
#endif
// eventi lenti
if (sys_tick_prescale > SYS_TICK_PRESCALE_10HZ) {
sys_tick_prescale = 0;
#ifdef SQUEOW_UI_TOSTA
tosta_var_bars();
#endif
#ifdef SQUEOW_UI_SERIOW
seriow_var_dump();
#endif
if (HAL_GPIO_ReadPin(G1_GPIO_Port, G1_Pin) == GPIO_PIN_RESET) {
blocco = 0;
}
if (UART_TX_buf_lenght)
serial_write(UART_TX_buf, UART_TX_buf_lenght);
} else {
sys_tick_prescale++;
}
sys_tick = 0;
}
}
@@ -192,7 +234,7 @@ void SystemClock_Config(void)
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
RCC_OscInitStruct.PLL.PLLN = 54;
RCC_OscInitStruct.PLL.PLLN = 28;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
@@ -214,7 +256,7 @@ void SystemClock_Config(void)
{
Error_Handler();
}
HAL_RCC_MCOConfig(RCC_MCO_PG10, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1);
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1);
}
/**
@@ -343,7 +385,7 @@ static void MX_ADC2_Init(void)
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_3;
sConfig.Channel = ADC_CHANNEL_4;
sConfig.Rank = ADC_REGULAR_RANK_1;
sConfig.SamplingTime = ADC_SAMPLETIME_247CYCLES_5;
sConfig.SingleDiff = ADC_SINGLE_ENDED;
@@ -356,7 +398,7 @@ static void MX_ADC2_Init(void)
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
sConfig.Channel = ADC_CHANNEL_3;
sConfig.Rank = ADC_REGULAR_RANK_2;
if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
{
@@ -402,7 +444,7 @@ static void MX_I2C1_Init(void)
/* USER CODE END I2C1_Init 1 */
hi2c1.Instance = I2C1;
hi2c1.Init.Timing = 0x40B282BD;
hi2c1.Init.Timing = 0x50916E9F;
hi2c1.Init.OwnAddress1 = 0;
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
@@ -527,9 +569,9 @@ static void MX_TIM3_Init(void)
/* USER CODE END TIM3_Init 1 */
htim3.Instance = TIM3;
htim3.Init.Prescaler = 41471;
htim3.Init.Prescaler = 16799;
htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
htim3.Init.Period = 399;
htim3.Init.Period = 99;
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
@@ -553,6 +595,88 @@ static void MX_TIM3_Init(void)
}
/**
* @brief TIM8 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM8_Init(void)
{
/* USER CODE BEGIN TIM8_Init 0 */
/* USER CODE END TIM8_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
TIM_OC_InitTypeDef sConfigOC = {0};
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
/* USER CODE BEGIN TIM8_Init 1 */
/* USER CODE END TIM8_Init 1 */
htim8.Instance = TIM8;
htim8.Init.Prescaler = 1679;
htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
htim8.Init.Period = 255;
htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim8.Init.RepetitionCounter = 0;
htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
if (HAL_TIM_PWM_Init(&htim8) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 0;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
if (HAL_TIM_PWM_ConfigChannel(&htim8, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
{
Error_Handler();
}
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
sBreakDeadTimeConfig.DeadTime = 0;
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
sBreakDeadTimeConfig.BreakFilter = 0;
sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT;
sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
sBreakDeadTimeConfig.Break2Filter = 0;
sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT;
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
if (HAL_TIMEx_ConfigBreakDeadTime(&htim8, &sBreakDeadTimeConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM8_Init 2 */
htim8.Instance->BDTR |= 0x8000;
/* USER CODE END TIM8_Init 2 */
HAL_TIM_MspPostInit(&htim8);
}
/**
* @brief USART1 Initialization Function
* @param None
@@ -569,7 +693,7 @@ static void MX_USART1_UART_Init(void)
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
huart1.Init.BaudRate = 115200;
huart1.Init.BaudRate = 38400;
huart1.Init.WordLength = UART_WORDLENGTH_8B;
huart1.Init.StopBits = UART_STOPBITS_1;
huart1.Init.Parity = UART_PARITY_NONE;
@@ -632,46 +756,48 @@ static void MX_DMA_Init(void)
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, AUDIO_OL_Pin|RESET_BTN_Pin|TEMP_OL_Pin|REFL_OL_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(GPIOB, G2_Pin|G4_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin : PG10 */
GPIO_InitStruct.Pin = GPIO_PIN_10;
/*Configure GPIO pin : PA8 */
GPIO_InitStruct.Pin = GPIO_PIN_8;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/*Configure GPIO pins : AUDIO_OL_Pin RESET_BTN_Pin TEMP_OL_Pin REFL_OL_Pin */
GPIO_InitStruct.Pin = AUDIO_OL_Pin|RESET_BTN_Pin|TEMP_OL_Pin|REFL_OL_Pin;
/*Configure GPIO pin : G1_Pin */
GPIO_InitStruct.Pin = G1_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_PULLUP;
HAL_GPIO_Init(G1_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pins : G2_Pin G4_Pin */
GPIO_InitStruct.Pin = G2_Pin|G4_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
/* USER CODE BEGIN 4 */
void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef *hadc) {
// analog_wd_status = 3;
// analog_wd_status = 3;
}
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc) {
adc2_done = 1;
// TIM2->CCR1
}
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc) { adc2_done = 1; }
void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t offset) {
static uint16_t last_offset = 0;
@@ -689,9 +815,11 @@ void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t offset) {
}
}
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart){
uart_sent = 1;
}
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { uart_sent = 1; }
void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) { uart_sent = 1; }
void UART_DMATransmitCplt(UART_HandleTypeDef *huart) { uart_sent = 1; }
/* USER CODE END 4 */
squeow_sw/Src/si5351.c
-182
View File
@@ -1,182 +0,0 @@
#include "main.h"
#include "stm32g4xx_hal.h"
#include <math.h>
#include "si5351.h"
uint8_t oeb;
void si5351_write8 (uint8_t reg, uint8_t value){
while (HAL_I2C_IsDeviceReady(&hi2c1, (uint16_t)(SI5351_ADDRESS<<1), 3, 100) != HAL_OK) { }
HAL_I2C_Mem_Write(&hi2c1, (uint8_t)(SI5351_ADDRESS<<1), (uint8_t)reg, I2C_MEMADD_SIZE_8BIT, (uint8_t*)(&value), 1, 100);
}
uint8_t si5351_read8(uint8_t reg, uint8_t *value){
HAL_StatusTypeDef status = HAL_OK;
while (HAL_I2C_IsDeviceReady(&hi2c1, (uint16_t)(SI5351_ADDRESS<<1), 3, 100) != HAL_OK) { }
status = HAL_I2C_Mem_Read(&hi2c1, // i2c handle
(uint8_t)(SI5351_ADDRESS<<1), // i2c address, left aligned
(uint8_t)reg, // register address
I2C_MEMADD_SIZE_8BIT, // si5351 uses 8bit register addresses
(uint8_t*)(&value), // write returned data to this variable
1, // how many bytes to expect returned
100); // timeout
return status;
}
void CalcRegisters(uint32_t fout, uint8_t *regs){
// uint32_t fref = SI5351_CRYSTAL_FREQ; // The reference frequency
// Calc Output Multisynth Divider and R with e = 0 and f = 1 => msx_p2 = 0 and msx_p3 = 1
uint32_t d = 4;
uint32_t msx_p1 = 0; // If fout > 150 MHz then MSx_P1 = 0 and MSx_DIVBY4 = 0xC0, see datasheet 4.1.3
int msx_divby4 = 0;
int rx_div = 0;
int r = 1;
if (fout > 150e6)
msx_divby4 = 0x0C; // MSx_DIVBY4[1:0] = 0b11, see datasheet 4.1.3
else if (fout < 292969UL) // If fout < 500 kHz then use R divider, see datasheet 4.2.2. In reality this means > 292 968,75 Hz when d = 2048
{
int rd = 0;
while ((r < 128) && (r * fout < 292969UL))
{
r <<= 1;
rd++;
}
rx_div = rd << 4;
d = 600e6 / (r * fout); // Use lowest VCO frequency but handle d minimum
if (d % 2) // Make d even to reduce spurious and phase noise/jitter, see datasheet 4.1.2.1.
d++;
if (d * r * fout < 600e6) // VCO frequency to low check and maintain an even d value
d += 2;
}
else // 292968 Hz <= fout <= 150 MHz
{
d = 600e6 / fout; // Use lowest VCO frequency but handle d minimum
if (d < 6)
d = 6;
else if (d % 2) // Make d even to reduce phase noise/jitter, see datasheet 4.1.2.1.
d++;
if (d * fout < 600e6) // VCO frequency to low check and maintain an even d value
d += 2;
}
msx_p1 = 128 * d - 512;
uint32_t fvco = (uint32_t) d * r * fout;
// Calc Feedback Multisynth Divider
double fmd = (double)fvco / SI5351_CRYSTAL_FREQ; // The FMD value has been found
int a = fmd; // a is the integer part of the FMD value
double b_c = (double)fmd - a; // Get b/c
uint32_t c = 1048575UL;
uint32_t b = (double)b_c * c;
if (b > 0)
{
c = (double)b / b_c + 0.5; // Improves frequency precision in some cases
if (c > 1048575UL)
c = 1048575UL;
}
uint32_t msnx_p1 = 128 * a + 128 * b / c - 512; // See datasheet 3.2
uint32_t msnx_p2 = 128 * b - c * (128 * b / c);
uint32_t msnx_p3 = c;
// Feedback Multisynth Divider registers
regs[0] = (msnx_p3 >> 8) & 0xFF;
regs[1] = msnx_p3 & 0xFF;
regs[2] = (msnx_p1 >> 16) & 0x03;
regs[3] = (msnx_p1 >> 8) & 0xFF;
regs[4] = msnx_p1 & 0xFF;
regs[5] = ((msnx_p3 >> 12) & 0xF0) + ((msnx_p2 >> 16) & 0x0F);
regs[6] = (msnx_p2 >> 8) & 0xFF;
regs[7] = msnx_p2 & 0xFF;
// Output Multisynth Divider registers
regs[8] = 0; // (msx_p3 >> 8) & 0xFF
regs[9] = 1; // msx_p3 & 0xFF
regs[10] = rx_div + msx_divby4 + ((msx_p1 >> 16) & 0x03);
regs[11] = (msx_p1 >> 8) & 0xFF;
regs[12] = msx_p1 & 0xFF;
regs[13] = 0; // ((msx_p3 >> 12) & 0xF0) + (msx_p2 >> 16) & 0x0F
regs[14] = 0; // (msx_p2 >> 8) & 0xFF
regs[15] = 0; // msx_p2 & 0xFF
// HAL_I2C_Master_Transmit(&hi2c2, Si5351_ConfigStruct->HW_I2C_Address, reg_data, sizeof(reg_data), HAL_MAX_DELAY);
return;
}
void si5351_initialize(){
uint8_t dummy;
// Initialize Si5351A
while (si5351_read8(0,dummy) & 0x80); // Wait for Si5351A to initialize
oeb = 0xFF;
si5351_write8(SI5351_OUT_ENABLE, oeb); // Output Enable Control, disable all
si5351_write8(SI5351_INPUT_SOURCE, 0x00); // PLL Input Source, select the XTAL input as the reference clock for PLLA and PLLB
si5351_write8(SI5351_OUT_DIS_STATE, 0x00); // stato bassa Z giu se disabilitati
// Output MultisynthN, e = 0, f = 1, MS0_P2 and MSO_P3
si5351_write8(SI5351_MULTISYNTH0, 0x00);
si5351_write8(SI5351_MULTISYNTH0+1, 0x01);
si5351_write8(SI5351_MULTISYNTH0+5, 0x00);
si5351_write8(SI5351_MULTISYNTH0+6, 0x00);
si5351_write8(SI5351_MULTISYNTH0+7, 0x00);
si5351_write8(SI5351_MULTISYNTH1, 0x00);
si5351_write8(SI5351_MULTISYNTH1+1, 0x01);
si5351_write8(SI5351_MULTISYNTH1+5, 0x00);
si5351_write8(SI5351_MULTISYNTH1+6, 0x00);
si5351_write8(SI5351_MULTISYNTH1+7, 0x00);
si5351_write8(SI5351_MULTISYNTH2, 0x00);
si5351_write8(SI5351_MULTISYNTH2+1, 0x01);
si5351_write8(SI5351_MULTISYNTH2+5, 0x00);
si5351_write8(SI5351_MULTISYNTH2+6, 0x00);
si5351_write8(SI5351_MULTISYNTH2+7, 0x00);
si5351_write8(SI5351_CLK0_CONTROL, 0x4F); // Power up CLK0, PLLA, MS0 operates in integer mode, Output Clock 0 is not inverted, Select MultiSynth 0 as the source for CLK0 and 8 mA
si5351_write8(SI5351_CLK1_CONTROL, 0x5F); // Power up CLK1, PLLA, MS0 operates in integer mode, Output Clock 1 is inverted, Select MultiSynth 1 as the source for CLK1 and 8 mA
si5351_write8(SI5351_CLK2_CONTROL, 0x6F); // Power up CLK2, PLLB, int, non inv, multisynth 2, 8 ma
// Reference load configuration
si5351_write8(SI5351_CRYSTAL_LOAD, 0x12); // Set reference load C: 6 pF = 0x12, 8 pF = 0x92, 10 pF = 0xD2
}
void si5351_set_frequency(uint32_t freq, uint8_t pll){
uint8_t regs[16];
CalcRegisters(freq, regs);
// Load Output Multisynth0 with d (e and f already set during init. and never changed)
if(pll == 0){
for (int i = 0; i < 8; i++)
si5351_write8(SI5351_PLLA + i, regs[i]);
for (int i = 10; i < 13; i++)
si5351_write8(34 + i, regs[i]);
} else if(pll == 1){
for (int i = 0; i < 8; i++)
si5351_write8(SI5351_PLLB + i, regs[i]);
for (int i = 10; i < 13; i++)
si5351_write8(42 + i, regs[i]);
}
// Reset PLLA
// delayMicroseconds(500); // Allow registers to settle before resetting the PLL
si5351_write8(SI5351_RESET, 0x20);
}
void si5351_off_clk(uint8_t clk){
oeb |= 1U << clk;
si5351_write8(SI5351_OUT_ENABLE, oeb);
}
void si5351_on_clk(uint8_t clk){
oeb &= ~(1U << clk);
si5351_write8(SI5351_OUT_ENABLE, oeb);
}
squeow_sw/Src/si5351.c
Symlink
+1
View File
@@ -0,0 +1 @@
../../../../../uC_driver/synth/si5351/si5351.c
squeow_sw/Src/squeow.c
+160 -114
View File
@@ -9,56 +9,58 @@
/* SQUEOW
TIM3 eventi 98304000/(49152×200) 10hz
TIM2 PWM 98304000/2048 48khz
TIM2 PWM 168000000/4096 = 41015,625 Hz
TIM3 sys_tick 168000000/(16800×100) 100hz
risoluzione PWM 4*2048 -> 8192 (13bit)
risoluzione PWM 4096 (12bit)
ADC1 agganciato a TIM2, valore passato attraverso TIM2_IRQHandler a TIM2->CCR1
ADC2 lanciato da software, quando completo adc2_done viene settato in HAL_ADC_ConvCpltCallback
*/
extern I2C_HandleTypeDef hi2c1;
// SYS
uint8_t sys_tick, sys_tick_prescale, pwm_tick;
volatile uint8_t sys_tick, sys_tick_prescale;
// UART
uint8_t UART_RX_buf[UART_RX_BUF_SIZE];
uint8_t UART_TX_buf[UART_TX_BUF_SIZE];
uint8_t UART_TX_buf_lenght;
// SYNTH
uint32_t freq;
// ADC1
uint16_t adc1_valore;
// ADC2 (16 o 32?) per usare buffer da 32 settare WORD nel canale DMA
uint32_t adc2_valori[4];
uint8_t adc2_done, blocco, blocco_fatto, codice_allarme;
// ADC2
uint16_t adc2_valori[4];
uint8_t adc2_done, adc_blocco, adc_allarmi[4];
// audio
uint16_t sample_value;
uint8_t stato_audio;
double sine_increment;
uint16_t samples_ringbuf[SAMPLES_BUFFER_SIZE]; ///< buffer ad anello dei dati RX
uint32_t samples_ringbuf_input_index, samples_ringbuf_output_index;
uint8_t usb_audio_tick;
// VU
uint8_t analog_wd_status;
// MOD
uint16_t pwm_value1, pwm_value2, pwm_value3, pwm_value4;
uint8_t rails_number;
// ###################################
int serial_write(char *ptr, size_t len) {
// todo sia dma che it corrompono (vedi sotto, static)
HAL_UART_Transmit_DMA(&huart1, ptr, len);
// HAL_UART_Transmit_IT(&huart1, ptr, len);
// HAL_UART_Transmit(&huart1, ptr, len, 1000);
// uart_sent = 0;
UART_TX_buf_lenght = 0;
return len;
}
void squeow_init(void) {
seriow_log(2, "squeow init");
sine_increment = 0.4;
samples_ringbuf_input_index = 0;
samples_ringbuf_output_index = 0;
freq = DEFAULT_SYNTH_FREQUENCY;
adc2_valori[0] = 10;
adc2_valori[1] = 20;
adc2_valori[2] = 30;
adc2_valori[3] = 40;
blocco = 0;
adc2_valori[0] = 0;
adc2_valori[1] = 0;
adc2_valori[2] = 0;
adc2_valori[3] = 0;
codice_allarme = 0;
}
uint32_t sat_sub(uint16_t x, uint16_t y) {
@@ -67,121 +69,165 @@ uint32_t sat_sub(uint16_t x, uint16_t y) {
return res;
}
uint16_t u12_sine(void) {
static double angle;
angle += sine_increment;
if (angle >= 6.28)
angle = 0;
return (uint16_t)((sin(angle) * 0x7ff) + 0x7ff);
}
/*
uint16_t get_adc_sample(void) {
uint16_t adc_sample_value;
// stato_audio == STATO_AUDIO_ADC;
HAL_ADC_Start(&hadc1);
if (HAL_ADC_PollForConversion(&hadc1, 10) == HAL_OK) {
// store_sample(HAL_ADC_GetValue(&hadc1) << 4);
adc_sample_value = HAL_ADC_GetValue(&hadc1);
}
HAL_ADC_Stop(&hadc1);
return adc_sample_value;
}
*/
void store_samples(uint16_t *data, uint32_t size) {
for (uint32_t i = 0; i < size; ++i) {
store_sample(data[i]);
}
}
void store_sample(uint16_t sample) {
samples_ringbuf[samples_ringbuf_input_index] = sample;
ringbuf_increment(&samples_ringbuf_input_index, SAMPLES_BUFFER_SIZE_MASK);
}
uint16_t get_sample(void) {
ringbuf_increment(&samples_ringbuf_output_index, SAMPLES_BUFFER_SIZE_MASK);
return samples_ringbuf[samples_ringbuf_output_index];
}
uint32_t ringbuf_increment(uint32_t *index, uint32_t buff_size_mask) {
(*index)++;
*index &= buff_size_mask;
return *index;
}
void store_buffer(uint8_t *buf, uint32_t size) {
for (uint32_t s = 0; s < size / 4; s++) {
uint16_t LL = buf[s * 2];
uint16_t RR = buf[(s * 2) + 1];
store_sample(RR);
}
}
int vu_meter(uint16_t sample) {
#define ZEROD 2047
#define ZEROU 2048
uint16_t abs_sample;
uint8_t scaled_abs_sample;
abs_sample = (sample > ZEROD) ? sample - ZEROU : ZEROD - sample;
scaled_abs_sample = abs_sample >> 3;
if (scaled_abs_sample >= vu_tmp_value)
return scaled_abs_sample;
else {
return vu_tmp_value;
}
}
// adc
void adc_rileva_soglie(uint16_t *adc_valori) {
if (adc_valori[0] > SOGLIA_TEMPERATURA) {
seriow_log(1, "ADC0 threshold detect");
HAL_GPIO_WritePin(TEMP_OL_GPIO_Port, TEMP_OL_Pin, 1);
adc_allarmi[0] = 1;
adc_blocco = 1;
}
if (adc_valori[1] > SOGLIA_CORRENTE) {
seriow_log(1, "ADC1 threshold detect");
adc_allarmi[1] = 1;
adc_blocco = 1;
}
if (adc_valori[3] > SOGLIA_RIFLESSA) {
seriow_log(1, "ADC3 threshold detect");
HAL_GPIO_WritePin(REFL_OL_GPIO_Port, REFL_OL_Pin, 1);
adc_allarmi[3] = 1;
adc_blocco = 1;
void adc_rileva_soglie(uint32_t *adc_valori) {
if (!blocco) {
#ifdef SQUEOW_SONDA_CORRENTE
if (adc_valori[SQUEOW_ADC_CORRENTE] > SOGLIA_CORRENTE) {
codice_allarme = SQUEOW_CODICE_CORRENTE;
blocco = 1;
}
#endif
#ifdef SQUEOW_SONDA_TEMPERATURA
if (adc_valori[SQUEOW_ADC_TEMPERATURA] > SOGLIA_TEMPERATURA) {
codice_allarme = SQUEOW_CODICE_TEMPERATURA;
blocco = 1;
}
#endif
#ifdef SQUEOW_SONDA_DIRETTA
if (adc_valori[SQUEOW_ADC_DIRETTA] > SOGLIA_DIRETTA) {
codice_allarme = SQUEOW_CODICE_DIRETTA;
blocco = 1;
}
#endif
#ifdef SQUEOW_SONDA_RIFLESSA
if (adc_valori[SQUEOW_ADC_RIFLESSA] > SOGLIA_RIFLESSA) {
codice_allarme = SQUEOW_CODICE_RIFLESSA;
blocco = 1;
}
#endif
}
}
void array_values_mean(uint16_t *valori, uint16_t *medie, uint8_t dimensione){
void processa_blocco(void) {
static uint8_t vecchio_stato_blocco;
static uint16_t timer_blocco;
// è appena stato impostato blocco
if (blocco && !vecchio_stato_blocco) {
// è appena stato impostato blocco
#ifdef SQUEOW_UI_SERIOW
seriow_log('E', "LOCK!");
#endif
#ifdef SQUEOW_UI_TOSTA
tosta_log('E', "LOCK!");
#endif
#ifdef MODALITA_BLOCCO_PERMANENTE
#endif
#ifdef MODALITA_BLOCCO_BASSA_POTENZA
#endif
#ifdef MODALITA_BLOCCO_TEMPORANEO
timer_blocco = 0;
#endif
vecchio_stato_blocco = blocco;
} else if (!blocco && vecchio_stato_blocco) {
// è appena stato disinserito il blocco
#ifdef SQUEOW_UI_SERIOW
seriow_log('I', "UNLOCK");
#endif
#ifdef SQUEOW_UI_TOSTA
tosta_log('I', "UNLOCK");
#endif
codice_allarme = 0;
led_blocco(codice_allarme);
vecchio_stato_blocco = blocco;
}
#ifdef MODALITA_BLOCCO_TEMPORANEO
else {
// solo temporaneo
if (timer_blocco > TEMPO_BLOCCO_TEMPORANEO) {
timer_blocco = 0;
blocco = 0;
} else {
timer_blocco++;
}
}
#endif
}
// synth
void squeow_synth_init(void) {
// occhio che blocca!
seriow_log(2, "synth init");
// occhio che blocca!
#ifdef SQUEOW_UI_SERIOW
seriow_log('I', "synth init");
#endif
#ifdef SQUEOW_UI_TOSTA
tosta_log('I', "synth init");
#endif
si5351_initialize();
}
void squeow_synth_set(freq) {
seriow_log(2, "synth set freq");
void squeow_synth_set(uint32_t freq) {
#ifdef SQUEOW_UI_SERIOW
// seriow_log('I', "synth set freq");
#endif
#ifdef SQUEOW_UI_TOSTA
// tosta_log('I', "synth set freq");
#endif
si5351_set_frequency(freq, 0);
si5351_set_frequency(freq, 1);
}
void squeow_synth_on(void) {
seriow_log(2, "synth on");
#ifdef SQUEOW_UI_SERIOW
seriow_log('I', "synth on");
#endif
#ifdef SQUEOW_UI_TOSTA
tosta_log('I', "synth on");
#endif
si5351_on_clk(0);
si5351_on_clk(1);
}
void squeow_synth_off(void) {
seriow_log(2, "synth off");
#ifdef SQUEOW_UI_SERIOW
#endif
#ifdef SQUEOW_UI_TOSTA
tosta_log('I', "synth off");
#endif
si5351_off_clk(0);
si5351_off_clk(1);
}
void i2c_write8(I2C_HandleTypeDef handler, uint8_t address, uint8_t reg, uint8_t value) {
while (HAL_I2C_IsDeviceReady(&handler, (uint16_t)(address << 1), 3, 100) != HAL_OK) {
}
HAL_I2C_Mem_Write(&handler, (uint8_t)(address << 1), (uint8_t)reg, I2C_MEMADD_SIZE_8BIT, (uint8_t *)(&value), 1, 100);
}
uint8_t i2c_read8(I2C_HandleTypeDef handler, uint8_t address, uint8_t reg, uint8_t *value) {
HAL_StatusTypeDef status = HAL_OK;
while (HAL_I2C_IsDeviceReady(&handler, (uint16_t)(address << 1), 3, 100) != HAL_OK) {
}
status = HAL_I2C_Mem_Read(&handler, // i2c handle
(uint8_t)(address << 1), // i2c address, left aligned
(uint8_t)reg, // register address
I2C_MEMADD_SIZE_8BIT, // 8bit register addresses
(uint8_t *)(&value), // write returned data to this variable
1, // how many bytes to expect returned
100); // timeout
return status;
}
void si5351_write8(uint8_t reg, uint8_t value) { i2c_write8(hi2c1, SI5351_ADDRESS, reg, value); }
uint8_t si5351_read8(uint8_t reg, uint8_t *value) { return i2c_read8(hi2c1, SI5351_ADDRESS, reg, value); }
squeow_sw/Src/squeow_ui.c
+162 -27
View File
@@ -9,51 +9,186 @@
/* SQUEOW UI
su tosta (8x16 caratteri)
F: stringa frequenza
V: barra volume
D: barra diretta
R: barra riflessa
T: barra temperatura
S: stringa stato
*/
// VU
uint8_t vu_on, vu_value, vu_tmp_value;
uint8_t adc_stampa;
uint16_t ui_volume;
uint8_t uart_sent;
volatile uint8_t uart_sent;
// ################
void squeow_ui_init(void) {
vu_on = 1;
adc_stampa = 1;
#ifdef SQUEOW_UI_SERIOW
seriow_log('I', "seriow UI init");
#endif
#ifdef SQUEOW_UI_TOSTA
tosta_log('I', "UI init");
#endif
}
// seriow
// https://git.lattuga.net/boyska/seriow
// 10hz
void seriow_var_dump(void) {
char buf[64];
snprintf(buf, 64, "\e[3dDMP V=%lu T=%u C=%u D=%u R=%u\n", vu_value, adc2_valori[0], adc2_valori[1], adc2_valori[2], adc2_valori[3]);
serial_write(buf, strlen(buf));
vu_tmp_value = 0;
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "DMP V=%u ", riscala_valori(ui_volume, 0, 2048, 0, 100));
#ifdef SQUEOW_SONDA_CORRENTE
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "C=%u ", riscala_valori(adc2_valori[SQUEOW_ADC_CORRENTE], 0, 4095, 0, 100));
#endif
#ifdef SQUEOW_SONDA_TEMPERATURA
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "T=%u ", riscala_valori(adc2_valori[SQUEOW_ADC_TEMPERATURA], 0, 4095, 0, 100));
#endif
#ifdef SQUEOW_SONDA_DIRETTA
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "D=%u ", riscala_valori(adc2_valori[SQUEOW_ADC_DIRETTA], 0, 4095, 0, 100));
#endif
#ifdef SQUEOW_SONDA_RIFLESSA
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "R=%u ", riscala_valori(adc2_valori[SQUEOW_ADC_RIFLESSA], 0, 4095, 0, 100));
#endif
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "\n");
}
// ogni 5sec
void seriow_stab_dump(void) {
char buf[64];
snprintf(buf, 64, "DMP F=%lu\n", freq);
serial_write(buf, strlen(buf));
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "DMP F=%lu ", freq);
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "VPK=%u ", VU_METER_SOGLIA_PICCO);
#ifdef SQUEOW_SONDA_CORRENTE
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "SC=%u ", SOGLIA_CORRENTE);
#endif
#ifdef SQUEOW_SONDA_TEMPERATURA
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "ST=%u ", SOGLIA_TEMPERATURA);
#endif
#ifdef SQUEOW_SONDA_DIRETTA
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "SD=%u ", SOGLIA_DIRETTA);
#endif
#ifdef SQUEOW_SONDA_RIFLESSA
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "SR=%u ", SOGLIA_RIFLESSA);
#endif
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "\n");
}
void seriow_log(uint8_t sev, char *msg) {
char buf[64];
snprintf(buf, 64, "\e[2dLOG %u %s\n", sev, msg);
serial_write(buf, strlen(buf));
void seriow_log(uint8_t sev, char *msg) { UART_TX_buf_lenght = snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "LOG %c %s\n", sev, msg); }
// tosta
void tosta_freq(void) {
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "\e[1d\e[0GF: %lu", freq);
}
int serial_write(char *ptr, int len) {
// todo sia dma che it corrompono
// HAL_UART_Transmit_DMA(&huart1, ptr, len);
// HAL_UART_Transmit_IT(&huart1, ptr, len);
HAL_UART_Transmit(&huart1, ptr, len, 1000);
uart_sent = 0;
return len;
void tosta_var_bars(void) {
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "\f\e[2d\e[0GV:\e[%ub\n", ui_volume);
#ifdef SQUEOW_SONDA_CORRENTE
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "C:\e[%ub\nu", riscala_valori(adc2_valori[SQUEOW_ADC_CORRENTE], 0, 4095, 0, 50));
#endif
#ifdef SQUEOW_SONDA_TEMPERATURA
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "T:\e[%ub\n", riscala_valori(adc2_valori[SQUEOW_ADC_TEMPERATURA], 0, 4095, 0, 50));
#endif
#ifdef SQUEOW_SONDA_DIRETTA
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "D:\e[%ub\n", riscala_valori(adc2_valori[SQUEOW_ADC_DIRETTA], 0, 4095, 0, 50));
#endif
#ifdef SQUEOW_SONDA_RIFLESSA
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "R:\e[%ub\n", riscala_valori(adc2_valori[SQUEOW_ADC_RIFLESSA], 0, 4095, 0, 50));
#endif
}
void tosta_log(uint8_t sev, char *msg) {
UART_TX_buf_lenght += snprintf(UART_TX_buf + UART_TX_buf_lenght, UART_TX_BUF_SIZE, "\e[8d\e[0GLOG: %c %s", sev, msg);
}
// LED
void led_blocco(uint8_t led_blocco_lampi) {
// fasi
// 0 lampo acceso
// 1 lampo spento
// 2 pausa
static uint16_t led_blocco_timer;
static uint8_t led_blocco_fase = 0, led_blocco_lampi_fatti = 0;
if (led_blocco_lampi > 0) {
if (led_blocco_fase == 0 && led_blocco_timer == 0) {
// inizio lampo acceso
HAL_GPIO_WritePin(G2_GPIO_Port, G2_Pin, GPIO_PIN_SET);
led_blocco_timer = 1;
} else if (led_blocco_fase == 0 && led_blocco_timer >= SQUEOW_LED_BLOCCO_LAMPO) {
// fine lampo acceso, inizio lampo spento
HAL_GPIO_WritePin(G2_GPIO_Port, G2_Pin, GPIO_PIN_RESET);
led_blocco_fase = 1;
led_blocco_timer = 0;
} else if (led_blocco_fase == 1 && led_blocco_timer >= SQUEOW_LED_BLOCCO_LAMPO) {
// fine lampo spento
if (led_blocco_lampi_fatti >= (led_blocco_lampi - 1)) {
// fine lampi, inizio pausa
led_blocco_fase = 2;
led_blocco_lampi_fatti = 0;
HAL_GPIO_WritePin(G2_GPIO_Port, G2_Pin, GPIO_PIN_RESET);
} else {
led_blocco_lampi_fatti++;
led_blocco_fase = 0;
}
led_blocco_timer = 0;
} else if (led_blocco_fase == 2 && led_blocco_timer >= SQUEOW_LED_BLOCCO_PAUSA) {
// fine pausa
led_blocco_fase = 0;
led_blocco_timer = 0;
} else {
led_blocco_timer++;
}
} else {
HAL_GPIO_WritePin(G2_GPIO_Port, G2_Pin, GPIO_PIN_RESET);
}
}
void led_pwm_duty(uint8_t duty) { TIM8->CCR3 = duty; }
uint16_t vu_meter(uint16_t campione) {
#define ZEROD 2047
#define ZEROU 2048
static uint16_t vu_valore_temp, vu_timer_picco;
uint16_t abs_campione;
// se è sopra lo zero analogico, sottrailo, se no inverti
abs_campione = (campione > ZEROD) ? campione - ZEROU : ZEROD - campione;
#ifdef SQUEOW_UI_LED
// gestione picco
if (abs_campione > VU_METER_SOGLIA_PICCO) {
vu_timer_picco = 0;
HAL_GPIO_WritePin(G4_GPIO_Port, G4_Pin, GPIO_PIN_SET);
} else if (vu_timer_picco >= VU_METER_TEMPO_PICCO) {
HAL_GPIO_WritePin(G4_GPIO_Port, G4_Pin, GPIO_PIN_RESET);
vu_timer_picco = 0;
} else {
vu_timer_picco++;
}
#endif
// vu meter
if (abs_campione >= vu_valore_temp) {
vu_valore_temp = abs_campione;
} else {
vu_valore_temp -= VU_METER_RILASCIO;
}
return vu_valore_temp;
}
uint16_t riscala_valori(uint16_t valore_in, uint16_t valore_in_minimo, uint16_t valore_in_massimo, uint16_t valore_out_minimo, uint16_t valore_out_massimo) {
uint16_t range_in, range_out, valore_in_limitato;
float scala;
range_in = valore_in_massimo - valore_in_minimo;
range_out = valore_out_massimo - valore_out_minimo;
scala = range_in / range_out;
valore_in_limitato = (((valore_in) < (valore_in_massimo)) ? (valore_in) : (valore_in_massimo));
return valore_out_minimo + ((valore_in_limitato - valore_in_minimo) / scala);
}
squeow_sw/Src/stm32g4xx_hal_msp.c
+147 -105
View File
@@ -64,7 +64,7 @@ extern DMA_HandleTypeDef hdma_usart1_tx;
/* USER CODE END 0 */
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
@@ -91,20 +91,20 @@ void HAL_MspInit(void)
static uint32_t HAL_RCC_ADC12_CLK_ENABLED=0;
/**
* @brief ADC MSP Initialization
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
* @brief ADC MSP Initialization
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(hadc->Instance==ADC1)
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/** Initializes the peripherals clocks
*/
@@ -125,23 +125,23 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
/**ADC1 GPIO Configuration
PB0 ------> ADC1_IN15
*/
GPIO_InitStruct.Pin = AUDIO_IN_Pin;
GPIO_InitStruct.Pin = A1_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(AUDIO_IN_GPIO_Port, &GPIO_InitStruct);
HAL_GPIO_Init(A1_GPIO_Port, &GPIO_InitStruct);
/* ADC1 interrupt Init */
HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
/* USER CODE BEGIN ADC1_MspInit 1 */
/* USER CODE BEGIN ADC1_MspInit 1 */
/* USER CODE END ADC1_MspInit 1 */
/* USER CODE END ADC1_MspInit 1 */
}
else if(hadc->Instance==ADC2)
{
/* USER CODE BEGIN ADC2_MspInit 0 */
/* USER CODE BEGIN ADC2_MspInit 0 */
/* USER CODE END ADC2_MspInit 0 */
/* USER CODE END ADC2_MspInit 0 */
/** Initializes the peripherals clocks
*/
@@ -165,7 +165,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
PA6 ------> ADC2_IN3
PA7 ------> ADC2_IN4
*/
GPIO_InitStruct.Pin = TEMPERATURA_Pin|CORRENTE_Pin|DIRETTA_Pin|RIFLESSA_Pin;
GPIO_InitStruct.Pin = A5_Pin|A4_Pin|A3_Pin|A2_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
@@ -177,8 +177,8 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
hdma_adc2.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_adc2.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_adc2.Init.MemInc = DMA_MINC_ENABLE;
hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
hdma_adc2.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
hdma_adc2.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
hdma_adc2.Init.Mode = DMA_NORMAL;
hdma_adc2.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_adc2) != HAL_OK)
@@ -191,26 +191,26 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
/* ADC2 interrupt Init */
HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
/* USER CODE BEGIN ADC2_MspInit 1 */
/* USER CODE BEGIN ADC2_MspInit 1 */
/* USER CODE END ADC2_MspInit 1 */
/* USER CODE END ADC2_MspInit 1 */
}
}
/**
* @brief ADC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
* @brief ADC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
{
if(hadc->Instance==ADC1)
{
/* USER CODE BEGIN ADC1_MspDeInit 0 */
/* USER CODE BEGIN ADC1_MspDeInit 0 */
/* USER CODE END ADC1_MspDeInit 0 */
/* USER CODE END ADC1_MspDeInit 0 */
/* Peripheral clock disable */
HAL_RCC_ADC12_CLK_ENABLED--;
if(HAL_RCC_ADC12_CLK_ENABLED==0){
@@ -220,26 +220,26 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
/**ADC1 GPIO Configuration
PB0 ------> ADC1_IN15
*/
HAL_GPIO_DeInit(AUDIO_IN_GPIO_Port, AUDIO_IN_Pin);
HAL_GPIO_DeInit(A1_GPIO_Port, A1_Pin);
/* ADC1 interrupt DeInit */
/* USER CODE BEGIN ADC1:ADC1_2_IRQn disable */
/* USER CODE BEGIN ADC1:ADC1_2_IRQn disable */
/**
* Uncomment the line below to disable the "ADC1_2_IRQn" interrupt
* Be aware, disabling shared interrupt may affect other IPs
*/
/* HAL_NVIC_DisableIRQ(ADC1_2_IRQn); */
/* USER CODE END ADC1:ADC1_2_IRQn disable */
/* USER CODE END ADC1:ADC1_2_IRQn disable */
/* USER CODE BEGIN ADC1_MspDeInit 1 */
/* USER CODE BEGIN ADC1_MspDeInit 1 */
/* USER CODE END ADC1_MspDeInit 1 */
/* USER CODE END ADC1_MspDeInit 1 */
}
else if(hadc->Instance==ADC2)
{
/* USER CODE BEGIN ADC2_MspDeInit 0 */
/* USER CODE BEGIN ADC2_MspDeInit 0 */
/* USER CODE END ADC2_MspDeInit 0 */
/* USER CODE END ADC2_MspDeInit 0 */
/* Peripheral clock disable */
HAL_RCC_ADC12_CLK_ENABLED--;
if(HAL_RCC_ADC12_CLK_ENABLED==0){
@@ -252,42 +252,42 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
PA6 ------> ADC2_IN3
PA7 ------> ADC2_IN4
*/
HAL_GPIO_DeInit(GPIOA, TEMPERATURA_Pin|CORRENTE_Pin|DIRETTA_Pin|RIFLESSA_Pin);
HAL_GPIO_DeInit(GPIOA, A5_Pin|A4_Pin|A3_Pin|A2_Pin);
/* ADC2 DMA DeInit */
HAL_DMA_DeInit(hadc->DMA_Handle);
/* ADC2 interrupt DeInit */
/* USER CODE BEGIN ADC2:ADC1_2_IRQn disable */
/* USER CODE BEGIN ADC2:ADC1_2_IRQn disable */
/**
* Uncomment the line below to disable the "ADC1_2_IRQn" interrupt
* Be aware, disabling shared interrupt may affect other IPs
*/
/* HAL_NVIC_DisableIRQ(ADC1_2_IRQn); */
/* USER CODE END ADC2:ADC1_2_IRQn disable */
/* USER CODE END ADC2:ADC1_2_IRQn disable */
/* USER CODE BEGIN ADC2_MspDeInit 1 */
/* USER CODE BEGIN ADC2_MspDeInit 1 */
/* USER CODE END ADC2_MspDeInit 1 */
/* USER CODE END ADC2_MspDeInit 1 */
}
}
/**
* @brief I2C MSP Initialization
* This function configures the hardware resources used in this example
* @param hi2c: I2C handle pointer
* @retval None
*/
* @brief I2C MSP Initialization
* This function configures the hardware resources used in this example
* @param hi2c: I2C handle pointer
* @retval None
*/
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(hi2c->Instance==I2C1)
{
/* USER CODE BEGIN I2C1_MspInit 0 */
/* USER CODE BEGIN I2C1_MspInit 0 */
/* USER CODE END I2C1_MspInit 0 */
/* USER CODE END I2C1_MspInit 0 */
/** Initializes the peripherals clocks
*/
@@ -320,27 +320,27 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
/* Peripheral clock enable */
__HAL_RCC_I2C1_CLK_ENABLE();
/* USER CODE BEGIN I2C1_MspInit 1 */
/* USER CODE BEGIN I2C1_MspInit 1 */
/* USER CODE END I2C1_MspInit 1 */
/* USER CODE END I2C1_MspInit 1 */
}
}
/**
* @brief I2C MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hi2c: I2C handle pointer
* @retval None
*/
* @brief I2C MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hi2c: I2C handle pointer
* @retval None
*/
void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
{
if(hi2c->Instance==I2C1)
{
/* USER CODE BEGIN I2C1_MspDeInit 0 */
/* USER CODE BEGIN I2C1_MspDeInit 0 */
/* USER CODE END I2C1_MspDeInit 0 */
/* USER CODE END I2C1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_I2C1_CLK_DISABLE();
@@ -352,48 +352,59 @@ void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
/* USER CODE BEGIN I2C1_MspDeInit 1 */
/* USER CODE BEGIN I2C1_MspDeInit 1 */
/* USER CODE END I2C1_MspDeInit 1 */
/* USER CODE END I2C1_MspDeInit 1 */
}
}
/**
* @brief TIM_Base MSP Initialization
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
* @brief TIM_Base MSP Initialization
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM2)
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
/* TIM2 interrupt Init */
HAL_NVIC_SetPriority(TIM2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM2_IRQn);
/* USER CODE BEGIN TIM2_MspInit 1 */
/* USER CODE BEGIN TIM2_MspInit 1 */
/* USER CODE END TIM2_MspInit 1 */
/* USER CODE END TIM2_MspInit 1 */
}
else if(htim_base->Instance==TIM3)
{
/* USER CODE BEGIN TIM3_MspInit 0 */
/* USER CODE BEGIN TIM3_MspInit 0 */
/* USER CODE END TIM3_MspInit 0 */
/* USER CODE END TIM3_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM3_CLK_ENABLE();
/* TIM3 interrupt Init */
HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM3_IRQn);
/* USER CODE BEGIN TIM3_MspInit 1 */
/* USER CODE BEGIN TIM3_MspInit 1 */
/* USER CODE END TIM3_MspInit 1 */
/* USER CODE END TIM3_MspInit 1 */
}
else if(htim_base->Instance==TIM8)
{
/* USER CODE BEGIN TIM8_MspInit 0 */
/* USER CODE END TIM8_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM8_CLK_ENABLE();
/* USER CODE BEGIN TIM8_MspInit 1 */
/* USER CODE END TIM8_MspInit 1 */
}
}
@@ -403,10 +414,9 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(htim->Instance==TIM2)
{
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
/**TIM2 GPIO Configuration
PA0 ------> TIM2_CH1
@@ -421,66 +431,98 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN TIM2_MspPostInit 1 */
/* USER CODE BEGIN TIM2_MspPostInit 1 */
/* USER CODE END TIM2_MspPostInit 1 */
/* USER CODE END TIM2_MspPostInit 1 */
}
else if(htim->Instance==TIM8)
{
/* USER CODE BEGIN TIM8_MspPostInit 0 */
/* USER CODE END TIM8_MspPostInit 0 */
__HAL_RCC_GPIOB_CLK_ENABLE();
/**TIM8 GPIO Configuration
PB5 ------> TIM8_CH3N
*/
GPIO_InitStruct.Pin = GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF3_TIM8;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USER CODE BEGIN TIM8_MspPostInit 1 */
/* USER CODE END TIM8_MspPostInit 1 */
}
}
/**
* @brief TIM_Base MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
* @brief TIM_Base MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM2)
{
/* USER CODE BEGIN TIM2_MspDeInit 0 */
/* USER CODE BEGIN TIM2_MspDeInit 0 */
/* USER CODE END TIM2_MspDeInit 0 */
/* USER CODE END TIM2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM2_CLK_DISABLE();
/* TIM2 interrupt DeInit */
HAL_NVIC_DisableIRQ(TIM2_IRQn);
/* USER CODE BEGIN TIM2_MspDeInit 1 */
/* USER CODE BEGIN TIM2_MspDeInit 1 */
/* USER CODE END TIM2_MspDeInit 1 */
/* USER CODE END TIM2_MspDeInit 1 */
}
else if(htim_base->Instance==TIM3)
{
/* USER CODE BEGIN TIM3_MspDeInit 0 */
/* USER CODE BEGIN TIM3_MspDeInit 0 */
/* USER CODE END TIM3_MspDeInit 0 */
/* USER CODE END TIM3_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM3_CLK_DISABLE();
/* TIM3 interrupt DeInit */
HAL_NVIC_DisableIRQ(TIM3_IRQn);
/* USER CODE BEGIN TIM3_MspDeInit 1 */
/* USER CODE BEGIN TIM3_MspDeInit 1 */
/* USER CODE END TIM3_MspDeInit 1 */
/* USER CODE END TIM3_MspDeInit 1 */
}
else if(htim_base->Instance==TIM8)
{
/* USER CODE BEGIN TIM8_MspDeInit 0 */
/* USER CODE END TIM8_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM8_CLK_DISABLE();
/* USER CODE BEGIN TIM8_MspDeInit 1 */
/* USER CODE END TIM8_MspDeInit 1 */
}
}
/**
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
if(huart->Instance==USART1)
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/** Initializes the peripherals clocks
*/
@@ -544,27 +586,27 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
/* USART1 interrupt Init */
HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
}
}
/**
* @brief UART MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
* @brief UART MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
{
if(huart->Instance==USART1)
{
/* USER CODE BEGIN USART1_MspDeInit 0 */
/* USER CODE BEGIN USART1_MspDeInit 0 */
/* USER CODE END USART1_MspDeInit 0 */
/* USER CODE END USART1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART1_CLK_DISABLE();
@@ -580,9 +622,9 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
/* USART1 interrupt DeInit */
HAL_NVIC_DisableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspDeInit 1 */
/* USER CODE BEGIN USART1_MspDeInit 1 */
/* USER CODE END USART1_MspDeInit 1 */
/* USER CODE END USART1_MspDeInit 1 */
}
}
squeow_sw/Src/stm32g4xx_it.c
+35 -24
View File
@@ -1,20 +1,20 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32g4xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
******************************************************************************
* @file stm32g4xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
@@ -81,9 +81,8 @@ void NMI_Handler(void)
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
while (1) {
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
@@ -274,11 +273,22 @@ void TIM2_IRQHandler(void)
/* USER CODE END TIM2_IRQn 0 */
HAL_TIM_IRQHandler(&htim2);
/* USER CODE BEGIN TIM2_IRQn 1 */
uint16_t adc_val;
adc_val = HAL_ADC_GetValue(&hadc1);
vu_value = vu_meter(adc_val);
TIM2->CCR1 = adc_val;
TIM2->CCR2 = adc_val;
uint16_t adc_val;
adc_val = HAL_ADC_GetValue(&hadc1);
if (blocco) {
#ifdef MODALITA_BLOCCO_PERMANENTE
TIM2->CCR1 = 0;
TIM2->CCR2 = 0;
#endif
#ifdef MODALITA_BLOCCO_BASSA_POTENZA
TIM2->CCR1 = adc_val >> DIVISORE_BLOCCO_BASSA_POTENZA;
TIM2->CCR2 = adc_val >> DIVISORE_BLOCCO_BASSA_POTENZA;
#endif
} else {
TIM2->CCR1 = adc_val;
TIM2->CCR2 = adc_val; // ???
}
ui_volume = vu_meter(adc_val);
/* USER CODE END TIM2_IRQn 1 */
}
@@ -292,7 +302,8 @@ void TIM3_IRQHandler(void)
/* USER CODE END TIM3_IRQn 0 */
HAL_TIM_IRQHandler(&htim3);
/* USER CODE BEGIN TIM3_IRQn 1 */
sys_tick = 1;
// base tempi
sys_tick = 1;
/* USER CODE END TIM3_IRQn 1 */
}
squeow_sw/build/main.lst
+3731 -3044
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File diff suppressed because it is too large Load Diff
squeow_sw/build/main.o
BIN
View File
Binary file not shown.
squeow_sw/build/si5351.d
+3 -1
View File
@@ -30,7 +30,8 @@ build/si5351.o: Src/si5351.c Inc/main.h \
Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \
Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \
Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \
Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h Inc/si5351.h
Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h Inc/si5351.h \
Inc/si5351_cfg.h
Inc/main.h:
Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h:
Inc/stm32g4xx_hal_conf.h:
@@ -67,3 +68,4 @@ Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h:
Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h:
Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h:
Inc/si5351.h:
Inc/si5351_cfg.h:
squeow_sw/build/si5351.lst
+1075 -1254
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File diff suppressed because it is too large Load Diff
squeow_sw/build/si5351.o
BIN
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Binary file not shown.
squeow_sw/build/squeow.lst
+1165 -1299
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File diff suppressed because it is too large Load Diff
squeow_sw/build/squeow.o
BIN
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squeow_sw/build/squeow_codice.bin
BIN
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Binary file not shown.
squeow_sw/build/squeow_codice.elf
BIN
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Binary file not shown.
squeow_sw/build/squeow_codice.hex
+1599 -1855
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File diff suppressed because it is too large Load Diff
squeow_sw/build/squeow_codice.map
+1595 -1783
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File diff suppressed because it is too large Load Diff
squeow_sw/build/squeow_ui.lst
+1496 -431
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File diff suppressed because it is too large Load Diff
squeow_sw/build/squeow_ui.o
BIN
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squeow_sw/build/startup_stm32g431xx.o
BIN
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Binary file not shown.
squeow_sw/build/stm32g4xx_hal.lst
+157 -157
View File
@@ -1,4 +1,4 @@
ARM GAS /tmp/ccShpYu9.s page 1
ARM GAS /tmp/cct060d8.s page 1
1 .cpu cortex-m4
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Services HAL APIs
29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** @endverbatim
ARM GAS /tmp/ccShpYu9.s page 2
ARM GAS /tmp/cct060d8.s page 2
31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ******************************************************************************
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __IO uint32_t uwTick;
86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid PRIO */
87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */
ARM GAS /tmp/ccShpYu9.s page 3
ARM GAS /tmp/cct060d8.s page 3
88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * used after a system Reset and the NVIC configuration is set to Priority group 4.
143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * Once done, time base tick starts incrementing: the tick variable counter is incremented
144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * each 1ms in the SysTick_Handler() interrupt handler.
ARM GAS /tmp/ccShpYu9.s page 4
ARM GAS /tmp/cct060d8.s page 4
145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_APB2_RELEASE_RESET();
200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_AHB1_FORCE_RESET();
ARM GAS /tmp/ccShpYu9.s page 5
ARM GAS /tmp/cct060d8.s page 5
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_AHB1_RELEASE_RESET();
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* NOTE : This function should not be modified, when the callback is needed,
235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** the HAL_MspDeInit could be implemented in the user file
236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
ARM GAS /tmp/ccShpYu9.s page 6
ARM GAS /tmp/cct060d8.s page 6
237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
97 .loc 1 208 3 view .LVU14
98 001c 1C63 str r4, [r3, #48]
211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
ARM GAS /tmp/ccShpYu9.s page 7
ARM GAS /tmp/cct060d8.s page 7
99 .loc 1 211 3 view .LVU15
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
131 0002 1B68 ldr r3, [r3]
132 .loc 1 259 6 view .LVU22
133 0004 0BB9 cbnz r3, .L16
ARM GAS /tmp/ccShpYu9.s page 8
ARM GAS /tmp/cct060d8.s page 8
260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
155 .loc 1 262 9 view .LVU30
156 0016 0C4A ldr r2, .L18+4
157 0018 1068 ldr r0, [r2]
ARM GAS /tmp/ccShpYu9.s page 9
ARM GAS /tmp/cct060d8.s page 9
158 001a B0FBF3F0 udiv r0, r0, r3
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
203 .section .text.HAL_Init,"ax",%progbits
204 .align 1
205 .global HAL_Init
ARM GAS /tmp/ccShpYu9.s page 10
ARM GAS /tmp/cct060d8.s page 10
206 .syntax unified
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
250 .cfi_endproc
251 .LFE329:
253 .section .text.HAL_IncTick,"ax",%progbits
ARM GAS /tmp/ccShpYu9.s page 11
ARM GAS /tmp/cct060d8.s page 11
254 .align 1
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
272 0006 0968 ldr r1, [r1]
273 0008 0B44 add r3, r3, r1
274 000a 1360 str r3, [r2]
ARM GAS /tmp/ccShpYu9.s page 12
ARM GAS /tmp/cct060d8.s page 12
325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief This function returns a tick priority.
ARM GAS /tmp/ccShpYu9.s page 13
ARM GAS /tmp/cct060d8.s page 13
340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval tick priority
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** assert_param(IS_TICKFREQ(Freq));
361 .loc 1 356 3 view .LVU69
357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
ARM GAS /tmp/ccShpYu9.s page 14
ARM GAS /tmp/cct060d8.s page 14
358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** if (uwTickFreq != Freq)
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
389 .LVL20:
369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
390 .loc 1 369 5 is_stmt 1 view .LVU82
ARM GAS /tmp/ccShpYu9.s page 15
ARM GAS /tmp/cct060d8.s page 15
369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
435 .weak HAL_Delay
436 .syntax unified
437 .thumb
ARM GAS /tmp/ccShpYu9.s page 16
ARM GAS /tmp/cct060d8.s page 16
438 .thumb_func
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
472 .loc 1 408 10 view .LVU99
473 0014 1C44 add r4, r4, r3
474 .LVL24:
ARM GAS /tmp/ccShpYu9.s page 17
ARM GAS /tmp/cct060d8.s page 17
475 .L46:
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
508 @ args = 0, pretend = 0, frame = 0
509 @ frame_needed = 0, uses_anonymous_args = 0
510 @ link register save eliminated.
ARM GAS /tmp/ccShpYu9.s page 18
ARM GAS /tmp/cct060d8.s page 18
428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Disable SysTick Interrupt */
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
549 .thumb
550 .thumb_func
552 HAL_GetHalVersion:
ARM GAS /tmp/ccShpYu9.s page 19
ARM GAS /tmp/cct060d8.s page 19
553 .LFB342:
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
591 .L57:
592 .align 2
593 .L56:
ARM GAS /tmp/ccShpYu9.s page 20
ARM GAS /tmp/cct060d8.s page 20
594 0008 002004E0 .word -536600576
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
636 .cfi_startproc
637 @ args = 0, pretend = 0, frame = 0
638 @ frame_needed = 0, uses_anonymous_args = 0
ARM GAS /tmp/ccShpYu9.s page 21
ARM GAS /tmp/cct060d8.s page 21
639 @ link register save eliminated.
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
686 .LFB347:
492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
ARM GAS /tmp/ccShpYu9.s page 22
ARM GAS /tmp/cct060d8.s page 22
494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Return the third word of the unique device identifier (UID based on 96 bits)
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_DBGMCU_EnableDBGSleepMode(void)
ARM GAS /tmp/ccShpYu9.s page 23
ARM GAS /tmp/cct060d8.s page 23
527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
757 .cfi_endproc
758 .LFE349:
760 .section .text.HAL_DBGMCU_EnableDBGStopMode,"ax",%progbits
ARM GAS /tmp/ccShpYu9.s page 24
ARM GAS /tmp/cct060d8.s page 24
761 .align 1
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
802 .loc 1 555 3 view .LVU143
803 0000 024A ldr r2, .L80
ARM GAS /tmp/ccShpYu9.s page 25
ARM GAS /tmp/cct060d8.s page 25
804 0002 5368 ldr r3, [r2, #4]
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
852 .LFB353:
566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
ARM GAS /tmp/ccShpYu9.s page 26
ARM GAS /tmp/cct060d8.s page 26
568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Disable the Debug Module during STANDBY mode.
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Start a hardware CCMSRAM erase operation.
ARM GAS /tmp/ccShpYu9.s page 27
ARM GAS /tmp/cct060d8.s page 27
599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note As long as CCMSRAM is not erased the CCMER bit will be set.
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
ARM GAS /tmp/ccShpYu9.s page 28
ARM GAS /tmp/cct060d8.s page 28
622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_SYSCFG_EnableMemorySwappingBank(void)
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
955 .loc 1 640 1 is_stmt 0 view .LVU163
956 000a 7047 bx lr
ARM GAS /tmp/ccShpYu9.s page 29
ARM GAS /tmp/cct060d8.s page 29
957 .L96:
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
992 .cfi_endproc
993 .LFE357:
995 .section .text.HAL_SYSCFG_VREFBUF_HighImpedanceConfig,"ax",%progbits
ARM GAS /tmp/ccShpYu9.s page 30
ARM GAS /tmp/cct060d8.s page 30
996 .align 1
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Tune the Internal Voltage Reference buffer (VREFBUF).
681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @param TrimmingValue specifies trimming code for VREFBUF calibration
ARM GAS /tmp/ccShpYu9.s page 31
ARM GAS /tmp/cct060d8.s page 31
682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x3F
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t tickstart;
1075 .loc 1 699 3 view .LVU177
700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
ARM GAS /tmp/ccShpYu9.s page 32
ARM GAS /tmp/cct060d8.s page 32
701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** SET_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
1114 .LVL33:
1115 .L114:
1116 .loc 1 716 1 view .LVU192
ARM GAS /tmp/ccShpYu9.s page 33
ARM GAS /tmp/cct060d8.s page 33
1117 002e 00BF .align 2
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_SYSCFG_EnableIOSwitchBooster(void)
ARM GAS /tmp/ccShpYu9.s page 34
ARM GAS /tmp/cct060d8.s page 34
735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
1203 000c 00000140 .word 1073807360
1204 .cfi_endproc
1205 .LFE363:
ARM GAS /tmp/ccShpYu9.s page 35
ARM GAS /tmp/cct060d8.s page 35
1207 .section .text.HAL_SYSCFG_EnableIOSwitchVDD,"ax",%progbits
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
1246 @ args = 0, pretend = 0, frame = 0
1247 @ frame_needed = 0, uses_anonymous_args = 0
1248 @ link register save eliminated.
ARM GAS /tmp/ccShpYu9.s page 36
ARM GAS /tmp/cct060d8.s page 36
766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ANASWVDD);
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccShpYu9.s page 1
1291 .LFE366:
1293 .global uwTickFreq
1294 .section .data.uwTickFreq,"aw"
ARM GAS /tmp/ccShpYu9.s page 37
ARM GAS /tmp/cct060d8.s page 37
1295 .align 2
@@ -2177,139 +2177,139 @@ ARM GAS /tmp/ccShpYu9.s page 1
1314 .text
1315 .Letext0:
1316 .file 2 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
1317 .file 3 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
1318 .file 4 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
1317 .file 3 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
1318 .file 4 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
1319 .file 5 "Drivers/CMSIS/Include/core_cm4.h"
1320 .file 6 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
1321 .file 7 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h"
1322 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
1323 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h"
ARM GAS /tmp/ccShpYu9.s page 38
ARM GAS /tmp/cct060d8.s page 38
DEFINED SYMBOLS
*ABS*:00000000 stm32g4xx_hal.c
/tmp/ccShpYu9.s:21 .text.HAL_MspInit:00000000 $t
/tmp/ccShpYu9.s:27 .text.HAL_MspInit:00000000 HAL_MspInit
/tmp/ccShpYu9.s:40 .text.HAL_MspDeInit:00000000 $t
/tmp/ccShpYu9.s:46 .text.HAL_MspDeInit:00000000 HAL_MspDeInit
/tmp/ccShpYu9.s:59 .text.HAL_DeInit:00000000 $t
/tmp/ccShpYu9.s:65 .text.HAL_DeInit:00000000 HAL_DeInit
/tmp/ccShpYu9.s:109 .text.HAL_DeInit:00000028 $d
/tmp/ccShpYu9.s:114 .text.HAL_InitTick:00000000 $t
/tmp/ccShpYu9.s:120 .text.HAL_InitTick:00000000 HAL_InitTick
/tmp/ccShpYu9.s:197 .text.HAL_InitTick:00000044 $d
/tmp/ccShpYu9.s:1298 .data.uwTickFreq:00000000 uwTickFreq
/tmp/ccShpYu9.s:1305 .data.uwTickPrio:00000000 uwTickPrio
/tmp/ccShpYu9.s:204 .text.HAL_Init:00000000 $t
/tmp/ccShpYu9.s:210 .text.HAL_Init:00000000 HAL_Init
/tmp/ccShpYu9.s:254 .text.HAL_IncTick:00000000 $t
/tmp/ccShpYu9.s:260 .text.HAL_IncTick:00000000 HAL_IncTick
/tmp/ccShpYu9.s:280 .text.HAL_IncTick:00000010 $d
/tmp/ccShpYu9.s:1312 .bss.uwTick:00000000 uwTick
/tmp/ccShpYu9.s:286 .text.HAL_GetTick:00000000 $t
/tmp/ccShpYu9.s:292 .text.HAL_GetTick:00000000 HAL_GetTick
/tmp/ccShpYu9.s:308 .text.HAL_GetTick:00000008 $d
/tmp/ccShpYu9.s:313 .text.HAL_GetTickPrio:00000000 $t
/tmp/ccShpYu9.s:319 .text.HAL_GetTickPrio:00000000 HAL_GetTickPrio
/tmp/ccShpYu9.s:334 .text.HAL_GetTickPrio:00000008 $d
/tmp/ccShpYu9.s:339 .text.HAL_SetTickFreq:00000000 $t
/tmp/ccShpYu9.s:345 .text.HAL_SetTickFreq:00000000 HAL_SetTickFreq
/tmp/ccShpYu9.s:402 .text.HAL_SetTickFreq:00000024 $d
/tmp/ccShpYu9.s:408 .text.HAL_GetTickFreq:00000000 $t
/tmp/ccShpYu9.s:414 .text.HAL_GetTickFreq:00000000 HAL_GetTickFreq
/tmp/ccShpYu9.s:429 .text.HAL_GetTickFreq:00000008 $d
/tmp/ccShpYu9.s:434 .text.HAL_Delay:00000000 $t
/tmp/ccShpYu9.s:440 .text.HAL_Delay:00000000 HAL_Delay
/tmp/ccShpYu9.s:493 .text.HAL_Delay:00000024 $d
/tmp/ccShpYu9.s:498 .text.HAL_SuspendTick:00000000 $t
/tmp/ccShpYu9.s:504 .text.HAL_SuspendTick:00000000 HAL_SuspendTick
/tmp/ccShpYu9.s:522 .text.HAL_ResumeTick:00000000 $t
/tmp/ccShpYu9.s:528 .text.HAL_ResumeTick:00000000 HAL_ResumeTick
/tmp/ccShpYu9.s:546 .text.HAL_GetHalVersion:00000000 $t
/tmp/ccShpYu9.s:552 .text.HAL_GetHalVersion:00000000 HAL_GetHalVersion
/tmp/ccShpYu9.s:566 .text.HAL_GetHalVersion:00000004 $d
/tmp/ccShpYu9.s:571 .text.HAL_GetREVID:00000000 $t
/tmp/ccShpYu9.s:577 .text.HAL_GetREVID:00000000 HAL_GetREVID
/tmp/ccShpYu9.s:594 .text.HAL_GetREVID:00000008 $d
/tmp/ccShpYu9.s:599 .text.HAL_GetDEVID:00000000 $t
/tmp/ccShpYu9.s:605 .text.HAL_GetDEVID:00000000 HAL_GetDEVID
/tmp/ccShpYu9.s:622 .text.HAL_GetDEVID:0000000c $d
/tmp/ccShpYu9.s:627 .text.HAL_GetUIDw0:00000000 $t
/tmp/ccShpYu9.s:633 .text.HAL_GetUIDw0:00000000 HAL_GetUIDw0
/tmp/ccShpYu9.s:648 .text.HAL_GetUIDw0:00000008 $d
/tmp/ccShpYu9.s:653 .text.HAL_GetUIDw1:00000000 $t
/tmp/ccShpYu9.s:659 .text.HAL_GetUIDw1:00000000 HAL_GetUIDw1
/tmp/ccShpYu9.s:674 .text.HAL_GetUIDw1:00000008 $d
/tmp/ccShpYu9.s:679 .text.HAL_GetUIDw2:00000000 $t
/tmp/ccShpYu9.s:685 .text.HAL_GetUIDw2:00000000 HAL_GetUIDw2
/tmp/ccShpYu9.s:700 .text.HAL_GetUIDw2:00000008 $d
ARM GAS /tmp/ccShpYu9.s page 39
/tmp/cct060d8.s:21 .text.HAL_MspInit:00000000 $t
/tmp/cct060d8.s:27 .text.HAL_MspInit:00000000 HAL_MspInit
/tmp/cct060d8.s:40 .text.HAL_MspDeInit:00000000 $t
/tmp/cct060d8.s:46 .text.HAL_MspDeInit:00000000 HAL_MspDeInit
/tmp/cct060d8.s:59 .text.HAL_DeInit:00000000 $t
/tmp/cct060d8.s:65 .text.HAL_DeInit:00000000 HAL_DeInit
/tmp/cct060d8.s:109 .text.HAL_DeInit:00000028 $d
/tmp/cct060d8.s:114 .text.HAL_InitTick:00000000 $t
/tmp/cct060d8.s:120 .text.HAL_InitTick:00000000 HAL_InitTick
/tmp/cct060d8.s:197 .text.HAL_InitTick:00000044 $d
/tmp/cct060d8.s:1298 .data.uwTickFreq:00000000 uwTickFreq
/tmp/cct060d8.s:1305 .data.uwTickPrio:00000000 uwTickPrio
/tmp/cct060d8.s:204 .text.HAL_Init:00000000 $t
/tmp/cct060d8.s:210 .text.HAL_Init:00000000 HAL_Init
/tmp/cct060d8.s:254 .text.HAL_IncTick:00000000 $t
/tmp/cct060d8.s:260 .text.HAL_IncTick:00000000 HAL_IncTick
/tmp/cct060d8.s:280 .text.HAL_IncTick:00000010 $d
/tmp/cct060d8.s:1312 .bss.uwTick:00000000 uwTick
/tmp/cct060d8.s:286 .text.HAL_GetTick:00000000 $t
/tmp/cct060d8.s:292 .text.HAL_GetTick:00000000 HAL_GetTick
/tmp/cct060d8.s:308 .text.HAL_GetTick:00000008 $d
/tmp/cct060d8.s:313 .text.HAL_GetTickPrio:00000000 $t
/tmp/cct060d8.s:319 .text.HAL_GetTickPrio:00000000 HAL_GetTickPrio
/tmp/cct060d8.s:334 .text.HAL_GetTickPrio:00000008 $d
/tmp/cct060d8.s:339 .text.HAL_SetTickFreq:00000000 $t
/tmp/cct060d8.s:345 .text.HAL_SetTickFreq:00000000 HAL_SetTickFreq
/tmp/cct060d8.s:402 .text.HAL_SetTickFreq:00000024 $d
/tmp/cct060d8.s:408 .text.HAL_GetTickFreq:00000000 $t
/tmp/cct060d8.s:414 .text.HAL_GetTickFreq:00000000 HAL_GetTickFreq
/tmp/cct060d8.s:429 .text.HAL_GetTickFreq:00000008 $d
/tmp/cct060d8.s:434 .text.HAL_Delay:00000000 $t
/tmp/cct060d8.s:440 .text.HAL_Delay:00000000 HAL_Delay
/tmp/cct060d8.s:493 .text.HAL_Delay:00000024 $d
/tmp/cct060d8.s:498 .text.HAL_SuspendTick:00000000 $t
/tmp/cct060d8.s:504 .text.HAL_SuspendTick:00000000 HAL_SuspendTick
/tmp/cct060d8.s:522 .text.HAL_ResumeTick:00000000 $t
/tmp/cct060d8.s:528 .text.HAL_ResumeTick:00000000 HAL_ResumeTick
/tmp/cct060d8.s:546 .text.HAL_GetHalVersion:00000000 $t
/tmp/cct060d8.s:552 .text.HAL_GetHalVersion:00000000 HAL_GetHalVersion
/tmp/cct060d8.s:566 .text.HAL_GetHalVersion:00000004 $d
/tmp/cct060d8.s:571 .text.HAL_GetREVID:00000000 $t
/tmp/cct060d8.s:577 .text.HAL_GetREVID:00000000 HAL_GetREVID
/tmp/cct060d8.s:594 .text.HAL_GetREVID:00000008 $d
/tmp/cct060d8.s:599 .text.HAL_GetDEVID:00000000 $t
/tmp/cct060d8.s:605 .text.HAL_GetDEVID:00000000 HAL_GetDEVID
/tmp/cct060d8.s:622 .text.HAL_GetDEVID:0000000c $d
/tmp/cct060d8.s:627 .text.HAL_GetUIDw0:00000000 $t
/tmp/cct060d8.s:633 .text.HAL_GetUIDw0:00000000 HAL_GetUIDw0
/tmp/cct060d8.s:648 .text.HAL_GetUIDw0:00000008 $d
/tmp/cct060d8.s:653 .text.HAL_GetUIDw1:00000000 $t
/tmp/cct060d8.s:659 .text.HAL_GetUIDw1:00000000 HAL_GetUIDw1
/tmp/cct060d8.s:674 .text.HAL_GetUIDw1:00000008 $d
/tmp/cct060d8.s:679 .text.HAL_GetUIDw2:00000000 $t
/tmp/cct060d8.s:685 .text.HAL_GetUIDw2:00000000 HAL_GetUIDw2
/tmp/cct060d8.s:700 .text.HAL_GetUIDw2:00000008 $d
ARM GAS /tmp/cct060d8.s page 39
/tmp/ccShpYu9.s:705 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 $t
/tmp/ccShpYu9.s:711 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 HAL_DBGMCU_EnableDBGSleepMode
/tmp/ccShpYu9.s:728 .text.HAL_DBGMCU_EnableDBGSleepMode:0000000c $d
/tmp/ccShpYu9.s:733 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 $t
/tmp/ccShpYu9.s:739 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 HAL_DBGMCU_DisableDBGSleepMode
/tmp/ccShpYu9.s:756 .text.HAL_DBGMCU_DisableDBGSleepMode:0000000c $d
/tmp/ccShpYu9.s:761 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 $t
/tmp/ccShpYu9.s:767 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 HAL_DBGMCU_EnableDBGStopMode
/tmp/ccShpYu9.s:784 .text.HAL_DBGMCU_EnableDBGStopMode:0000000c $d
/tmp/ccShpYu9.s:789 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 $t
/tmp/ccShpYu9.s:795 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 HAL_DBGMCU_DisableDBGStopMode
/tmp/ccShpYu9.s:812 .text.HAL_DBGMCU_DisableDBGStopMode:0000000c $d
/tmp/ccShpYu9.s:817 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 $t
/tmp/ccShpYu9.s:823 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 HAL_DBGMCU_EnableDBGStandbyMode
/tmp/ccShpYu9.s:840 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000c $d
/tmp/ccShpYu9.s:845 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 $t
/tmp/ccShpYu9.s:851 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 HAL_DBGMCU_DisableDBGStandbyMode
/tmp/ccShpYu9.s:868 .text.HAL_DBGMCU_DisableDBGStandbyMode:0000000c $d
/tmp/ccShpYu9.s:873 .text.HAL_SYSCFG_CCMSRAMErase:00000000 $t
/tmp/ccShpYu9.s:879 .text.HAL_SYSCFG_CCMSRAMErase:00000000 HAL_SYSCFG_CCMSRAMErase
/tmp/ccShpYu9.s:904 .text.HAL_SYSCFG_CCMSRAMErase:00000014 $d
/tmp/ccShpYu9.s:909 .text.HAL_SYSCFG_EnableMemorySwappingBank:00000000 $t
/tmp/ccShpYu9.s:915 .text.HAL_SYSCFG_EnableMemorySwappingBank:00000000 HAL_SYSCFG_EnableMemorySwappingBank
/tmp/ccShpYu9.s:932 .text.HAL_SYSCFG_EnableMemorySwappingBank:0000000c $d
/tmp/ccShpYu9.s:937 .text.HAL_SYSCFG_DisableMemorySwappingBank:00000000 $t
/tmp/ccShpYu9.s:943 .text.HAL_SYSCFG_DisableMemorySwappingBank:00000000 HAL_SYSCFG_DisableMemorySwappingBank
/tmp/ccShpYu9.s:960 .text.HAL_SYSCFG_DisableMemorySwappingBank:0000000c $d
/tmp/ccShpYu9.s:965 .text.HAL_SYSCFG_VREFBUF_VoltageScalingConfig:00000000 $t
/tmp/ccShpYu9.s:971 .text.HAL_SYSCFG_VREFBUF_VoltageScalingConfig:00000000 HAL_SYSCFG_VREFBUF_VoltageScalingConfig
/tmp/ccShpYu9.s:991 .text.HAL_SYSCFG_VREFBUF_VoltageScalingConfig:00000010 $d
/tmp/ccShpYu9.s:996 .text.HAL_SYSCFG_VREFBUF_HighImpedanceConfig:00000000 $t
/tmp/ccShpYu9.s:1002 .text.HAL_SYSCFG_VREFBUF_HighImpedanceConfig:00000000 HAL_SYSCFG_VREFBUF_HighImpedanceConfig
/tmp/ccShpYu9.s:1022 .text.HAL_SYSCFG_VREFBUF_HighImpedanceConfig:00000010 $d
/tmp/ccShpYu9.s:1027 .text.HAL_SYSCFG_VREFBUF_TrimmingConfig:00000000 $t
/tmp/ccShpYu9.s:1033 .text.HAL_SYSCFG_VREFBUF_TrimmingConfig:00000000 HAL_SYSCFG_VREFBUF_TrimmingConfig
/tmp/ccShpYu9.s:1053 .text.HAL_SYSCFG_VREFBUF_TrimmingConfig:00000010 $d
/tmp/ccShpYu9.s:1058 .text.HAL_SYSCFG_EnableVREFBUF:00000000 $t
/tmp/ccShpYu9.s:1064 .text.HAL_SYSCFG_EnableVREFBUF:00000000 HAL_SYSCFG_EnableVREFBUF
/tmp/ccShpYu9.s:1119 .text.HAL_SYSCFG_EnableVREFBUF:00000030 $d
/tmp/ccShpYu9.s:1124 .text.HAL_SYSCFG_DisableVREFBUF:00000000 $t
/tmp/ccShpYu9.s:1130 .text.HAL_SYSCFG_DisableVREFBUF:00000000 HAL_SYSCFG_DisableVREFBUF
/tmp/ccShpYu9.s:1147 .text.HAL_SYSCFG_DisableVREFBUF:0000000c $d
/tmp/ccShpYu9.s:1152 .text.HAL_SYSCFG_EnableIOSwitchBooster:00000000 $t
/tmp/ccShpYu9.s:1158 .text.HAL_SYSCFG_EnableIOSwitchBooster:00000000 HAL_SYSCFG_EnableIOSwitchBooster
/tmp/ccShpYu9.s:1175 .text.HAL_SYSCFG_EnableIOSwitchBooster:0000000c $d
/tmp/ccShpYu9.s:1180 .text.HAL_SYSCFG_DisableIOSwitchBooster:00000000 $t
/tmp/ccShpYu9.s:1186 .text.HAL_SYSCFG_DisableIOSwitchBooster:00000000 HAL_SYSCFG_DisableIOSwitchBooster
/tmp/ccShpYu9.s:1203 .text.HAL_SYSCFG_DisableIOSwitchBooster:0000000c $d
/tmp/ccShpYu9.s:1208 .text.HAL_SYSCFG_EnableIOSwitchVDD:00000000 $t
/tmp/ccShpYu9.s:1214 .text.HAL_SYSCFG_EnableIOSwitchVDD:00000000 HAL_SYSCFG_EnableIOSwitchVDD
/tmp/ccShpYu9.s:1231 .text.HAL_SYSCFG_EnableIOSwitchVDD:0000000c $d
/tmp/ccShpYu9.s:1236 .text.HAL_SYSCFG_DisableIOSwitchVDD:00000000 $t
/tmp/ccShpYu9.s:1242 .text.HAL_SYSCFG_DisableIOSwitchVDD:00000000 HAL_SYSCFG_DisableIOSwitchVDD
/tmp/ccShpYu9.s:1259 .text.HAL_SYSCFG_DisableIOSwitchVDD:0000000c $d
/tmp/ccShpYu9.s:1264 .text.HAL_SYSCFG_CCMSRAM_WriteProtectionEnable:00000000 $t
/tmp/ccShpYu9.s:1270 .text.HAL_SYSCFG_CCMSRAM_WriteProtectionEnable:00000000 HAL_SYSCFG_CCMSRAM_WriteProtectionEnable
/tmp/ccShpYu9.s:1289 .text.HAL_SYSCFG_CCMSRAM_WriteProtectionEnable:0000000c $d
ARM GAS /tmp/ccShpYu9.s page 40
/tmp/cct060d8.s:705 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 $t
/tmp/cct060d8.s:711 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 HAL_DBGMCU_EnableDBGSleepMode
/tmp/cct060d8.s:728 .text.HAL_DBGMCU_EnableDBGSleepMode:0000000c $d
/tmp/cct060d8.s:733 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 $t
/tmp/cct060d8.s:739 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 HAL_DBGMCU_DisableDBGSleepMode
/tmp/cct060d8.s:756 .text.HAL_DBGMCU_DisableDBGSleepMode:0000000c $d
/tmp/cct060d8.s:761 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 $t
/tmp/cct060d8.s:767 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 HAL_DBGMCU_EnableDBGStopMode
/tmp/cct060d8.s:784 .text.HAL_DBGMCU_EnableDBGStopMode:0000000c $d
/tmp/cct060d8.s:789 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 $t
/tmp/cct060d8.s:795 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 HAL_DBGMCU_DisableDBGStopMode
/tmp/cct060d8.s:812 .text.HAL_DBGMCU_DisableDBGStopMode:0000000c $d
/tmp/cct060d8.s:817 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 $t
/tmp/cct060d8.s:823 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 HAL_DBGMCU_EnableDBGStandbyMode
/tmp/cct060d8.s:840 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000c $d
/tmp/cct060d8.s:845 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 $t
/tmp/cct060d8.s:851 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 HAL_DBGMCU_DisableDBGStandbyMode
/tmp/cct060d8.s:868 .text.HAL_DBGMCU_DisableDBGStandbyMode:0000000c $d
/tmp/cct060d8.s:873 .text.HAL_SYSCFG_CCMSRAMErase:00000000 $t
/tmp/cct060d8.s:879 .text.HAL_SYSCFG_CCMSRAMErase:00000000 HAL_SYSCFG_CCMSRAMErase
/tmp/cct060d8.s:904 .text.HAL_SYSCFG_CCMSRAMErase:00000014 $d
/tmp/cct060d8.s:909 .text.HAL_SYSCFG_EnableMemorySwappingBank:00000000 $t
/tmp/cct060d8.s:915 .text.HAL_SYSCFG_EnableMemorySwappingBank:00000000 HAL_SYSCFG_EnableMemorySwappingBank
/tmp/cct060d8.s:932 .text.HAL_SYSCFG_EnableMemorySwappingBank:0000000c $d
/tmp/cct060d8.s:937 .text.HAL_SYSCFG_DisableMemorySwappingBank:00000000 $t
/tmp/cct060d8.s:943 .text.HAL_SYSCFG_DisableMemorySwappingBank:00000000 HAL_SYSCFG_DisableMemorySwappingBank
/tmp/cct060d8.s:960 .text.HAL_SYSCFG_DisableMemorySwappingBank:0000000c $d
/tmp/cct060d8.s:965 .text.HAL_SYSCFG_VREFBUF_VoltageScalingConfig:00000000 $t
/tmp/cct060d8.s:971 .text.HAL_SYSCFG_VREFBUF_VoltageScalingConfig:00000000 HAL_SYSCFG_VREFBUF_VoltageScalingConfig
/tmp/cct060d8.s:991 .text.HAL_SYSCFG_VREFBUF_VoltageScalingConfig:00000010 $d
/tmp/cct060d8.s:996 .text.HAL_SYSCFG_VREFBUF_HighImpedanceConfig:00000000 $t
/tmp/cct060d8.s:1002 .text.HAL_SYSCFG_VREFBUF_HighImpedanceConfig:00000000 HAL_SYSCFG_VREFBUF_HighImpedanceConfig
/tmp/cct060d8.s:1022 .text.HAL_SYSCFG_VREFBUF_HighImpedanceConfig:00000010 $d
/tmp/cct060d8.s:1027 .text.HAL_SYSCFG_VREFBUF_TrimmingConfig:00000000 $t
/tmp/cct060d8.s:1033 .text.HAL_SYSCFG_VREFBUF_TrimmingConfig:00000000 HAL_SYSCFG_VREFBUF_TrimmingConfig
/tmp/cct060d8.s:1053 .text.HAL_SYSCFG_VREFBUF_TrimmingConfig:00000010 $d
/tmp/cct060d8.s:1058 .text.HAL_SYSCFG_EnableVREFBUF:00000000 $t
/tmp/cct060d8.s:1064 .text.HAL_SYSCFG_EnableVREFBUF:00000000 HAL_SYSCFG_EnableVREFBUF
/tmp/cct060d8.s:1119 .text.HAL_SYSCFG_EnableVREFBUF:00000030 $d
/tmp/cct060d8.s:1124 .text.HAL_SYSCFG_DisableVREFBUF:00000000 $t
/tmp/cct060d8.s:1130 .text.HAL_SYSCFG_DisableVREFBUF:00000000 HAL_SYSCFG_DisableVREFBUF
/tmp/cct060d8.s:1147 .text.HAL_SYSCFG_DisableVREFBUF:0000000c $d
/tmp/cct060d8.s:1152 .text.HAL_SYSCFG_EnableIOSwitchBooster:00000000 $t
/tmp/cct060d8.s:1158 .text.HAL_SYSCFG_EnableIOSwitchBooster:00000000 HAL_SYSCFG_EnableIOSwitchBooster
/tmp/cct060d8.s:1175 .text.HAL_SYSCFG_EnableIOSwitchBooster:0000000c $d
/tmp/cct060d8.s:1180 .text.HAL_SYSCFG_DisableIOSwitchBooster:00000000 $t
/tmp/cct060d8.s:1186 .text.HAL_SYSCFG_DisableIOSwitchBooster:00000000 HAL_SYSCFG_DisableIOSwitchBooster
/tmp/cct060d8.s:1203 .text.HAL_SYSCFG_DisableIOSwitchBooster:0000000c $d
/tmp/cct060d8.s:1208 .text.HAL_SYSCFG_EnableIOSwitchVDD:00000000 $t
/tmp/cct060d8.s:1214 .text.HAL_SYSCFG_EnableIOSwitchVDD:00000000 HAL_SYSCFG_EnableIOSwitchVDD
/tmp/cct060d8.s:1231 .text.HAL_SYSCFG_EnableIOSwitchVDD:0000000c $d
/tmp/cct060d8.s:1236 .text.HAL_SYSCFG_DisableIOSwitchVDD:00000000 $t
/tmp/cct060d8.s:1242 .text.HAL_SYSCFG_DisableIOSwitchVDD:00000000 HAL_SYSCFG_DisableIOSwitchVDD
/tmp/cct060d8.s:1259 .text.HAL_SYSCFG_DisableIOSwitchVDD:0000000c $d
/tmp/cct060d8.s:1264 .text.HAL_SYSCFG_CCMSRAM_WriteProtectionEnable:00000000 $t
/tmp/cct060d8.s:1270 .text.HAL_SYSCFG_CCMSRAM_WriteProtectionEnable:00000000 HAL_SYSCFG_CCMSRAM_WriteProtectionEnable
/tmp/cct060d8.s:1289 .text.HAL_SYSCFG_CCMSRAM_WriteProtectionEnable:0000000c $d
ARM GAS /tmp/cct060d8.s page 40
/tmp/ccShpYu9.s:1295 .data.uwTickFreq:00000000 $d
/tmp/ccShpYu9.s:1302 .data.uwTickPrio:00000000 $d
/tmp/ccShpYu9.s:1309 .bss.uwTick:00000000 $d
/tmp/cct060d8.s:1295 .data.uwTickFreq:00000000 $d
/tmp/cct060d8.s:1302 .data.uwTickPrio:00000000 $d
/tmp/cct060d8.s:1309 .bss.uwTick:00000000 $d
UNDEFINED SYMBOLS
HAL_SYSTICK_Config
squeow_sw/build/stm32g4xx_hal.o
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+163 -163
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@@ -1,4 +1,4 @@
ARM GAS /tmp/ccDEPnZG.s page 1
ARM GAS /tmp/ccuFAPPx.s page 1
1 .cpu cortex-m4
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
27:Drivers/CMSIS/Include/core_cm4.h **** #elif defined (__clang__)
28:Drivers/CMSIS/Include/core_cm4.h **** #pragma clang system_header /* treat file as system include file */
29:Drivers/CMSIS/Include/core_cm4.h **** #endif
ARM GAS /tmp/ccDEPnZG.s page 2
ARM GAS /tmp/ccuFAPPx.s page 2
30:Drivers/CMSIS/Include/core_cm4.h ****
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
84:Drivers/CMSIS/Include/core_cm4.h **** #else
85:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U
86:Drivers/CMSIS/Include/core_cm4.h **** #endif
ARM GAS /tmp/ccDEPnZG.s page 3
ARM GAS /tmp/ccuFAPPx.s page 3
87:Drivers/CMSIS/Include/core_cm4.h ****
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
141:Drivers/CMSIS/Include/core_cm4.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)
142:Drivers/CMSIS/Include/core_cm4.h **** #define __FPU_USED 0U
143:Drivers/CMSIS/Include/core_cm4.h **** #endif
ARM GAS /tmp/ccDEPnZG.s page 4
ARM GAS /tmp/ccuFAPPx.s page 4
144:Drivers/CMSIS/Include/core_cm4.h **** #else
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
198:Drivers/CMSIS/Include/core_cm4.h **** #define __NVIC_PRIO_BITS 3U
199:Drivers/CMSIS/Include/core_cm4.h **** #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
200:Drivers/CMSIS/Include/core_cm4.h **** #endif
ARM GAS /tmp/ccDEPnZG.s page 5
ARM GAS /tmp/ccuFAPPx.s page 5
201:Drivers/CMSIS/Include/core_cm4.h ****
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
255:Drivers/CMSIS/Include/core_cm4.h ****
256:Drivers/CMSIS/Include/core_cm4.h **** /**
257:Drivers/CMSIS/Include/core_cm4.h **** \brief Union type to access the Application Program Status Register (APSR).
ARM GAS /tmp/ccDEPnZG.s page 6
ARM GAS /tmp/ccuFAPPx.s page 6
258:Drivers/CMSIS/Include/core_cm4.h **** */
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
312:Drivers/CMSIS/Include/core_cm4.h ****
313:Drivers/CMSIS/Include/core_cm4.h **** /**
314:Drivers/CMSIS/Include/core_cm4.h **** \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
ARM GAS /tmp/ccDEPnZG.s page 7
ARM GAS /tmp/ccuFAPPx.s page 7
315:Drivers/CMSIS/Include/core_cm4.h **** */
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
369:Drivers/CMSIS/Include/core_cm4.h **** \brief Union type to access the Control Registers (CONTROL).
370:Drivers/CMSIS/Include/core_cm4.h **** */
371:Drivers/CMSIS/Include/core_cm4.h **** typedef union
ARM GAS /tmp/ccDEPnZG.s page 8
ARM GAS /tmp/ccuFAPPx.s page 8
372:Drivers/CMSIS/Include/core_cm4.h **** {
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
426:Drivers/CMSIS/Include/core_cm4.h ****
427:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of group CMSIS_NVIC */
428:Drivers/CMSIS/Include/core_cm4.h ****
ARM GAS /tmp/ccDEPnZG.s page 9
ARM GAS /tmp/ccuFAPPx.s page 9
429:Drivers/CMSIS/Include/core_cm4.h ****
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
483:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB
484:Drivers/CMSIS/Include/core_cm4.h ****
485:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB
ARM GAS /tmp/ccDEPnZG.s page 10
ARM GAS /tmp/ccuFAPPx.s page 10
486:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
540:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB
541:Drivers/CMSIS/Include/core_cm4.h ****
542:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB
ARM GAS /tmp/ccDEPnZG.s page 11
ARM GAS /tmp/ccuFAPPx.s page 11
543:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
597:Drivers/CMSIS/Include/core_cm4.h ****
598:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB
599:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB
ARM GAS /tmp/ccDEPnZG.s page 12
ARM GAS /tmp/ccuFAPPx.s page 12
600:Drivers/CMSIS/Include/core_cm4.h ****
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
654:Drivers/CMSIS/Include/core_cm4.h ****
655:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB
656:Drivers/CMSIS/Include/core_cm4.h **** #define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB
ARM GAS /tmp/ccDEPnZG.s page 13
ARM GAS /tmp/ccuFAPPx.s page 13
657:Drivers/CMSIS/Include/core_cm4.h ****
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
711:Drivers/CMSIS/Include/core_cm4.h **** \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
712:Drivers/CMSIS/Include/core_cm4.h **** \brief Type definitions for the System Control and ID Register not in the SCB
713:Drivers/CMSIS/Include/core_cm4.h **** @{
ARM GAS /tmp/ccDEPnZG.s page 14
ARM GAS /tmp/ccuFAPPx.s page 14
714:Drivers/CMSIS/Include/core_cm4.h **** */
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
768:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysT
769:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysT
770:Drivers/CMSIS/Include/core_cm4.h ****
ARM GAS /tmp/ccDEPnZG.s page 15
ARM GAS /tmp/ccuFAPPx.s page 15
771:Drivers/CMSIS/Include/core_cm4.h **** #define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysT
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
825:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED3[32U];
826:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED4[43U];
827:Drivers/CMSIS/Include/core_cm4.h **** __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
ARM GAS /tmp/ccDEPnZG.s page 16
ARM GAS /tmp/ccuFAPPx.s page 16
828:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
882:Drivers/CMSIS/Include/core_cm4.h ****
883:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_LSR_Present_Pos 0U /*!< ITM
884:Drivers/CMSIS/Include/core_cm4.h **** #define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM
ARM GAS /tmp/ccDEPnZG.s page 17
ARM GAS /tmp/ccuFAPPx.s page 17
885:Drivers/CMSIS/Include/core_cm4.h ****
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
939:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTR
940:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTR
941:Drivers/CMSIS/Include/core_cm4.h ****
ARM GAS /tmp/ccDEPnZG.s page 18
ARM GAS /tmp/ccuFAPPx.s page 18
942:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTR
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
996:Drivers/CMSIS/Include/core_cm4.h ****
997:Drivers/CMSIS/Include/core_cm4.h **** /* DWT Folded-instruction Count Register Definitions */
998:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOL
ARM GAS /tmp/ccDEPnZG.s page 19
ARM GAS /tmp/ccuFAPPx.s page 19
999:Drivers/CMSIS/Include/core_cm4.h **** #define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOL
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1053:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register *
1054:Drivers/CMSIS/Include/core_cm4.h **** uint32_t RESERVED2[131U];
1055:Drivers/CMSIS/Include/core_cm4.h **** __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Regis
ARM GAS /tmp/ccDEPnZG.s page 20
ARM GAS /tmp/ccuFAPPx.s page 20
1056:Drivers/CMSIS/Include/core_cm4.h **** __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Regi
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1110:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIF
1111:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIF
1112:Drivers/CMSIS/Include/core_cm4.h ****
ARM GAS /tmp/ccDEPnZG.s page 21
ARM GAS /tmp/ccuFAPPx.s page 21
1113:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIF
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1167:Drivers/CMSIS/Include/core_cm4.h ****
1168:Drivers/CMSIS/Include/core_cm4.h **** /* TPI DEVID Register Definitions */
1169:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEV
ARM GAS /tmp/ccDEPnZG.s page 22
ARM GAS /tmp/ccuFAPPx.s page 22
1170:Drivers/CMSIS/Include/core_cm4.h **** #define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEV
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1224:Drivers/CMSIS/Include/core_cm4.h ****
1225:Drivers/CMSIS/Include/core_cm4.h **** /* MPU Type Register Definitions */
1226:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_IREGION_Pos 16U /*!< MPU
ARM GAS /tmp/ccDEPnZG.s page 23
ARM GAS /tmp/ccuFAPPx.s page 23
1227:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1281:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_SRD_Pos 8U /*!< MPU
1282:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU
1283:Drivers/CMSIS/Include/core_cm4.h ****
ARM GAS /tmp/ccDEPnZG.s page 24
ARM GAS /tmp/ccuFAPPx.s page 24
1284:Drivers/CMSIS/Include/core_cm4.h **** #define MPU_RASR_SIZE_Pos 1U /*!< MPU
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1338:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCC
1339:Drivers/CMSIS/Include/core_cm4.h ****
1340:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCC
ARM GAS /tmp/ccDEPnZG.s page 25
ARM GAS /tmp/ccuFAPPx.s page 25
1341:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCC
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1395:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR
1396:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR
1397:Drivers/CMSIS/Include/core_cm4.h ****
ARM GAS /tmp/ccDEPnZG.s page 26
ARM GAS /tmp/ccuFAPPx.s page 26
1398:Drivers/CMSIS/Include/core_cm4.h **** /* Media and FP Feature Register 2 Definitions */
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1452:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< Core
1453:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< Core
1454:Drivers/CMSIS/Include/core_cm4.h ****
ARM GAS /tmp/ccDEPnZG.s page 27
ARM GAS /tmp/ccuFAPPx.s page 27
1455:Drivers/CMSIS/Include/core_cm4.h **** #define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< Core
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1509:Drivers/CMSIS/Include/core_cm4.h ****
1510:Drivers/CMSIS/Include/core_cm4.h ****
1511:Drivers/CMSIS/Include/core_cm4.h **** /**
ARM GAS /tmp/ccDEPnZG.s page 28
ARM GAS /tmp/ccuFAPPx.s page 28
1512:Drivers/CMSIS/Include/core_cm4.h **** \ingroup CMSIS_core_register
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1566:Drivers/CMSIS/Include/core_cm4.h **** #endif
1567:Drivers/CMSIS/Include/core_cm4.h ****
1568:Drivers/CMSIS/Include/core_cm4.h **** #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */
ARM GAS /tmp/ccDEPnZG.s page 29
ARM GAS /tmp/ccuFAPPx.s page 29
1569:Drivers/CMSIS/Include/core_cm4.h **** #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1623:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_SetVector __NVIC_SetVector
1624:Drivers/CMSIS/Include/core_cm4.h **** #define NVIC_GetVector __NVIC_GetVector
1625:Drivers/CMSIS/Include/core_cm4.h **** #endif /* (CMSIS_VECTAB_VIRTUAL) */
ARM GAS /tmp/ccDEPnZG.s page 30
ARM GAS /tmp/ccuFAPPx.s page 30
1626:Drivers/CMSIS/Include/core_cm4.h ****
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1680:Drivers/CMSIS/Include/core_cm4.h **** {
30 .loc 2 1680 1 view -0
31 .cfi_startproc
ARM GAS /tmp/ccDEPnZG.s page 31
ARM GAS /tmp/ccuFAPPx.s page 31
32 @ args = 0, pretend = 0, frame = 0
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1696:Drivers/CMSIS/Include/core_cm4.h **** \note IRQn must not be negative.
1697:Drivers/CMSIS/Include/core_cm4.h **** */
1698:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
ARM GAS /tmp/ccDEPnZG.s page 32
ARM GAS /tmp/ccuFAPPx.s page 32
1699:Drivers/CMSIS/Include/core_cm4.h **** {
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
ARM GAS /tmp/ccDEPnZG.s page 33
ARM GAS /tmp/ccuFAPPx.s page 33
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
ARM GAS /tmp/ccDEPnZG.s page 34
ARM GAS /tmp/ccuFAPPx.s page 34
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
119:Drivers/CMSIS/Include/cmsis_gcc.h ****
120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */
ARM GAS /tmp/ccDEPnZG.s page 35
ARM GAS /tmp/ccuFAPPx.s page 35
121:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
176:Drivers/CMSIS/Include/cmsis_gcc.h ****
177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE
ARM GAS /tmp/ccDEPnZG.s page 36
ARM GAS /tmp/ccuFAPPx.s page 36
178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccDEPnZG.s page 37
ARM GAS /tmp/ccuFAPPx.s page 37
235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
289:Drivers/CMSIS/Include/cmsis_gcc.h ****
290:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) );
291:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
ARM GAS /tmp/ccDEPnZG.s page 38
ARM GAS /tmp/ccuFAPPx.s page 38
292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
346:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
347:Drivers/CMSIS/Include/cmsis_gcc.h **** }
348:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccDEPnZG.s page 39
ARM GAS /tmp/ccuFAPPx.s page 39
349:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
403:Drivers/CMSIS/Include/cmsis_gcc.h ****
404:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
405:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
ARM GAS /tmp/ccDEPnZG.s page 40
ARM GAS /tmp/ccuFAPPx.s page 40
406:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure)
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
460:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure)
461:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
462:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
ARM GAS /tmp/ccDEPnZG.s page 41
ARM GAS /tmp/ccuFAPPx.s page 41
463:Drivers/CMSIS/Include/cmsis_gcc.h **** */
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
517:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
518:Drivers/CMSIS/Include/cmsis_gcc.h **** {
519:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory");
ARM GAS /tmp/ccDEPnZG.s page 42
ARM GAS /tmp/ccuFAPPx.s page 42
520:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
574:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
575:Drivers/CMSIS/Include/cmsis_gcc.h ****
576:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccDEPnZG.s page 43
ARM GAS /tmp/ccuFAPPx.s page 43
577:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
631:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
632:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure)
633:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state.
ARM GAS /tmp/ccDEPnZG.s page 44
ARM GAS /tmp/ccuFAPPx.s page 44
634:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
688:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
689:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
690:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
ARM GAS /tmp/ccDEPnZG.s page 45
ARM GAS /tmp/ccuFAPPx.s page 45
691:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
745:Drivers/CMSIS/Include/cmsis_gcc.h **** */
746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
747:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccDEPnZG.s page 46
ARM GAS /tmp/ccuFAPPx.s page 46
748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
802:Drivers/CMSIS/Include/cmsis_gcc.h ****
803:Drivers/CMSIS/Include/cmsis_gcc.h ****
804:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
ARM GAS /tmp/ccDEPnZG.s page 47
ARM GAS /tmp/ccuFAPPx.s page 47
805:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
859:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
860:Drivers/CMSIS/Include/cmsis_gcc.h **** {
861:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
ARM GAS /tmp/ccDEPnZG.s page 48
ARM GAS /tmp/ccuFAPPx.s page 48
862:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
916:Drivers/CMSIS/Include/cmsis_gcc.h **** */
917:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe")
918:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccDEPnZG.s page 49
ARM GAS /tmp/ccuFAPPx.s page 49
919:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
123 .L5:
124 .LBE39:
125 .LBE38:
ARM GAS /tmp/ccDEPnZG.s page 50
ARM GAS /tmp/ccuFAPPx.s page 50
1724:Drivers/CMSIS/Include/core_cm4.h **** }
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1762:Drivers/CMSIS/Include/core_cm4.h ****
1763:Drivers/CMSIS/Include/core_cm4.h ****
1764:Drivers/CMSIS/Include/core_cm4.h **** /**
ARM GAS /tmp/ccDEPnZG.s page 51
ARM GAS /tmp/ccuFAPPx.s page 51
1765:Drivers/CMSIS/Include/core_cm4.h **** \brief Clear Pending Interrupt
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
151 0000 0028 cmp r0, #0
152 .loc 2 1811 6 view .LVU31
153 0002 08DB blt .L10
ARM GAS /tmp/ccDEPnZG.s page 52
ARM GAS /tmp/ccuFAPPx.s page 52
1812:Drivers/CMSIS/Include/core_cm4.h **** {
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1821:Drivers/CMSIS/Include/core_cm4.h ****
1822:Drivers/CMSIS/Include/core_cm4.h **** /**
1823:Drivers/CMSIS/Include/core_cm4.h **** \brief Get Interrupt Priority
ARM GAS /tmp/ccDEPnZG.s page 53
ARM GAS /tmp/ccuFAPPx.s page 53
1824:Drivers/CMSIS/Include/core_cm4.h **** \details Reads the priority of a device specific interrupt or a processor exception.
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
236 .align 2
237 .L17:
238 0020 14ED00E0 .word -536810220
ARM GAS /tmp/ccDEPnZG.s page 54
ARM GAS /tmp/ccuFAPPx.s page 54
239 .cfi_endproc
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
274 .loc 2 1863 3 is_stmt 1 view .LVU67
275 .loc 2 1863 44 is_stmt 0 view .LVU68
276 0014 031D adds r3, r0, #4
ARM GAS /tmp/ccDEPnZG.s page 55
ARM GAS /tmp/ccuFAPPx.s page 55
277 .loc 2 1863 109 view .LVU69
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1878:Drivers/CMSIS/Include/core_cm4.h **** \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC
1879:Drivers/CMSIS/Include/core_cm4.h **** \param [in] PriorityGroup Used priority group.
1880:Drivers/CMSIS/Include/core_cm4.h **** \param [out] pPreemptPriority Preemptive priority value (starting from 0).
ARM GAS /tmp/ccDEPnZG.s page 56
ARM GAS /tmp/ccuFAPPx.s page 56
1881:Drivers/CMSIS/Include/core_cm4.h **** \param [out] pSubPriority Subpriority value (starting from 0).
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
360 .loc 2 1892 53 view .LVU94
361 0028 24EA0C04 bic r4, r4, ip
362 .loc 2 1892 21 view .LVU95
ARM GAS /tmp/ccDEPnZG.s page 57
ARM GAS /tmp/ccuFAPPx.s page 57
363 002c 1460 str r4, [r2]
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1919:Drivers/CMSIS/Include/core_cm4.h **** \param [in] IRQn Interrupt number.
1920:Drivers/CMSIS/Include/core_cm4.h **** \return Address of interrupt handler function
1921:Drivers/CMSIS/Include/core_cm4.h **** */
ARM GAS /tmp/ccDEPnZG.s page 58
ARM GAS /tmp/ccuFAPPx.s page 58
1922:Drivers/CMSIS/Include/core_cm4.h **** __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
423 .LBB42:
424 .LBI42:
944:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccDEPnZG.s page 59
ARM GAS /tmp/ccuFAPPx.s page 59
425 .loc 3 944 27 view .LVU112
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
12:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** * @attention
13:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** *
14:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** * Copyright (c) 2019 STMicroelectronics.
ARM GAS /tmp/ccDEPnZG.s page 60
ARM GAS /tmp/ccuFAPPx.s page 60
15:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** * All rights reserved.
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
69:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c ****
70:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** (+) To adjust the SysTick time base, use the following formula:
71:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c ****
ARM GAS /tmp/ccDEPnZG.s page 61
ARM GAS /tmp/ccuFAPPx.s page 61
72:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s)
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c ****
127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c ****
128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** /** @addtogroup CORTEX_Exported_Functions_Group1
ARM GAS /tmp/ccDEPnZG.s page 62
ARM GAS /tmp/ccuFAPPx.s page 62
129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** * @brief Initialization and Configuration functions
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
476 .loc 2 1650 3 view .LVU121
1651:Drivers/CMSIS/Include/core_cm4.h ****
477 .loc 2 1651 3 view .LVU122
ARM GAS /tmp/ccDEPnZG.s page 63
ARM GAS /tmp/ccuFAPPx.s page 63
1653:Drivers/CMSIS/Include/core_cm4.h **** reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to chan
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
518 .LFE329:
520 .section .text.HAL_NVIC_SetPriority,"ax",%progbits
521 .align 1
ARM GAS /tmp/ccDEPnZG.s page 64
ARM GAS /tmp/ccuFAPPx.s page 64
522 .global HAL_NVIC_SetPriority
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
551 0004 054B ldr r3, .L36
552 0006 D868 ldr r0, [r3, #12]
553 .LVL41:
ARM GAS /tmp/ccDEPnZG.s page 65
ARM GAS /tmp/ccuFAPPx.s page 65
1669:Drivers/CMSIS/Include/core_cm4.h **** }
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
594 .loc 1 208 1 is_stmt 0 view .LVU154
595 0000 08B5 push {r3, lr}
596 .LCFI3:
ARM GAS /tmp/ccDEPnZG.s page 66
ARM GAS /tmp/ccuFAPPx.s page 66
597 .cfi_def_cfa_offset 8
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
632 .LVL49:
230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** }
633 .loc 1 230 1 is_stmt 0 view .LVU162
ARM GAS /tmp/ccDEPnZG.s page 67
ARM GAS /tmp/ccuFAPPx.s page 67
634 0006 08BD pop {r3, pc}
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** {
673 .loc 1 250 1 view -0
674 .cfi_startproc
ARM GAS /tmp/ccDEPnZG.s page 68
ARM GAS /tmp/ccuFAPPx.s page 68
675 @ args = 0, pretend = 0, frame = 0
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1992:Drivers/CMSIS/Include/core_cm4.h **** /*@} end of CMSIS_Core_FpuFunctions */
1993:Drivers/CMSIS/Include/core_cm4.h ****
1994:Drivers/CMSIS/Include/core_cm4.h ****
ARM GAS /tmp/ccDEPnZG.s page 69
ARM GAS /tmp/ccuFAPPx.s page 69
1995:Drivers/CMSIS/Include/core_cm4.h ****
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
701 .loc 2 1817 5 view .LVU176
1817:Drivers/CMSIS/Include/core_cm4.h **** }
702 .loc 2 1817 46 is_stmt 0 view .LVU177
ARM GAS /tmp/ccDEPnZG.s page 70
ARM GAS /tmp/ccuFAPPx.s page 70
703 000e 054A ldr r2, .L47
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** */
256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c ****
257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** /** @addtogroup CORTEX_Exported_Functions_Group2
ARM GAS /tmp/ccDEPnZG.s page 71
ARM GAS /tmp/ccuFAPPx.s page 71
258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** * @brief Cortex control functions
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
776 .global HAL_NVIC_GetPriority
777 .syntax unified
778 .thumb
ARM GAS /tmp/ccDEPnZG.s page 72
ARM GAS /tmp/ccuFAPPx.s page 72
779 .thumb_func
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
806 0010 2146 mov r1, r4
807 0012 FFF7FEFF bl NVIC_DecodePriority
808 .LVL59:
ARM GAS /tmp/ccDEPnZG.s page 73
ARM GAS /tmp/ccuFAPPx.s page 73
310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** }
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
843 0004 00F01F02 and r2, r0, #31
1759:Drivers/CMSIS/Include/core_cm4.h **** }
844 .loc 2 1759 34 view .LVU211
ARM GAS /tmp/ccDEPnZG.s page 74
ARM GAS /tmp/ccuFAPPx.s page 74
845 0008 4009 lsrs r0, r0, #5
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
883 .loc 1 340 3 view .LVU217
341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c ****
342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** /* Return 1 if pending else 0 */
ARM GAS /tmp/ccDEPnZG.s page 75
ARM GAS /tmp/ccuFAPPx.s page 75
343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** return NVIC_GetPendingIRQ(IRQn);
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
925 .section .text.HAL_NVIC_ClearPendingIRQ,"ax",%progbits
926 .align 1
927 .global HAL_NVIC_ClearPendingIRQ
ARM GAS /tmp/ccDEPnZG.s page 76
ARM GAS /tmp/ccuFAPPx.s page 76
928 .syntax unified
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1774:Drivers/CMSIS/Include/core_cm4.h **** }
960 .loc 2 1774 43 view .LVU243
961 000e 6030 adds r0, r0, #96
ARM GAS /tmp/ccDEPnZG.s page 77
ARM GAS /tmp/ccuFAPPx.s page 77
962 0010 014A ldr r2, .L65
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1000 0000 0028 cmp r0, #0
1789:Drivers/CMSIS/Include/core_cm4.h **** {
1001 .loc 2 1789 6 view .LVU251
ARM GAS /tmp/ccDEPnZG.s page 78
ARM GAS /tmp/ccuFAPPx.s page 78
1002 0002 0BDB blt .L69
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock
381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** * @retval None
ARM GAS /tmp/ccDEPnZG.s page 79
ARM GAS /tmp/ccuFAPPx.s page 79
383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** */
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1083 .LFB343:
397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c ****
398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** /**
ARM GAS /tmp/ccDEPnZG.s page 80
ARM GAS /tmp/ccuFAPPx.s page 80
399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** * @brief Handle SYSTICK interrupt request.
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1120 .section .text.HAL_MPU_Enable,"ax",%progbits
1121 .align 1
1122 .global HAL_MPU_Enable
ARM GAS /tmp/ccDEPnZG.s page 81
ARM GAS /tmp/ccuFAPPx.s page 81
1123 .syntax unified
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1156 .loc 1 437 3 view .LVU284
1157 .LBB64:
1158 .LBI64:
ARM GAS /tmp/ccDEPnZG.s page 82
ARM GAS /tmp/ccuFAPPx.s page 82
933:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
953:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion.
954:Drivers/CMSIS/Include/cmsis_gcc.h **** */
955:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
ARM GAS /tmp/ccDEPnZG.s page 83
ARM GAS /tmp/ccuFAPPx.s page 83
1196 .loc 3 955 27 view .LVU290
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c ****
463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** /* Set the Region number */
464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** MPU->RNR = RegionNumber;
ARM GAS /tmp/ccDEPnZG.s page 84
ARM GAS /tmp/ccuFAPPx.s page 84
1237 .loc 1 464 3 view .LVU297
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1274 .loc 1 483 3 is_stmt 1 view .LVU305
1275 0006 D3F8A020 ldr r2, [r3, #160]
1276 000a 22F00102 bic r2, r2, #1
ARM GAS /tmp/ccDEPnZG.s page 85
ARM GAS /tmp/ccuFAPPx.s page 85
1277 000e C3F8A020 str r2, [r3, #160]
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** /* Set the Region number */
506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** MPU->RNR = MPU_Init->Number;
1312 .loc 1 506 3 view .LVU318
ARM GAS /tmp/ccDEPnZG.s page 86
ARM GAS /tmp/ccuFAPPx.s page 86
1313 .loc 1 506 22 is_stmt 0 view .LVU319
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1350 .loc 1 517 82 view .LVU337
1351 0038 43EA0143 orr r3, r3, r1, lsl #16
519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c **** ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
ARM GAS /tmp/ccDEPnZG.s page 87
ARM GAS /tmp/ccuFAPPx.s page 87
1352 .loc 1 519 34 view .LVU338
@@ -5193,88 +5193,88 @@ ARM GAS /tmp/ccDEPnZG.s page 1
1375 .text
1376 .Letext0:
1377 .file 4 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
1378 .file 5 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
1379 .file 6 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
1378 .file 5 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
1379 .file 6 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
1380 .file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h"
ARM GAS /tmp/ccDEPnZG.s page 88
ARM GAS /tmp/ccuFAPPx.s page 88
DEFINED SYMBOLS
*ABS*:00000000 stm32g4xx_hal_cortex.c
/tmp/ccDEPnZG.s:21 .text.__NVIC_EnableIRQ:00000000 $t
/tmp/ccDEPnZG.s:26 .text.__NVIC_EnableIRQ:00000000 __NVIC_EnableIRQ
/tmp/ccDEPnZG.s:60 .text.__NVIC_EnableIRQ:00000018 $d
/tmp/ccDEPnZG.s:65 .text.__NVIC_DisableIRQ:00000000 $t
/tmp/ccDEPnZG.s:70 .text.__NVIC_DisableIRQ:00000000 __NVIC_DisableIRQ
/tmp/ccDEPnZG.s:131 .text.__NVIC_DisableIRQ:00000020 $d
/tmp/ccDEPnZG.s:136 .text.__NVIC_SetPriority:00000000 $t
/tmp/ccDEPnZG.s:141 .text.__NVIC_SetPriority:00000000 __NVIC_SetPriority
/tmp/ccDEPnZG.s:188 .text.__NVIC_SetPriority:00000024 $d
/tmp/ccDEPnZG.s:193 .text.__NVIC_GetPriority:00000000 $t
/tmp/ccDEPnZG.s:198 .text.__NVIC_GetPriority:00000000 __NVIC_GetPriority
/tmp/ccDEPnZG.s:238 .text.__NVIC_GetPriority:00000020 $d
/tmp/ccDEPnZG.s:243 .text.NVIC_EncodePriority:00000000 $t
/tmp/ccDEPnZG.s:248 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority
/tmp/ccDEPnZG.s:310 .text.NVIC_DecodePriority:00000000 $t
/tmp/ccDEPnZG.s:315 .text.NVIC_DecodePriority:00000000 NVIC_DecodePriority
/tmp/ccDEPnZG.s:384 .text.__NVIC_SystemReset:00000000 $t
/tmp/ccDEPnZG.s:389 .text.__NVIC_SystemReset:00000000 __NVIC_SystemReset
/tmp/ccDEPnZG.s:450 .text.__NVIC_SystemReset:0000001c $d
/tmp/ccDEPnZG.s:456 .text.HAL_NVIC_SetPriorityGrouping:00000000 $t
/tmp/ccDEPnZG.s:462 .text.HAL_NVIC_SetPriorityGrouping:00000000 HAL_NVIC_SetPriorityGrouping
/tmp/ccDEPnZG.s:516 .text.HAL_NVIC_SetPriorityGrouping:00000020 $d
/tmp/ccDEPnZG.s:521 .text.HAL_NVIC_SetPriority:00000000 $t
/tmp/ccDEPnZG.s:527 .text.HAL_NVIC_SetPriority:00000000 HAL_NVIC_SetPriority
/tmp/ccDEPnZG.s:576 .text.HAL_NVIC_SetPriority:0000001c $d
/tmp/ccDEPnZG.s:581 .text.HAL_NVIC_EnableIRQ:00000000 $t
/tmp/ccDEPnZG.s:587 .text.HAL_NVIC_EnableIRQ:00000000 HAL_NVIC_EnableIRQ
/tmp/ccDEPnZG.s:610 .text.HAL_NVIC_DisableIRQ:00000000 $t
/tmp/ccDEPnZG.s:616 .text.HAL_NVIC_DisableIRQ:00000000 HAL_NVIC_DisableIRQ
/tmp/ccDEPnZG.s:639 .text.HAL_NVIC_SystemReset:00000000 $t
/tmp/ccDEPnZG.s:645 .text.HAL_NVIC_SystemReset:00000000 HAL_NVIC_SystemReset
/tmp/ccDEPnZG.s:664 .text.HAL_SYSTICK_Config:00000000 $t
/tmp/ccDEPnZG.s:670 .text.HAL_SYSTICK_Config:00000000 HAL_SYSTICK_Config
/tmp/ccDEPnZG.s:735 .text.HAL_SYSTICK_Config:00000024 $d
/tmp/ccDEPnZG.s:740 .text.HAL_NVIC_GetPriorityGrouping:00000000 $t
/tmp/ccDEPnZG.s:746 .text.HAL_NVIC_GetPriorityGrouping:00000000 HAL_NVIC_GetPriorityGrouping
/tmp/ccDEPnZG.s:770 .text.HAL_NVIC_GetPriorityGrouping:0000000c $d
/tmp/ccDEPnZG.s:775 .text.HAL_NVIC_GetPriority:00000000 $t
/tmp/ccDEPnZG.s:781 .text.HAL_NVIC_GetPriority:00000000 HAL_NVIC_GetPriority
/tmp/ccDEPnZG.s:816 .text.HAL_NVIC_SetPendingIRQ:00000000 $t
/tmp/ccDEPnZG.s:822 .text.HAL_NVIC_SetPendingIRQ:00000000 HAL_NVIC_SetPendingIRQ
/tmp/ccDEPnZG.s:864 .text.HAL_NVIC_SetPendingIRQ:00000018 $d
/tmp/ccDEPnZG.s:869 .text.HAL_NVIC_GetPendingIRQ:00000000 $t
/tmp/ccDEPnZG.s:875 .text.HAL_NVIC_GetPendingIRQ:00000000 HAL_NVIC_GetPendingIRQ
/tmp/ccDEPnZG.s:921 .text.HAL_NVIC_GetPendingIRQ:00000020 $d
/tmp/ccDEPnZG.s:926 .text.HAL_NVIC_ClearPendingIRQ:00000000 $t
/tmp/ccDEPnZG.s:932 .text.HAL_NVIC_ClearPendingIRQ:00000000 HAL_NVIC_ClearPendingIRQ
/tmp/ccDEPnZG.s:974 .text.HAL_NVIC_ClearPendingIRQ:00000018 $d
/tmp/ccDEPnZG.s:979 .text.HAL_NVIC_GetActive:00000000 $t
/tmp/ccDEPnZG.s:985 .text.HAL_NVIC_GetActive:00000000 HAL_NVIC_GetActive
/tmp/ccDEPnZG.s:1030 .text.HAL_NVIC_GetActive:00000020 $d
/tmp/ccDEPnZG.s:1035 .text.HAL_SYSTICK_CLKSourceConfig:00000000 $t
/tmp/ccDEPnZG.s:1041 .text.HAL_SYSTICK_CLKSourceConfig:00000000 HAL_SYSTICK_CLKSourceConfig
/tmp/ccDEPnZG.s:1076 .text.HAL_SYSTICK_Callback:00000000 $t
/tmp/ccDEPnZG.s:1082 .text.HAL_SYSTICK_Callback:00000000 HAL_SYSTICK_Callback
ARM GAS /tmp/ccDEPnZG.s page 89
/tmp/ccuFAPPx.s:21 .text.__NVIC_EnableIRQ:00000000 $t
/tmp/ccuFAPPx.s:26 .text.__NVIC_EnableIRQ:00000000 __NVIC_EnableIRQ
/tmp/ccuFAPPx.s:60 .text.__NVIC_EnableIRQ:00000018 $d
/tmp/ccuFAPPx.s:65 .text.__NVIC_DisableIRQ:00000000 $t
/tmp/ccuFAPPx.s:70 .text.__NVIC_DisableIRQ:00000000 __NVIC_DisableIRQ
/tmp/ccuFAPPx.s:131 .text.__NVIC_DisableIRQ:00000020 $d
/tmp/ccuFAPPx.s:136 .text.__NVIC_SetPriority:00000000 $t
/tmp/ccuFAPPx.s:141 .text.__NVIC_SetPriority:00000000 __NVIC_SetPriority
/tmp/ccuFAPPx.s:188 .text.__NVIC_SetPriority:00000024 $d
/tmp/ccuFAPPx.s:193 .text.__NVIC_GetPriority:00000000 $t
/tmp/ccuFAPPx.s:198 .text.__NVIC_GetPriority:00000000 __NVIC_GetPriority
/tmp/ccuFAPPx.s:238 .text.__NVIC_GetPriority:00000020 $d
/tmp/ccuFAPPx.s:243 .text.NVIC_EncodePriority:00000000 $t
/tmp/ccuFAPPx.s:248 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority
/tmp/ccuFAPPx.s:310 .text.NVIC_DecodePriority:00000000 $t
/tmp/ccuFAPPx.s:315 .text.NVIC_DecodePriority:00000000 NVIC_DecodePriority
/tmp/ccuFAPPx.s:384 .text.__NVIC_SystemReset:00000000 $t
/tmp/ccuFAPPx.s:389 .text.__NVIC_SystemReset:00000000 __NVIC_SystemReset
/tmp/ccuFAPPx.s:450 .text.__NVIC_SystemReset:0000001c $d
/tmp/ccuFAPPx.s:456 .text.HAL_NVIC_SetPriorityGrouping:00000000 $t
/tmp/ccuFAPPx.s:462 .text.HAL_NVIC_SetPriorityGrouping:00000000 HAL_NVIC_SetPriorityGrouping
/tmp/ccuFAPPx.s:516 .text.HAL_NVIC_SetPriorityGrouping:00000020 $d
/tmp/ccuFAPPx.s:521 .text.HAL_NVIC_SetPriority:00000000 $t
/tmp/ccuFAPPx.s:527 .text.HAL_NVIC_SetPriority:00000000 HAL_NVIC_SetPriority
/tmp/ccuFAPPx.s:576 .text.HAL_NVIC_SetPriority:0000001c $d
/tmp/ccuFAPPx.s:581 .text.HAL_NVIC_EnableIRQ:00000000 $t
/tmp/ccuFAPPx.s:587 .text.HAL_NVIC_EnableIRQ:00000000 HAL_NVIC_EnableIRQ
/tmp/ccuFAPPx.s:610 .text.HAL_NVIC_DisableIRQ:00000000 $t
/tmp/ccuFAPPx.s:616 .text.HAL_NVIC_DisableIRQ:00000000 HAL_NVIC_DisableIRQ
/tmp/ccuFAPPx.s:639 .text.HAL_NVIC_SystemReset:00000000 $t
/tmp/ccuFAPPx.s:645 .text.HAL_NVIC_SystemReset:00000000 HAL_NVIC_SystemReset
/tmp/ccuFAPPx.s:664 .text.HAL_SYSTICK_Config:00000000 $t
/tmp/ccuFAPPx.s:670 .text.HAL_SYSTICK_Config:00000000 HAL_SYSTICK_Config
/tmp/ccuFAPPx.s:735 .text.HAL_SYSTICK_Config:00000024 $d
/tmp/ccuFAPPx.s:740 .text.HAL_NVIC_GetPriorityGrouping:00000000 $t
/tmp/ccuFAPPx.s:746 .text.HAL_NVIC_GetPriorityGrouping:00000000 HAL_NVIC_GetPriorityGrouping
/tmp/ccuFAPPx.s:770 .text.HAL_NVIC_GetPriorityGrouping:0000000c $d
/tmp/ccuFAPPx.s:775 .text.HAL_NVIC_GetPriority:00000000 $t
/tmp/ccuFAPPx.s:781 .text.HAL_NVIC_GetPriority:00000000 HAL_NVIC_GetPriority
/tmp/ccuFAPPx.s:816 .text.HAL_NVIC_SetPendingIRQ:00000000 $t
/tmp/ccuFAPPx.s:822 .text.HAL_NVIC_SetPendingIRQ:00000000 HAL_NVIC_SetPendingIRQ
/tmp/ccuFAPPx.s:864 .text.HAL_NVIC_SetPendingIRQ:00000018 $d
/tmp/ccuFAPPx.s:869 .text.HAL_NVIC_GetPendingIRQ:00000000 $t
/tmp/ccuFAPPx.s:875 .text.HAL_NVIC_GetPendingIRQ:00000000 HAL_NVIC_GetPendingIRQ
/tmp/ccuFAPPx.s:921 .text.HAL_NVIC_GetPendingIRQ:00000020 $d
/tmp/ccuFAPPx.s:926 .text.HAL_NVIC_ClearPendingIRQ:00000000 $t
/tmp/ccuFAPPx.s:932 .text.HAL_NVIC_ClearPendingIRQ:00000000 HAL_NVIC_ClearPendingIRQ
/tmp/ccuFAPPx.s:974 .text.HAL_NVIC_ClearPendingIRQ:00000018 $d
/tmp/ccuFAPPx.s:979 .text.HAL_NVIC_GetActive:00000000 $t
/tmp/ccuFAPPx.s:985 .text.HAL_NVIC_GetActive:00000000 HAL_NVIC_GetActive
/tmp/ccuFAPPx.s:1030 .text.HAL_NVIC_GetActive:00000020 $d
/tmp/ccuFAPPx.s:1035 .text.HAL_SYSTICK_CLKSourceConfig:00000000 $t
/tmp/ccuFAPPx.s:1041 .text.HAL_SYSTICK_CLKSourceConfig:00000000 HAL_SYSTICK_CLKSourceConfig
/tmp/ccuFAPPx.s:1076 .text.HAL_SYSTICK_Callback:00000000 $t
/tmp/ccuFAPPx.s:1082 .text.HAL_SYSTICK_Callback:00000000 HAL_SYSTICK_Callback
ARM GAS /tmp/ccuFAPPx.s page 89
/tmp/ccDEPnZG.s:1095 .text.HAL_SYSTICK_IRQHandler:00000000 $t
/tmp/ccDEPnZG.s:1101 .text.HAL_SYSTICK_IRQHandler:00000000 HAL_SYSTICK_IRQHandler
/tmp/ccDEPnZG.s:1121 .text.HAL_MPU_Enable:00000000 $t
/tmp/ccDEPnZG.s:1127 .text.HAL_MPU_Enable:00000000 HAL_MPU_Enable
/tmp/ccDEPnZG.s:1175 .text.HAL_MPU_Enable:00000014 $d
/tmp/ccDEPnZG.s:1180 .text.HAL_MPU_Disable:00000000 $t
/tmp/ccDEPnZG.s:1186 .text.HAL_MPU_Disable:00000000 HAL_MPU_Disable
/tmp/ccDEPnZG.s:1217 .text.HAL_MPU_Disable:00000010 $d
/tmp/ccDEPnZG.s:1222 .text.HAL_MPU_EnableRegion:00000000 $t
/tmp/ccDEPnZG.s:1228 .text.HAL_MPU_EnableRegion:00000000 HAL_MPU_EnableRegion
/tmp/ccDEPnZG.s:1250 .text.HAL_MPU_EnableRegion:00000014 $d
/tmp/ccDEPnZG.s:1255 .text.HAL_MPU_DisableRegion:00000000 $t
/tmp/ccDEPnZG.s:1261 .text.HAL_MPU_DisableRegion:00000000 HAL_MPU_DisableRegion
/tmp/ccDEPnZG.s:1283 .text.HAL_MPU_DisableRegion:00000014 $d
/tmp/ccDEPnZG.s:1288 .text.HAL_MPU_ConfigRegion:00000000 $t
/tmp/ccDEPnZG.s:1294 .text.HAL_MPU_ConfigRegion:00000000 HAL_MPU_ConfigRegion
/tmp/ccDEPnZG.s:1371 .text.HAL_MPU_ConfigRegion:00000054 $d
/tmp/ccuFAPPx.s:1095 .text.HAL_SYSTICK_IRQHandler:00000000 $t
/tmp/ccuFAPPx.s:1101 .text.HAL_SYSTICK_IRQHandler:00000000 HAL_SYSTICK_IRQHandler
/tmp/ccuFAPPx.s:1121 .text.HAL_MPU_Enable:00000000 $t
/tmp/ccuFAPPx.s:1127 .text.HAL_MPU_Enable:00000000 HAL_MPU_Enable
/tmp/ccuFAPPx.s:1175 .text.HAL_MPU_Enable:00000014 $d
/tmp/ccuFAPPx.s:1180 .text.HAL_MPU_Disable:00000000 $t
/tmp/ccuFAPPx.s:1186 .text.HAL_MPU_Disable:00000000 HAL_MPU_Disable
/tmp/ccuFAPPx.s:1217 .text.HAL_MPU_Disable:00000010 $d
/tmp/ccuFAPPx.s:1222 .text.HAL_MPU_EnableRegion:00000000 $t
/tmp/ccuFAPPx.s:1228 .text.HAL_MPU_EnableRegion:00000000 HAL_MPU_EnableRegion
/tmp/ccuFAPPx.s:1250 .text.HAL_MPU_EnableRegion:00000014 $d
/tmp/ccuFAPPx.s:1255 .text.HAL_MPU_DisableRegion:00000000 $t
/tmp/ccuFAPPx.s:1261 .text.HAL_MPU_DisableRegion:00000000 HAL_MPU_DisableRegion
/tmp/ccuFAPPx.s:1283 .text.HAL_MPU_DisableRegion:00000014 $d
/tmp/ccuFAPPx.s:1288 .text.HAL_MPU_ConfigRegion:00000000 $t
/tmp/ccuFAPPx.s:1294 .text.HAL_MPU_ConfigRegion:00000000 HAL_MPU_ConfigRegion
/tmp/ccuFAPPx.s:1371 .text.HAL_MPU_ConfigRegion:00000054 $d
NO UNDEFINED SYMBOLS
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squeow_sw/build/stm32g4xx_hal_dma.lst
+1389 -1399
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squeow_sw/build/stm32g4xx_hal_dma_ex.lst
+389 -389
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squeow_sw/build/stm32g4xx_hal_exti.lst
+59 -59
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@@ -1,4 +1,4 @@
ARM GAS /tmp/ccXNCPlv.s page 1
ARM GAS /tmp/ccLeczU6.s page 1
1 .cpu cortex-m4
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
27:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** [..]
28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** (+) Each Exti line can be configured within this driver.
29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c ****
ARM GAS /tmp/ccXNCPlv.s page 2
ARM GAS /tmp/ccLeczU6.s page 2
30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** (+) Exti line can be configured in 3 different modes
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
84:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** */
85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c ****
86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** /* Includes ------------------------------------------------------------------*/
ARM GAS /tmp/ccXNCPlv.s page 3
ARM GAS /tmp/ccLeczU6.s page 3
87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** #include "stm32g4xx_hal.h"
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** * @param pExtiConfig Pointer on EXTI configuration to be set.
142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** * @retval HAL Status.
143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** */
ARM GAS /tmp/ccXNCPlv.s page 4
ARM GAS /tmp/ccLeczU6.s page 4
144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** /* Compute line register offset */
166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT);
62 .loc 1 166 3 is_stmt 1 view .LVU15
ARM GAS /tmp/ccXNCPlv.s page 5
ARM GAS /tmp/ccLeczU6.s page 5
63 .loc 1 166 10 is_stmt 0 view .LVU16
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
99 .loc 1 184 14 is_stmt 0 view .LVU34
100 0032 0543 orrs r5, r5, r0
101 .LVL7:
ARM GAS /tmp/ccXNCPlv.s page 6
ARM GAS /tmp/ccLeczU6.s page 6
102 .L5:
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
128 .loc 1 212 28 is_stmt 0 view .LVU48
129 004c 0D68 ldr r5, [r1]
130 .LVL11:
ARM GAS /tmp/ccXNCPlv.s page 7
ARM GAS /tmp/ccLeczU6.s page 7
131 .loc 1 212 28 view .LVU49
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c ****
238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** /* Store interrupt mode */
239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** *regaddr = regval;
ARM GAS /tmp/ccXNCPlv.s page 8
ARM GAS /tmp/ccLeczU6.s page 8
161 .loc 1 239 3 is_stmt 1 view .LVU60
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
195 .cfi_restore 7
196 .cfi_restore 6
197 .cfi_restore 5
ARM GAS /tmp/ccXNCPlv.s page 9
ARM GAS /tmp/ccLeczU6.s page 9
198 .cfi_restore 4
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
238 .loc 1 218 69 view .LVU90
239 00a0 9200 lsls r2, r2, #2
218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
ARM GAS /tmp/ccXNCPlv.s page 10
ARM GAS /tmp/ccLeczU6.s page 10
240 .loc 1 218 40 view .LVU91
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
281 .cfi_restore 7
155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** }
282 .loc 1 155 12 view .LVU105
ARM GAS /tmp/ccXNCPlv.s page 11
ARM GAS /tmp/ccLeczU6.s page 11
283 00c2 0120 movs r0, #1
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
322 .loc 1 274 3 view .LVU114
275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c ****
276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** /* Check null pointer */
ARM GAS /tmp/ccXNCPlv.s page 12
ARM GAS /tmp/ccLeczU6.s page 12
277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** if ((hexti == NULL) || (pExtiConfig == NULL))
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
356 .loc 1 296 26 is_stmt 0 view .LVU130
357 001c 4001 lsls r0, r0, #5
358 .LVL46:
ARM GAS /tmp/ccXNCPlv.s page 13
ARM GAS /tmp/ccLeczU6.s page 13
359 .loc 1 296 11 view .LVU131
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
393 .LVL52:
394 .loc 1 316 23 view .LVU147
395 003c 44F00204 orr r4, r4, #2
ARM GAS /tmp/ccXNCPlv.s page 14
ARM GAS /tmp/ccLeczU6.s page 14
396 0040 4C60 str r4, [r1, #4]
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
430 005a 164C ldr r4, .L37+8
431 .LVL56:
337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** regval = *regaddr;
ARM GAS /tmp/ccXNCPlv.s page 15
ARM GAS /tmp/ccLeczU6.s page 15
432 .loc 1 337 5 is_stmt 1 view .LVU165
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
465 .loc 1 306 23 view .LVU179
466 007a 4C60 str r4, [r1, #4]
467 007c D9E7 b .L24
ARM GAS /tmp/ccXNCPlv.s page 16
ARM GAS /tmp/ccLeczU6.s page 16
468 .LVL62:
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** }
509 .loc 1 279 12 view .LVU194
510 00a2 0120 movs r0, #1
ARM GAS /tmp/ccXNCPlv.s page 17
ARM GAS /tmp/ccLeczU6.s page 17
511 .LVL69:
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** uint32_t maskline;
553 .loc 1 369 3 view .LVU202
370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** uint32_t offset;
ARM GAS /tmp/ccXNCPlv.s page 18
ARM GAS /tmp/ccLeczU6.s page 18
554 .loc 1 370 3 view .LVU203
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
588 001a 03F18041 add r1, r3, #1073741824
589 001e 01F58231 add r1, r1, #66560
590 .LVL77:
ARM GAS /tmp/ccXNCPlv.s page 19
ARM GAS /tmp/ccLeczU6.s page 19
390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** regval = (*regaddr & ~maskline);
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
632 0044 2A40 ands r2, r2, r5
633 .LVL85:
403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** *regaddr = regval;
ARM GAS /tmp/ccXNCPlv.s page 20
ARM GAS /tmp/ccLeczU6.s page 20
634 .loc 1 403 5 is_stmt 1 view .LVU239
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
668 .LVL90:
414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
669 .loc 1 414 14 view .LVU256
ARM GAS /tmp/ccXNCPlv.s page 21
ARM GAS /tmp/ccLeczU6.s page 21
670 0066 0D49 ldr r1, .L49+12
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
714 .L40:
715 .loc 1 421 1 view .LVU268
716 008c 30BD pop {r4, r5, pc}
ARM GAS /tmp/ccXNCPlv.s page 22
ARM GAS /tmp/ccLeczU6.s page 22
717 .L50:
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c ****
750 .loc 1 434 21 is_stmt 0 view .LVU276
751 0004 0846 mov r0, r1
ARM GAS /tmp/ccXNCPlv.s page 23
ARM GAS /tmp/ccLeczU6.s page 23
752 .LVL99:
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
787 @ link register save eliminated.
465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** /* Check the parameters */
466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** assert_param(IS_EXTI_LINE(ExtiLine));
ARM GAS /tmp/ccXNCPlv.s page 24
ARM GAS /tmp/ccLeczU6.s page 24
788 .loc 1 466 3 view .LVU286
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** *
490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** @verbatim
491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** ===============================================================================
ARM GAS /tmp/ccXNCPlv.s page 25
ARM GAS /tmp/ccLeczU6.s page 25
492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** ##### IO operation functions #####
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
849 .loc 1 517 25 is_stmt 0 view .LVU309
850 0010 5301 lsls r3, r2, #5
851 .loc 1 517 11 view .LVU310
ARM GAS /tmp/ccXNCPlv.s page 26
ARM GAS /tmp/ccLeczU6.s page 26
852 0012 044A ldr r2, .L60
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
894 .LVL115:
895 .LFB335:
532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c ****
ARM GAS /tmp/ccXNCPlv.s page 27
ARM GAS /tmp/ccLeczU6.s page 27
533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** /**
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** /* Get pending bit */
560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** regaddr = (&EXTI->PR1 + (EXTI_CONFIG_OFFSET * offset));
924 .loc 1 560 3 is_stmt 1 view .LVU339
ARM GAS /tmp/ccXNCPlv.s page 28
ARM GAS /tmp/ccLeczU6.s page 28
925 .loc 1 560 25 is_stmt 0 view .LVU340
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** __IO uint32_t *regaddr;
966 .loc 1 576 3 view .LVU349
577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c **** uint32_t maskline;
ARM GAS /tmp/ccXNCPlv.s page 29
ARM GAS /tmp/ccLeczU6.s page 29
967 .loc 1 577 3 view .LVU350
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
1003 .cfi_endproc
1004 .LFE336:
1006 .section .text.HAL_EXTI_GenerateSWI,"ax",%progbits
ARM GAS /tmp/ccXNCPlv.s page 30
ARM GAS /tmp/ccLeczU6.s page 30
1007 .align 1
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccXNCPlv.s page 1
1039 .loc 1 618 3 is_stmt 1 view .LVU380
1040 .loc 1 618 28 is_stmt 0 view .LVU381
1041 000e 5301 lsls r3, r2, #5
ARM GAS /tmp/ccXNCPlv.s page 31
ARM GAS /tmp/ccLeczU6.s page 31
1042 .loc 1 618 11 view .LVU382
@@ -1820,40 +1820,40 @@ ARM GAS /tmp/ccXNCPlv.s page 1
1056 .LFE337:
1058 .text
1059 .Letext0:
1060 .file 2 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
1061 .file 3 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
1060 .file 2 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
1061 .file 3 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
1062 .file 4 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
1063 .file 5 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
1064 .file 6 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h"
ARM GAS /tmp/ccXNCPlv.s page 32
ARM GAS /tmp/ccLeczU6.s page 32
DEFINED SYMBOLS
*ABS*:00000000 stm32g4xx_hal_exti.c
/tmp/ccXNCPlv.s:21 .text.HAL_EXTI_SetConfigLine:00000000 $t
/tmp/ccXNCPlv.s:27 .text.HAL_EXTI_SetConfigLine:00000000 HAL_EXTI_SetConfigLine
/tmp/ccXNCPlv.s:297 .text.HAL_EXTI_SetConfigLine:000000cc $d
/tmp/ccXNCPlv.s:305 .text.HAL_EXTI_GetConfigLine:00000000 $t
/tmp/ccXNCPlv.s:311 .text.HAL_EXTI_GetConfigLine:00000000 HAL_EXTI_GetConfigLine
/tmp/ccXNCPlv.s:529 .text.HAL_EXTI_GetConfigLine:000000ac $d
/tmp/ccXNCPlv.s:537 .text.HAL_EXTI_ClearConfigLine:00000000 $t
/tmp/ccXNCPlv.s:543 .text.HAL_EXTI_ClearConfigLine:00000000 HAL_EXTI_ClearConfigLine
/tmp/ccXNCPlv.s:720 .text.HAL_EXTI_ClearConfigLine:00000090 $d
/tmp/ccXNCPlv.s:728 .text.HAL_EXTI_RegisterCallback:00000000 $t
/tmp/ccXNCPlv.s:734 .text.HAL_EXTI_RegisterCallback:00000000 HAL_EXTI_RegisterCallback
/tmp/ccXNCPlv.s:774 .text.HAL_EXTI_GetHandle:00000000 $t
/tmp/ccXNCPlv.s:780 .text.HAL_EXTI_GetHandle:00000000 HAL_EXTI_GetHandle
/tmp/ccXNCPlv.s:812 .text.HAL_EXTI_IRQHandler:00000000 $t
/tmp/ccXNCPlv.s:818 .text.HAL_EXTI_IRQHandler:00000000 HAL_EXTI_IRQHandler
/tmp/ccXNCPlv.s:882 .text.HAL_EXTI_IRQHandler:00000024 $d
/tmp/ccXNCPlv.s:887 .text.HAL_EXTI_GetPending:00000000 $t
/tmp/ccXNCPlv.s:893 .text.HAL_EXTI_GetPending:00000000 HAL_EXTI_GetPending
/tmp/ccXNCPlv.s:947 .text.HAL_EXTI_GetPending:0000001c $d
/tmp/ccXNCPlv.s:952 .text.HAL_EXTI_ClearPending:00000000 $t
/tmp/ccXNCPlv.s:958 .text.HAL_EXTI_ClearPending:00000000 HAL_EXTI_ClearPending
/tmp/ccXNCPlv.s:1002 .text.HAL_EXTI_ClearPending:00000018 $d
/tmp/ccXNCPlv.s:1007 .text.HAL_EXTI_GenerateSWI:00000000 $t
/tmp/ccXNCPlv.s:1013 .text.HAL_EXTI_GenerateSWI:00000000 HAL_EXTI_GenerateSWI
/tmp/ccXNCPlv.s:1054 .text.HAL_EXTI_GenerateSWI:00000018 $d
/tmp/ccLeczU6.s:21 .text.HAL_EXTI_SetConfigLine:00000000 $t
/tmp/ccLeczU6.s:27 .text.HAL_EXTI_SetConfigLine:00000000 HAL_EXTI_SetConfigLine
/tmp/ccLeczU6.s:297 .text.HAL_EXTI_SetConfigLine:000000cc $d
/tmp/ccLeczU6.s:305 .text.HAL_EXTI_GetConfigLine:00000000 $t
/tmp/ccLeczU6.s:311 .text.HAL_EXTI_GetConfigLine:00000000 HAL_EXTI_GetConfigLine
/tmp/ccLeczU6.s:529 .text.HAL_EXTI_GetConfigLine:000000ac $d
/tmp/ccLeczU6.s:537 .text.HAL_EXTI_ClearConfigLine:00000000 $t
/tmp/ccLeczU6.s:543 .text.HAL_EXTI_ClearConfigLine:00000000 HAL_EXTI_ClearConfigLine
/tmp/ccLeczU6.s:720 .text.HAL_EXTI_ClearConfigLine:00000090 $d
/tmp/ccLeczU6.s:728 .text.HAL_EXTI_RegisterCallback:00000000 $t
/tmp/ccLeczU6.s:734 .text.HAL_EXTI_RegisterCallback:00000000 HAL_EXTI_RegisterCallback
/tmp/ccLeczU6.s:774 .text.HAL_EXTI_GetHandle:00000000 $t
/tmp/ccLeczU6.s:780 .text.HAL_EXTI_GetHandle:00000000 HAL_EXTI_GetHandle
/tmp/ccLeczU6.s:812 .text.HAL_EXTI_IRQHandler:00000000 $t
/tmp/ccLeczU6.s:818 .text.HAL_EXTI_IRQHandler:00000000 HAL_EXTI_IRQHandler
/tmp/ccLeczU6.s:882 .text.HAL_EXTI_IRQHandler:00000024 $d
/tmp/ccLeczU6.s:887 .text.HAL_EXTI_GetPending:00000000 $t
/tmp/ccLeczU6.s:893 .text.HAL_EXTI_GetPending:00000000 HAL_EXTI_GetPending
/tmp/ccLeczU6.s:947 .text.HAL_EXTI_GetPending:0000001c $d
/tmp/ccLeczU6.s:952 .text.HAL_EXTI_ClearPending:00000000 $t
/tmp/ccLeczU6.s:958 .text.HAL_EXTI_ClearPending:00000000 HAL_EXTI_ClearPending
/tmp/ccLeczU6.s:1002 .text.HAL_EXTI_ClearPending:00000018 $d
/tmp/ccLeczU6.s:1007 .text.HAL_EXTI_GenerateSWI:00000000 $t
/tmp/ccLeczU6.s:1013 .text.HAL_EXTI_GenerateSWI:00000000 HAL_EXTI_GenerateSWI
/tmp/ccLeczU6.s:1054 .text.HAL_EXTI_GenerateSWI:00000018 $d
NO UNDEFINED SYMBOLS
squeow_sw/build/stm32g4xx_hal_exti.o
BIN
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squeow_sw/build/stm32g4xx_hal_flash.lst
+1145 -1147
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squeow_sw/build/stm32g4xx_hal_flash.o
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squeow_sw/build/stm32g4xx_hal_flash_ex.lst
+1689 -1696
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squeow_sw/build/stm32g4xx_hal_flash_ex.o
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squeow_sw/build/stm32g4xx_hal_flash_ramfunc.lst
+13 -13
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@@ -1,4 +1,4 @@
ARM GAS /tmp/ccrFjpCU.s page 1
ARM GAS /tmp/cc0Ul7iw.s page 1
1 .cpu cortex-m4
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccrFjpCU.s page 1
28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c **** [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c ****
30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c **** *** GNU Compiler ***
ARM GAS /tmp/ccrFjpCU.s page 2
ARM GAS /tmp/cc0Ul7iw.s page 2
31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c **** --------------------
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccrFjpCU.s page 1
85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c **** */
86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c ****
87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c **** /**
ARM GAS /tmp/ccrFjpCU.s page 3
ARM GAS /tmp/cc0Ul7iw.s page 3
88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c **** * @brief Enable the Power down in Run Mode
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccrFjpCU.s page 1
105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c **** */
106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c **** __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void)
107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c **** {
ARM GAS /tmp/ccrFjpCU.s page 4
ARM GAS /tmp/cc0Ul7iw.s page 4
68 .loc 1 107 1 is_stmt 1 view -0
@@ -218,20 +218,20 @@ ARM GAS /tmp/ccrFjpCU.s page 1
97 .LFE330:
99 .text
100 .Letext0:
101 .file 2 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
102 .file 3 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
101 .file 2 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
102 .file 3 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
103 .file 4 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
104 .file 5 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
ARM GAS /tmp/ccrFjpCU.s page 5
ARM GAS /tmp/cc0Ul7iw.s page 5
DEFINED SYMBOLS
*ABS*:00000000 stm32g4xx_hal_flash_ramfunc.c
/tmp/ccrFjpCU.s:21 .RamFunc:00000000 $t
/tmp/ccrFjpCU.s:27 .RamFunc:00000000 HAL_FLASHEx_EnableRunPowerDown
/tmp/ccrFjpCU.s:54 .RamFunc:00000018 $d
/tmp/ccrFjpCU.s:60 .RamFunc:00000024 $t
/tmp/ccrFjpCU.s:66 .RamFunc:00000024 HAL_FLASHEx_DisableRunPowerDown
/tmp/ccrFjpCU.s:93 .RamFunc:0000003c $d
/tmp/cc0Ul7iw.s:21 .RamFunc:00000000 $t
/tmp/cc0Ul7iw.s:27 .RamFunc:00000000 HAL_FLASHEx_EnableRunPowerDown
/tmp/cc0Ul7iw.s:54 .RamFunc:00000018 $d
/tmp/cc0Ul7iw.s:60 .RamFunc:00000024 $t
/tmp/cc0Ul7iw.s:66 .RamFunc:00000024 HAL_FLASHEx_DisableRunPowerDown
/tmp/cc0Ul7iw.s:93 .RamFunc:0000003c $d
NO UNDEFINED SYMBOLS
squeow_sw/build/stm32g4xx_hal_flash_ramfunc.o
BIN
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squeow_sw/build/stm32g4xx_hal_gpio.lst
+51 -51
View File
@@ -1,4 +1,4 @@
ARM GAS /tmp/ccpK9PRu.s page 1
ARM GAS /tmp/ccy7u3l1.s page 1
1 .cpu cortex-m4
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
27:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually
28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** configured by software in several modes:
29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** (++) Input mode
ARM GAS /tmp/ccpK9PRu.s page 2
ARM GAS /tmp/ccy7u3l1.s page 2
30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** (++) Analog mode
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
84:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** (#) To set/reset the level of a pin configured in output mode use
85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c ****
ARM GAS /tmp/ccpK9PRu.s page 3
ARM GAS /tmp/ccy7u3l1.s page 3
87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** */
142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c ****
143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions
ARM GAS /tmp/ccpK9PRu.s page 4
ARM GAS /tmp/ccy7u3l1.s page 4
144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** * @brief Initialization and Configuration functions
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
53 .loc 1 174 3 view .LVU8
164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** uint32_t iocurrent;
54 .loc 1 164 12 is_stmt 0 view .LVU9
ARM GAS /tmp/ccpK9PRu.s page 5
ARM GAS /tmp/ccy7u3l1.s page 5
55 0004 0023 movs r3, #0
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
88 .LVL6:
196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** temp &= ~(GPIO_OTYPER_OT0 << position) ;
89 .loc 1 196 9 is_stmt 1 view .LVU26
ARM GAS /tmp/ccpK9PRu.s page 6
ARM GAS /tmp/ccy7u3l1.s page 6
90 .loc 1 196 14 is_stmt 0 view .LVU27
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
118 .loc 1 222 9 is_stmt 1 view .LVU40
119 .loc 1 222 38 is_stmt 0 view .LVU41
120 0038 03F0070C and ip, r3, #7
ARM GAS /tmp/ccpK9PRu.s page 7
ARM GAS /tmp/ccy7u3l1.s page 7
121 .loc 1 222 47 view .LVU42
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2U] = temp;
155 .loc 1 243 9 is_stmt 1 view .LVU55
156 .loc 1 243 40 is_stmt 0 view .LVU56
ARM GAS /tmp/ccpK9PRu.s page 8
ARM GAS /tmp/ccy7u3l1.s page 8
157 0068 0CF1020C add ip, ip, #2
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
198 0094 17F4001F tst r7, #2097152
199 0098 01D0 beq .L9
257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** {
ARM GAS /tmp/ccpK9PRu.s page 9
ARM GAS /tmp/ccy7u3l1.s page 9
258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** temp |= iocurrent;
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** if ((GPIO_Init->Mode & EXTI_IT) != 0x00U)
239 .loc 1 273 9 is_stmt 1 view .LVU93
240 .loc 1 273 23 is_stmt 0 view .LVU94
ARM GAS /tmp/ccpK9PRu.s page 10
ARM GAS /tmp/ccy7u3l1.s page 10
241 00bc 4E68 ldr r6, [r1, #4]
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
279 00e2 F3D0 beq .L3
183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
280 .loc 1 183 7 is_stmt 1 view .LVU111
ARM GAS /tmp/ccpK9PRu.s page 11
ARM GAS /tmp/ccy7u3l1.s page 11
183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
317 010c AC40 lsls r4, r4, r5
209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** GPIOx->PUPDR = temp;
318 .loc 1 209 14 view .LVU130
ARM GAS /tmp/ccpK9PRu.s page 12
ARM GAS /tmp/ccy7u3l1.s page 12
319 010e 44EA0C04 orr r4, r4, ip
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
356 013a 44EA0C04 orr r4, r4, ip
357 .LVL39:
231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c ****
ARM GAS /tmp/ccpK9PRu.s page 13
ARM GAS /tmp/ccy7u3l1.s page 13
358 .loc 1 231 7 is_stmt 1 view .LVU148
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
396 .loc 1 241 33 view .LVU164
397 016e 4FEA8E0E lsl lr, lr, #2
241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U)));
ARM GAS /tmp/ccpK9PRu.s page 14
ARM GAS /tmp/ccy7u3l1.s page 14
398 .loc 1 241 26 view .LVU165
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
440 .loc 1 242 18 discriminator 8 view .LVU177
441 01b8 0324 movs r4, #3
442 01ba 52E7 b .L7
ARM GAS /tmp/ccpK9PRu.s page 15
ARM GAS /tmp/ccy7u3l1.s page 15
443 .L17:
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** /* Check the parameters */
299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
482 .loc 1 299 3 view .LVU184
ARM GAS /tmp/ccpK9PRu.s page 16
ARM GAS /tmp/ccy7u3l1.s page 16
300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin));
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** EXTI->IMR1 &= ~(iocurrent);
319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** EXTI->EMR1 &= ~(iocurrent);
320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c ****
ARM GAS /tmp/ccpK9PRu.s page 17
ARM GAS /tmp/ccy7u3l1.s page 17
321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
551 0054 4468 ldr r4, [r0, #4]
552 .loc 1 340 22 view .LVU210
553 0056 24EA0202 bic r2, r4, r2
ARM GAS /tmp/ccpK9PRu.s page 18
ARM GAS /tmp/ccy7u3l1.s page 18
554 .LVL49:
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
592 .loc 1 314 7 is_stmt 1 view .LVU226
314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U))))
593 .loc 1 314 41 is_stmt 0 view .LVU227
ARM GAS /tmp/ccpK9PRu.s page 19
ARM GAS /tmp/ccy7u3l1.s page 19
594 0084 03F0030C and ip, r3, #3
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
635 .loc 1 315 19 discriminator 6 view .LVU240
636 00c8 0225 movs r5, #2
637 00ca A3E7 b .L29
ARM GAS /tmp/ccpK9PRu.s page 20
ARM GAS /tmp/ccy7u3l1.s page 20
638 .L35:
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** }
676 .loc 1 326 9 view .LVU257
326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** }
ARM GAS /tmp/ccpK9PRu.s page 21
ARM GAS /tmp/ccy7u3l1.s page 21
677 .loc 1 326 23 is_stmt 0 view .LVU258
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** @verbatim
358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** ===============================================================================
359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** ##### IO operation functions #####
ARM GAS /tmp/ccpK9PRu.s page 22
ARM GAS /tmp/ccy7u3l1.s page 22
360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** ===============================================================================
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
745 .loc 1 389 1 is_stmt 0 view .LVU273
746 000c 7047 bx lr
747 .cfi_endproc
ARM GAS /tmp/ccpK9PRu.s page 23
ARM GAS /tmp/ccy7u3l1.s page 23
748 .LFE331:
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** GPIOx->BRR = (uint32_t)GPIO_Pin;
775 .loc 1 419 5 is_stmt 1 view .LVU281
776 .loc 1 419 16 is_stmt 0 view .LVU282
ARM GAS /tmp/ccpK9PRu.s page 24
ARM GAS /tmp/ccy7u3l1.s page 24
777 0006 8162 str r1, [r0, #40]
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
811 000a 41EA0241 orr r1, r1, r2, lsl #16
812 .loc 1 441 15 view .LVU293
813 000e 8161 str r1, [r0, #24]
ARM GAS /tmp/ccpK9PRu.s page 25
ARM GAS /tmp/ccy7u3l1.s page 25
442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** }
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
847 000a 0B43 orrs r3, r3, r1
848 000c 0193 str r3, [sp, #4]
465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
ARM GAS /tmp/ccpK9PRu.s page 26
ARM GAS /tmp/ccy7u3l1.s page 26
466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** GPIOx->LCKR = tmp;
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
885 .cfi_restore_state
481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c **** }
886 .loc 1 481 12 view .LVU317
ARM GAS /tmp/ccpK9PRu.s page 27
ARM GAS /tmp/ccy7u3l1.s page 27
887 002a 0120 movs r0, #1
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccpK9PRu.s page 1
912 .cfi_endproc
913 .LFE336:
915 .section .text.HAL_GPIO_EXTI_IRQHandler,"ax",%progbits
ARM GAS /tmp/ccpK9PRu.s page 28
ARM GAS /tmp/ccy7u3l1.s page 28
916 .align 1
@@ -1677,37 +1677,37 @@ ARM GAS /tmp/ccpK9PRu.s page 1
961 .LFE335:
963 .text
964 .Letext0:
965 .file 2 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
ARM GAS /tmp/ccpK9PRu.s page 29
965 .file 2 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
ARM GAS /tmp/ccy7u3l1.s page 29
966 .file 3 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
966 .file 3 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
967 .file 4 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
968 .file 5 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
969 .file 6 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h"
ARM GAS /tmp/ccpK9PRu.s page 30
ARM GAS /tmp/ccy7u3l1.s page 30
DEFINED SYMBOLS
*ABS*:00000000 stm32g4xx_hal_gpio.c
/tmp/ccpK9PRu.s:21 .text.HAL_GPIO_Init:00000000 $t
/tmp/ccpK9PRu.s:27 .text.HAL_GPIO_Init:00000000 HAL_GPIO_Init
/tmp/ccpK9PRu.s:458 .text.HAL_GPIO_Init:000001c4 $d
/tmp/ccpK9PRu.s:466 .text.HAL_GPIO_DeInit:00000000 $t
/tmp/ccpK9PRu.s:472 .text.HAL_GPIO_DeInit:00000000 HAL_GPIO_DeInit
/tmp/ccpK9PRu.s:705 .text.HAL_GPIO_DeInit:00000110 $d
/tmp/ccpK9PRu.s:712 .text.HAL_GPIO_ReadPin:00000000 $t
/tmp/ccpK9PRu.s:718 .text.HAL_GPIO_ReadPin:00000000 HAL_GPIO_ReadPin
/tmp/ccpK9PRu.s:751 .text.HAL_GPIO_WritePin:00000000 $t
/tmp/ccpK9PRu.s:757 .text.HAL_GPIO_WritePin:00000000 HAL_GPIO_WritePin
/tmp/ccpK9PRu.s:784 .text.HAL_GPIO_TogglePin:00000000 $t
/tmp/ccpK9PRu.s:790 .text.HAL_GPIO_TogglePin:00000000 HAL_GPIO_TogglePin
/tmp/ccpK9PRu.s:820 .text.HAL_GPIO_LockPin:00000000 $t
/tmp/ccpK9PRu.s:826 .text.HAL_GPIO_LockPin:00000000 HAL_GPIO_LockPin
/tmp/ccpK9PRu.s:895 .text.HAL_GPIO_EXTI_Callback:00000000 $t
/tmp/ccpK9PRu.s:901 .text.HAL_GPIO_EXTI_Callback:00000000 HAL_GPIO_EXTI_Callback
/tmp/ccpK9PRu.s:916 .text.HAL_GPIO_EXTI_IRQHandler:00000000 $t
/tmp/ccpK9PRu.s:922 .text.HAL_GPIO_EXTI_IRQHandler:00000000 HAL_GPIO_EXTI_IRQHandler
/tmp/ccpK9PRu.s:959 .text.HAL_GPIO_EXTI_IRQHandler:00000018 $d
/tmp/ccy7u3l1.s:21 .text.HAL_GPIO_Init:00000000 $t
/tmp/ccy7u3l1.s:27 .text.HAL_GPIO_Init:00000000 HAL_GPIO_Init
/tmp/ccy7u3l1.s:458 .text.HAL_GPIO_Init:000001c4 $d
/tmp/ccy7u3l1.s:466 .text.HAL_GPIO_DeInit:00000000 $t
/tmp/ccy7u3l1.s:472 .text.HAL_GPIO_DeInit:00000000 HAL_GPIO_DeInit
/tmp/ccy7u3l1.s:705 .text.HAL_GPIO_DeInit:00000110 $d
/tmp/ccy7u3l1.s:712 .text.HAL_GPIO_ReadPin:00000000 $t
/tmp/ccy7u3l1.s:718 .text.HAL_GPIO_ReadPin:00000000 HAL_GPIO_ReadPin
/tmp/ccy7u3l1.s:751 .text.HAL_GPIO_WritePin:00000000 $t
/tmp/ccy7u3l1.s:757 .text.HAL_GPIO_WritePin:00000000 HAL_GPIO_WritePin
/tmp/ccy7u3l1.s:784 .text.HAL_GPIO_TogglePin:00000000 $t
/tmp/ccy7u3l1.s:790 .text.HAL_GPIO_TogglePin:00000000 HAL_GPIO_TogglePin
/tmp/ccy7u3l1.s:820 .text.HAL_GPIO_LockPin:00000000 $t
/tmp/ccy7u3l1.s:826 .text.HAL_GPIO_LockPin:00000000 HAL_GPIO_LockPin
/tmp/ccy7u3l1.s:895 .text.HAL_GPIO_EXTI_Callback:00000000 $t
/tmp/ccy7u3l1.s:901 .text.HAL_GPIO_EXTI_Callback:00000000 HAL_GPIO_EXTI_Callback
/tmp/ccy7u3l1.s:916 .text.HAL_GPIO_EXTI_IRQHandler:00000000 $t
/tmp/ccy7u3l1.s:922 .text.HAL_GPIO_EXTI_IRQHandler:00000000 HAL_GPIO_EXTI_IRQHandler
/tmp/ccy7u3l1.s:959 .text.HAL_GPIO_EXTI_IRQHandler:00000018 $d
NO UNDEFINED SYMBOLS
squeow_sw/build/stm32g4xx_hal_gpio.o
BIN
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squeow_sw/build/stm32g4xx_hal_i2c.lst
+15302 -15399
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squeow_sw/build/stm32g4xx_hal_i2c.o
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squeow_sw/build/stm32g4xx_hal_i2c_ex.lst
+500 -507
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squeow_sw/build/stm32g4xx_hal_i2c_ex.o
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squeow_sw/build/stm32g4xx_hal_msp.lst
+1485 -1318
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squeow_sw/build/stm32g4xx_hal_msp.o
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squeow_sw/build/stm32g4xx_hal_pwr.lst
+72 -72
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@@ -1,4 +1,4 @@
ARM GAS /tmp/ccHFZ5oa.s page 1
ARM GAS /tmp/cc4VFJMZ.s page 1
1 .cpu cortex-m4
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** * @{
29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** */
30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c ****
ARM GAS /tmp/ccHFZ5oa.s page 2
ARM GAS /tmp/cc4VFJMZ.s page 2
31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** /** @defgroup PWR PWR
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** */
86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** void HAL_PWR_DeInit(void)
87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** {
ARM GAS /tmp/ccHFZ5oa.s page 3
ARM GAS /tmp/cc4VFJMZ.s page 3
29 .loc 1 87 1 view -0
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
66 .loc 1 106 3 view .LVU5
67 0000 024A ldr r2, .L5
68 0002 1368 ldr r3, [r2]
ARM GAS /tmp/ccHFZ5oa.s page 4
ARM GAS /tmp/cc4VFJMZ.s page 4
69 0004 43F48073 orr r3, r3, #256
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
116 .LVL0:
117 .LFB332:
118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c ****
ARM GAS /tmp/ccHFZ5oa.s page 5
ARM GAS /tmp/cc4VFJMZ.s page 5
119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c ****
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c ****
174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** *** Low-power run mode ***
175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** ==========================
ARM GAS /tmp/ccHFZ5oa.s page 6
ARM GAS /tmp/cc4VFJMZ.s page 6
176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** [..]
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c ****
231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** *** Standby mode ***
232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** ====================
ARM GAS /tmp/ccHFZ5oa.s page 7
ARM GAS /tmp/cc4VFJMZ.s page 7
233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** [..]
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** is necessary to configure the RTC to detect the tamper or time stamp event using the
288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions.
289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c ****
ARM GAS /tmp/ccHFZ5oa.s page 8
ARM GAS /tmp/cc4VFJMZ.s page 8
290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
141 .loc 1 320 3 view .LVU16
142 0020 DA68 ldr r2, [r3, #12]
143 0022 22F48032 bic r2, r2, #65536
ARM GAS /tmp/ccHFZ5oa.s page 9
ARM GAS /tmp/cc4VFJMZ.s page 9
144 0026 DA60 str r2, [r3, #12]
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
180 005c 084A ldr r2, .L15+4
181 005e 9368 ldr r3, [r2, #8]
182 0060 43F48033 orr r3, r3, #65536
ARM GAS /tmp/ccHFZ5oa.s page 10
ARM GAS /tmp/cc4VFJMZ.s page 10
183 0064 9360 str r3, [r2, #8]
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
222 @ args = 0, pretend = 0, frame = 0
223 @ frame_needed = 0, uses_anonymous_args = 0
224 @ link register save eliminated.
ARM GAS /tmp/ccHFZ5oa.s page 11
ARM GAS /tmp/cc4VFJMZ.s page 11
356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** SET_BIT(PWR->CR2, PWR_CR2_PVDE);
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
271 .thumb
272 .thumb_func
274 HAL_PWR_EnableWakeUpPin:
ARM GAS /tmp/ccHFZ5oa.s page 12
ARM GAS /tmp/cc4VFJMZ.s page 12
275 .LVL2:
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** }
296 .loc 1 400 1 is_stmt 0 view .LVU48
297 0018 7047 bx lr
ARM GAS /tmp/ccHFZ5oa.s page 13
ARM GAS /tmp/cc4VFJMZ.s page 13
298 .L25:
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
341 .syntax unified
342 .thumb
343 .thumb_func
ARM GAS /tmp/ccHFZ5oa.s page 14
ARM GAS /tmp/cc4VFJMZ.s page 14
345 HAL_PWR_EnterSLEEPMode:
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** /* If in low-power run mode at this point, exit it */
451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF))
364 .loc 1 451 5 is_stmt 1 view .LVU60
ARM GAS /tmp/ccHFZ5oa.s page 15
ARM GAS /tmp/cc4VFJMZ.s page 15
365 .loc 1 451 9 is_stmt 0 view .LVU61
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
390 @ 0 "" 2
481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** __WFE();
391 .loc 1 481 5 view .LVU68
ARM GAS /tmp/ccHFZ5oa.s page 16
ARM GAS /tmp/cc4VFJMZ.s page 16
392 @ 481 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c" 1
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
434 0040 00700040 .word 1073770496
435 0044 00ED00E0 .word -536810240
436 .cfi_endproc
ARM GAS /tmp/ccHFZ5oa.s page 17
ARM GAS /tmp/cc4VFJMZ.s page 17
437 .LFE337:
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** assert_param(IS_PWR_REGULATOR(Regulator));
459 .loc 1 519 3 is_stmt 1 view .LVU81
520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c ****
ARM GAS /tmp/ccHFZ5oa.s page 18
ARM GAS /tmp/cc4VFJMZ.s page 18
521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** if(Regulator == PWR_LOWPOWERREGULATOR_ON)
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** * to set RRS bit.
540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** * The BOR is available.
541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** * @note The I/Os can be configured either with a pull-up or pull-down or can be kept in analog s
ARM GAS /tmp/ccHFZ5oa.s page 19
ARM GAS /tmp/cc4VFJMZ.s page 19
542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** * HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() respectively enable Pull
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
528 .section .text.HAL_PWR_EnableSleepOnExit,"ax",%progbits
529 .align 1
530 .global HAL_PWR_EnableSleepOnExit
ARM GAS /tmp/ccHFZ5oa.s page 20
ARM GAS /tmp/cc4VFJMZ.s page 20
531 .syntax unified
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** */
588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** void HAL_PWR_DisableSleepOnExit(void)
589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** {
ARM GAS /tmp/ccHFZ5oa.s page 21
ARM GAS /tmp/cc4VFJMZ.s page 21
565 .loc 1 589 1 is_stmt 1 view -0
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
604 000a 7047 bx lr
605 .L55:
606 .align 2
ARM GAS /tmp/ccHFZ5oa.s page 22
ARM GAS /tmp/cc4VFJMZ.s page 22
607 .L54:
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c ****
624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c ****
625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** /**
ARM GAS /tmp/ccHFZ5oa.s page 23
ARM GAS /tmp/cc4VFJMZ.s page 23
626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c **** * @brief PWR PVD interrupt callback
@@ -1341,64 +1341,64 @@ ARM GAS /tmp/ccHFZ5oa.s page 1
657 .LFE344:
659 .text
660 .Letext0:
661 .file 2 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
662 .file 3 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
661 .file 2 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
662 .file 3 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
663 .file 4 "Drivers/CMSIS/Include/core_cm4.h"
664 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
665 .file 6 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
666 .file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h"
667 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h"
ARM GAS /tmp/ccHFZ5oa.s page 24
ARM GAS /tmp/cc4VFJMZ.s page 24
DEFINED SYMBOLS
*ABS*:00000000 stm32g4xx_hal_pwr.c
/tmp/ccHFZ5oa.s:21 .text.HAL_PWR_DeInit:00000000 $t
/tmp/ccHFZ5oa.s:27 .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit
/tmp/ccHFZ5oa.s:48 .text.HAL_PWR_DeInit:00000014 $d
/tmp/ccHFZ5oa.s:53 .text.HAL_PWR_EnableBkUpAccess:00000000 $t
/tmp/ccHFZ5oa.s:59 .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess
/tmp/ccHFZ5oa.s:76 .text.HAL_PWR_EnableBkUpAccess:0000000c $d
/tmp/ccHFZ5oa.s:81 .text.HAL_PWR_DisableBkUpAccess:00000000 $t
/tmp/ccHFZ5oa.s:87 .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess
/tmp/ccHFZ5oa.s:104 .text.HAL_PWR_DisableBkUpAccess:0000000c $d
/tmp/ccHFZ5oa.s:109 .text.HAL_PWR_ConfigPVD:00000000 $t
/tmp/ccHFZ5oa.s:115 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD
/tmp/ccHFZ5oa.s:206 .text.HAL_PWR_ConfigPVD:0000007c $d
/tmp/ccHFZ5oa.s:212 .text.HAL_PWR_EnablePVD:00000000 $t
/tmp/ccHFZ5oa.s:218 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD
/tmp/ccHFZ5oa.s:235 .text.HAL_PWR_EnablePVD:0000000c $d
/tmp/ccHFZ5oa.s:240 .text.HAL_PWR_DisablePVD:00000000 $t
/tmp/ccHFZ5oa.s:246 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD
/tmp/ccHFZ5oa.s:263 .text.HAL_PWR_DisablePVD:0000000c $d
/tmp/ccHFZ5oa.s:268 .text.HAL_PWR_EnableWakeUpPin:00000000 $t
/tmp/ccHFZ5oa.s:274 .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin
/tmp/ccHFZ5oa.s:301 .text.HAL_PWR_EnableWakeUpPin:0000001c $d
/tmp/ccHFZ5oa.s:306 .text.HAL_PWR_DisableWakeUpPin:00000000 $t
/tmp/ccHFZ5oa.s:312 .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin
/tmp/ccHFZ5oa.s:334 .text.HAL_PWR_DisableWakeUpPin:00000010 $d
/tmp/ccHFZ5oa.s:339 .text.HAL_PWR_EnterSLEEPMode:00000000 $t
/tmp/ccHFZ5oa.s:345 .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode
/tmp/ccHFZ5oa.s:434 .text.HAL_PWR_EnterSLEEPMode:00000040 $d
/tmp/ccHFZ5oa.s:440 .text.HAL_PWR_EnterSTOPMode:00000000 $t
/tmp/ccHFZ5oa.s:446 .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode
/tmp/ccHFZ5oa.s:487 .text.HAL_PWR_EnterSTANDBYMode:00000000 $t
/tmp/ccHFZ5oa.s:493 .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode
/tmp/ccHFZ5oa.s:523 .text.HAL_PWR_EnterSTANDBYMode:0000001c $d
/tmp/ccHFZ5oa.s:529 .text.HAL_PWR_EnableSleepOnExit:00000000 $t
/tmp/ccHFZ5oa.s:535 .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit
/tmp/ccHFZ5oa.s:552 .text.HAL_PWR_EnableSleepOnExit:0000000c $d
/tmp/ccHFZ5oa.s:557 .text.HAL_PWR_DisableSleepOnExit:00000000 $t
/tmp/ccHFZ5oa.s:563 .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit
/tmp/ccHFZ5oa.s:580 .text.HAL_PWR_DisableSleepOnExit:0000000c $d
/tmp/ccHFZ5oa.s:585 .text.HAL_PWR_EnableSEVOnPend:00000000 $t
/tmp/ccHFZ5oa.s:591 .text.HAL_PWR_EnableSEVOnPend:00000000 HAL_PWR_EnableSEVOnPend
/tmp/ccHFZ5oa.s:608 .text.HAL_PWR_EnableSEVOnPend:0000000c $d
/tmp/ccHFZ5oa.s:613 .text.HAL_PWR_DisableSEVOnPend:00000000 $t
/tmp/ccHFZ5oa.s:619 .text.HAL_PWR_DisableSEVOnPend:00000000 HAL_PWR_DisableSEVOnPend
/tmp/ccHFZ5oa.s:636 .text.HAL_PWR_DisableSEVOnPend:0000000c $d
/tmp/ccHFZ5oa.s:641 .text.HAL_PWR_PVDCallback:00000000 $t
/tmp/ccHFZ5oa.s:647 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback
/tmp/cc4VFJMZ.s:21 .text.HAL_PWR_DeInit:00000000 $t
/tmp/cc4VFJMZ.s:27 .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit
/tmp/cc4VFJMZ.s:48 .text.HAL_PWR_DeInit:00000014 $d
/tmp/cc4VFJMZ.s:53 .text.HAL_PWR_EnableBkUpAccess:00000000 $t
/tmp/cc4VFJMZ.s:59 .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess
/tmp/cc4VFJMZ.s:76 .text.HAL_PWR_EnableBkUpAccess:0000000c $d
/tmp/cc4VFJMZ.s:81 .text.HAL_PWR_DisableBkUpAccess:00000000 $t
/tmp/cc4VFJMZ.s:87 .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess
/tmp/cc4VFJMZ.s:104 .text.HAL_PWR_DisableBkUpAccess:0000000c $d
/tmp/cc4VFJMZ.s:109 .text.HAL_PWR_ConfigPVD:00000000 $t
/tmp/cc4VFJMZ.s:115 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD
/tmp/cc4VFJMZ.s:206 .text.HAL_PWR_ConfigPVD:0000007c $d
/tmp/cc4VFJMZ.s:212 .text.HAL_PWR_EnablePVD:00000000 $t
/tmp/cc4VFJMZ.s:218 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD
/tmp/cc4VFJMZ.s:235 .text.HAL_PWR_EnablePVD:0000000c $d
/tmp/cc4VFJMZ.s:240 .text.HAL_PWR_DisablePVD:00000000 $t
/tmp/cc4VFJMZ.s:246 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD
/tmp/cc4VFJMZ.s:263 .text.HAL_PWR_DisablePVD:0000000c $d
/tmp/cc4VFJMZ.s:268 .text.HAL_PWR_EnableWakeUpPin:00000000 $t
/tmp/cc4VFJMZ.s:274 .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin
/tmp/cc4VFJMZ.s:301 .text.HAL_PWR_EnableWakeUpPin:0000001c $d
/tmp/cc4VFJMZ.s:306 .text.HAL_PWR_DisableWakeUpPin:00000000 $t
/tmp/cc4VFJMZ.s:312 .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin
/tmp/cc4VFJMZ.s:334 .text.HAL_PWR_DisableWakeUpPin:00000010 $d
/tmp/cc4VFJMZ.s:339 .text.HAL_PWR_EnterSLEEPMode:00000000 $t
/tmp/cc4VFJMZ.s:345 .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode
/tmp/cc4VFJMZ.s:434 .text.HAL_PWR_EnterSLEEPMode:00000040 $d
/tmp/cc4VFJMZ.s:440 .text.HAL_PWR_EnterSTOPMode:00000000 $t
/tmp/cc4VFJMZ.s:446 .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode
/tmp/cc4VFJMZ.s:487 .text.HAL_PWR_EnterSTANDBYMode:00000000 $t
/tmp/cc4VFJMZ.s:493 .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode
/tmp/cc4VFJMZ.s:523 .text.HAL_PWR_EnterSTANDBYMode:0000001c $d
/tmp/cc4VFJMZ.s:529 .text.HAL_PWR_EnableSleepOnExit:00000000 $t
/tmp/cc4VFJMZ.s:535 .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit
/tmp/cc4VFJMZ.s:552 .text.HAL_PWR_EnableSleepOnExit:0000000c $d
/tmp/cc4VFJMZ.s:557 .text.HAL_PWR_DisableSleepOnExit:00000000 $t
/tmp/cc4VFJMZ.s:563 .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit
/tmp/cc4VFJMZ.s:580 .text.HAL_PWR_DisableSleepOnExit:0000000c $d
/tmp/cc4VFJMZ.s:585 .text.HAL_PWR_EnableSEVOnPend:00000000 $t
/tmp/cc4VFJMZ.s:591 .text.HAL_PWR_EnableSEVOnPend:00000000 HAL_PWR_EnableSEVOnPend
/tmp/cc4VFJMZ.s:608 .text.HAL_PWR_EnableSEVOnPend:0000000c $d
/tmp/cc4VFJMZ.s:613 .text.HAL_PWR_DisableSEVOnPend:00000000 $t
/tmp/cc4VFJMZ.s:619 .text.HAL_PWR_DisableSEVOnPend:00000000 HAL_PWR_DisableSEVOnPend
/tmp/cc4VFJMZ.s:636 .text.HAL_PWR_DisableSEVOnPend:0000000c $d
/tmp/cc4VFJMZ.s:641 .text.HAL_PWR_PVDCallback:00000000 $t
/tmp/cc4VFJMZ.s:647 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback
UNDEFINED SYMBOLS
HAL_PWREx_DisableLowPowerRunMode
squeow_sw/build/stm32g4xx_hal_pwr.o
BIN
View File
Binary file not shown.
squeow_sw/build/stm32g4xx_hal_pwr_ex.lst
+188 -188
View File
@@ -1,4 +1,4 @@
ARM GAS /tmp/ccebRljS.s page 1
ARM GAS /tmp/ccas351m.s page 1
1 .cpu cortex-m4
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccebRljS.s page 1
28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{
29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
ARM GAS /tmp/ccebRljS.s page 2
ARM GAS /tmp/ccas351m.s page 2
31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccebRljS.s page 1
85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions
87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{
ARM GAS /tmp/ccebRljS.s page 3
ARM GAS /tmp/ccas351m.s page 3
88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccebRljS.s page 1
122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return PWR_REGULATOR_VOLTAGE_SCALE1_BOOST;
123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
ARM GAS /tmp/ccebRljS.s page 4
ARM GAS /tmp/ccas351m.s page 4
49 .loc 1 124 1 view .LVU7
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccebRljS.s page 1
74 @ args = 0, pretend = 0, frame = 0
75 @ frame_needed = 0, uses_anonymous_args = 0
76 @ link register save eliminated.
ARM GAS /tmp/ccebRljS.s page 5
ARM GAS /tmp/ccas351m.s page 5
155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** uint32_t wait_loop_index;
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccebRljS.s page 1
190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* If current range is range 2 */
191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2)
192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
ARM GAS /tmp/ccebRljS.s page 6
ARM GAS /tmp/ccas351m.s page 6
193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Make sure Range 1 Boost is disabled */
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccebRljS.s page 1
171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U))
114 .loc 1 171 53 is_stmt 0 view .LVU23
115 003e 314B ldr r3, .L23+4
ARM GAS /tmp/ccebRljS.s page 7
ARM GAS /tmp/ccas351m.s page 7
116 0040 1B68 ldr r3, [r3]
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccebRljS.s page 1
156 006e 0020 movs r0, #0
157 .LVL6:
158 .loc 1 225 10 view .LVU39
ARM GAS /tmp/ccebRljS.s page 8
ARM GAS /tmp/ccas351m.s page 8
159 0070 7047 bx lr
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccebRljS.s page 1
204 .loc 1 197 7 view .LVU52
205 00b8 1368 ldr r3, [r2]
206 00ba 23F4C063 bic r3, r3, #1536
ARM GAS /tmp/ccebRljS.s page 9
ARM GAS /tmp/ccas351m.s page 9
207 00be 43F40073 orr r3, r3, #512
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccebRljS.s page 1
246 .loc 1 205 11 view .LVU67
247 00ec 5B69 ldr r3, [r3, #20]
205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
ARM GAS /tmp/ccebRljS.s page 10
ARM GAS /tmp/ccas351m.s page 10
248 .loc 1 205 10 view .LVU68
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccebRljS.s page 1
238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection)
239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
289 .loc 1 239 1 is_stmt 1 view -0
ARM GAS /tmp/ccebRljS.s page 11
ARM GAS /tmp/ccas351m.s page 11
290 .cfi_startproc
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccebRljS.s page 1
329 0000 024A ldr r2, .L29
330 0002 D368 ldr r3, [r2, #12]
331 0004 23F48073 bic r3, r3, #256
ARM GAS /tmp/ccebRljS.s page 12
ARM GAS /tmp/ccas351m.s page 12
332 0008 D360 str r3, [r2, #12]
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccebRljS.s page 1
268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
ARM GAS /tmp/ccebRljS.s page 13
ARM GAS /tmp/ccas351m.s page 13
271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable Internal Wake-up Line.
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccebRljS.s page 1
298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * I/O pins are available) or the logical OR of several of them to set
299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * several bits for a given port in a single API call.
300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL Status
ARM GAS /tmp/ccebRljS.s page 14
ARM GAS /tmp/ccas351m.s page 14
301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccebRljS.s page 1
447 0028 0020 movs r0, #0
448 .loc 1 314 8 view .LVU100
449 002a 7047 bx lr
ARM GAS /tmp/ccebRljS.s page 15
ARM GAS /tmp/ccas351m.s page 15
450 .LVL24:
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccebRljS.s page 1
492 005c 0A43 orrs r2, r2, r1
493 005e 9A63 str r2, [r3, #56]
325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRD, GPIONumber);
ARM GAS /tmp/ccebRljS.s page 16
ARM GAS /tmp/ccas351m.s page 16
494 .loc 1 325 8 view .LVU113
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccebRljS.s page 1
537 .loc 1 334 8 view .LVU125
304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
538 .loc 1 304 21 is_stmt 0 view .LVU126
ARM GAS /tmp/ccebRljS.s page 17
ARM GAS /tmp/ccas351m.s page 17
539 0098 0020 movs r0, #0
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccebRljS.s page 1
581 .thumb
582 .thumb_func
584 HAL_PWREx_DisableGPIOPullUp:
ARM GAS /tmp/ccebRljS.s page 18
ARM GAS /tmp/ccas351m.s page 18
585 .LVL41:
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccebRljS.s page 1
611 0012 136A ldr r3, [r2, #32]
612 0014 21F48041 bic r1, r1, #16384
613 .LVL42:
ARM GAS /tmp/ccebRljS.s page 19
ARM GAS /tmp/ccas351m.s page 19
614 .loc 1 373 8 is_stmt 0 view .LVU143
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccebRljS.s page 1
383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
656 .loc 1 383 8 view .LVU156
365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
ARM GAS /tmp/ccebRljS.s page 20
ARM GAS /tmp/ccas351m.s page 20
657 .loc 1 365 21 is_stmt 0 view .LVU157
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccebRljS.s page 1
701 0078 23EA0103 bic r3, r3, r1
702 007c 1365 str r3, [r2, #80]
392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
ARM GAS /tmp/ccebRljS.s page 21
ARM GAS /tmp/ccas351m.s page 21
703 .loc 1 392 8 is_stmt 1 view .LVU170
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccebRljS.s page 1
416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral.
417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIONumber: Specify the I/O pins numbers.
418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
ARM GAS /tmp/ccebRljS.s page 22
ARM GAS /tmp/ccas351m.s page 22
419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccebRljS.s page 1
436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
771 .loc 1 436 8 is_stmt 1 view .LVU185
426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
ARM GAS /tmp/ccebRljS.s page 23
ARM GAS /tmp/ccas351m.s page 23
772 .loc 1 426 21 is_stmt 0 view .LVU186
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccebRljS.s page 1
814 .loc 1 446 8 is_stmt 1 view .LVU199
815 0058 174B ldr r3, .L74
816 005a DA6B ldr r2, [r3, #60]
ARM GAS /tmp/ccebRljS.s page 24
ARM GAS /tmp/ccas351m.s page 24
817 005c 0A43 orrs r2, r2, r1
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccebRljS.s page 1
860 0092 22EA0102 bic r2, r2, r1
861 0096 9A64 str r2, [r3, #72]
456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
ARM GAS /tmp/ccebRljS.s page 25
ARM GAS /tmp/ccas351m.s page 25
862 .loc 1 456 8 view .LVU212
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccebRljS.s page 1
903 .align 1
904 .global HAL_PWREx_DisableGPIOPullDown
905 .syntax unified
ARM GAS /tmp/ccebRljS.s page 26
ARM GAS /tmp/ccas351m.s page 26
906 .thumb
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccebRljS.s page 1
495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15))));
934 .loc 1 495 8 view .LVU229
935 0010 1C4A ldr r2, .L87
ARM GAS /tmp/ccebRljS.s page 27
ARM GAS /tmp/ccas351m.s page 27
936 0012 536A ldr r3, [r2, #36]
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccebRljS.s page 1
504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRD, GPIONumber);
979 .loc 1 504 8 is_stmt 1 view .LVU243
980 0042 104A ldr r2, .L87
ARM GAS /tmp/ccebRljS.s page 28
ARM GAS /tmp/ccas351m.s page 28
981 0044 D36B ldr r3, [r2, #60]
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1023 .loc 1 513 8 is_stmt 1 view .LVU256
1024 0074 034B ldr r3, .L87
1025 0076 5A6D ldr r2, [r3, #84]
ARM GAS /tmp/ccebRljS.s page 29
ARM GAS /tmp/ccas351m.s page 29
1026 0078 5A65 str r2, [r3, #84]
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1057 .loc 1 536 1 is_stmt 1 view -0
1058 .cfi_startproc
1059 @ args = 0, pretend = 0, frame = 0
ARM GAS /tmp/ccebRljS.s page 30
ARM GAS /tmp/ccas351m.s page 30
1060 @ frame_needed = 0, uses_anonymous_args = 0
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1102 .LFE340:
1104 .section .text.HAL_PWREx_EnableSRAM2ContentRetention,"ax",%progbits
1105 .align 1
ARM GAS /tmp/ccebRljS.s page 31
ARM GAS /tmp/ccas351m.s page 31
1106 .global HAL_PWREx_EnableSRAM2ContentRetention
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccebRljS.s page 1
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1141 .loc 1 573 1 is_stmt 1 view -0
1142 .cfi_startproc
ARM GAS /tmp/ccebRljS.s page 32
ARM GAS /tmp/ccas351m.s page 32
1143 @ args = 0, pretend = 0, frame = 0
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1184 000c 00700040 .word 1073770496
1185 .cfi_endproc
1186 .LFE343:
ARM GAS /tmp/ccebRljS.s page 33
ARM GAS /tmp/ccas351m.s page 33
1188 .section .text.HAL_PWREx_DisablePVM1,"ax",%progbits
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1226 .cfi_startproc
1227 @ args = 0, pretend = 0, frame = 0
1228 @ frame_needed = 0, uses_anonymous_args = 0
ARM GAS /tmp/ccebRljS.s page 34
ARM GAS /tmp/ccas351m.s page 34
1229 @ link register save eliminated.
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1275 .syntax unified
1276 .thumb
1277 .thumb_func
ARM GAS /tmp/ccebRljS.s page 35
ARM GAS /tmp/ccas351m.s page 35
1279 HAL_PWREx_EnablePVM3:
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1316 0002 5368 ldr r3, [r2, #4]
1317 0004 23F04003 bic r3, r3, #64
1318 0008 5360 str r3, [r2, #4]
ARM GAS /tmp/ccebRljS.s page 36
ARM GAS /tmp/ccas351m.s page 36
638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccebRljS.s page 1
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable the Power Voltage Monitoring 4: VDDA versus OPAMP/DAC minimum voltage 1.8V.
652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
ARM GAS /tmp/ccebRljS.s page 37
ARM GAS /tmp/ccas351m.s page 37
653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1398 @ link register save eliminated.
676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK;
1399 .loc 1 676 3 view .LVU300
ARM GAS /tmp/ccebRljS.s page 38
ARM GAS /tmp/ccas351m.s page 38
677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccebRljS.s page 1
718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME1 */
720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
ARM GAS /tmp/ccebRljS.s page 39
ARM GAS /tmp/ccas351m.s page 39
721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME2)
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1449 004e 664A ldr r2, .L150
1450 0050 536A ldr r3, [r2, #36]
1451 0052 43F01003 orr r3, r3, #16
ARM GAS /tmp/ccebRljS.s page 40
ARM GAS /tmp/ccas351m.s page 40
1452 0056 5362 str r3, [r2, #36]
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccebRljS.s page 1
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1491 .loc 1 686 3 view .LVU330
1492 0086 802B cmp r3, #128
ARM GAS /tmp/ccebRljS.s page 41
ARM GAS /tmp/ccas351m.s page 41
1493 0088 36D1 bne .L149
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccebRljS.s page 1
790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE();
1507 .loc 1 790 7 view .LVU334
1508 00a4 9A6A ldr r2, [r3, #40]
ARM GAS /tmp/ccebRljS.s page 42
ARM GAS /tmp/ccas351m.s page 42
1509 00a6 22F04002 bic r2, r2, #64
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1546 .L143:
808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
ARM GAS /tmp/ccebRljS.s page 43
ARM GAS /tmp/ccas351m.s page 43
810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE)
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1589 .loc 1 697 7 view .LVU359
697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1590 .loc 1 697 21 is_stmt 0 view .LVU360
ARM GAS /tmp/ccebRljS.s page 44
ARM GAS /tmp/ccas351m.s page 44
1591 011e 4368 ldr r3, [r0, #4]
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1631 .loc 1 716 9 is_stmt 1 view .LVU374
1632 015c 224A ldr r2, .L150
1633 015e D36A ldr r3, [r2, #44]
ARM GAS /tmp/ccebRljS.s page 45
ARM GAS /tmp/ccas351m.s page 45
1634 0160 43F00803 orr r3, r3, #8
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1675 .loc 1 768 9 view .LVU387
1676 01a0 13F4003F tst r3, #131072
1677 01a4 04D0 beq .L139
ARM GAS /tmp/ccebRljS.s page 46
ARM GAS /tmp/ccas351m.s page 46
770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1719 .LVL112:
1720 .L145:
676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
ARM GAS /tmp/ccebRljS.s page 47
ARM GAS /tmp/ccas351m.s page 47
1721 .loc 1 676 21 view .LVU401
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccebRljS.s page 1
829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * Flash in power-down monde in setting the RUN_PD bit in FLASH_ACR register.
830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * Additionally, the clock frequency must be reduced below 2 MHz.
831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * Setting RUN_PD in FLASH_ACR then appropriately reducing the clock frequency must
ARM GAS /tmp/ccebRljS.s page 48
ARM GAS /tmp/ccas351m.s page 48
832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * be done before calling HAL_PWREx_EnableLowPowerRunMode() API.
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccebRljS.s page 1
854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear LPR bit */
855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR1, PWR_CR1_LPR);
1791 .loc 1 855 3 view .LVU413
ARM GAS /tmp/ccebRljS.s page 49
ARM GAS /tmp/ccas351m.s page 49
1792 0000 124A ldr r2, .L161
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1834 003a 5B69 ldr r3, [r3, #20]
1835 .loc 1 863 6 view .LVU428
1836 003c 13F4007F tst r3, #512
ARM GAS /tmp/ccebRljS.s page 50
ARM GAS /tmp/ccas351m.s page 50
1837 0040 01D1 bne .L160
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccebRljS.s page 1
892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnterSTOP0Mode(uint8_t STOPEntry)
ARM GAS /tmp/ccebRljS.s page 51
ARM GAS /tmp/ccas351m.s page 51
895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1896 @ 0 "" 2
1897 .thumb
1898 .syntax unified
ARM GAS /tmp/ccebRljS.s page 52
ARM GAS /tmp/ccas351m.s page 52
1899 .L165:
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccebRljS.s page 1
937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * is set.
938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Due to low power mode, an additional startup delay is incurred when waking up from Stop
939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param STOPEntry specifies if Stop mode in entered with WFI or WFE instruction.
ARM GAS /tmp/ccebRljS.s page 53
ARM GAS /tmp/ccas351m.s page 53
940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1961 @ 966 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1
1962 001e 20BF wfe
1963 @ 0 "" 2
ARM GAS /tmp/ccebRljS.s page 54
ARM GAS /tmp/ccas351m.s page 54
967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFE();
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccebRljS.s page 1
982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * The BOR is not available.
983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note The I/Os can be configured either with a pull-up or pull-down or can be kept in analog s
984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
ARM GAS /tmp/ccebRljS.s page 55
ARM GAS /tmp/ccas351m.s page 55
985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccebRljS.s page 1
2042 .thumb_func
2044 HAL_PWREx_PVM1Callback:
2045 .LFB358:
ARM GAS /tmp/ccebRljS.s page 56
ARM GAS /tmp/ccas351m.s page 56
1002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear PVM4 exti pending bit */
1057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_CLEAR_FLAG();
1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
ARM GAS /tmp/ccebRljS.s page 57
ARM GAS /tmp/ccas351m.s page 57
1059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccebRljS.s page 1
2076 .align 1
2077 .weak HAL_PWREx_PVM3Callback
2078 .syntax unified
ARM GAS /tmp/ccebRljS.s page 58
ARM GAS /tmp/ccas351m.s page 58
2079 .thumb
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccebRljS.s page 1
2114 .align 1
2115 .global HAL_PWREx_PVD_PVM_IRQHandler
2116 .syntax unified
ARM GAS /tmp/ccebRljS.s page 59
ARM GAS /tmp/ccas351m.s page 59
2117 .thumb
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccebRljS.s page 1
2159 .loc 1 1043 5 view .LVU481
2160 0024 13F0200F tst r3, #32
2161 0028 18D1 bne .L192
ARM GAS /tmp/ccebRljS.s page 60
ARM GAS /tmp/ccas351m.s page 60
2162 .L186:
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccebRljS.s page 1
2204 .loc 1 1049 5 view .LVU493
2205 0060 044B ldr r3, .L194
2206 0062 2022 movs r2, #32
ARM GAS /tmp/ccebRljS.s page 61
ARM GAS /tmp/ccas351m.s page 61
2207 0064 5A63 str r2, [r3, #52]
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccebRljS.s page 1
2249 .L197:
2250 000c 00700040 .word 1073770496
2251 .cfi_endproc
ARM GAS /tmp/ccebRljS.s page 62
ARM GAS /tmp/ccas351m.s page 62
2252 .LFE362:
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccebRljS.s page 1
1139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
1140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
1141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableUCPDDeadBattery(void)
ARM GAS /tmp/ccebRljS.s page 63
ARM GAS /tmp/ccas351m.s page 63
1142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccebRljS.s page 1
2328 0008 9360 str r3, [r2, #8]
1161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
2329 .loc 1 1161 1 is_stmt 0 view .LVU508
ARM GAS /tmp/ccebRljS.s page 64
ARM GAS /tmp/ccas351m.s page 64
2330 000a 7047 bx lr
@@ -3790,144 +3790,144 @@ ARM GAS /tmp/ccebRljS.s page 1
2336 .LFE365:
2338 .text
2339 .Letext0:
2340 .file 2 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
2341 .file 3 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
2340 .file 2 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
2341 .file 3 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
2342 .file 4 "Drivers/CMSIS/Include/core_cm4.h"
2343 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
2344 .file 6 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
2345 .file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h"
2346 .file 8 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h"
2347 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h"
ARM GAS /tmp/ccebRljS.s page 65
ARM GAS /tmp/ccas351m.s page 65
DEFINED SYMBOLS
*ABS*:00000000 stm32g4xx_hal_pwr_ex.c
/tmp/ccebRljS.s:21 .text.HAL_PWREx_GetVoltageRange:00000000 $t
/tmp/ccebRljS.s:27 .text.HAL_PWREx_GetVoltageRange:00000000 HAL_PWREx_GetVoltageRange
/tmp/ccebRljS.s:58 .text.HAL_PWREx_GetVoltageRange:00000020 $d
/tmp/ccebRljS.s:63 .text.HAL_PWREx_ControlVoltageScaling:00000000 $t
/tmp/ccebRljS.s:69 .text.HAL_PWREx_ControlVoltageScaling:00000000 HAL_PWREx_ControlVoltageScaling
/tmp/ccebRljS.s:273 .text.HAL_PWREx_ControlVoltageScaling:00000100 $d
/tmp/ccebRljS.s:280 .text.HAL_PWREx_EnableBatteryCharging:00000000 $t
/tmp/ccebRljS.s:286 .text.HAL_PWREx_EnableBatteryCharging:00000000 HAL_PWREx_EnableBatteryCharging
/tmp/ccebRljS.s:310 .text.HAL_PWREx_EnableBatteryCharging:00000018 $d
/tmp/ccebRljS.s:315 .text.HAL_PWREx_DisableBatteryCharging:00000000 $t
/tmp/ccebRljS.s:321 .text.HAL_PWREx_DisableBatteryCharging:00000000 HAL_PWREx_DisableBatteryCharging
/tmp/ccebRljS.s:338 .text.HAL_PWREx_DisableBatteryCharging:0000000c $d
/tmp/ccebRljS.s:343 .text.HAL_PWREx_EnableInternalWakeUpLine:00000000 $t
/tmp/ccebRljS.s:349 .text.HAL_PWREx_EnableInternalWakeUpLine:00000000 HAL_PWREx_EnableInternalWakeUpLine
/tmp/ccebRljS.s:366 .text.HAL_PWREx_EnableInternalWakeUpLine:0000000c $d
/tmp/ccebRljS.s:371 .text.HAL_PWREx_DisableInternalWakeUpLine:00000000 $t
/tmp/ccebRljS.s:377 .text.HAL_PWREx_DisableInternalWakeUpLine:00000000 HAL_PWREx_DisableInternalWakeUpLine
/tmp/ccebRljS.s:394 .text.HAL_PWREx_DisableInternalWakeUpLine:0000000c $d
/tmp/ccebRljS.s:399 .text.HAL_PWREx_EnableGPIOPullUp:00000000 $t
/tmp/ccebRljS.s:405 .text.HAL_PWREx_EnableGPIOPullUp:00000000 HAL_PWREx_EnableGPIOPullUp
/tmp/ccebRljS.s:421 .text.HAL_PWREx_EnableGPIOPullUp:00000008 $d
/tmp/ccebRljS.s:573 .text.HAL_PWREx_EnableGPIOPullUp:000000b4 $d
/tmp/ccebRljS.s:578 .text.HAL_PWREx_DisableGPIOPullUp:00000000 $t
/tmp/ccebRljS.s:584 .text.HAL_PWREx_DisableGPIOPullUp:00000000 HAL_PWREx_DisableGPIOPullUp
/tmp/ccebRljS.s:600 .text.HAL_PWREx_DisableGPIOPullUp:00000008 $d
/tmp/ccebRljS.s:720 .text.HAL_PWREx_DisableGPIOPullUp:00000088 $d
/tmp/ccebRljS.s:725 .text.HAL_PWREx_EnableGPIOPullDown:00000000 $t
/tmp/ccebRljS.s:731 .text.HAL_PWREx_EnableGPIOPullDown:00000000 HAL_PWREx_EnableGPIOPullDown
/tmp/ccebRljS.s:747 .text.HAL_PWREx_EnableGPIOPullDown:00000008 $d
/tmp/ccebRljS.s:898 .text.HAL_PWREx_EnableGPIOPullDown:000000b8 $d
/tmp/ccebRljS.s:903 .text.HAL_PWREx_DisableGPIOPullDown:00000000 $t
/tmp/ccebRljS.s:909 .text.HAL_PWREx_DisableGPIOPullDown:00000000 HAL_PWREx_DisableGPIOPullDown
/tmp/ccebRljS.s:925 .text.HAL_PWREx_DisableGPIOPullDown:00000008 $d
/tmp/ccebRljS.s:1044 .text.HAL_PWREx_DisableGPIOPullDown:00000084 $d
/tmp/ccebRljS.s:1049 .text.HAL_PWREx_EnablePullUpPullDownConfig:00000000 $t
/tmp/ccebRljS.s:1055 .text.HAL_PWREx_EnablePullUpPullDownConfig:00000000 HAL_PWREx_EnablePullUpPullDownConfig
/tmp/ccebRljS.s:1072 .text.HAL_PWREx_EnablePullUpPullDownConfig:0000000c $d
/tmp/ccebRljS.s:1077 .text.HAL_PWREx_DisablePullUpPullDownConfig:00000000 $t
/tmp/ccebRljS.s:1083 .text.HAL_PWREx_DisablePullUpPullDownConfig:00000000 HAL_PWREx_DisablePullUpPullDownConfig
/tmp/ccebRljS.s:1100 .text.HAL_PWREx_DisablePullUpPullDownConfig:0000000c $d
/tmp/ccebRljS.s:1105 .text.HAL_PWREx_EnableSRAM2ContentRetention:00000000 $t
/tmp/ccebRljS.s:1111 .text.HAL_PWREx_EnableSRAM2ContentRetention:00000000 HAL_PWREx_EnableSRAM2ContentRetention
/tmp/ccebRljS.s:1128 .text.HAL_PWREx_EnableSRAM2ContentRetention:0000000c $d
/tmp/ccebRljS.s:1133 .text.HAL_PWREx_DisableSRAM2ContentRetention:00000000 $t
/tmp/ccebRljS.s:1139 .text.HAL_PWREx_DisableSRAM2ContentRetention:00000000 HAL_PWREx_DisableSRAM2ContentRetention
/tmp/ccebRljS.s:1156 .text.HAL_PWREx_DisableSRAM2ContentRetention:0000000c $d
/tmp/ccebRljS.s:1161 .text.HAL_PWREx_EnablePVM1:00000000 $t
/tmp/ccebRljS.s:1167 .text.HAL_PWREx_EnablePVM1:00000000 HAL_PWREx_EnablePVM1
/tmp/ccebRljS.s:1184 .text.HAL_PWREx_EnablePVM1:0000000c $d
/tmp/ccebRljS.s:1189 .text.HAL_PWREx_DisablePVM1:00000000 $t
/tmp/ccebRljS.s:1195 .text.HAL_PWREx_DisablePVM1:00000000 HAL_PWREx_DisablePVM1
/tmp/ccebRljS.s:1212 .text.HAL_PWREx_DisablePVM1:0000000c $d
/tmp/ccebRljS.s:1217 .text.HAL_PWREx_EnablePVM2:00000000 $t
/tmp/ccebRljS.s:1223 .text.HAL_PWREx_EnablePVM2:00000000 HAL_PWREx_EnablePVM2
/tmp/ccebRljS.s:1240 .text.HAL_PWREx_EnablePVM2:0000000c $d
ARM GAS /tmp/ccebRljS.s page 66
/tmp/ccas351m.s:21 .text.HAL_PWREx_GetVoltageRange:00000000 $t
/tmp/ccas351m.s:27 .text.HAL_PWREx_GetVoltageRange:00000000 HAL_PWREx_GetVoltageRange
/tmp/ccas351m.s:58 .text.HAL_PWREx_GetVoltageRange:00000020 $d
/tmp/ccas351m.s:63 .text.HAL_PWREx_ControlVoltageScaling:00000000 $t
/tmp/ccas351m.s:69 .text.HAL_PWREx_ControlVoltageScaling:00000000 HAL_PWREx_ControlVoltageScaling
/tmp/ccas351m.s:273 .text.HAL_PWREx_ControlVoltageScaling:00000100 $d
/tmp/ccas351m.s:280 .text.HAL_PWREx_EnableBatteryCharging:00000000 $t
/tmp/ccas351m.s:286 .text.HAL_PWREx_EnableBatteryCharging:00000000 HAL_PWREx_EnableBatteryCharging
/tmp/ccas351m.s:310 .text.HAL_PWREx_EnableBatteryCharging:00000018 $d
/tmp/ccas351m.s:315 .text.HAL_PWREx_DisableBatteryCharging:00000000 $t
/tmp/ccas351m.s:321 .text.HAL_PWREx_DisableBatteryCharging:00000000 HAL_PWREx_DisableBatteryCharging
/tmp/ccas351m.s:338 .text.HAL_PWREx_DisableBatteryCharging:0000000c $d
/tmp/ccas351m.s:343 .text.HAL_PWREx_EnableInternalWakeUpLine:00000000 $t
/tmp/ccas351m.s:349 .text.HAL_PWREx_EnableInternalWakeUpLine:00000000 HAL_PWREx_EnableInternalWakeUpLine
/tmp/ccas351m.s:366 .text.HAL_PWREx_EnableInternalWakeUpLine:0000000c $d
/tmp/ccas351m.s:371 .text.HAL_PWREx_DisableInternalWakeUpLine:00000000 $t
/tmp/ccas351m.s:377 .text.HAL_PWREx_DisableInternalWakeUpLine:00000000 HAL_PWREx_DisableInternalWakeUpLine
/tmp/ccas351m.s:394 .text.HAL_PWREx_DisableInternalWakeUpLine:0000000c $d
/tmp/ccas351m.s:399 .text.HAL_PWREx_EnableGPIOPullUp:00000000 $t
/tmp/ccas351m.s:405 .text.HAL_PWREx_EnableGPIOPullUp:00000000 HAL_PWREx_EnableGPIOPullUp
/tmp/ccas351m.s:421 .text.HAL_PWREx_EnableGPIOPullUp:00000008 $d
/tmp/ccas351m.s:573 .text.HAL_PWREx_EnableGPIOPullUp:000000b4 $d
/tmp/ccas351m.s:578 .text.HAL_PWREx_DisableGPIOPullUp:00000000 $t
/tmp/ccas351m.s:584 .text.HAL_PWREx_DisableGPIOPullUp:00000000 HAL_PWREx_DisableGPIOPullUp
/tmp/ccas351m.s:600 .text.HAL_PWREx_DisableGPIOPullUp:00000008 $d
/tmp/ccas351m.s:720 .text.HAL_PWREx_DisableGPIOPullUp:00000088 $d
/tmp/ccas351m.s:725 .text.HAL_PWREx_EnableGPIOPullDown:00000000 $t
/tmp/ccas351m.s:731 .text.HAL_PWREx_EnableGPIOPullDown:00000000 HAL_PWREx_EnableGPIOPullDown
/tmp/ccas351m.s:747 .text.HAL_PWREx_EnableGPIOPullDown:00000008 $d
/tmp/ccas351m.s:898 .text.HAL_PWREx_EnableGPIOPullDown:000000b8 $d
/tmp/ccas351m.s:903 .text.HAL_PWREx_DisableGPIOPullDown:00000000 $t
/tmp/ccas351m.s:909 .text.HAL_PWREx_DisableGPIOPullDown:00000000 HAL_PWREx_DisableGPIOPullDown
/tmp/ccas351m.s:925 .text.HAL_PWREx_DisableGPIOPullDown:00000008 $d
/tmp/ccas351m.s:1044 .text.HAL_PWREx_DisableGPIOPullDown:00000084 $d
/tmp/ccas351m.s:1049 .text.HAL_PWREx_EnablePullUpPullDownConfig:00000000 $t
/tmp/ccas351m.s:1055 .text.HAL_PWREx_EnablePullUpPullDownConfig:00000000 HAL_PWREx_EnablePullUpPullDownConfig
/tmp/ccas351m.s:1072 .text.HAL_PWREx_EnablePullUpPullDownConfig:0000000c $d
/tmp/ccas351m.s:1077 .text.HAL_PWREx_DisablePullUpPullDownConfig:00000000 $t
/tmp/ccas351m.s:1083 .text.HAL_PWREx_DisablePullUpPullDownConfig:00000000 HAL_PWREx_DisablePullUpPullDownConfig
/tmp/ccas351m.s:1100 .text.HAL_PWREx_DisablePullUpPullDownConfig:0000000c $d
/tmp/ccas351m.s:1105 .text.HAL_PWREx_EnableSRAM2ContentRetention:00000000 $t
/tmp/ccas351m.s:1111 .text.HAL_PWREx_EnableSRAM2ContentRetention:00000000 HAL_PWREx_EnableSRAM2ContentRetention
/tmp/ccas351m.s:1128 .text.HAL_PWREx_EnableSRAM2ContentRetention:0000000c $d
/tmp/ccas351m.s:1133 .text.HAL_PWREx_DisableSRAM2ContentRetention:00000000 $t
/tmp/ccas351m.s:1139 .text.HAL_PWREx_DisableSRAM2ContentRetention:00000000 HAL_PWREx_DisableSRAM2ContentRetention
/tmp/ccas351m.s:1156 .text.HAL_PWREx_DisableSRAM2ContentRetention:0000000c $d
/tmp/ccas351m.s:1161 .text.HAL_PWREx_EnablePVM1:00000000 $t
/tmp/ccas351m.s:1167 .text.HAL_PWREx_EnablePVM1:00000000 HAL_PWREx_EnablePVM1
/tmp/ccas351m.s:1184 .text.HAL_PWREx_EnablePVM1:0000000c $d
/tmp/ccas351m.s:1189 .text.HAL_PWREx_DisablePVM1:00000000 $t
/tmp/ccas351m.s:1195 .text.HAL_PWREx_DisablePVM1:00000000 HAL_PWREx_DisablePVM1
/tmp/ccas351m.s:1212 .text.HAL_PWREx_DisablePVM1:0000000c $d
/tmp/ccas351m.s:1217 .text.HAL_PWREx_EnablePVM2:00000000 $t
/tmp/ccas351m.s:1223 .text.HAL_PWREx_EnablePVM2:00000000 HAL_PWREx_EnablePVM2
/tmp/ccas351m.s:1240 .text.HAL_PWREx_EnablePVM2:0000000c $d
ARM GAS /tmp/ccas351m.s page 66
/tmp/ccebRljS.s:1245 .text.HAL_PWREx_DisablePVM2:00000000 $t
/tmp/ccebRljS.s:1251 .text.HAL_PWREx_DisablePVM2:00000000 HAL_PWREx_DisablePVM2
/tmp/ccebRljS.s:1268 .text.HAL_PWREx_DisablePVM2:0000000c $d
/tmp/ccebRljS.s:1273 .text.HAL_PWREx_EnablePVM3:00000000 $t
/tmp/ccebRljS.s:1279 .text.HAL_PWREx_EnablePVM3:00000000 HAL_PWREx_EnablePVM3
/tmp/ccebRljS.s:1296 .text.HAL_PWREx_EnablePVM3:0000000c $d
/tmp/ccebRljS.s:1301 .text.HAL_PWREx_DisablePVM3:00000000 $t
/tmp/ccebRljS.s:1307 .text.HAL_PWREx_DisablePVM3:00000000 HAL_PWREx_DisablePVM3
/tmp/ccebRljS.s:1324 .text.HAL_PWREx_DisablePVM3:0000000c $d
/tmp/ccebRljS.s:1329 .text.HAL_PWREx_EnablePVM4:00000000 $t
/tmp/ccebRljS.s:1335 .text.HAL_PWREx_EnablePVM4:00000000 HAL_PWREx_EnablePVM4
/tmp/ccebRljS.s:1352 .text.HAL_PWREx_EnablePVM4:0000000c $d
/tmp/ccebRljS.s:1357 .text.HAL_PWREx_DisablePVM4:00000000 $t
/tmp/ccebRljS.s:1363 .text.HAL_PWREx_DisablePVM4:00000000 HAL_PWREx_DisablePVM4
/tmp/ccebRljS.s:1380 .text.HAL_PWREx_DisablePVM4:0000000c $d
/tmp/ccebRljS.s:1385 .text.HAL_PWREx_ConfigPVM:00000000 $t
/tmp/ccebRljS.s:1391 .text.HAL_PWREx_ConfigPVM:00000000 HAL_PWREx_ConfigPVM
/tmp/ccebRljS.s:1744 .text.HAL_PWREx_ConfigPVM:000001e8 $d
/tmp/ccebRljS.s:1749 .text.HAL_PWREx_EnableLowPowerRunMode:00000000 $t
/tmp/ccebRljS.s:1755 .text.HAL_PWREx_EnableLowPowerRunMode:00000000 HAL_PWREx_EnableLowPowerRunMode
/tmp/ccebRljS.s:1772 .text.HAL_PWREx_EnableLowPowerRunMode:0000000c $d
/tmp/ccebRljS.s:1777 .text.HAL_PWREx_DisableLowPowerRunMode:00000000 $t
/tmp/ccebRljS.s:1783 .text.HAL_PWREx_DisableLowPowerRunMode:00000000 HAL_PWREx_DisableLowPowerRunMode
/tmp/ccebRljS.s:1849 .text.HAL_PWREx_DisableLowPowerRunMode:0000004c $d
/tmp/ccebRljS.s:1855 .text.HAL_PWREx_EnterSTOP0Mode:00000000 $t
/tmp/ccebRljS.s:1861 .text.HAL_PWREx_EnterSTOP0Mode:00000000 HAL_PWREx_EnterSTOP0Mode
/tmp/ccebRljS.s:1919 .text.HAL_PWREx_EnterSTOP0Mode:00000030 $d
/tmp/ccebRljS.s:1925 .text.HAL_PWREx_EnterSTOP1Mode:00000000 $t
/tmp/ccebRljS.s:1931 .text.HAL_PWREx_EnterSTOP1Mode:00000000 HAL_PWREx_EnterSTOP1Mode
/tmp/ccebRljS.s:1990 .text.HAL_PWREx_EnterSTOP1Mode:00000034 $d
/tmp/ccebRljS.s:1996 .text.HAL_PWREx_EnterSHUTDOWNMode:00000000 $t
/tmp/ccebRljS.s:2002 .text.HAL_PWREx_EnterSHUTDOWNMode:00000000 HAL_PWREx_EnterSHUTDOWNMode
/tmp/ccebRljS.s:2032 .text.HAL_PWREx_EnterSHUTDOWNMode:0000001c $d
/tmp/ccebRljS.s:2038 .text.HAL_PWREx_PVM1Callback:00000000 $t
/tmp/ccebRljS.s:2044 .text.HAL_PWREx_PVM1Callback:00000000 HAL_PWREx_PVM1Callback
/tmp/ccebRljS.s:2057 .text.HAL_PWREx_PVM2Callback:00000000 $t
/tmp/ccebRljS.s:2063 .text.HAL_PWREx_PVM2Callback:00000000 HAL_PWREx_PVM2Callback
/tmp/ccebRljS.s:2076 .text.HAL_PWREx_PVM3Callback:00000000 $t
/tmp/ccebRljS.s:2082 .text.HAL_PWREx_PVM3Callback:00000000 HAL_PWREx_PVM3Callback
/tmp/ccebRljS.s:2095 .text.HAL_PWREx_PVM4Callback:00000000 $t
/tmp/ccebRljS.s:2101 .text.HAL_PWREx_PVM4Callback:00000000 HAL_PWREx_PVM4Callback
/tmp/ccebRljS.s:2114 .text.HAL_PWREx_PVD_PVM_IRQHandler:00000000 $t
/tmp/ccebRljS.s:2120 .text.HAL_PWREx_PVD_PVM_IRQHandler:00000000 HAL_PWREx_PVD_PVM_IRQHandler
/tmp/ccebRljS.s:2222 .text.HAL_PWREx_PVD_PVM_IRQHandler:00000074 $d
/tmp/ccebRljS.s:2227 .text.HAL_PWREx_EnableUCPDStandbyMode:00000000 $t
/tmp/ccebRljS.s:2233 .text.HAL_PWREx_EnableUCPDStandbyMode:00000000 HAL_PWREx_EnableUCPDStandbyMode
/tmp/ccebRljS.s:2250 .text.HAL_PWREx_EnableUCPDStandbyMode:0000000c $d
/tmp/ccebRljS.s:2255 .text.HAL_PWREx_DisableUCPDStandbyMode:00000000 $t
/tmp/ccebRljS.s:2261 .text.HAL_PWREx_DisableUCPDStandbyMode:00000000 HAL_PWREx_DisableUCPDStandbyMode
/tmp/ccebRljS.s:2278 .text.HAL_PWREx_DisableUCPDStandbyMode:0000000c $d
/tmp/ccebRljS.s:2283 .text.HAL_PWREx_EnableUCPDDeadBattery:00000000 $t
/tmp/ccebRljS.s:2289 .text.HAL_PWREx_EnableUCPDDeadBattery:00000000 HAL_PWREx_EnableUCPDDeadBattery
/tmp/ccebRljS.s:2306 .text.HAL_PWREx_EnableUCPDDeadBattery:0000000c $d
/tmp/ccebRljS.s:2311 .text.HAL_PWREx_DisableUCPDDeadBattery:00000000 $t
/tmp/ccebRljS.s:2317 .text.HAL_PWREx_DisableUCPDDeadBattery:00000000 HAL_PWREx_DisableUCPDDeadBattery
/tmp/ccebRljS.s:2334 .text.HAL_PWREx_DisableUCPDDeadBattery:0000000c $d
/tmp/ccebRljS.s:428 .text.HAL_PWREx_EnableGPIOPullUp:0000000f $d
ARM GAS /tmp/ccebRljS.s page 67
/tmp/ccas351m.s:1245 .text.HAL_PWREx_DisablePVM2:00000000 $t
/tmp/ccas351m.s:1251 .text.HAL_PWREx_DisablePVM2:00000000 HAL_PWREx_DisablePVM2
/tmp/ccas351m.s:1268 .text.HAL_PWREx_DisablePVM2:0000000c $d
/tmp/ccas351m.s:1273 .text.HAL_PWREx_EnablePVM3:00000000 $t
/tmp/ccas351m.s:1279 .text.HAL_PWREx_EnablePVM3:00000000 HAL_PWREx_EnablePVM3
/tmp/ccas351m.s:1296 .text.HAL_PWREx_EnablePVM3:0000000c $d
/tmp/ccas351m.s:1301 .text.HAL_PWREx_DisablePVM3:00000000 $t
/tmp/ccas351m.s:1307 .text.HAL_PWREx_DisablePVM3:00000000 HAL_PWREx_DisablePVM3
/tmp/ccas351m.s:1324 .text.HAL_PWREx_DisablePVM3:0000000c $d
/tmp/ccas351m.s:1329 .text.HAL_PWREx_EnablePVM4:00000000 $t
/tmp/ccas351m.s:1335 .text.HAL_PWREx_EnablePVM4:00000000 HAL_PWREx_EnablePVM4
/tmp/ccas351m.s:1352 .text.HAL_PWREx_EnablePVM4:0000000c $d
/tmp/ccas351m.s:1357 .text.HAL_PWREx_DisablePVM4:00000000 $t
/tmp/ccas351m.s:1363 .text.HAL_PWREx_DisablePVM4:00000000 HAL_PWREx_DisablePVM4
/tmp/ccas351m.s:1380 .text.HAL_PWREx_DisablePVM4:0000000c $d
/tmp/ccas351m.s:1385 .text.HAL_PWREx_ConfigPVM:00000000 $t
/tmp/ccas351m.s:1391 .text.HAL_PWREx_ConfigPVM:00000000 HAL_PWREx_ConfigPVM
/tmp/ccas351m.s:1744 .text.HAL_PWREx_ConfigPVM:000001e8 $d
/tmp/ccas351m.s:1749 .text.HAL_PWREx_EnableLowPowerRunMode:00000000 $t
/tmp/ccas351m.s:1755 .text.HAL_PWREx_EnableLowPowerRunMode:00000000 HAL_PWREx_EnableLowPowerRunMode
/tmp/ccas351m.s:1772 .text.HAL_PWREx_EnableLowPowerRunMode:0000000c $d
/tmp/ccas351m.s:1777 .text.HAL_PWREx_DisableLowPowerRunMode:00000000 $t
/tmp/ccas351m.s:1783 .text.HAL_PWREx_DisableLowPowerRunMode:00000000 HAL_PWREx_DisableLowPowerRunMode
/tmp/ccas351m.s:1849 .text.HAL_PWREx_DisableLowPowerRunMode:0000004c $d
/tmp/ccas351m.s:1855 .text.HAL_PWREx_EnterSTOP0Mode:00000000 $t
/tmp/ccas351m.s:1861 .text.HAL_PWREx_EnterSTOP0Mode:00000000 HAL_PWREx_EnterSTOP0Mode
/tmp/ccas351m.s:1919 .text.HAL_PWREx_EnterSTOP0Mode:00000030 $d
/tmp/ccas351m.s:1925 .text.HAL_PWREx_EnterSTOP1Mode:00000000 $t
/tmp/ccas351m.s:1931 .text.HAL_PWREx_EnterSTOP1Mode:00000000 HAL_PWREx_EnterSTOP1Mode
/tmp/ccas351m.s:1990 .text.HAL_PWREx_EnterSTOP1Mode:00000034 $d
/tmp/ccas351m.s:1996 .text.HAL_PWREx_EnterSHUTDOWNMode:00000000 $t
/tmp/ccas351m.s:2002 .text.HAL_PWREx_EnterSHUTDOWNMode:00000000 HAL_PWREx_EnterSHUTDOWNMode
/tmp/ccas351m.s:2032 .text.HAL_PWREx_EnterSHUTDOWNMode:0000001c $d
/tmp/ccas351m.s:2038 .text.HAL_PWREx_PVM1Callback:00000000 $t
/tmp/ccas351m.s:2044 .text.HAL_PWREx_PVM1Callback:00000000 HAL_PWREx_PVM1Callback
/tmp/ccas351m.s:2057 .text.HAL_PWREx_PVM2Callback:00000000 $t
/tmp/ccas351m.s:2063 .text.HAL_PWREx_PVM2Callback:00000000 HAL_PWREx_PVM2Callback
/tmp/ccas351m.s:2076 .text.HAL_PWREx_PVM3Callback:00000000 $t
/tmp/ccas351m.s:2082 .text.HAL_PWREx_PVM3Callback:00000000 HAL_PWREx_PVM3Callback
/tmp/ccas351m.s:2095 .text.HAL_PWREx_PVM4Callback:00000000 $t
/tmp/ccas351m.s:2101 .text.HAL_PWREx_PVM4Callback:00000000 HAL_PWREx_PVM4Callback
/tmp/ccas351m.s:2114 .text.HAL_PWREx_PVD_PVM_IRQHandler:00000000 $t
/tmp/ccas351m.s:2120 .text.HAL_PWREx_PVD_PVM_IRQHandler:00000000 HAL_PWREx_PVD_PVM_IRQHandler
/tmp/ccas351m.s:2222 .text.HAL_PWREx_PVD_PVM_IRQHandler:00000074 $d
/tmp/ccas351m.s:2227 .text.HAL_PWREx_EnableUCPDStandbyMode:00000000 $t
/tmp/ccas351m.s:2233 .text.HAL_PWREx_EnableUCPDStandbyMode:00000000 HAL_PWREx_EnableUCPDStandbyMode
/tmp/ccas351m.s:2250 .text.HAL_PWREx_EnableUCPDStandbyMode:0000000c $d
/tmp/ccas351m.s:2255 .text.HAL_PWREx_DisableUCPDStandbyMode:00000000 $t
/tmp/ccas351m.s:2261 .text.HAL_PWREx_DisableUCPDStandbyMode:00000000 HAL_PWREx_DisableUCPDStandbyMode
/tmp/ccas351m.s:2278 .text.HAL_PWREx_DisableUCPDStandbyMode:0000000c $d
/tmp/ccas351m.s:2283 .text.HAL_PWREx_EnableUCPDDeadBattery:00000000 $t
/tmp/ccas351m.s:2289 .text.HAL_PWREx_EnableUCPDDeadBattery:00000000 HAL_PWREx_EnableUCPDDeadBattery
/tmp/ccas351m.s:2306 .text.HAL_PWREx_EnableUCPDDeadBattery:0000000c $d
/tmp/ccas351m.s:2311 .text.HAL_PWREx_DisableUCPDDeadBattery:00000000 $t
/tmp/ccas351m.s:2317 .text.HAL_PWREx_DisableUCPDDeadBattery:00000000 HAL_PWREx_DisableUCPDDeadBattery
/tmp/ccas351m.s:2334 .text.HAL_PWREx_DisableUCPDDeadBattery:0000000c $d
/tmp/ccas351m.s:428 .text.HAL_PWREx_EnableGPIOPullUp:0000000f $d
ARM GAS /tmp/ccas351m.s page 67
/tmp/ccebRljS.s:428 .text.HAL_PWREx_EnableGPIOPullUp:00000010 $t
/tmp/ccebRljS.s:607 .text.HAL_PWREx_DisableGPIOPullUp:0000000f $d
/tmp/ccebRljS.s:607 .text.HAL_PWREx_DisableGPIOPullUp:00000010 $t
/tmp/ccebRljS.s:754 .text.HAL_PWREx_EnableGPIOPullDown:0000000f $d
/tmp/ccebRljS.s:754 .text.HAL_PWREx_EnableGPIOPullDown:00000010 $t
/tmp/ccebRljS.s:932 .text.HAL_PWREx_DisableGPIOPullDown:0000000f $d
/tmp/ccebRljS.s:932 .text.HAL_PWREx_DisableGPIOPullDown:00000010 $t
/tmp/ccas351m.s:428 .text.HAL_PWREx_EnableGPIOPullUp:00000010 $t
/tmp/ccas351m.s:607 .text.HAL_PWREx_DisableGPIOPullUp:0000000f $d
/tmp/ccas351m.s:607 .text.HAL_PWREx_DisableGPIOPullUp:00000010 $t
/tmp/ccas351m.s:754 .text.HAL_PWREx_EnableGPIOPullDown:0000000f $d
/tmp/ccas351m.s:754 .text.HAL_PWREx_EnableGPIOPullDown:00000010 $t
/tmp/ccas351m.s:932 .text.HAL_PWREx_DisableGPIOPullDown:0000000f $d
/tmp/ccas351m.s:932 .text.HAL_PWREx_DisableGPIOPullDown:00000010 $t
UNDEFINED SYMBOLS
SystemCoreClock
squeow_sw/build/stm32g4xx_hal_pwr_ex.o
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squeow_sw/build/stm32g4xx_hal_rcc.lst
+2402 -2394
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squeow_sw/build/stm32g4xx_hal_rcc.o
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squeow_sw/build/stm32g4xx_hal_rcc_ex.lst
+1228 -1227
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squeow_sw/build/stm32g4xx_hal_rcc_ex.o
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squeow_sw/build/stm32g4xx_hal_tim.lst
+16913 -16990
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squeow_sw/build/stm32g4xx_hal_tim.o
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squeow_sw/build/stm32g4xx_hal_tim_ex.lst
+7486 -7579
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squeow_sw/build/stm32g4xx_hal_tim_ex.o
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squeow_sw/build/stm32g4xx_hal_uart.lst
+3084 -3080
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squeow_sw/build/stm32g4xx_hal_uart.o
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squeow_sw/build/stm32g4xx_hal_uart_ex.lst
+341 -342
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+533 -495
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squeow_sw/build/stm32g4xx_ll_adc.lst
+2 -2
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@@ -1,4 +1,4 @@
ARM GAS /tmp/ccuf3S2j.s page 1
ARM GAS /tmp/ccAKK91I.s page 1
1 .cpu cortex-m4
@@ -21,7 +21,7 @@ ARM GAS /tmp/ccuf3S2j.s page 1
18 .cfi_sections .debug_frame
19 .file 1 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c"
20 .Letext0:
ARM GAS /tmp/ccuf3S2j.s page 2
ARM GAS /tmp/ccAKK91I.s page 2
DEFINED SYMBOLS
squeow_sw/build/stm32g4xx_ll_adc.o
BIN
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squeow_sw/build/syscalls.lst
+63 -63
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@@ -1,4 +1,4 @@
ARM GAS /tmp/ccmoNW8o.s page 1
ARM GAS /tmp/ccwgOdCz.s page 1
1 .cpu cortex-m4
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccmoNW8o.s page 1
28:Src/syscalls.c **** #include <signal.h>
29:Src/syscalls.c **** #include <time.h>
30:Src/syscalls.c **** #include <sys/time.h>
ARM GAS /tmp/ccmoNW8o.s page 2
ARM GAS /tmp/ccwgOdCz.s page 2
31:Src/syscalls.c **** #include <sys/times.h>
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccmoNW8o.s page 1
65 .thumb_func
67 _kill:
68 .LVL0:
ARM GAS /tmp/ccmoNW8o.s page 3
ARM GAS /tmp/ccwgOdCz.s page 3
69 .LFB27:
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccmoNW8o.s page 1
114 .cfi_offset 3, -8
115 .cfi_offset 14, -4
63:Src/syscalls.c **** _kill(status, -1);
ARM GAS /tmp/ccmoNW8o.s page 4
ARM GAS /tmp/ccwgOdCz.s page 4
116 .loc 1 63 3 is_stmt 1 view .LVU15
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccmoNW8o.s page 1
74:Src/syscalls.c **** *ptr++ = __io_getchar();
162 .loc 1 74 5 is_stmt 1 view .LVU26
163 .loc 1 74 14 is_stmt 0 view .LVU27
ARM GAS /tmp/ccmoNW8o.s page 5
ARM GAS /tmp/ccwgOdCz.s page 5
164 000a FFF7FEFF bl __io_getchar
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccmoNW8o.s page 1
211 .cfi_offset 14, -4
212 0002 0C46 mov r4, r1
213 0004 1646 mov r6, r2
ARM GAS /tmp/ccmoNW8o.s page 6
ARM GAS /tmp/ccwgOdCz.s page 6
82:Src/syscalls.c **** (void)file;
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccmoNW8o.s page 1
256 .loc 1 93 1 is_stmt 1 view -0
257 .cfi_startproc
258 @ args = 0, pretend = 0, frame = 0
ARM GAS /tmp/ccmoNW8o.s page 7
ARM GAS /tmp/ccwgOdCz.s page 7
259 @ frame_needed = 0, uses_anonymous_args = 0
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccmoNW8o.s page 1
305 .thumb_func
307 _isatty:
308 .LVL22:
ARM GAS /tmp/ccmoNW8o.s page 8
ARM GAS /tmp/ccwgOdCz.s page 8
309 .LFB33:
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccmoNW8o.s page 1
352 .section .text._open,"ax",%progbits
353 .align 1
354 .global _open
ARM GAS /tmp/ccmoNW8o.s page 9
ARM GAS /tmp/ccwgOdCz.s page 9
355 .syntax unified
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccmoNW8o.s page 1
401 .loc 1 129 1 is_stmt 1 view -0
402 .cfi_startproc
403 @ args = 0, pretend = 0, frame = 0
ARM GAS /tmp/ccmoNW8o.s page 10
ARM GAS /tmp/ccwgOdCz.s page 10
404 @ frame_needed = 0, uses_anonymous_args = 0
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccmoNW8o.s page 1
451 0008 0360 str r3, [r0]
139:Src/syscalls.c **** return -1;
452 .loc 1 139 3 is_stmt 1 view .LVU94
ARM GAS /tmp/ccmoNW8o.s page 11
ARM GAS /tmp/ccwgOdCz.s page 11
140:Src/syscalls.c **** }
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccmoNW8o.s page 1
151:Src/syscalls.c **** st->st_mode = S_IFCHR;
500 .loc 1 151 3 view .LVU103
501 .loc 1 151 15 is_stmt 0 view .LVU104
ARM GAS /tmp/ccmoNW8o.s page 12
ARM GAS /tmp/ccwgOdCz.s page 12
502 0000 4FF40053 mov r3, #8192
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccmoNW8o.s page 1
549 .align 1
550 .global _fork
551 .syntax unified
ARM GAS /tmp/ccmoNW8o.s page 13
ARM GAS /tmp/ccwgOdCz.s page 13
552 .thumb
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccmoNW8o.s page 1
599 .loc 1 171 3 is_stmt 1 view .LVU123
172:Src/syscalls.c **** (void)argv;
600 .loc 1 172 3 view .LVU124
ARM GAS /tmp/ccmoNW8o.s page 14
ARM GAS /tmp/ccwgOdCz.s page 14
173:Src/syscalls.c **** (void)env;
@@ -812,59 +812,59 @@ ARM GAS /tmp/ccmoNW8o.s page 1
630 .weak __io_getchar
631 .text
632 .Letext0:
633 .file 2 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
634 .file 3 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
635 .file 4 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
636 .file 5 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
637 .file 6 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
638 .file 7 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
639 .file 8 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
640 .file 9 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
ARM GAS /tmp/ccmoNW8o.s page 15
633 .file 2 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
634 .file 3 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
635 .file 4 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
636 .file 5 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
637 .file 6 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
638 .file 7 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
639 .file 8 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
640 .file 9 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
ARM GAS /tmp/ccwgOdCz.s page 15
DEFINED SYMBOLS
*ABS*:00000000 syscalls.c
/tmp/ccmoNW8o.s:21 .text.initialise_monitor_handles:00000000 $t
/tmp/ccmoNW8o.s:27 .text.initialise_monitor_handles:00000000 initialise_monitor_handles
/tmp/ccmoNW8o.s:40 .text._getpid:00000000 $t
/tmp/ccmoNW8o.s:46 .text._getpid:00000000 _getpid
/tmp/ccmoNW8o.s:61 .text._kill:00000000 $t
/tmp/ccmoNW8o.s:67 .text._kill:00000000 _kill
/tmp/ccmoNW8o.s:96 .text._exit:00000000 $t
/tmp/ccmoNW8o.s:102 .text._exit:00000000 _exit
/tmp/ccmoNW8o.s:129 .text._read:00000000 $t
/tmp/ccmoNW8o.s:135 .text._read:00000000 _read
/tmp/ccmoNW8o.s:191 .text._write:00000000 $t
/tmp/ccmoNW8o.s:197 .text._write:00000000 _write
/tmp/ccmoNW8o.s:247 .text._close:00000000 $t
/tmp/ccmoNW8o.s:253 .text._close:00000000 _close
/tmp/ccmoNW8o.s:272 .text._fstat:00000000 $t
/tmp/ccmoNW8o.s:278 .text._fstat:00000000 _fstat
/tmp/ccmoNW8o.s:301 .text._isatty:00000000 $t
/tmp/ccmoNW8o.s:307 .text._isatty:00000000 _isatty
/tmp/ccmoNW8o.s:326 .text._lseek:00000000 $t
/tmp/ccmoNW8o.s:332 .text._lseek:00000000 _lseek
/tmp/ccmoNW8o.s:353 .text._open:00000000 $t
/tmp/ccmoNW8o.s:359 .text._open:00000000 _open
/tmp/ccmoNW8o.s:392 .text._wait:00000000 $t
/tmp/ccmoNW8o.s:398 .text._wait:00000000 _wait
/tmp/ccmoNW8o.s:426 .text._unlink:00000000 $t
/tmp/ccmoNW8o.s:432 .text._unlink:00000000 _unlink
/tmp/ccmoNW8o.s:460 .text._times:00000000 $t
/tmp/ccmoNW8o.s:466 .text._times:00000000 _times
/tmp/ccmoNW8o.s:485 .text._stat:00000000 $t
/tmp/ccmoNW8o.s:491 .text._stat:00000000 _stat
/tmp/ccmoNW8o.s:514 .text._link:00000000 $t
/tmp/ccmoNW8o.s:520 .text._link:00000000 _link
/tmp/ccmoNW8o.s:549 .text._fork:00000000 $t
/tmp/ccmoNW8o.s:555 .text._fork:00000000 _fork
/tmp/ccmoNW8o.s:580 .text._execve:00000000 $t
/tmp/ccmoNW8o.s:586 .text._execve:00000000 _execve
/tmp/ccmoNW8o.s:620 .data.environ:00000000 environ
/tmp/ccmoNW8o.s:617 .data.environ:00000000 $d
/tmp/ccmoNW8o.s:627 .bss.__env:00000000 __env
/tmp/ccmoNW8o.s:624 .bss.__env:00000000 $d
/tmp/ccwgOdCz.s:21 .text.initialise_monitor_handles:00000000 $t
/tmp/ccwgOdCz.s:27 .text.initialise_monitor_handles:00000000 initialise_monitor_handles
/tmp/ccwgOdCz.s:40 .text._getpid:00000000 $t
/tmp/ccwgOdCz.s:46 .text._getpid:00000000 _getpid
/tmp/ccwgOdCz.s:61 .text._kill:00000000 $t
/tmp/ccwgOdCz.s:67 .text._kill:00000000 _kill
/tmp/ccwgOdCz.s:96 .text._exit:00000000 $t
/tmp/ccwgOdCz.s:102 .text._exit:00000000 _exit
/tmp/ccwgOdCz.s:129 .text._read:00000000 $t
/tmp/ccwgOdCz.s:135 .text._read:00000000 _read
/tmp/ccwgOdCz.s:191 .text._write:00000000 $t
/tmp/ccwgOdCz.s:197 .text._write:00000000 _write
/tmp/ccwgOdCz.s:247 .text._close:00000000 $t
/tmp/ccwgOdCz.s:253 .text._close:00000000 _close
/tmp/ccwgOdCz.s:272 .text._fstat:00000000 $t
/tmp/ccwgOdCz.s:278 .text._fstat:00000000 _fstat
/tmp/ccwgOdCz.s:301 .text._isatty:00000000 $t
/tmp/ccwgOdCz.s:307 .text._isatty:00000000 _isatty
/tmp/ccwgOdCz.s:326 .text._lseek:00000000 $t
/tmp/ccwgOdCz.s:332 .text._lseek:00000000 _lseek
/tmp/ccwgOdCz.s:353 .text._open:00000000 $t
/tmp/ccwgOdCz.s:359 .text._open:00000000 _open
/tmp/ccwgOdCz.s:392 .text._wait:00000000 $t
/tmp/ccwgOdCz.s:398 .text._wait:00000000 _wait
/tmp/ccwgOdCz.s:426 .text._unlink:00000000 $t
/tmp/ccwgOdCz.s:432 .text._unlink:00000000 _unlink
/tmp/ccwgOdCz.s:460 .text._times:00000000 $t
/tmp/ccwgOdCz.s:466 .text._times:00000000 _times
/tmp/ccwgOdCz.s:485 .text._stat:00000000 $t
/tmp/ccwgOdCz.s:491 .text._stat:00000000 _stat
/tmp/ccwgOdCz.s:514 .text._link:00000000 $t
/tmp/ccwgOdCz.s:520 .text._link:00000000 _link
/tmp/ccwgOdCz.s:549 .text._fork:00000000 $t
/tmp/ccwgOdCz.s:555 .text._fork:00000000 _fork
/tmp/ccwgOdCz.s:580 .text._execve:00000000 $t
/tmp/ccwgOdCz.s:586 .text._execve:00000000 _execve
/tmp/ccwgOdCz.s:620 .data.environ:00000000 environ
/tmp/ccwgOdCz.s:617 .data.environ:00000000 $d
/tmp/ccwgOdCz.s:627 .bss.__env:00000000 __env
/tmp/ccwgOdCz.s:624 .bss.__env:00000000 $d
UNDEFINED SYMBOLS
__errno
squeow_sw/build/syscalls.o
BIN
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squeow_sw/build/sysmem.lst
+14 -14
View File
@@ -1,4 +1,4 @@
ARM GAS /tmp/cc71oTUd.s page 1
ARM GAS /tmp/ccRdhNuV.s page 1
1 .cpu cortex-m4
@@ -58,7 +58,7 @@ ARM GAS /tmp/cc71oTUd.s page 1
27:Src/sysmem.c **** /**
28:Src/sysmem.c **** * Pointer to the current high watermark of the heap usage
29:Src/sysmem.c **** */
ARM GAS /tmp/cc71oTUd.s page 2
ARM GAS /tmp/ccRdhNuV.s page 2
30:Src/sysmem.c **** static uint8_t *__sbrk_heap_end = NULL;
@@ -118,7 +118,7 @@ ARM GAS /tmp/cc71oTUd.s page 1
61:Src/sysmem.c ****
62:Src/sysmem.c **** /* Initialize heap end at first call */
63:Src/sysmem.c **** if (NULL == __sbrk_heap_end)
ARM GAS /tmp/cc71oTUd.s page 3
ARM GAS /tmp/ccRdhNuV.s page 3
52 .loc 1 63 3 view .LVU9
@@ -178,7 +178,7 @@ ARM GAS /tmp/cc71oTUd.s page 1
88 0024 0460 str r4, [r0]
89 0026 F2E7 b .L2
90 .LVL8:
ARM GAS /tmp/cc71oTUd.s page 4
ARM GAS /tmp/ccRdhNuV.s page 4
91 .L7:
@@ -211,20 +211,20 @@ ARM GAS /tmp/cc71oTUd.s page 1
117 0000 00000000 .space 4
118 .text
119 .Letext0:
120 .file 2 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/lib/gcc/arm-none-eabi/13.3
121 .file 3 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
122 .file 4 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
123 .file 5 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
ARM GAS /tmp/cc71oTUd.s page 5
120 .file 2 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/lib/gcc/arm-none-eabi/14.2
121 .file 3 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
122 .file 4 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
123 .file 5 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
ARM GAS /tmp/ccRdhNuV.s page 5
DEFINED SYMBOLS
*ABS*:00000000 sysmem.c
/tmp/cc71oTUd.s:21 .text._sbrk:00000000 $t
/tmp/cc71oTUd.s:27 .text._sbrk:00000000 _sbrk
/tmp/cc71oTUd.s:105 .text._sbrk:00000038 $d
/tmp/cc71oTUd.s:116 .bss.__sbrk_heap_end:00000000 __sbrk_heap_end
/tmp/cc71oTUd.s:113 .bss.__sbrk_heap_end:00000000 $d
/tmp/ccRdhNuV.s:21 .text._sbrk:00000000 $t
/tmp/ccRdhNuV.s:27 .text._sbrk:00000000 _sbrk
/tmp/ccRdhNuV.s:105 .text._sbrk:00000038 $d
/tmp/ccRdhNuV.s:116 .bss.__sbrk_heap_end:00000000 __sbrk_heap_end
/tmp/ccRdhNuV.s:113 .bss.__sbrk_heap_end:00000000 $d
UNDEFINED SYMBOLS
__errno
squeow_sw/build/sysmem.o
BIN
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squeow_sw/build/system_stm32g4xx.lst
+26 -26
View File
@@ -1,4 +1,4 @@
ARM GAS /tmp/ccV7jtdT.s page 1
ARM GAS /tmp/ccvxi4x8.s page 1
1 .cpu cortex-m4
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccV7jtdT.s page 1
28:Src/system_stm32g4xx.c **** * System Clock source | HSI
29:Src/system_stm32g4xx.c **** *-----------------------------------------------------------------------------
30:Src/system_stm32g4xx.c **** * SYSCLK(Hz) | 16000000
ARM GAS /tmp/ccV7jtdT.s page 2
ARM GAS /tmp/ccvxi4x8.s page 2
31:Src/system_stm32g4xx.c **** *-----------------------------------------------------------------------------
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccV7jtdT.s page 1
85:Src/system_stm32g4xx.c **** #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
86:Src/system_stm32g4xx.c **** #endif /* HSI_VALUE */
87:Src/system_stm32g4xx.c ****
ARM GAS /tmp/ccV7jtdT.s page 3
ARM GAS /tmp/ccvxi4x8.s page 3
88:Src/system_stm32g4xx.c **** /**
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccV7jtdT.s page 1
142:Src/system_stm32g4xx.c **** * @{
143:Src/system_stm32g4xx.c **** */
144:Src/system_stm32g4xx.c **** /* The SystemCoreClock variable is updated in three ways:
ARM GAS /tmp/ccV7jtdT.s page 4
ARM GAS /tmp/ccvxi4x8.s page 4
145:Src/system_stm32g4xx.c **** 1) by calling CMSIS function SystemCoreClockUpdate()
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccV7jtdT.s page 1
187:Src/system_stm32g4xx.c **** #if defined(USER_VECT_TAB_ADDRESS)
188:Src/system_stm32g4xx.c **** SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM
189:Src/system_stm32g4xx.c **** #endif /* USER_VECT_TAB_ADDRESS */
ARM GAS /tmp/ccV7jtdT.s page 5
ARM GAS /tmp/ccvxi4x8.s page 5
190:Src/system_stm32g4xx.c **** }
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccV7jtdT.s page 1
228:Src/system_stm32g4xx.c **** void SystemCoreClockUpdate(void)
229:Src/system_stm32g4xx.c **** {
59 .loc 1 229 1 is_stmt 1 view -0
ARM GAS /tmp/ccV7jtdT.s page 6
ARM GAS /tmp/ccvxi4x8.s page 6
60 .cfi_startproc
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccV7jtdT.s page 1
259:Src/system_stm32g4xx.c **** SystemCoreClock = pllvco/pllr;
260:Src/system_stm32g4xx.c **** break;
261:Src/system_stm32g4xx.c ****
ARM GAS /tmp/ccV7jtdT.s page 7
ARM GAS /tmp/ccvxi4x8.s page 7
262:Src/system_stm32g4xx.c **** default:
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccV7jtdT.s page 1
122 0040 D268 ldr r2, [r2, #12]
248:Src/system_stm32g4xx.c **** if (pllsource == 0x02UL) /* HSI used as PLL clock source */
123 .loc 1 248 49 view .LVU29
ARM GAS /tmp/ccV7jtdT.s page 8
ARM GAS /tmp/ccvxi4x8.s page 8
124 0042 C2F30312 ubfx r2, r2, #4, #4
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccV7jtdT.s page 1
161 0068 B3FBF2F3 udiv r3, r3, r2
162 .LVL8:
259:Src/system_stm32g4xx.c **** break;
ARM GAS /tmp/ccV7jtdT.s page 9
ARM GAS /tmp/ccvxi4x8.s page 9
163 .loc 1 259 23 view .LVU47
@@ -512,7 +512,7 @@ ARM GAS /tmp/ccV7jtdT.s page 1
185 0080 00000000 .word SystemCoreClock
186 0084 0024F400 .word 16000000
187 0088 00000000 .word AHBPrescTable
188 008c 0080BB00 .word 12288000
188 008c 00366E01 .word 24000000
189 .cfi_endproc
190 .LFE330:
192 .global APBPrescTable
@@ -537,30 +537,30 @@ ARM GAS /tmp/ccV7jtdT.s page 1
213 0000 0024F400 .word 16000000
214 .text
215 .Letext0:
216 .file 2 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
ARM GAS /tmp/ccV7jtdT.s page 10
216 .file 2 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
ARM GAS /tmp/ccvxi4x8.s page 10
217 .file 3 "/home/fra/bin/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
217 .file 3 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
218 .file 4 "Drivers/CMSIS/Include/core_cm4.h"
219 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h"
220 .file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
ARM GAS /tmp/ccV7jtdT.s page 11
ARM GAS /tmp/ccvxi4x8.s page 11
DEFINED SYMBOLS
*ABS*:00000000 system_stm32g4xx.c
/tmp/ccV7jtdT.s:21 .text.SystemInit:00000000 $t
/tmp/ccV7jtdT.s:27 .text.SystemInit:00000000 SystemInit
/tmp/ccV7jtdT.s:46 .text.SystemInit:00000010 $d
/tmp/ccV7jtdT.s:51 .text.SystemCoreClockUpdate:00000000 $t
/tmp/ccV7jtdT.s:57 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate
/tmp/ccV7jtdT.s:184 .text.SystemCoreClockUpdate:0000007c $d
/tmp/ccV7jtdT.s:212 .data.SystemCoreClock:00000000 SystemCoreClock
/tmp/ccV7jtdT.s:204 .rodata.AHBPrescTable:00000000 AHBPrescTable
/tmp/ccV7jtdT.s:197 .rodata.APBPrescTable:00000000 APBPrescTable
/tmp/ccV7jtdT.s:194 .rodata.APBPrescTable:00000000 $d
/tmp/ccV7jtdT.s:201 .rodata.AHBPrescTable:00000000 $d
/tmp/ccV7jtdT.s:209 .data.SystemCoreClock:00000000 $d
/tmp/ccvxi4x8.s:21 .text.SystemInit:00000000 $t
/tmp/ccvxi4x8.s:27 .text.SystemInit:00000000 SystemInit
/tmp/ccvxi4x8.s:46 .text.SystemInit:00000010 $d
/tmp/ccvxi4x8.s:51 .text.SystemCoreClockUpdate:00000000 $t
/tmp/ccvxi4x8.s:57 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate
/tmp/ccvxi4x8.s:184 .text.SystemCoreClockUpdate:0000007c $d
/tmp/ccvxi4x8.s:212 .data.SystemCoreClock:00000000 SystemCoreClock
/tmp/ccvxi4x8.s:204 .rodata.AHBPrescTable:00000000 AHBPrescTable
/tmp/ccvxi4x8.s:197 .rodata.APBPrescTable:00000000 APBPrescTable
/tmp/ccvxi4x8.s:194 .rodata.APBPrescTable:00000000 $d
/tmp/ccvxi4x8.s:201 .rodata.AHBPrescTable:00000000 $d
/tmp/ccvxi4x8.s:209 .data.SystemCoreClock:00000000 $d
NO UNDEFINED SYMBOLS
squeow_sw/build/system_stm32g4xx.o
BIN
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squeow_sw/squeow_codice.ioc
+86 -70
View File
@@ -18,8 +18,8 @@ ADC1.RegFilteringConfig-2\#ChannelRegularConversion=ADC_AWD_FILTERING_NONE
ADC1.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_92CYCLES_5
ADC1.WatchdogChannel=ADC_CHANNEL_15
ADC1.master=1
ADC2.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_3
ADC2.Channel-4\#ChannelRegularConversion=ADC_CHANNEL_4
ADC2.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_4
ADC2.Channel-4\#ChannelRegularConversion=ADC_CHANNEL_3
ADC2.Channel-5\#ChannelRegularConversion=ADC_CHANNEL_13
ADC2.Channel-6\#ChannelRegularConversion=ADC_CHANNEL_17
ADC2.ClockPrescaler=ADC_CLOCK_SYNC_PCLK_DIV4
@@ -50,10 +50,10 @@ CAD.provider=
Dma.ADC2.0.Direction=DMA_PERIPH_TO_MEMORY
Dma.ADC2.0.EventEnable=DISABLE
Dma.ADC2.0.Instance=DMA1_Channel2
Dma.ADC2.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
Dma.ADC2.0.MemDataAlignment=DMA_MDATAALIGN_WORD
Dma.ADC2.0.MemInc=DMA_MINC_ENABLE
Dma.ADC2.0.Mode=DMA_NORMAL
Dma.ADC2.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
Dma.ADC2.0.PeriphDataAlignment=DMA_PDATAALIGN_WORD
Dma.ADC2.0.PeriphInc=DMA_PINC_DISABLE
Dma.ADC2.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.ADC2.0.Priority=DMA_PRIORITY_LOW
@@ -105,13 +105,14 @@ Dma.USART1_TX.2.SyncSignalID=NONE
File.Version=6
GPIO.groupedBy=Group By Peripherals
I2C1.IPParameters=Timing
I2C1.Timing=0x40B282BD
I2C1.Timing=0x50916E9F
KeepUserPlacement=true
Mcu.CPN=STM32G431KBT6
Mcu.Family=STM32G4
Mcu.IP0=ADC1
Mcu.IP1=ADC2
Mcu.IP10=NUCLEO-G431KB
Mcu.IP10=USART1
Mcu.IP11=NUCLEO-G431KB
Mcu.IP2=DMA
Mcu.IP3=I2C1
Mcu.IP4=NVIC
@@ -119,14 +120,14 @@ Mcu.IP5=RCC
Mcu.IP6=SYS
Mcu.IP7=TIM2
Mcu.IP8=TIM3
Mcu.IP9=USART1
Mcu.IPNb=11
Mcu.IP9=TIM8
Mcu.IPNb=12
Mcu.Name=STM32G431K(6-8-B)Tx
Mcu.Package=LQFP32
Mcu.Pin0=PF0-OSC_IN
Mcu.Pin1=PF1-OSC_OUT
Mcu.Pin10=PA7
Mcu.Pin11=PB0
Mcu.Pin10=PB0
Mcu.Pin11=PA8
Mcu.Pin12=PA9
Mcu.Pin13=PA10
Mcu.Pin14=PA11
@@ -135,7 +136,7 @@ Mcu.Pin16=PA13
Mcu.Pin17=PA14
Mcu.Pin18=PA15
Mcu.Pin19=PB3
Mcu.Pin2=PG10-NRST
Mcu.Pin2=PA0
Mcu.Pin20=PB4
Mcu.Pin21=PB5
Mcu.Pin22=PB6
@@ -144,19 +145,20 @@ Mcu.Pin24=VP_SYS_VS_Systick
Mcu.Pin25=VP_SYS_VS_DBSignals
Mcu.Pin26=VP_TIM2_VS_ClockSourceINT
Mcu.Pin27=VP_TIM3_VS_ClockSourceINT
Mcu.Pin3=PA0
Mcu.Pin4=PA1
Mcu.Pin5=PA2
Mcu.Pin6=PA3
Mcu.Pin7=PA4
Mcu.Pin8=PA5
Mcu.Pin9=PA6
Mcu.PinsNb=28
Mcu.Pin28=VP_TIM8_VS_ClockSourceINT
Mcu.Pin3=PA1
Mcu.Pin4=PA2
Mcu.Pin5=PA3
Mcu.Pin6=PA4
Mcu.Pin7=PA5
Mcu.Pin8=PA6
Mcu.Pin9=PA7
Mcu.PinsNb=29
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32G431KBTx
MxCube.Version=6.13.0
MxDb.Version=DB.6.0.130
MxCube.Version=6.14.1
MxDb.Version=DB.6.0.141
NVIC.ADC1_2_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.DMA1_Channel2_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
@@ -206,49 +208,51 @@ PA2.Signal=S_TIM2_CH3
PA3.Locked=true
PA3.Signal=S_TIM2_CH4
PA4.GPIOParameters=GPIO_Label
PA4.GPIO_Label=TEMPERATURA
PA4.GPIO_Label=A5
PA4.Locked=true
PA4.Mode=IN17-Single-Ended
PA4.Signal=ADC2_IN17
PA5.GPIOParameters=GPIO_Label
PA5.GPIO_Label=CORRENTE
PA5.GPIO_Label=A4
PA5.Locked=true
PA5.Mode=IN13-Single-Ended
PA5.Signal=ADC2_IN13
PA6.GPIOParameters=GPIO_Label
PA6.GPIO_Label=DIRETTA
PA6.GPIO_Label=A3
PA6.Locked=true
PA6.Mode=IN3-Single-Ended
PA6.Signal=ADC2_IN3
PA7.GPIOParameters=GPIO_Label
PA7.GPIO_Label=RIFLESSA
PA7.GPIO_Label=A2
PA7.Locked=true
PA7.Mode=IN4-Single-Ended
PA7.Signal=ADC2_IN4
PA8.Locked=true
PA8.Mode=Clock-out
PA8.Signal=RCC_MCO
PA9.GPIOParameters=GPIO_Speed
PA9.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PA9.Locked=true
PA9.Mode=Asynchronous
PA9.Signal=USART1_TX
PB0.GPIOParameters=GPIO_Label
PB0.GPIO_Label=AUDIO_IN
PB0.GPIO_Label=A1
PB0.Locked=true
PB0.Mode=IN15-Single-Ended
PB0.Signal=ADC1_IN15
PB3.GPIOParameters=GPIO_Label
PB3.GPIO_Label=AUDIO_OL
PB3.GPIOParameters=GPIO_PuPd,GPIO_Label
PB3.GPIO_Label=G1
PB3.GPIO_PuPd=GPIO_PULLUP
PB3.Locked=true
PB3.Signal=GPIO_Output
PB3.Signal=GPIO_Input
PB4.GPIOParameters=GPIO_Label
PB4.GPIO_Label=RESET_BTN
PB4.GPIO_Label=G2
PB4.Locked=true
PB4.Signal=GPIO_Output
PB5.GPIOParameters=GPIO_Label
PB5.GPIO_Label=TEMP_OL
PB5.Locked=true
PB5.Signal=GPIO_Output
PB5.Mode=PWM Generation3 CH3N
PB5.Signal=TIM8_CH3N
PB6.GPIOParameters=GPIO_Label
PB6.GPIO_Label=REFL_OL
PB6.GPIO_Label=G4
PB6.Locked=true
PB6.Signal=GPIO_Output
PB7.Locked=true
@@ -258,11 +262,10 @@ PF0-OSC_IN.Mode=HSE-External-Oscillator
PF0-OSC_IN.Signal=RCC_OSC_IN
PF1-OSC_OUT.Mode=HSE-External-Oscillator
PF1-OSC_OUT.Signal=RCC_OSC_OUT
PG10-NRST.Mode=Clock-out
PG10-NRST.Signal=RCC_MCO
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
ProjectManager.CompilerLinker=GCC
ProjectManager.CompilerOptimize=6
ProjectManager.ComputerToolchain=false
ProjectManager.CoupleFile=false
@@ -293,55 +296,55 @@ ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_TIM2_Init-TIM2-false-HAL-true,5-MX_I2C1_Init-I2C1-false-HAL-true,6-MX_TIM3_Init-TIM3-false-HAL-true,7-MX_ADC1_Init-ADC1-false-HAL-true,8-MX_ADC2_Init-ADC2-false-HAL-true,9-MX_USART1_UART_Init-USART1-false-HAL-true
RCC.ADC12Freq_Value=165888000
RCC.AHBFreq_Value=165888000
RCC.APB1Freq_Value=165888000
RCC.APB1TimFreq_Value=165888000
RCC.APB2Freq_Value=165888000
RCC.APB2TimFreq_Value=165888000
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_TIM2_Init-TIM2-false-HAL-true,5-MX_I2C1_Init-I2C1-false-HAL-true,6-MX_TIM3_Init-TIM3-false-HAL-true,7-MX_ADC1_Init-ADC1-false-HAL-true,8-MX_ADC2_Init-ADC2-false-HAL-true,9-MX_USART1_UART_Init-USART1-false-HAL-true,10-MX_TIM8_Init-TIM8-false-HAL-true
RCC.ADC12Freq_Value=168000000
RCC.AHBFreq_Value=168000000
RCC.APB1Freq_Value=168000000
RCC.APB1TimFreq_Value=168000000
RCC.APB2Freq_Value=168000000
RCC.APB2TimFreq_Value=168000000
RCC.CK48CLockSelection=RCC_USBCLKSOURCE_HSI48
RCC.CRSFreq_Value=48000000
RCC.CortexFreq_Value=165888000
RCC.CortexFreq_Value=168000000
RCC.EXTERNAL_CLOCK_VALUE=12288000
RCC.FCLKCortexFreq_Value=165888000
RCC.FDCANFreq_Value=165888000
RCC.FCLKCortexFreq_Value=168000000
RCC.FDCANFreq_Value=168000000
RCC.FamilyName=M
RCC.HCLKFreq_Value=165888000
RCC.HSE_VALUE=12288000
RCC.HCLKFreq_Value=168000000
RCC.HSE_VALUE=24000000
RCC.HSI48_VALUE=48000000
RCC.HSI_VALUE=16000000
RCC.I2C1Freq_Value=165888000
RCC.I2C2Freq_Value=165888000
RCC.I2C3Freq_Value=165888000
RCC.I2SFreq_Value=165888000
RCC.I2C1Freq_Value=168000000
RCC.I2C2Freq_Value=168000000
RCC.I2C3Freq_Value=168000000
RCC.I2SFreq_Value=168000000
RCC.IPParameters=ADC12Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CK48CLockSelection,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQ,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSourceVirtual,PWRFreq_Value,RCC_MCO1Source,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
RCC.LPTIM1Freq_Value=165888000
RCC.LPUART1Freq_Value=165888000
RCC.LPTIM1Freq_Value=168000000
RCC.LPUART1Freq_Value=168000000
RCC.LSCOPinFreq_Value=32000
RCC.LSE_VALUE=32768
RCC.LSI_VALUE=32000
RCC.MCO1PinFreq_Value=12288000
RCC.MCO1PinFreq_Value=24000000
RCC.PLLM=RCC_PLLM_DIV2
RCC.PLLN=54
RCC.PLLPoutputFreq_Value=165888000
RCC.PLLN=28
RCC.PLLPoutputFreq_Value=168000000
RCC.PLLQ=RCC_PLLQ_DIV4
RCC.PLLQoutputFreq_Value=82944000
RCC.PLLRCLKFreq_Value=165888000
RCC.PLLQoutputFreq_Value=84000000
RCC.PLLRCLKFreq_Value=168000000
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
RCC.PWRFreq_Value=165888000
RCC.PWRFreq_Value=168000000
RCC.RCC_MCO1Source=RCC_MCO1SOURCE_HSE
RCC.RNGFreq_Value=48000000
RCC.SAI1Freq_Value=165888000
RCC.SYSCLKFreq_VALUE=165888000
RCC.SAI1Freq_Value=168000000
RCC.SYSCLKFreq_VALUE=168000000
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
RCC.UART4Freq_Value=170000000
RCC.USART1Freq_Value=165888000
RCC.USART2Freq_Value=165888000
RCC.USART1Freq_Value=168000000
RCC.USART2Freq_Value=168000000
RCC.USART3Freq_Value=170000000
RCC.USBFreq_Value=48000000
RCC.VCOInputFreq_Value=6144000
RCC.VCOOutputFreq_Value=331776000
RCC.VCOInputFreq_Value=12000000
RCC.VCOOutputFreq_Value=336000000
SH.S_TIM2_CH1.0=TIM2_CH1,PWM Generation1 CH1
SH.S_TIM2_CH1.ConfNb=1
SH.S_TIM2_CH2.0=TIM2_CH2,PWM Generation2 CH2
@@ -366,9 +369,20 @@ TIM2.PulseNoDither_3=1500
TIM2.PulseNoDither_4=2000
TIM2.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE
TIM3.IPParameters=PeriodNoDither,Prescaler
TIM3.PeriodNoDither=399
TIM3.Prescaler=41471
USART1.BaudRate=115200
TIM3.PeriodNoDither=99
TIM3.Prescaler=16799
TIM8.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE
TIM8.Channel-PWM\ Generation3\ CH3N=TIM_CHANNEL_3
TIM8.IPParameters=Channel-PWM Generation3 CH3N,Prescaler,PeriodNoDither,PulseNoDither_3,OCNPolarity_3,AutoReloadPreload,TIM_MasterOutputTrigger,OCFastMode_PWM-PWM Generation3 CH3N,OCNIdleState_3,OC3Preload_PWM
TIM8.OC3Preload_PWM=ENABLE
TIM8.OCFastMode_PWM-PWM\ Generation3\ CH3N=TIM_OCFAST_DISABLE
TIM8.OCNIdleState_3=TIM_OCNIDLESTATE_RESET
TIM8.OCNPolarity_3=TIM_OCNPOLARITY_HIGH
TIM8.PeriodNoDither=255
TIM8.Prescaler=1679
TIM8.PulseNoDither_3=0
TIM8.TIM_MasterOutputTrigger=TIM_TRGO_RESET
USART1.BaudRate=38400
USART1.IPParameters=VirtualMode-Asynchronous,BaudRate
USART1.VirtualMode-Asynchronous=VM_ASYNC
VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
@@ -379,5 +393,7 @@ VP_TIM2_VS_ClockSourceINT.Mode=Internal
VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
VP_TIM3_VS_ClockSourceINT.Mode=Internal
VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT
VP_TIM8_VS_ClockSourceINT.Mode=Internal
VP_TIM8_VS_ClockSourceINT.Signal=TIM8_VS_ClockSourceINT
board=NUCLEO-G431KB
boardIOC=true