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squeow/squeow_sw/build/stm32g4xx_it.lst
2025-06-28 00:58:29 +02:00

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ARM GAS /tmp/cc2HfgZ9.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32g4xx_it.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .file 1 "Src/stm32g4xx_it.c"
20 .section .text.NMI_Handler,"ax",%progbits
21 .align 1
22 .global NMI_Handler
23 .syntax unified
24 .thumb
25 .thumb_func
27 NMI_Handler:
28 .LFB332:
1:Src/stm32g4xx_it.c **** /* USER CODE BEGIN Header */
2:Src/stm32g4xx_it.c **** /**
3:Src/stm32g4xx_it.c **** ******************************************************************************
4:Src/stm32g4xx_it.c **** * @file stm32g4xx_it.c
5:Src/stm32g4xx_it.c **** * @brief Interrupt Service Routines.
6:Src/stm32g4xx_it.c **** ******************************************************************************
7:Src/stm32g4xx_it.c **** * @attention
8:Src/stm32g4xx_it.c **** *
9:Src/stm32g4xx_it.c **** * Copyright (c) 2022 STMicroelectronics.
10:Src/stm32g4xx_it.c **** * All rights reserved.
11:Src/stm32g4xx_it.c **** *
12:Src/stm32g4xx_it.c **** * This software is licensed under terms that can be found in the LICENSE file
13:Src/stm32g4xx_it.c **** * in the root directory of this software component.
14:Src/stm32g4xx_it.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
15:Src/stm32g4xx_it.c **** *
16:Src/stm32g4xx_it.c **** ******************************************************************************
17:Src/stm32g4xx_it.c **** */
18:Src/stm32g4xx_it.c **** /* USER CODE END Header */
19:Src/stm32g4xx_it.c ****
20:Src/stm32g4xx_it.c **** /* Includes ------------------------------------------------------------------*/
21:Src/stm32g4xx_it.c **** #include "main.h"
22:Src/stm32g4xx_it.c **** #include "stm32g4xx_it.h"
23:Src/stm32g4xx_it.c **** /* Private includes ----------------------------------------------------------*/
24:Src/stm32g4xx_it.c **** /* USER CODE BEGIN Includes */
25:Src/stm32g4xx_it.c **** #include "squeow.h"
26:Src/stm32g4xx_it.c **** #include "squeow_ui.h"
27:Src/stm32g4xx_it.c **** /* USER CODE END Includes */
28:Src/stm32g4xx_it.c ****
29:Src/stm32g4xx_it.c **** /* Private typedef -----------------------------------------------------------*/
30:Src/stm32g4xx_it.c **** /* USER CODE BEGIN TD */
ARM GAS /tmp/cc2HfgZ9.s page 2
31:Src/stm32g4xx_it.c ****
32:Src/stm32g4xx_it.c **** /* USER CODE END TD */
33:Src/stm32g4xx_it.c ****
34:Src/stm32g4xx_it.c **** /* Private define ------------------------------------------------------------*/
35:Src/stm32g4xx_it.c **** /* USER CODE BEGIN PD */
36:Src/stm32g4xx_it.c ****
37:Src/stm32g4xx_it.c **** /* USER CODE END PD */
38:Src/stm32g4xx_it.c ****
39:Src/stm32g4xx_it.c **** /* Private macro -------------------------------------------------------------*/
40:Src/stm32g4xx_it.c **** /* USER CODE BEGIN PM */
41:Src/stm32g4xx_it.c ****
42:Src/stm32g4xx_it.c **** /* USER CODE END PM */
43:Src/stm32g4xx_it.c ****
44:Src/stm32g4xx_it.c **** /* Private variables ---------------------------------------------------------*/
45:Src/stm32g4xx_it.c **** /* USER CODE BEGIN PV */
46:Src/stm32g4xx_it.c ****
47:Src/stm32g4xx_it.c **** /* USER CODE END PV */
48:Src/stm32g4xx_it.c ****
49:Src/stm32g4xx_it.c **** /* Private function prototypes -----------------------------------------------*/
50:Src/stm32g4xx_it.c **** /* USER CODE BEGIN PFP */
51:Src/stm32g4xx_it.c ****
52:Src/stm32g4xx_it.c **** /* USER CODE END PFP */
53:Src/stm32g4xx_it.c ****
54:Src/stm32g4xx_it.c **** /* Private user code ---------------------------------------------------------*/
55:Src/stm32g4xx_it.c **** /* USER CODE BEGIN 0 */
56:Src/stm32g4xx_it.c ****
57:Src/stm32g4xx_it.c **** /* USER CODE END 0 */
58:Src/stm32g4xx_it.c ****
59:Src/stm32g4xx_it.c **** /* External variables --------------------------------------------------------*/
60:Src/stm32g4xx_it.c **** extern DMA_HandleTypeDef hdma_adc2;
61:Src/stm32g4xx_it.c **** extern ADC_HandleTypeDef hadc1;
62:Src/stm32g4xx_it.c **** extern ADC_HandleTypeDef hadc2;
63:Src/stm32g4xx_it.c **** extern TIM_HandleTypeDef htim2;
64:Src/stm32g4xx_it.c **** extern TIM_HandleTypeDef htim3;
65:Src/stm32g4xx_it.c **** extern DMA_HandleTypeDef hdma_usart1_rx;
66:Src/stm32g4xx_it.c **** extern DMA_HandleTypeDef hdma_usart1_tx;
67:Src/stm32g4xx_it.c **** extern UART_HandleTypeDef huart1;
68:Src/stm32g4xx_it.c **** /* USER CODE BEGIN EV */
69:Src/stm32g4xx_it.c ****
70:Src/stm32g4xx_it.c **** /* USER CODE END EV */
71:Src/stm32g4xx_it.c ****
72:Src/stm32g4xx_it.c **** /******************************************************************************/
73:Src/stm32g4xx_it.c **** /* Cortex-M4 Processor Interruption and Exception Handlers */
74:Src/stm32g4xx_it.c **** /******************************************************************************/
75:Src/stm32g4xx_it.c **** /**
76:Src/stm32g4xx_it.c **** * @brief This function handles Non maskable interrupt.
77:Src/stm32g4xx_it.c **** */
78:Src/stm32g4xx_it.c **** void NMI_Handler(void)
79:Src/stm32g4xx_it.c **** {
29 .loc 1 79 1 view -0
30 .cfi_startproc
31 @ Volatile: function does not return.
32 @ args = 0, pretend = 0, frame = 0
33 @ frame_needed = 0, uses_anonymous_args = 0
34 @ link register save eliminated.
35 .L2:
80:Src/stm32g4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
ARM GAS /tmp/cc2HfgZ9.s page 3
81:Src/stm32g4xx_it.c ****
82:Src/stm32g4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */
83:Src/stm32g4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
84:Src/stm32g4xx_it.c **** while (1) {
36 .loc 1 84 5 view .LVU1
85:Src/stm32g4xx_it.c **** }
37 .loc 1 85 5 view .LVU2
84:Src/stm32g4xx_it.c **** }
38 .loc 1 84 11 view .LVU3
39 0000 FEE7 b .L2
40 .cfi_endproc
41 .LFE332:
43 .section .text.HardFault_Handler,"ax",%progbits
44 .align 1
45 .global HardFault_Handler
46 .syntax unified
47 .thumb
48 .thumb_func
50 HardFault_Handler:
51 .LFB333:
86:Src/stm32g4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */
87:Src/stm32g4xx_it.c **** }
88:Src/stm32g4xx_it.c ****
89:Src/stm32g4xx_it.c **** /**
90:Src/stm32g4xx_it.c **** * @brief This function handles Hard fault interrupt.
91:Src/stm32g4xx_it.c **** */
92:Src/stm32g4xx_it.c **** void HardFault_Handler(void)
93:Src/stm32g4xx_it.c **** {
52 .loc 1 93 1 view -0
53 .cfi_startproc
54 @ Volatile: function does not return.
55 @ args = 0, pretend = 0, frame = 0
56 @ frame_needed = 0, uses_anonymous_args = 0
57 @ link register save eliminated.
58 .L4:
94:Src/stm32g4xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */
95:Src/stm32g4xx_it.c ****
96:Src/stm32g4xx_it.c **** /* USER CODE END HardFault_IRQn 0 */
97:Src/stm32g4xx_it.c **** while (1)
59 .loc 1 97 3 view .LVU5
98:Src/stm32g4xx_it.c **** {
99:Src/stm32g4xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */
100:Src/stm32g4xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */
101:Src/stm32g4xx_it.c **** }
60 .loc 1 101 3 view .LVU6
97:Src/stm32g4xx_it.c **** {
61 .loc 1 97 9 view .LVU7
62 0000 FEE7 b .L4
63 .cfi_endproc
64 .LFE333:
66 .section .text.MemManage_Handler,"ax",%progbits
67 .align 1
68 .global MemManage_Handler
69 .syntax unified
70 .thumb
71 .thumb_func
73 MemManage_Handler:
ARM GAS /tmp/cc2HfgZ9.s page 4
74 .LFB334:
102:Src/stm32g4xx_it.c **** }
103:Src/stm32g4xx_it.c ****
104:Src/stm32g4xx_it.c **** /**
105:Src/stm32g4xx_it.c **** * @brief This function handles Memory management fault.
106:Src/stm32g4xx_it.c **** */
107:Src/stm32g4xx_it.c **** void MemManage_Handler(void)
108:Src/stm32g4xx_it.c **** {
75 .loc 1 108 1 view -0
76 .cfi_startproc
77 @ Volatile: function does not return.
78 @ args = 0, pretend = 0, frame = 0
79 @ frame_needed = 0, uses_anonymous_args = 0
80 @ link register save eliminated.
81 .L6:
109:Src/stm32g4xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */
110:Src/stm32g4xx_it.c ****
111:Src/stm32g4xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */
112:Src/stm32g4xx_it.c **** while (1)
82 .loc 1 112 3 view .LVU9
113:Src/stm32g4xx_it.c **** {
114:Src/stm32g4xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
115:Src/stm32g4xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */
116:Src/stm32g4xx_it.c **** }
83 .loc 1 116 3 view .LVU10
112:Src/stm32g4xx_it.c **** {
84 .loc 1 112 9 view .LVU11
85 0000 FEE7 b .L6
86 .cfi_endproc
87 .LFE334:
89 .section .text.BusFault_Handler,"ax",%progbits
90 .align 1
91 .global BusFault_Handler
92 .syntax unified
93 .thumb
94 .thumb_func
96 BusFault_Handler:
97 .LFB335:
117:Src/stm32g4xx_it.c **** }
118:Src/stm32g4xx_it.c ****
119:Src/stm32g4xx_it.c **** /**
120:Src/stm32g4xx_it.c **** * @brief This function handles Prefetch fault, memory access fault.
121:Src/stm32g4xx_it.c **** */
122:Src/stm32g4xx_it.c **** void BusFault_Handler(void)
123:Src/stm32g4xx_it.c **** {
98 .loc 1 123 1 view -0
99 .cfi_startproc
100 @ Volatile: function does not return.
101 @ args = 0, pretend = 0, frame = 0
102 @ frame_needed = 0, uses_anonymous_args = 0
103 @ link register save eliminated.
104 .L8:
124:Src/stm32g4xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */
125:Src/stm32g4xx_it.c ****
126:Src/stm32g4xx_it.c **** /* USER CODE END BusFault_IRQn 0 */
127:Src/stm32g4xx_it.c **** while (1)
105 .loc 1 127 3 view .LVU13
ARM GAS /tmp/cc2HfgZ9.s page 5
128:Src/stm32g4xx_it.c **** {
129:Src/stm32g4xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */
130:Src/stm32g4xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */
131:Src/stm32g4xx_it.c **** }
106 .loc 1 131 3 view .LVU14
127:Src/stm32g4xx_it.c **** {
107 .loc 1 127 9 view .LVU15
108 0000 FEE7 b .L8
109 .cfi_endproc
110 .LFE335:
112 .section .text.UsageFault_Handler,"ax",%progbits
113 .align 1
114 .global UsageFault_Handler
115 .syntax unified
116 .thumb
117 .thumb_func
119 UsageFault_Handler:
120 .LFB336:
132:Src/stm32g4xx_it.c **** }
133:Src/stm32g4xx_it.c ****
134:Src/stm32g4xx_it.c **** /**
135:Src/stm32g4xx_it.c **** * @brief This function handles Undefined instruction or illegal state.
136:Src/stm32g4xx_it.c **** */
137:Src/stm32g4xx_it.c **** void UsageFault_Handler(void)
138:Src/stm32g4xx_it.c **** {
121 .loc 1 138 1 view -0
122 .cfi_startproc
123 @ Volatile: function does not return.
124 @ args = 0, pretend = 0, frame = 0
125 @ frame_needed = 0, uses_anonymous_args = 0
126 @ link register save eliminated.
127 .L10:
139:Src/stm32g4xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */
140:Src/stm32g4xx_it.c ****
141:Src/stm32g4xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */
142:Src/stm32g4xx_it.c **** while (1)
128 .loc 1 142 3 view .LVU17
143:Src/stm32g4xx_it.c **** {
144:Src/stm32g4xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
145:Src/stm32g4xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */
146:Src/stm32g4xx_it.c **** }
129 .loc 1 146 3 view .LVU18
142:Src/stm32g4xx_it.c **** {
130 .loc 1 142 9 view .LVU19
131 0000 FEE7 b .L10
132 .cfi_endproc
133 .LFE336:
135 .section .text.SVC_Handler,"ax",%progbits
136 .align 1
137 .global SVC_Handler
138 .syntax unified
139 .thumb
140 .thumb_func
142 SVC_Handler:
143 .LFB337:
147:Src/stm32g4xx_it.c **** }
148:Src/stm32g4xx_it.c ****
ARM GAS /tmp/cc2HfgZ9.s page 6
149:Src/stm32g4xx_it.c **** /**
150:Src/stm32g4xx_it.c **** * @brief This function handles System service call via SWI instruction.
151:Src/stm32g4xx_it.c **** */
152:Src/stm32g4xx_it.c **** void SVC_Handler(void)
153:Src/stm32g4xx_it.c **** {
144 .loc 1 153 1 view -0
145 .cfi_startproc
146 @ args = 0, pretend = 0, frame = 0
147 @ frame_needed = 0, uses_anonymous_args = 0
148 @ link register save eliminated.
154:Src/stm32g4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */
155:Src/stm32g4xx_it.c ****
156:Src/stm32g4xx_it.c **** /* USER CODE END SVCall_IRQn 0 */
157:Src/stm32g4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */
158:Src/stm32g4xx_it.c ****
159:Src/stm32g4xx_it.c **** /* USER CODE END SVCall_IRQn 1 */
160:Src/stm32g4xx_it.c **** }
149 .loc 1 160 1 view .LVU21
150 0000 7047 bx lr
151 .cfi_endproc
152 .LFE337:
154 .section .text.DebugMon_Handler,"ax",%progbits
155 .align 1
156 .global DebugMon_Handler
157 .syntax unified
158 .thumb
159 .thumb_func
161 DebugMon_Handler:
162 .LFB338:
161:Src/stm32g4xx_it.c ****
162:Src/stm32g4xx_it.c **** /**
163:Src/stm32g4xx_it.c **** * @brief This function handles Debug monitor.
164:Src/stm32g4xx_it.c **** */
165:Src/stm32g4xx_it.c **** void DebugMon_Handler(void)
166:Src/stm32g4xx_it.c **** {
163 .loc 1 166 1 view -0
164 .cfi_startproc
165 @ args = 0, pretend = 0, frame = 0
166 @ frame_needed = 0, uses_anonymous_args = 0
167 @ link register save eliminated.
167:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */
168:Src/stm32g4xx_it.c ****
169:Src/stm32g4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */
170:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */
171:Src/stm32g4xx_it.c ****
172:Src/stm32g4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */
173:Src/stm32g4xx_it.c **** }
168 .loc 1 173 1 view .LVU23
169 0000 7047 bx lr
170 .cfi_endproc
171 .LFE338:
173 .section .text.PendSV_Handler,"ax",%progbits
174 .align 1
175 .global PendSV_Handler
176 .syntax unified
177 .thumb
178 .thumb_func
ARM GAS /tmp/cc2HfgZ9.s page 7
180 PendSV_Handler:
181 .LFB339:
174:Src/stm32g4xx_it.c ****
175:Src/stm32g4xx_it.c **** /**
176:Src/stm32g4xx_it.c **** * @brief This function handles Pendable request for system service.
177:Src/stm32g4xx_it.c **** */
178:Src/stm32g4xx_it.c **** void PendSV_Handler(void)
179:Src/stm32g4xx_it.c **** {
182 .loc 1 179 1 view -0
183 .cfi_startproc
184 @ args = 0, pretend = 0, frame = 0
185 @ frame_needed = 0, uses_anonymous_args = 0
186 @ link register save eliminated.
180:Src/stm32g4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */
181:Src/stm32g4xx_it.c ****
182:Src/stm32g4xx_it.c **** /* USER CODE END PendSV_IRQn 0 */
183:Src/stm32g4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */
184:Src/stm32g4xx_it.c ****
185:Src/stm32g4xx_it.c **** /* USER CODE END PendSV_IRQn 1 */
186:Src/stm32g4xx_it.c **** }
187 .loc 1 186 1 view .LVU25
188 0000 7047 bx lr
189 .cfi_endproc
190 .LFE339:
192 .section .text.SysTick_Handler,"ax",%progbits
193 .align 1
194 .global SysTick_Handler
195 .syntax unified
196 .thumb
197 .thumb_func
199 SysTick_Handler:
200 .LFB340:
187:Src/stm32g4xx_it.c ****
188:Src/stm32g4xx_it.c **** /**
189:Src/stm32g4xx_it.c **** * @brief This function handles System tick timer.
190:Src/stm32g4xx_it.c **** */
191:Src/stm32g4xx_it.c **** void SysTick_Handler(void)
192:Src/stm32g4xx_it.c **** {
201 .loc 1 192 1 view -0
202 .cfi_startproc
203 @ args = 0, pretend = 0, frame = 0
204 @ frame_needed = 0, uses_anonymous_args = 0
205 0000 08B5 push {r3, lr}
206 .LCFI0:
207 .cfi_def_cfa_offset 8
208 .cfi_offset 3, -8
209 .cfi_offset 14, -4
193:Src/stm32g4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */
194:Src/stm32g4xx_it.c ****
195:Src/stm32g4xx_it.c **** /* USER CODE END SysTick_IRQn 0 */
196:Src/stm32g4xx_it.c **** HAL_IncTick();
210 .loc 1 196 3 view .LVU27
211 0002 FFF7FEFF bl HAL_IncTick
212 .LVL0:
197:Src/stm32g4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */
198:Src/stm32g4xx_it.c ****
199:Src/stm32g4xx_it.c **** /* USER CODE END SysTick_IRQn 1 */
ARM GAS /tmp/cc2HfgZ9.s page 8
200:Src/stm32g4xx_it.c **** }
213 .loc 1 200 1 is_stmt 0 view .LVU28
214 0006 08BD pop {r3, pc}
215 .cfi_endproc
216 .LFE340:
218 .section .text.DMA1_Channel2_IRQHandler,"ax",%progbits
219 .align 1
220 .global DMA1_Channel2_IRQHandler
221 .syntax unified
222 .thumb
223 .thumb_func
225 DMA1_Channel2_IRQHandler:
226 .LFB341:
201:Src/stm32g4xx_it.c ****
202:Src/stm32g4xx_it.c **** /******************************************************************************/
203:Src/stm32g4xx_it.c **** /* STM32G4xx Peripheral Interrupt Handlers */
204:Src/stm32g4xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */
205:Src/stm32g4xx_it.c **** /* For the available peripheral interrupt handler names, */
206:Src/stm32g4xx_it.c **** /* please refer to the startup file (startup_stm32g4xx.s). */
207:Src/stm32g4xx_it.c **** /******************************************************************************/
208:Src/stm32g4xx_it.c ****
209:Src/stm32g4xx_it.c **** /**
210:Src/stm32g4xx_it.c **** * @brief This function handles DMA1 channel2 global interrupt.
211:Src/stm32g4xx_it.c **** */
212:Src/stm32g4xx_it.c **** void DMA1_Channel2_IRQHandler(void)
213:Src/stm32g4xx_it.c **** {
227 .loc 1 213 1 is_stmt 1 view -0
228 .cfi_startproc
229 @ args = 0, pretend = 0, frame = 0
230 @ frame_needed = 0, uses_anonymous_args = 0
231 0000 08B5 push {r3, lr}
232 .LCFI1:
233 .cfi_def_cfa_offset 8
234 .cfi_offset 3, -8
235 .cfi_offset 14, -4
214:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
215:Src/stm32g4xx_it.c ****
216:Src/stm32g4xx_it.c **** /* USER CODE END DMA1_Channel2_IRQn 0 */
217:Src/stm32g4xx_it.c **** HAL_DMA_IRQHandler(&hdma_adc2);
236 .loc 1 217 3 view .LVU30
237 0002 0248 ldr r0, .L18
238 0004 FFF7FEFF bl HAL_DMA_IRQHandler
239 .LVL1:
218:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
219:Src/stm32g4xx_it.c ****
220:Src/stm32g4xx_it.c **** /* USER CODE END DMA1_Channel2_IRQn 1 */
221:Src/stm32g4xx_it.c **** }
240 .loc 1 221 1 is_stmt 0 view .LVU31
241 0008 08BD pop {r3, pc}
242 .L19:
243 000a 00BF .align 2
244 .L18:
245 000c 00000000 .word hdma_adc2
246 .cfi_endproc
247 .LFE341:
249 .section .text.DMA1_Channel3_IRQHandler,"ax",%progbits
250 .align 1
ARM GAS /tmp/cc2HfgZ9.s page 9
251 .global DMA1_Channel3_IRQHandler
252 .syntax unified
253 .thumb
254 .thumb_func
256 DMA1_Channel3_IRQHandler:
257 .LFB342:
222:Src/stm32g4xx_it.c ****
223:Src/stm32g4xx_it.c **** /**
224:Src/stm32g4xx_it.c **** * @brief This function handles DMA1 channel3 global interrupt.
225:Src/stm32g4xx_it.c **** */
226:Src/stm32g4xx_it.c **** void DMA1_Channel3_IRQHandler(void)
227:Src/stm32g4xx_it.c **** {
258 .loc 1 227 1 is_stmt 1 view -0
259 .cfi_startproc
260 @ args = 0, pretend = 0, frame = 0
261 @ frame_needed = 0, uses_anonymous_args = 0
262 0000 08B5 push {r3, lr}
263 .LCFI2:
264 .cfi_def_cfa_offset 8
265 .cfi_offset 3, -8
266 .cfi_offset 14, -4
228:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DMA1_Channel3_IRQn 0 */
229:Src/stm32g4xx_it.c ****
230:Src/stm32g4xx_it.c **** /* USER CODE END DMA1_Channel3_IRQn 0 */
231:Src/stm32g4xx_it.c **** HAL_DMA_IRQHandler(&hdma_usart1_rx);
267 .loc 1 231 3 view .LVU33
268 0002 0248 ldr r0, .L22
269 0004 FFF7FEFF bl HAL_DMA_IRQHandler
270 .LVL2:
232:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DMA1_Channel3_IRQn 1 */
233:Src/stm32g4xx_it.c ****
234:Src/stm32g4xx_it.c **** /* USER CODE END DMA1_Channel3_IRQn 1 */
235:Src/stm32g4xx_it.c **** }
271 .loc 1 235 1 is_stmt 0 view .LVU34
272 0008 08BD pop {r3, pc}
273 .L23:
274 000a 00BF .align 2
275 .L22:
276 000c 00000000 .word hdma_usart1_rx
277 .cfi_endproc
278 .LFE342:
280 .section .text.DMA1_Channel4_IRQHandler,"ax",%progbits
281 .align 1
282 .global DMA1_Channel4_IRQHandler
283 .syntax unified
284 .thumb
285 .thumb_func
287 DMA1_Channel4_IRQHandler:
288 .LFB343:
236:Src/stm32g4xx_it.c ****
237:Src/stm32g4xx_it.c **** /**
238:Src/stm32g4xx_it.c **** * @brief This function handles DMA1 channel4 global interrupt.
239:Src/stm32g4xx_it.c **** */
240:Src/stm32g4xx_it.c **** void DMA1_Channel4_IRQHandler(void)
241:Src/stm32g4xx_it.c **** {
289 .loc 1 241 1 is_stmt 1 view -0
290 .cfi_startproc
ARM GAS /tmp/cc2HfgZ9.s page 10
291 @ args = 0, pretend = 0, frame = 0
292 @ frame_needed = 0, uses_anonymous_args = 0
293 0000 08B5 push {r3, lr}
294 .LCFI3:
295 .cfi_def_cfa_offset 8
296 .cfi_offset 3, -8
297 .cfi_offset 14, -4
242:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
243:Src/stm32g4xx_it.c ****
244:Src/stm32g4xx_it.c **** /* USER CODE END DMA1_Channel4_IRQn 0 */
245:Src/stm32g4xx_it.c **** HAL_DMA_IRQHandler(&hdma_usart1_tx);
298 .loc 1 245 3 view .LVU36
299 0002 0248 ldr r0, .L26
300 0004 FFF7FEFF bl HAL_DMA_IRQHandler
301 .LVL3:
246:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
247:Src/stm32g4xx_it.c ****
248:Src/stm32g4xx_it.c **** /* USER CODE END DMA1_Channel4_IRQn 1 */
249:Src/stm32g4xx_it.c **** }
302 .loc 1 249 1 is_stmt 0 view .LVU37
303 0008 08BD pop {r3, pc}
304 .L27:
305 000a 00BF .align 2
306 .L26:
307 000c 00000000 .word hdma_usart1_tx
308 .cfi_endproc
309 .LFE343:
311 .section .text.ADC1_2_IRQHandler,"ax",%progbits
312 .align 1
313 .global ADC1_2_IRQHandler
314 .syntax unified
315 .thumb
316 .thumb_func
318 ADC1_2_IRQHandler:
319 .LFB344:
250:Src/stm32g4xx_it.c ****
251:Src/stm32g4xx_it.c **** /**
252:Src/stm32g4xx_it.c **** * @brief This function handles ADC1 and ADC2 global interrupt.
253:Src/stm32g4xx_it.c **** */
254:Src/stm32g4xx_it.c **** void ADC1_2_IRQHandler(void)
255:Src/stm32g4xx_it.c **** {
320 .loc 1 255 1 is_stmt 1 view -0
321 .cfi_startproc
322 @ args = 0, pretend = 0, frame = 0
323 @ frame_needed = 0, uses_anonymous_args = 0
324 0000 08B5 push {r3, lr}
325 .LCFI4:
326 .cfi_def_cfa_offset 8
327 .cfi_offset 3, -8
328 .cfi_offset 14, -4
256:Src/stm32g4xx_it.c **** /* USER CODE BEGIN ADC1_2_IRQn 0 */
257:Src/stm32g4xx_it.c ****
258:Src/stm32g4xx_it.c **** /* USER CODE END ADC1_2_IRQn 0 */
259:Src/stm32g4xx_it.c **** HAL_ADC_IRQHandler(&hadc1);
329 .loc 1 259 3 view .LVU39
330 0002 0348 ldr r0, .L30
331 0004 FFF7FEFF bl HAL_ADC_IRQHandler
ARM GAS /tmp/cc2HfgZ9.s page 11
332 .LVL4:
260:Src/stm32g4xx_it.c **** HAL_ADC_IRQHandler(&hadc2);
333 .loc 1 260 3 view .LVU40
334 0008 0248 ldr r0, .L30+4
335 000a FFF7FEFF bl HAL_ADC_IRQHandler
336 .LVL5:
261:Src/stm32g4xx_it.c **** /* USER CODE BEGIN ADC1_2_IRQn 1 */
262:Src/stm32g4xx_it.c ****
263:Src/stm32g4xx_it.c **** /* USER CODE END ADC1_2_IRQn 1 */
264:Src/stm32g4xx_it.c **** }
337 .loc 1 264 1 is_stmt 0 view .LVU41
338 000e 08BD pop {r3, pc}
339 .L31:
340 .align 2
341 .L30:
342 0010 00000000 .word hadc1
343 0014 00000000 .word hadc2
344 .cfi_endproc
345 .LFE344:
347 .section .text.TIM2_IRQHandler,"ax",%progbits
348 .align 1
349 .global TIM2_IRQHandler
350 .syntax unified
351 .thumb
352 .thumb_func
354 TIM2_IRQHandler:
355 .LFB345:
265:Src/stm32g4xx_it.c ****
266:Src/stm32g4xx_it.c **** /**
267:Src/stm32g4xx_it.c **** * @brief This function handles TIM2 global interrupt.
268:Src/stm32g4xx_it.c **** */
269:Src/stm32g4xx_it.c **** void TIM2_IRQHandler(void)
270:Src/stm32g4xx_it.c **** {
356 .loc 1 270 1 is_stmt 1 view -0
357 .cfi_startproc
358 @ args = 0, pretend = 0, frame = 0
359 @ frame_needed = 0, uses_anonymous_args = 0
360 0000 08B5 push {r3, lr}
361 .LCFI5:
362 .cfi_def_cfa_offset 8
363 .cfi_offset 3, -8
364 .cfi_offset 14, -4
271:Src/stm32g4xx_it.c **** /* USER CODE BEGIN TIM2_IRQn 0 */
272:Src/stm32g4xx_it.c ****
273:Src/stm32g4xx_it.c **** /* USER CODE END TIM2_IRQn 0 */
274:Src/stm32g4xx_it.c **** HAL_TIM_IRQHandler(&htim2);
365 .loc 1 274 3 view .LVU43
366 0002 0D48 ldr r0, .L36
367 0004 FFF7FEFF bl HAL_TIM_IRQHandler
368 .LVL6:
275:Src/stm32g4xx_it.c **** /* USER CODE BEGIN TIM2_IRQn 1 */
276:Src/stm32g4xx_it.c **** uint16_t adc_val;
369 .loc 1 276 5 view .LVU44
277:Src/stm32g4xx_it.c **** adc_val = HAL_ADC_GetValue(&hadc1);
370 .loc 1 277 5 view .LVU45
371 .loc 1 277 15 is_stmt 0 view .LVU46
372 0008 0C48 ldr r0, .L36+4
ARM GAS /tmp/cc2HfgZ9.s page 12
373 000a FFF7FEFF bl HAL_ADC_GetValue
374 .LVL7:
375 000e 0346 mov r3, r0
376 .loc 1 277 13 discriminator 1 view .LVU47
377 0010 80B2 uxth r0, r0
378 .LVL8:
278:Src/stm32g4xx_it.c **** if (blocco) {
379 .loc 1 278 5 is_stmt 1 view .LVU48
380 .loc 1 278 9 is_stmt 0 view .LVU49
381 0012 0B4A ldr r2, .L36+8
382 0014 1278 ldrb r2, [r2] @ zero_extendqisi2
383 .loc 1 278 8 view .LVU50
384 0016 4AB1 cbz r2, .L33
279:Src/stm32g4xx_it.c **** #ifdef MODALITA_BLOCCO_PERMANENTE
280:Src/stm32g4xx_it.c **** TIM2->CCR1 = 0;
385 .loc 1 280 9 is_stmt 1 view .LVU51
386 .loc 1 280 20 is_stmt 0 view .LVU52
387 0018 4FF08043 mov r3, #1073741824
388 001c 0022 movs r2, #0
389 001e 5A63 str r2, [r3, #52]
281:Src/stm32g4xx_it.c **** TIM2->CCR2 = 0;
390 .loc 1 281 9 is_stmt 1 view .LVU53
391 .loc 1 281 20 is_stmt 0 view .LVU54
392 0020 9A63 str r2, [r3, #56]
393 .L34:
282:Src/stm32g4xx_it.c **** #endif
283:Src/stm32g4xx_it.c **** #ifdef MODALITA_BLOCCO_BASSA_POTENZA
284:Src/stm32g4xx_it.c **** TIM2->CCR1 = adc_val >> DIVISORE_BLOCCO_BASSA_POTENZA;
285:Src/stm32g4xx_it.c **** TIM2->CCR2 = adc_val >> DIVISORE_BLOCCO_BASSA_POTENZA;
286:Src/stm32g4xx_it.c **** #endif
287:Src/stm32g4xx_it.c **** } else {
288:Src/stm32g4xx_it.c **** TIM2->CCR1 = adc_val;
289:Src/stm32g4xx_it.c **** TIM2->CCR2 = adc_val; // ???
290:Src/stm32g4xx_it.c **** }
291:Src/stm32g4xx_it.c **** ui_volume = vu_meter(adc_val);
394 .loc 1 291 5 is_stmt 1 view .LVU55
395 .loc 1 291 17 is_stmt 0 view .LVU56
396 0022 FFF7FEFF bl vu_meter
397 .LVL9:
398 .loc 1 291 15 discriminator 1 view .LVU57
399 0026 074B ldr r3, .L36+12
400 0028 1880 strh r0, [r3] @ movhi
292:Src/stm32g4xx_it.c **** /* USER CODE END TIM2_IRQn 1 */
293:Src/stm32g4xx_it.c **** }
401 .loc 1 293 1 view .LVU58
402 002a 08BD pop {r3, pc}
403 .LVL10:
404 .L33:
288:Src/stm32g4xx_it.c **** TIM2->CCR2 = adc_val; // ???
405 .loc 1 288 9 is_stmt 1 view .LVU59
406 002c 9BB2 uxth r3, r3
288:Src/stm32g4xx_it.c **** TIM2->CCR2 = adc_val; // ???
407 .loc 1 288 20 is_stmt 0 view .LVU60
408 002e 4FF08042 mov r2, #1073741824
409 0032 5363 str r3, [r2, #52]
289:Src/stm32g4xx_it.c **** }
410 .loc 1 289 9 is_stmt 1 view .LVU61
ARM GAS /tmp/cc2HfgZ9.s page 13
289:Src/stm32g4xx_it.c **** }
411 .loc 1 289 20 is_stmt 0 view .LVU62
412 0034 9363 str r3, [r2, #56]
413 0036 F4E7 b .L34
414 .L37:
415 .align 2
416 .L36:
417 0038 00000000 .word htim2
418 003c 00000000 .word hadc1
419 0040 00000000 .word blocco
420 0044 00000000 .word ui_volume
421 .cfi_endproc
422 .LFE345:
424 .section .text.TIM3_IRQHandler,"ax",%progbits
425 .align 1
426 .global TIM3_IRQHandler
427 .syntax unified
428 .thumb
429 .thumb_func
431 TIM3_IRQHandler:
432 .LFB346:
294:Src/stm32g4xx_it.c ****
295:Src/stm32g4xx_it.c **** /**
296:Src/stm32g4xx_it.c **** * @brief This function handles TIM3 global interrupt.
297:Src/stm32g4xx_it.c **** */
298:Src/stm32g4xx_it.c **** void TIM3_IRQHandler(void)
299:Src/stm32g4xx_it.c **** {
433 .loc 1 299 1 is_stmt 1 view -0
434 .cfi_startproc
435 @ args = 0, pretend = 0, frame = 0
436 @ frame_needed = 0, uses_anonymous_args = 0
437 0000 08B5 push {r3, lr}
438 .LCFI6:
439 .cfi_def_cfa_offset 8
440 .cfi_offset 3, -8
441 .cfi_offset 14, -4
300:Src/stm32g4xx_it.c **** /* USER CODE BEGIN TIM3_IRQn 0 */
301:Src/stm32g4xx_it.c ****
302:Src/stm32g4xx_it.c **** /* USER CODE END TIM3_IRQn 0 */
303:Src/stm32g4xx_it.c **** HAL_TIM_IRQHandler(&htim3);
442 .loc 1 303 3 view .LVU64
443 0002 0348 ldr r0, .L40
444 0004 FFF7FEFF bl HAL_TIM_IRQHandler
445 .LVL11:
304:Src/stm32g4xx_it.c **** /* USER CODE BEGIN TIM3_IRQn 1 */
305:Src/stm32g4xx_it.c **** // base tempi
306:Src/stm32g4xx_it.c **** sys_tick = 1;
446 .loc 1 306 5 view .LVU65
447 .loc 1 306 14 is_stmt 0 view .LVU66
448 0008 024B ldr r3, .L40+4
449 000a 0122 movs r2, #1
450 000c 1A70 strb r2, [r3]
307:Src/stm32g4xx_it.c **** /* USER CODE END TIM3_IRQn 1 */
308:Src/stm32g4xx_it.c **** }
451 .loc 1 308 1 view .LVU67
452 000e 08BD pop {r3, pc}
453 .L41:
ARM GAS /tmp/cc2HfgZ9.s page 14
454 .align 2
455 .L40:
456 0010 00000000 .word htim3
457 0014 00000000 .word sys_tick
458 .cfi_endproc
459 .LFE346:
461 .section .text.USART1_IRQHandler,"ax",%progbits
462 .align 1
463 .global USART1_IRQHandler
464 .syntax unified
465 .thumb
466 .thumb_func
468 USART1_IRQHandler:
469 .LFB347:
309:Src/stm32g4xx_it.c ****
310:Src/stm32g4xx_it.c **** /**
311:Src/stm32g4xx_it.c **** * @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI li
312:Src/stm32g4xx_it.c **** */
313:Src/stm32g4xx_it.c **** void USART1_IRQHandler(void)
314:Src/stm32g4xx_it.c **** {
470 .loc 1 314 1 is_stmt 1 view -0
471 .cfi_startproc
472 @ args = 0, pretend = 0, frame = 0
473 @ frame_needed = 0, uses_anonymous_args = 0
474 0000 08B5 push {r3, lr}
475 .LCFI7:
476 .cfi_def_cfa_offset 8
477 .cfi_offset 3, -8
478 .cfi_offset 14, -4
315:Src/stm32g4xx_it.c **** /* USER CODE BEGIN USART1_IRQn 0 */
316:Src/stm32g4xx_it.c ****
317:Src/stm32g4xx_it.c **** /* USER CODE END USART1_IRQn 0 */
318:Src/stm32g4xx_it.c **** HAL_UART_IRQHandler(&huart1);
479 .loc 1 318 3 view .LVU69
480 0002 0248 ldr r0, .L44
481 0004 FFF7FEFF bl HAL_UART_IRQHandler
482 .LVL12:
319:Src/stm32g4xx_it.c **** /* USER CODE BEGIN USART1_IRQn 1 */
320:Src/stm32g4xx_it.c ****
321:Src/stm32g4xx_it.c **** /* USER CODE END USART1_IRQn 1 */
322:Src/stm32g4xx_it.c **** }
483 .loc 1 322 1 is_stmt 0 view .LVU70
484 0008 08BD pop {r3, pc}
485 .L45:
486 000a 00BF .align 2
487 .L44:
488 000c 00000000 .word huart1
489 .cfi_endproc
490 .LFE347:
492 .text
493 .Letext0:
494 .file 2 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
495 .file 3 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
496 .file 4 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
497 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h"
498 .file 6 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
499 .file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
ARM GAS /tmp/cc2HfgZ9.s page 15
500 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h"
501 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h"
502 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
503 .file 11 "Inc/squeow.h"
504 .file 12 "Inc/squeow_ui.h"
505 .file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
ARM GAS /tmp/cc2HfgZ9.s page 16
DEFINED SYMBOLS
*ABS*:00000000 stm32g4xx_it.c
/tmp/cc2HfgZ9.s:21 .text.NMI_Handler:00000000 $t
/tmp/cc2HfgZ9.s:27 .text.NMI_Handler:00000000 NMI_Handler
/tmp/cc2HfgZ9.s:44 .text.HardFault_Handler:00000000 $t
/tmp/cc2HfgZ9.s:50 .text.HardFault_Handler:00000000 HardFault_Handler
/tmp/cc2HfgZ9.s:67 .text.MemManage_Handler:00000000 $t
/tmp/cc2HfgZ9.s:73 .text.MemManage_Handler:00000000 MemManage_Handler
/tmp/cc2HfgZ9.s:90 .text.BusFault_Handler:00000000 $t
/tmp/cc2HfgZ9.s:96 .text.BusFault_Handler:00000000 BusFault_Handler
/tmp/cc2HfgZ9.s:113 .text.UsageFault_Handler:00000000 $t
/tmp/cc2HfgZ9.s:119 .text.UsageFault_Handler:00000000 UsageFault_Handler
/tmp/cc2HfgZ9.s:136 .text.SVC_Handler:00000000 $t
/tmp/cc2HfgZ9.s:142 .text.SVC_Handler:00000000 SVC_Handler
/tmp/cc2HfgZ9.s:155 .text.DebugMon_Handler:00000000 $t
/tmp/cc2HfgZ9.s:161 .text.DebugMon_Handler:00000000 DebugMon_Handler
/tmp/cc2HfgZ9.s:174 .text.PendSV_Handler:00000000 $t
/tmp/cc2HfgZ9.s:180 .text.PendSV_Handler:00000000 PendSV_Handler
/tmp/cc2HfgZ9.s:193 .text.SysTick_Handler:00000000 $t
/tmp/cc2HfgZ9.s:199 .text.SysTick_Handler:00000000 SysTick_Handler
/tmp/cc2HfgZ9.s:219 .text.DMA1_Channel2_IRQHandler:00000000 $t
/tmp/cc2HfgZ9.s:225 .text.DMA1_Channel2_IRQHandler:00000000 DMA1_Channel2_IRQHandler
/tmp/cc2HfgZ9.s:245 .text.DMA1_Channel2_IRQHandler:0000000c $d
/tmp/cc2HfgZ9.s:250 .text.DMA1_Channel3_IRQHandler:00000000 $t
/tmp/cc2HfgZ9.s:256 .text.DMA1_Channel3_IRQHandler:00000000 DMA1_Channel3_IRQHandler
/tmp/cc2HfgZ9.s:276 .text.DMA1_Channel3_IRQHandler:0000000c $d
/tmp/cc2HfgZ9.s:281 .text.DMA1_Channel4_IRQHandler:00000000 $t
/tmp/cc2HfgZ9.s:287 .text.DMA1_Channel4_IRQHandler:00000000 DMA1_Channel4_IRQHandler
/tmp/cc2HfgZ9.s:307 .text.DMA1_Channel4_IRQHandler:0000000c $d
/tmp/cc2HfgZ9.s:312 .text.ADC1_2_IRQHandler:00000000 $t
/tmp/cc2HfgZ9.s:318 .text.ADC1_2_IRQHandler:00000000 ADC1_2_IRQHandler
/tmp/cc2HfgZ9.s:342 .text.ADC1_2_IRQHandler:00000010 $d
/tmp/cc2HfgZ9.s:348 .text.TIM2_IRQHandler:00000000 $t
/tmp/cc2HfgZ9.s:354 .text.TIM2_IRQHandler:00000000 TIM2_IRQHandler
/tmp/cc2HfgZ9.s:417 .text.TIM2_IRQHandler:00000038 $d
/tmp/cc2HfgZ9.s:425 .text.TIM3_IRQHandler:00000000 $t
/tmp/cc2HfgZ9.s:431 .text.TIM3_IRQHandler:00000000 TIM3_IRQHandler
/tmp/cc2HfgZ9.s:456 .text.TIM3_IRQHandler:00000010 $d
/tmp/cc2HfgZ9.s:462 .text.USART1_IRQHandler:00000000 $t
/tmp/cc2HfgZ9.s:468 .text.USART1_IRQHandler:00000000 USART1_IRQHandler
/tmp/cc2HfgZ9.s:488 .text.USART1_IRQHandler:0000000c $d
UNDEFINED SYMBOLS
HAL_IncTick
HAL_DMA_IRQHandler
hdma_adc2
hdma_usart1_rx
hdma_usart1_tx
HAL_ADC_IRQHandler
hadc1
hadc2
HAL_TIM_IRQHandler
HAL_ADC_GetValue
vu_meter
htim2
blocco
ui_volume
ARM GAS /tmp/cc2HfgZ9.s page 17
htim3
sys_tick
HAL_UART_IRQHandler
huart1