2025-06-28 00:58:29 +02:00
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ARM GAS /tmp/cc2HfgZ9.s page 1
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2023-07-02 17:09:41 +02:00
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1 .cpu cortex-m4
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2 .arch armv7e-m
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3 .fpu fpv4-sp-d16
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4 .eabi_attribute 27, 1
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5 .eabi_attribute 28, 1
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6 .eabi_attribute 20, 1
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7 .eabi_attribute 21, 1
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8 .eabi_attribute 23, 3
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9 .eabi_attribute 24, 1
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10 .eabi_attribute 25, 1
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11 .eabi_attribute 26, 1
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12 .eabi_attribute 30, 1
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13 .eabi_attribute 34, 1
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14 .eabi_attribute 18, 4
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15 .file "stm32g4xx_it.c"
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16 .text
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17 .Ltext0:
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18 .cfi_sections .debug_frame
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19 .file 1 "Src/stm32g4xx_it.c"
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20 .section .text.NMI_Handler,"ax",%progbits
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21 .align 1
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22 .global NMI_Handler
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23 .syntax unified
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24 .thumb
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25 .thumb_func
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27 NMI_Handler:
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28 .LFB332:
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2023-07-02 17:09:41 +02:00
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1:Src/stm32g4xx_it.c **** /* USER CODE BEGIN Header */
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2:Src/stm32g4xx_it.c **** /**
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2025-06-28 00:58:29 +02:00
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3:Src/stm32g4xx_it.c **** ******************************************************************************
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4:Src/stm32g4xx_it.c **** * @file stm32g4xx_it.c
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5:Src/stm32g4xx_it.c **** * @brief Interrupt Service Routines.
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6:Src/stm32g4xx_it.c **** ******************************************************************************
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7:Src/stm32g4xx_it.c **** * @attention
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8:Src/stm32g4xx_it.c **** *
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9:Src/stm32g4xx_it.c **** * Copyright (c) 2022 STMicroelectronics.
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10:Src/stm32g4xx_it.c **** * All rights reserved.
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11:Src/stm32g4xx_it.c **** *
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12:Src/stm32g4xx_it.c **** * This software is licensed under terms that can be found in the LICENSE file
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13:Src/stm32g4xx_it.c **** * in the root directory of this software component.
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14:Src/stm32g4xx_it.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
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15:Src/stm32g4xx_it.c **** *
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16:Src/stm32g4xx_it.c **** ******************************************************************************
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17:Src/stm32g4xx_it.c **** */
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2023-07-02 17:09:41 +02:00
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18:Src/stm32g4xx_it.c **** /* USER CODE END Header */
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19:Src/stm32g4xx_it.c ****
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20:Src/stm32g4xx_it.c **** /* Includes ------------------------------------------------------------------*/
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21:Src/stm32g4xx_it.c **** #include "main.h"
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22:Src/stm32g4xx_it.c **** #include "stm32g4xx_it.h"
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23:Src/stm32g4xx_it.c **** /* Private includes ----------------------------------------------------------*/
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24:Src/stm32g4xx_it.c **** /* USER CODE BEGIN Includes */
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2025-01-28 19:01:22 +01:00
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25:Src/stm32g4xx_it.c **** #include "squeow.h"
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26:Src/stm32g4xx_it.c **** #include "squeow_ui.h"
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27:Src/stm32g4xx_it.c **** /* USER CODE END Includes */
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28:Src/stm32g4xx_it.c ****
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29:Src/stm32g4xx_it.c **** /* Private typedef -----------------------------------------------------------*/
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30:Src/stm32g4xx_it.c **** /* USER CODE BEGIN TD */
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2025-06-28 00:58:29 +02:00
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ARM GAS /tmp/cc2HfgZ9.s page 2
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2023-07-02 17:09:41 +02:00
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31:Src/stm32g4xx_it.c ****
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2025-01-28 19:01:22 +01:00
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32:Src/stm32g4xx_it.c **** /* USER CODE END TD */
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33:Src/stm32g4xx_it.c ****
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34:Src/stm32g4xx_it.c **** /* Private define ------------------------------------------------------------*/
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35:Src/stm32g4xx_it.c **** /* USER CODE BEGIN PD */
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2023-07-02 17:09:41 +02:00
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36:Src/stm32g4xx_it.c ****
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2025-01-28 19:01:22 +01:00
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37:Src/stm32g4xx_it.c **** /* USER CODE END PD */
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38:Src/stm32g4xx_it.c ****
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39:Src/stm32g4xx_it.c **** /* Private macro -------------------------------------------------------------*/
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40:Src/stm32g4xx_it.c **** /* USER CODE BEGIN PM */
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2023-07-02 17:09:41 +02:00
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41:Src/stm32g4xx_it.c ****
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2025-01-28 19:01:22 +01:00
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42:Src/stm32g4xx_it.c **** /* USER CODE END PM */
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43:Src/stm32g4xx_it.c ****
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44:Src/stm32g4xx_it.c **** /* Private variables ---------------------------------------------------------*/
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45:Src/stm32g4xx_it.c **** /* USER CODE BEGIN PV */
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2023-07-02 17:09:41 +02:00
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46:Src/stm32g4xx_it.c ****
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2025-01-28 19:01:22 +01:00
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47:Src/stm32g4xx_it.c **** /* USER CODE END PV */
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48:Src/stm32g4xx_it.c ****
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49:Src/stm32g4xx_it.c **** /* Private function prototypes -----------------------------------------------*/
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50:Src/stm32g4xx_it.c **** /* USER CODE BEGIN PFP */
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2023-07-02 17:09:41 +02:00
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51:Src/stm32g4xx_it.c ****
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2025-01-28 19:01:22 +01:00
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52:Src/stm32g4xx_it.c **** /* USER CODE END PFP */
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53:Src/stm32g4xx_it.c ****
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54:Src/stm32g4xx_it.c **** /* Private user code ---------------------------------------------------------*/
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55:Src/stm32g4xx_it.c **** /* USER CODE BEGIN 0 */
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2023-07-02 17:09:41 +02:00
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56:Src/stm32g4xx_it.c ****
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2025-01-28 19:01:22 +01:00
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57:Src/stm32g4xx_it.c **** /* USER CODE END 0 */
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58:Src/stm32g4xx_it.c ****
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59:Src/stm32g4xx_it.c **** /* External variables --------------------------------------------------------*/
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60:Src/stm32g4xx_it.c **** extern DMA_HandleTypeDef hdma_adc2;
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61:Src/stm32g4xx_it.c **** extern ADC_HandleTypeDef hadc1;
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62:Src/stm32g4xx_it.c **** extern ADC_HandleTypeDef hadc2;
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63:Src/stm32g4xx_it.c **** extern TIM_HandleTypeDef htim2;
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64:Src/stm32g4xx_it.c **** extern TIM_HandleTypeDef htim3;
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65:Src/stm32g4xx_it.c **** extern DMA_HandleTypeDef hdma_usart1_rx;
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66:Src/stm32g4xx_it.c **** extern DMA_HandleTypeDef hdma_usart1_tx;
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67:Src/stm32g4xx_it.c **** extern UART_HandleTypeDef huart1;
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68:Src/stm32g4xx_it.c **** /* USER CODE BEGIN EV */
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69:Src/stm32g4xx_it.c ****
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70:Src/stm32g4xx_it.c **** /* USER CODE END EV */
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71:Src/stm32g4xx_it.c ****
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72:Src/stm32g4xx_it.c **** /******************************************************************************/
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73:Src/stm32g4xx_it.c **** /* Cortex-M4 Processor Interruption and Exception Handlers */
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74:Src/stm32g4xx_it.c **** /******************************************************************************/
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75:Src/stm32g4xx_it.c **** /**
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76:Src/stm32g4xx_it.c **** * @brief This function handles Non maskable interrupt.
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77:Src/stm32g4xx_it.c **** */
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78:Src/stm32g4xx_it.c **** void NMI_Handler(void)
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79:Src/stm32g4xx_it.c **** {
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29 .loc 1 79 1 view -0
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30 .cfi_startproc
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31 @ Volatile: function does not return.
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32 @ args = 0, pretend = 0, frame = 0
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33 @ frame_needed = 0, uses_anonymous_args = 0
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34 @ link register save eliminated.
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35 .L2:
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2025-01-28 19:01:22 +01:00
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80:Src/stm32g4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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2025-06-28 00:58:29 +02:00
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ARM GAS /tmp/cc2HfgZ9.s page 3
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2025-01-28 19:01:22 +01:00
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81:Src/stm32g4xx_it.c ****
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82:Src/stm32g4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */
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83:Src/stm32g4xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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2025-06-28 00:58:29 +02:00
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84:Src/stm32g4xx_it.c **** while (1) {
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36 .loc 1 84 5 view .LVU1
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85:Src/stm32g4xx_it.c **** }
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37 .loc 1 85 5 view .LVU2
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84:Src/stm32g4xx_it.c **** }
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38 .loc 1 84 11 view .LVU3
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2023-07-02 17:09:41 +02:00
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39 0000 FEE7 b .L2
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40 .cfi_endproc
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41 .LFE332:
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2023-07-02 17:09:41 +02:00
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43 .section .text.HardFault_Handler,"ax",%progbits
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44 .align 1
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45 .global HardFault_Handler
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46 .syntax unified
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47 .thumb
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48 .thumb_func
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50 HardFault_Handler:
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51 .LFB333:
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86:Src/stm32g4xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */
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87:Src/stm32g4xx_it.c **** }
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88:Src/stm32g4xx_it.c ****
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89:Src/stm32g4xx_it.c **** /**
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90:Src/stm32g4xx_it.c **** * @brief This function handles Hard fault interrupt.
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91:Src/stm32g4xx_it.c **** */
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92:Src/stm32g4xx_it.c **** void HardFault_Handler(void)
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93:Src/stm32g4xx_it.c **** {
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52 .loc 1 93 1 view -0
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53 .cfi_startproc
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54 @ Volatile: function does not return.
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55 @ args = 0, pretend = 0, frame = 0
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56 @ frame_needed = 0, uses_anonymous_args = 0
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57 @ link register save eliminated.
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58 .L4:
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94:Src/stm32g4xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */
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95:Src/stm32g4xx_it.c ****
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96:Src/stm32g4xx_it.c **** /* USER CODE END HardFault_IRQn 0 */
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97:Src/stm32g4xx_it.c **** while (1)
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59 .loc 1 97 3 view .LVU5
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2025-01-28 19:01:22 +01:00
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98:Src/stm32g4xx_it.c **** {
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2025-06-28 00:58:29 +02:00
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99:Src/stm32g4xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */
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100:Src/stm32g4xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */
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101:Src/stm32g4xx_it.c **** }
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60 .loc 1 101 3 view .LVU6
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97:Src/stm32g4xx_it.c **** {
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61 .loc 1 97 9 view .LVU7
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2023-07-02 17:09:41 +02:00
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62 0000 FEE7 b .L4
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63 .cfi_endproc
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64 .LFE333:
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66 .section .text.MemManage_Handler,"ax",%progbits
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67 .align 1
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68 .global MemManage_Handler
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69 .syntax unified
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70 .thumb
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71 .thumb_func
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2025-01-28 19:01:22 +01:00
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73 MemManage_Handler:
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2025-06-28 00:58:29 +02:00
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ARM GAS /tmp/cc2HfgZ9.s page 4
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74 .LFB334:
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102:Src/stm32g4xx_it.c **** }
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103:Src/stm32g4xx_it.c ****
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104:Src/stm32g4xx_it.c **** /**
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105:Src/stm32g4xx_it.c **** * @brief This function handles Memory management fault.
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106:Src/stm32g4xx_it.c **** */
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107:Src/stm32g4xx_it.c **** void MemManage_Handler(void)
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108:Src/stm32g4xx_it.c **** {
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75 .loc 1 108 1 view -0
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2023-07-02 17:09:41 +02:00
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76 .cfi_startproc
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77 @ Volatile: function does not return.
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78 @ args = 0, pretend = 0, frame = 0
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79 @ frame_needed = 0, uses_anonymous_args = 0
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80 @ link register save eliminated.
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81 .L6:
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2025-06-28 00:58:29 +02:00
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109:Src/stm32g4xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */
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110:Src/stm32g4xx_it.c ****
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111:Src/stm32g4xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */
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112:Src/stm32g4xx_it.c **** while (1)
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82 .loc 1 112 3 view .LVU9
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2025-01-28 19:01:22 +01:00
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113:Src/stm32g4xx_it.c **** {
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2025-06-28 00:58:29 +02:00
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114:Src/stm32g4xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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115:Src/stm32g4xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */
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116:Src/stm32g4xx_it.c **** }
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83 .loc 1 116 3 view .LVU10
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112:Src/stm32g4xx_it.c **** {
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84 .loc 1 112 9 view .LVU11
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2023-07-02 17:09:41 +02:00
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85 0000 FEE7 b .L6
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86 .cfi_endproc
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2025-06-28 00:58:29 +02:00
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87 .LFE334:
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2023-07-02 17:09:41 +02:00
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89 .section .text.BusFault_Handler,"ax",%progbits
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90 .align 1
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91 .global BusFault_Handler
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92 .syntax unified
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93 .thumb
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94 .thumb_func
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96 BusFault_Handler:
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2025-06-28 00:58:29 +02:00
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97 .LFB335:
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117:Src/stm32g4xx_it.c **** }
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118:Src/stm32g4xx_it.c ****
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119:Src/stm32g4xx_it.c **** /**
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120:Src/stm32g4xx_it.c **** * @brief This function handles Prefetch fault, memory access fault.
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121:Src/stm32g4xx_it.c **** */
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122:Src/stm32g4xx_it.c **** void BusFault_Handler(void)
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123:Src/stm32g4xx_it.c **** {
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98 .loc 1 123 1 view -0
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2023-07-02 17:09:41 +02:00
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99 .cfi_startproc
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100 @ Volatile: function does not return.
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101 @ args = 0, pretend = 0, frame = 0
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102 @ frame_needed = 0, uses_anonymous_args = 0
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103 @ link register save eliminated.
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104 .L8:
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2025-06-28 00:58:29 +02:00
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124:Src/stm32g4xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */
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125:Src/stm32g4xx_it.c ****
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126:Src/stm32g4xx_it.c **** /* USER CODE END BusFault_IRQn 0 */
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127:Src/stm32g4xx_it.c **** while (1)
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105 .loc 1 127 3 view .LVU13
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ARM GAS /tmp/cc2HfgZ9.s page 5
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2025-01-28 19:01:22 +01:00
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128:Src/stm32g4xx_it.c **** {
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2025-06-28 00:58:29 +02:00
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129:Src/stm32g4xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */
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130:Src/stm32g4xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */
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131:Src/stm32g4xx_it.c **** }
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106 .loc 1 131 3 view .LVU14
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127:Src/stm32g4xx_it.c **** {
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107 .loc 1 127 9 view .LVU15
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2023-07-02 17:09:41 +02:00
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108 0000 FEE7 b .L8
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109 .cfi_endproc
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2025-06-28 00:58:29 +02:00
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110 .LFE335:
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2023-07-02 17:09:41 +02:00
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112 .section .text.UsageFault_Handler,"ax",%progbits
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113 .align 1
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114 .global UsageFault_Handler
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115 .syntax unified
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116 .thumb
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117 .thumb_func
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119 UsageFault_Handler:
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2025-06-28 00:58:29 +02:00
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120 .LFB336:
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132:Src/stm32g4xx_it.c **** }
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133:Src/stm32g4xx_it.c ****
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134:Src/stm32g4xx_it.c **** /**
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135:Src/stm32g4xx_it.c **** * @brief This function handles Undefined instruction or illegal state.
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136:Src/stm32g4xx_it.c **** */
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137:Src/stm32g4xx_it.c **** void UsageFault_Handler(void)
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138:Src/stm32g4xx_it.c **** {
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121 .loc 1 138 1 view -0
|
2023-07-02 17:09:41 +02:00
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122 .cfi_startproc
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123 @ Volatile: function does not return.
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124 @ args = 0, pretend = 0, frame = 0
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125 @ frame_needed = 0, uses_anonymous_args = 0
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126 @ link register save eliminated.
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|
127 .L10:
|
2025-06-28 00:58:29 +02:00
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139:Src/stm32g4xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */
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140:Src/stm32g4xx_it.c ****
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141:Src/stm32g4xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */
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142:Src/stm32g4xx_it.c **** while (1)
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128 .loc 1 142 3 view .LVU17
|
2025-01-28 19:01:22 +01:00
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143:Src/stm32g4xx_it.c **** {
|
2025-06-28 00:58:29 +02:00
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|
144:Src/stm32g4xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
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|
145:Src/stm32g4xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */
|
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|
146:Src/stm32g4xx_it.c **** }
|
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|
129 .loc 1 146 3 view .LVU18
|
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|
142:Src/stm32g4xx_it.c **** {
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130 .loc 1 142 9 view .LVU19
|
2023-07-02 17:09:41 +02:00
|
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|
|
131 0000 FEE7 b .L10
|
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|
132 .cfi_endproc
|
2025-06-28 00:58:29 +02:00
|
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|
133 .LFE336:
|
2023-07-02 17:09:41 +02:00
|
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|
|
135 .section .text.SVC_Handler,"ax",%progbits
|
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|
|
136 .align 1
|
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|
|
137 .global SVC_Handler
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|
|
138 .syntax unified
|
|
|
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|
|
139 .thumb
|
|
|
|
|
|
140 .thumb_func
|
|
|
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|
|
142 SVC_Handler:
|
2025-06-28 00:58:29 +02:00
|
|
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|
143 .LFB337:
|
|
|
|
|
|
147:Src/stm32g4xx_it.c **** }
|
|
|
|
|
|
148:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
ARM GAS /tmp/cc2HfgZ9.s page 6
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
149:Src/stm32g4xx_it.c **** /**
|
|
|
|
|
|
150:Src/stm32g4xx_it.c **** * @brief This function handles System service call via SWI instruction.
|
|
|
|
|
|
151:Src/stm32g4xx_it.c **** */
|
|
|
|
|
|
152:Src/stm32g4xx_it.c **** void SVC_Handler(void)
|
|
|
|
|
|
153:Src/stm32g4xx_it.c **** {
|
|
|
|
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|
144 .loc 1 153 1 view -0
|
2025-01-28 19:01:22 +01:00
|
|
|
|
145 .cfi_startproc
|
2023-07-02 17:09:41 +02:00
|
|
|
|
146 @ args = 0, pretend = 0, frame = 0
|
|
|
|
|
|
147 @ frame_needed = 0, uses_anonymous_args = 0
|
|
|
|
|
|
148 @ link register save eliminated.
|
2025-06-28 00:58:29 +02:00
|
|
|
|
154:Src/stm32g4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */
|
|
|
|
|
|
155:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
156:Src/stm32g4xx_it.c **** /* USER CODE END SVCall_IRQn 0 */
|
|
|
|
|
|
157:Src/stm32g4xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */
|
|
|
|
|
|
158:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
159:Src/stm32g4xx_it.c **** /* USER CODE END SVCall_IRQn 1 */
|
|
|
|
|
|
160:Src/stm32g4xx_it.c **** }
|
|
|
|
|
|
149 .loc 1 160 1 view .LVU21
|
2023-07-02 17:09:41 +02:00
|
|
|
|
150 0000 7047 bx lr
|
|
|
|
|
|
151 .cfi_endproc
|
2025-06-28 00:58:29 +02:00
|
|
|
|
152 .LFE337:
|
2023-07-02 17:09:41 +02:00
|
|
|
|
154 .section .text.DebugMon_Handler,"ax",%progbits
|
|
|
|
|
|
155 .align 1
|
|
|
|
|
|
156 .global DebugMon_Handler
|
|
|
|
|
|
157 .syntax unified
|
|
|
|
|
|
158 .thumb
|
|
|
|
|
|
159 .thumb_func
|
|
|
|
|
|
161 DebugMon_Handler:
|
2025-06-28 00:58:29 +02:00
|
|
|
|
162 .LFB338:
|
|
|
|
|
|
161:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
162:Src/stm32g4xx_it.c **** /**
|
|
|
|
|
|
163:Src/stm32g4xx_it.c **** * @brief This function handles Debug monitor.
|
|
|
|
|
|
164:Src/stm32g4xx_it.c **** */
|
|
|
|
|
|
165:Src/stm32g4xx_it.c **** void DebugMon_Handler(void)
|
|
|
|
|
|
166:Src/stm32g4xx_it.c **** {
|
|
|
|
|
|
163 .loc 1 166 1 view -0
|
2023-07-02 17:09:41 +02:00
|
|
|
|
164 .cfi_startproc
|
|
|
|
|
|
165 @ args = 0, pretend = 0, frame = 0
|
|
|
|
|
|
166 @ frame_needed = 0, uses_anonymous_args = 0
|
|
|
|
|
|
167 @ link register save eliminated.
|
2025-06-28 00:58:29 +02:00
|
|
|
|
167:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
|
|
|
|
|
168:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
169:Src/stm32g4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */
|
|
|
|
|
|
170:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
|
|
|
|
|
171:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
172:Src/stm32g4xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */
|
|
|
|
|
|
173:Src/stm32g4xx_it.c **** }
|
|
|
|
|
|
168 .loc 1 173 1 view .LVU23
|
2023-07-02 17:09:41 +02:00
|
|
|
|
169 0000 7047 bx lr
|
|
|
|
|
|
170 .cfi_endproc
|
2025-06-28 00:58:29 +02:00
|
|
|
|
171 .LFE338:
|
2023-07-02 17:09:41 +02:00
|
|
|
|
173 .section .text.PendSV_Handler,"ax",%progbits
|
|
|
|
|
|
174 .align 1
|
|
|
|
|
|
175 .global PendSV_Handler
|
|
|
|
|
|
176 .syntax unified
|
|
|
|
|
|
177 .thumb
|
2025-06-28 00:58:29 +02:00
|
|
|
|
178 .thumb_func
|
|
|
|
|
|
ARM GAS /tmp/cc2HfgZ9.s page 7
|
2025-01-28 19:01:22 +01:00
|
|
|
|
|
|
|
|
|
|
|
2023-07-02 17:09:41 +02:00
|
|
|
|
180 PendSV_Handler:
|
2025-06-28 00:58:29 +02:00
|
|
|
|
181 .LFB339:
|
|
|
|
|
|
174:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
175:Src/stm32g4xx_it.c **** /**
|
|
|
|
|
|
176:Src/stm32g4xx_it.c **** * @brief This function handles Pendable request for system service.
|
|
|
|
|
|
177:Src/stm32g4xx_it.c **** */
|
|
|
|
|
|
178:Src/stm32g4xx_it.c **** void PendSV_Handler(void)
|
|
|
|
|
|
179:Src/stm32g4xx_it.c **** {
|
|
|
|
|
|
182 .loc 1 179 1 view -0
|
2023-07-02 17:09:41 +02:00
|
|
|
|
183 .cfi_startproc
|
|
|
|
|
|
184 @ args = 0, pretend = 0, frame = 0
|
|
|
|
|
|
185 @ frame_needed = 0, uses_anonymous_args = 0
|
|
|
|
|
|
186 @ link register save eliminated.
|
2025-06-28 00:58:29 +02:00
|
|
|
|
180:Src/stm32g4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */
|
|
|
|
|
|
181:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
182:Src/stm32g4xx_it.c **** /* USER CODE END PendSV_IRQn 0 */
|
|
|
|
|
|
183:Src/stm32g4xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */
|
|
|
|
|
|
184:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
185:Src/stm32g4xx_it.c **** /* USER CODE END PendSV_IRQn 1 */
|
|
|
|
|
|
186:Src/stm32g4xx_it.c **** }
|
|
|
|
|
|
187 .loc 1 186 1 view .LVU25
|
2023-07-02 17:09:41 +02:00
|
|
|
|
188 0000 7047 bx lr
|
|
|
|
|
|
189 .cfi_endproc
|
2025-06-28 00:58:29 +02:00
|
|
|
|
190 .LFE339:
|
2023-07-02 17:09:41 +02:00
|
|
|
|
192 .section .text.SysTick_Handler,"ax",%progbits
|
|
|
|
|
|
193 .align 1
|
|
|
|
|
|
194 .global SysTick_Handler
|
|
|
|
|
|
195 .syntax unified
|
|
|
|
|
|
196 .thumb
|
|
|
|
|
|
197 .thumb_func
|
|
|
|
|
|
199 SysTick_Handler:
|
2025-06-28 00:58:29 +02:00
|
|
|
|
200 .LFB340:
|
|
|
|
|
|
187:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
188:Src/stm32g4xx_it.c **** /**
|
|
|
|
|
|
189:Src/stm32g4xx_it.c **** * @brief This function handles System tick timer.
|
|
|
|
|
|
190:Src/stm32g4xx_it.c **** */
|
|
|
|
|
|
191:Src/stm32g4xx_it.c **** void SysTick_Handler(void)
|
|
|
|
|
|
192:Src/stm32g4xx_it.c **** {
|
|
|
|
|
|
201 .loc 1 192 1 view -0
|
2023-07-02 17:09:41 +02:00
|
|
|
|
202 .cfi_startproc
|
|
|
|
|
|
203 @ args = 0, pretend = 0, frame = 0
|
|
|
|
|
|
204 @ frame_needed = 0, uses_anonymous_args = 0
|
|
|
|
|
|
205 0000 08B5 push {r3, lr}
|
|
|
|
|
|
206 .LCFI0:
|
|
|
|
|
|
207 .cfi_def_cfa_offset 8
|
|
|
|
|
|
208 .cfi_offset 3, -8
|
|
|
|
|
|
209 .cfi_offset 14, -4
|
2025-06-28 00:58:29 +02:00
|
|
|
|
193:Src/stm32g4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */
|
|
|
|
|
|
194:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
195:Src/stm32g4xx_it.c **** /* USER CODE END SysTick_IRQn 0 */
|
|
|
|
|
|
196:Src/stm32g4xx_it.c **** HAL_IncTick();
|
|
|
|
|
|
210 .loc 1 196 3 view .LVU27
|
2023-07-02 17:09:41 +02:00
|
|
|
|
211 0002 FFF7FEFF bl HAL_IncTick
|
|
|
|
|
|
212 .LVL0:
|
2025-06-28 00:58:29 +02:00
|
|
|
|
197:Src/stm32g4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */
|
|
|
|
|
|
198:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
199:Src/stm32g4xx_it.c **** /* USER CODE END SysTick_IRQn 1 */
|
|
|
|
|
|
ARM GAS /tmp/cc2HfgZ9.s page 8
|
2025-01-28 19:01:22 +01:00
|
|
|
|
|
|
|
|
|
|
|
2025-06-28 00:58:29 +02:00
|
|
|
|
200:Src/stm32g4xx_it.c **** }
|
|
|
|
|
|
213 .loc 1 200 1 is_stmt 0 view .LVU28
|
2023-07-02 17:09:41 +02:00
|
|
|
|
214 0006 08BD pop {r3, pc}
|
|
|
|
|
|
215 .cfi_endproc
|
2025-06-28 00:58:29 +02:00
|
|
|
|
216 .LFE340:
|
2025-01-28 19:01:22 +01:00
|
|
|
|
218 .section .text.DMA1_Channel2_IRQHandler,"ax",%progbits
|
2023-07-02 17:09:41 +02:00
|
|
|
|
219 .align 1
|
2025-01-28 19:01:22 +01:00
|
|
|
|
220 .global DMA1_Channel2_IRQHandler
|
2023-07-02 17:09:41 +02:00
|
|
|
|
221 .syntax unified
|
|
|
|
|
|
222 .thumb
|
|
|
|
|
|
223 .thumb_func
|
2025-01-28 19:01:22 +01:00
|
|
|
|
225 DMA1_Channel2_IRQHandler:
|
2025-06-28 00:58:29 +02:00
|
|
|
|
226 .LFB341:
|
|
|
|
|
|
201:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
202:Src/stm32g4xx_it.c **** /******************************************************************************/
|
|
|
|
|
|
203:Src/stm32g4xx_it.c **** /* STM32G4xx Peripheral Interrupt Handlers */
|
|
|
|
|
|
204:Src/stm32g4xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */
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205:Src/stm32g4xx_it.c **** /* For the available peripheral interrupt handler names, */
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206:Src/stm32g4xx_it.c **** /* please refer to the startup file (startup_stm32g4xx.s). */
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207:Src/stm32g4xx_it.c **** /******************************************************************************/
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208:Src/stm32g4xx_it.c ****
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209:Src/stm32g4xx_it.c **** /**
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210:Src/stm32g4xx_it.c **** * @brief This function handles DMA1 channel2 global interrupt.
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211:Src/stm32g4xx_it.c **** */
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212:Src/stm32g4xx_it.c **** void DMA1_Channel2_IRQHandler(void)
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213:Src/stm32g4xx_it.c **** {
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227 .loc 1 213 1 is_stmt 1 view -0
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2023-07-02 17:09:41 +02:00
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228 .cfi_startproc
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229 @ args = 0, pretend = 0, frame = 0
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230 @ frame_needed = 0, uses_anonymous_args = 0
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231 0000 08B5 push {r3, lr}
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232 .LCFI1:
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233 .cfi_def_cfa_offset 8
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234 .cfi_offset 3, -8
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235 .cfi_offset 14, -4
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2025-06-28 00:58:29 +02:00
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214:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
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215:Src/stm32g4xx_it.c ****
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216:Src/stm32g4xx_it.c **** /* USER CODE END DMA1_Channel2_IRQn 0 */
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217:Src/stm32g4xx_it.c **** HAL_DMA_IRQHandler(&hdma_adc2);
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236 .loc 1 217 3 view .LVU30
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2023-07-02 17:09:41 +02:00
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237 0002 0248 ldr r0, .L18
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2025-01-28 19:01:22 +01:00
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238 0004 FFF7FEFF bl HAL_DMA_IRQHandler
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2023-07-02 17:09:41 +02:00
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239 .LVL1:
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2025-06-28 00:58:29 +02:00
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218:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
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219:Src/stm32g4xx_it.c ****
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220:Src/stm32g4xx_it.c **** /* USER CODE END DMA1_Channel2_IRQn 1 */
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221:Src/stm32g4xx_it.c **** }
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240 .loc 1 221 1 is_stmt 0 view .LVU31
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2023-07-02 17:09:41 +02:00
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241 0008 08BD pop {r3, pc}
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242 .L19:
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243 000a 00BF .align 2
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244 .L18:
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2025-01-28 19:01:22 +01:00
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245 000c 00000000 .word hdma_adc2
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2023-07-02 17:09:41 +02:00
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246 .cfi_endproc
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2025-06-28 00:58:29 +02:00
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247 .LFE341:
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2025-01-28 19:01:22 +01:00
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249 .section .text.DMA1_Channel3_IRQHandler,"ax",%progbits
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2025-06-28 00:58:29 +02:00
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250 .align 1
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ARM GAS /tmp/cc2HfgZ9.s page 9
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2025-01-28 19:01:22 +01:00
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251 .global DMA1_Channel3_IRQHandler
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2023-07-02 17:09:41 +02:00
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252 .syntax unified
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253 .thumb
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254 .thumb_func
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2025-01-28 19:01:22 +01:00
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256 DMA1_Channel3_IRQHandler:
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2025-06-28 00:58:29 +02:00
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257 .LFB342:
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222:Src/stm32g4xx_it.c ****
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223:Src/stm32g4xx_it.c **** /**
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224:Src/stm32g4xx_it.c **** * @brief This function handles DMA1 channel3 global interrupt.
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225:Src/stm32g4xx_it.c **** */
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226:Src/stm32g4xx_it.c **** void DMA1_Channel3_IRQHandler(void)
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227:Src/stm32g4xx_it.c **** {
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258 .loc 1 227 1 is_stmt 1 view -0
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2023-07-02 17:09:41 +02:00
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259 .cfi_startproc
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260 @ args = 0, pretend = 0, frame = 0
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261 @ frame_needed = 0, uses_anonymous_args = 0
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262 0000 08B5 push {r3, lr}
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263 .LCFI2:
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264 .cfi_def_cfa_offset 8
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265 .cfi_offset 3, -8
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266 .cfi_offset 14, -4
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2025-06-28 00:58:29 +02:00
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228:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DMA1_Channel3_IRQn 0 */
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229:Src/stm32g4xx_it.c ****
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230:Src/stm32g4xx_it.c **** /* USER CODE END DMA1_Channel3_IRQn 0 */
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231:Src/stm32g4xx_it.c **** HAL_DMA_IRQHandler(&hdma_usart1_rx);
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267 .loc 1 231 3 view .LVU33
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2023-07-02 17:09:41 +02:00
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268 0002 0248 ldr r0, .L22
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2025-01-28 19:01:22 +01:00
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269 0004 FFF7FEFF bl HAL_DMA_IRQHandler
|
2023-07-02 17:09:41 +02:00
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270 .LVL2:
|
2025-06-28 00:58:29 +02:00
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232:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DMA1_Channel3_IRQn 1 */
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233:Src/stm32g4xx_it.c ****
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234:Src/stm32g4xx_it.c **** /* USER CODE END DMA1_Channel3_IRQn 1 */
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235:Src/stm32g4xx_it.c **** }
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271 .loc 1 235 1 is_stmt 0 view .LVU34
|
2023-07-02 17:09:41 +02:00
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272 0008 08BD pop {r3, pc}
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273 .L23:
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274 000a 00BF .align 2
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275 .L22:
|
2025-01-28 19:01:22 +01:00
|
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|
276 000c 00000000 .word hdma_usart1_rx
|
2023-07-02 17:09:41 +02:00
|
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277 .cfi_endproc
|
2025-06-28 00:58:29 +02:00
|
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278 .LFE342:
|
2025-01-28 19:01:22 +01:00
|
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|
280 .section .text.DMA1_Channel4_IRQHandler,"ax",%progbits
|
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|
281 .align 1
|
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282 .global DMA1_Channel4_IRQHandler
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283 .syntax unified
|
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284 .thumb
|
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285 .thumb_func
|
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287 DMA1_Channel4_IRQHandler:
|
2025-06-28 00:58:29 +02:00
|
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|
288 .LFB343:
|
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|
|
236:Src/stm32g4xx_it.c ****
|
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|
237:Src/stm32g4xx_it.c **** /**
|
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238:Src/stm32g4xx_it.c **** * @brief This function handles DMA1 channel4 global interrupt.
|
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|
239:Src/stm32g4xx_it.c **** */
|
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|
240:Src/stm32g4xx_it.c **** void DMA1_Channel4_IRQHandler(void)
|
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241:Src/stm32g4xx_it.c **** {
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|
289 .loc 1 241 1 is_stmt 1 view -0
|
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|
290 .cfi_startproc
|
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|
|
ARM GAS /tmp/cc2HfgZ9.s page 10
|
2025-01-28 19:01:22 +01:00
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291 @ args = 0, pretend = 0, frame = 0
|
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|
292 @ frame_needed = 0, uses_anonymous_args = 0
|
|
|
|
|
|
293 0000 08B5 push {r3, lr}
|
|
|
|
|
|
294 .LCFI3:
|
|
|
|
|
|
295 .cfi_def_cfa_offset 8
|
|
|
|
|
|
296 .cfi_offset 3, -8
|
|
|
|
|
|
297 .cfi_offset 14, -4
|
2025-06-28 00:58:29 +02:00
|
|
|
|
242:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
|
|
|
|
|
|
243:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
244:Src/stm32g4xx_it.c **** /* USER CODE END DMA1_Channel4_IRQn 0 */
|
|
|
|
|
|
245:Src/stm32g4xx_it.c **** HAL_DMA_IRQHandler(&hdma_usart1_tx);
|
|
|
|
|
|
298 .loc 1 245 3 view .LVU36
|
2025-01-28 19:01:22 +01:00
|
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|
|
299 0002 0248 ldr r0, .L26
|
|
|
|
|
|
300 0004 FFF7FEFF bl HAL_DMA_IRQHandler
|
|
|
|
|
|
301 .LVL3:
|
2025-06-28 00:58:29 +02:00
|
|
|
|
246:Src/stm32g4xx_it.c **** /* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
|
|
|
|
|
|
247:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
248:Src/stm32g4xx_it.c **** /* USER CODE END DMA1_Channel4_IRQn 1 */
|
|
|
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|
249:Src/stm32g4xx_it.c **** }
|
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|
302 .loc 1 249 1 is_stmt 0 view .LVU37
|
2025-01-28 19:01:22 +01:00
|
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|
|
303 0008 08BD pop {r3, pc}
|
|
|
|
|
|
304 .L27:
|
|
|
|
|
|
305 000a 00BF .align 2
|
|
|
|
|
|
306 .L26:
|
|
|
|
|
|
307 000c 00000000 .word hdma_usart1_tx
|
|
|
|
|
|
308 .cfi_endproc
|
2025-06-28 00:58:29 +02:00
|
|
|
|
309 .LFE343:
|
2025-01-28 19:01:22 +01:00
|
|
|
|
311 .section .text.ADC1_2_IRQHandler,"ax",%progbits
|
|
|
|
|
|
312 .align 1
|
|
|
|
|
|
313 .global ADC1_2_IRQHandler
|
|
|
|
|
|
314 .syntax unified
|
|
|
|
|
|
315 .thumb
|
|
|
|
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|
316 .thumb_func
|
|
|
|
|
|
318 ADC1_2_IRQHandler:
|
2025-06-28 00:58:29 +02:00
|
|
|
|
319 .LFB344:
|
|
|
|
|
|
250:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
251:Src/stm32g4xx_it.c **** /**
|
|
|
|
|
|
252:Src/stm32g4xx_it.c **** * @brief This function handles ADC1 and ADC2 global interrupt.
|
|
|
|
|
|
253:Src/stm32g4xx_it.c **** */
|
|
|
|
|
|
254:Src/stm32g4xx_it.c **** void ADC1_2_IRQHandler(void)
|
|
|
|
|
|
255:Src/stm32g4xx_it.c **** {
|
|
|
|
|
|
320 .loc 1 255 1 is_stmt 1 view -0
|
2025-01-28 19:01:22 +01:00
|
|
|
|
321 .cfi_startproc
|
|
|
|
|
|
322 @ args = 0, pretend = 0, frame = 0
|
|
|
|
|
|
323 @ frame_needed = 0, uses_anonymous_args = 0
|
|
|
|
|
|
324 0000 08B5 push {r3, lr}
|
|
|
|
|
|
325 .LCFI4:
|
|
|
|
|
|
326 .cfi_def_cfa_offset 8
|
|
|
|
|
|
327 .cfi_offset 3, -8
|
|
|
|
|
|
328 .cfi_offset 14, -4
|
2025-06-28 00:58:29 +02:00
|
|
|
|
256:Src/stm32g4xx_it.c **** /* USER CODE BEGIN ADC1_2_IRQn 0 */
|
|
|
|
|
|
257:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
258:Src/stm32g4xx_it.c **** /* USER CODE END ADC1_2_IRQn 0 */
|
|
|
|
|
|
259:Src/stm32g4xx_it.c **** HAL_ADC_IRQHandler(&hadc1);
|
|
|
|
|
|
329 .loc 1 259 3 view .LVU39
|
2025-01-28 19:01:22 +01:00
|
|
|
|
330 0002 0348 ldr r0, .L30
|
2025-06-28 00:58:29 +02:00
|
|
|
|
331 0004 FFF7FEFF bl HAL_ADC_IRQHandler
|
|
|
|
|
|
ARM GAS /tmp/cc2HfgZ9.s page 11
|
2025-01-28 19:01:22 +01:00
|
|
|
|
|
|
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|
|
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|
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|
|
332 .LVL4:
|
2025-06-28 00:58:29 +02:00
|
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|
|
260:Src/stm32g4xx_it.c **** HAL_ADC_IRQHandler(&hadc2);
|
|
|
|
|
|
333 .loc 1 260 3 view .LVU40
|
2025-01-28 19:01:22 +01:00
|
|
|
|
334 0008 0248 ldr r0, .L30+4
|
|
|
|
|
|
335 000a FFF7FEFF bl HAL_ADC_IRQHandler
|
|
|
|
|
|
336 .LVL5:
|
2025-06-28 00:58:29 +02:00
|
|
|
|
261:Src/stm32g4xx_it.c **** /* USER CODE BEGIN ADC1_2_IRQn 1 */
|
|
|
|
|
|
262:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
263:Src/stm32g4xx_it.c **** /* USER CODE END ADC1_2_IRQn 1 */
|
|
|
|
|
|
264:Src/stm32g4xx_it.c **** }
|
|
|
|
|
|
337 .loc 1 264 1 is_stmt 0 view .LVU41
|
2025-01-28 19:01:22 +01:00
|
|
|
|
338 000e 08BD pop {r3, pc}
|
|
|
|
|
|
339 .L31:
|
|
|
|
|
|
340 .align 2
|
|
|
|
|
|
341 .L30:
|
|
|
|
|
|
342 0010 00000000 .word hadc1
|
|
|
|
|
|
343 0014 00000000 .word hadc2
|
|
|
|
|
|
344 .cfi_endproc
|
2025-06-28 00:58:29 +02:00
|
|
|
|
345 .LFE344:
|
2025-01-28 19:01:22 +01:00
|
|
|
|
347 .section .text.TIM2_IRQHandler,"ax",%progbits
|
|
|
|
|
|
348 .align 1
|
|
|
|
|
|
349 .global TIM2_IRQHandler
|
|
|
|
|
|
350 .syntax unified
|
|
|
|
|
|
351 .thumb
|
|
|
|
|
|
352 .thumb_func
|
|
|
|
|
|
354 TIM2_IRQHandler:
|
2025-06-28 00:58:29 +02:00
|
|
|
|
355 .LFB345:
|
|
|
|
|
|
265:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
266:Src/stm32g4xx_it.c **** /**
|
|
|
|
|
|
267:Src/stm32g4xx_it.c **** * @brief This function handles TIM2 global interrupt.
|
|
|
|
|
|
268:Src/stm32g4xx_it.c **** */
|
|
|
|
|
|
269:Src/stm32g4xx_it.c **** void TIM2_IRQHandler(void)
|
|
|
|
|
|
270:Src/stm32g4xx_it.c **** {
|
|
|
|
|
|
356 .loc 1 270 1 is_stmt 1 view -0
|
2025-01-28 19:01:22 +01:00
|
|
|
|
357 .cfi_startproc
|
|
|
|
|
|
358 @ args = 0, pretend = 0, frame = 0
|
|
|
|
|
|
359 @ frame_needed = 0, uses_anonymous_args = 0
|
2025-06-28 00:58:29 +02:00
|
|
|
|
360 0000 08B5 push {r3, lr}
|
2025-01-28 19:01:22 +01:00
|
|
|
|
361 .LCFI5:
|
|
|
|
|
|
362 .cfi_def_cfa_offset 8
|
2025-06-28 00:58:29 +02:00
|
|
|
|
363 .cfi_offset 3, -8
|
2025-01-28 19:01:22 +01:00
|
|
|
|
364 .cfi_offset 14, -4
|
2025-06-28 00:58:29 +02:00
|
|
|
|
271:Src/stm32g4xx_it.c **** /* USER CODE BEGIN TIM2_IRQn 0 */
|
|
|
|
|
|
272:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
273:Src/stm32g4xx_it.c **** /* USER CODE END TIM2_IRQn 0 */
|
|
|
|
|
|
274:Src/stm32g4xx_it.c **** HAL_TIM_IRQHandler(&htim2);
|
|
|
|
|
|
365 .loc 1 274 3 view .LVU43
|
|
|
|
|
|
366 0002 0D48 ldr r0, .L36
|
2025-01-28 19:01:22 +01:00
|
|
|
|
367 0004 FFF7FEFF bl HAL_TIM_IRQHandler
|
|
|
|
|
|
368 .LVL6:
|
2025-06-28 00:58:29 +02:00
|
|
|
|
275:Src/stm32g4xx_it.c **** /* USER CODE BEGIN TIM2_IRQn 1 */
|
|
|
|
|
|
276:Src/stm32g4xx_it.c **** uint16_t adc_val;
|
|
|
|
|
|
369 .loc 1 276 5 view .LVU44
|
|
|
|
|
|
277:Src/stm32g4xx_it.c **** adc_val = HAL_ADC_GetValue(&hadc1);
|
|
|
|
|
|
370 .loc 1 277 5 view .LVU45
|
|
|
|
|
|
371 .loc 1 277 15 is_stmt 0 view .LVU46
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372 0008 0C48 ldr r0, .L36+4
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ARM GAS /tmp/cc2HfgZ9.s page 12
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2025-01-28 19:01:22 +01:00
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373 000a FFF7FEFF bl HAL_ADC_GetValue
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374 .LVL7:
|
2025-06-28 00:58:29 +02:00
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375 000e 0346 mov r3, r0
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376 .loc 1 277 13 discriminator 1 view .LVU47
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377 0010 80B2 uxth r0, r0
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378 .LVL8:
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278:Src/stm32g4xx_it.c **** if (blocco) {
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379 .loc 1 278 5 is_stmt 1 view .LVU48
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380 .loc 1 278 9 is_stmt 0 view .LVU49
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381 0012 0B4A ldr r2, .L36+8
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382 0014 1278 ldrb r2, [r2] @ zero_extendqisi2
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383 .loc 1 278 8 view .LVU50
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384 0016 4AB1 cbz r2, .L33
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279:Src/stm32g4xx_it.c **** #ifdef MODALITA_BLOCCO_PERMANENTE
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280:Src/stm32g4xx_it.c **** TIM2->CCR1 = 0;
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385 .loc 1 280 9 is_stmt 1 view .LVU51
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386 .loc 1 280 20 is_stmt 0 view .LVU52
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387 0018 4FF08043 mov r3, #1073741824
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388 001c 0022 movs r2, #0
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389 001e 5A63 str r2, [r3, #52]
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281:Src/stm32g4xx_it.c **** TIM2->CCR2 = 0;
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390 .loc 1 281 9 is_stmt 1 view .LVU53
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391 .loc 1 281 20 is_stmt 0 view .LVU54
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392 0020 9A63 str r2, [r3, #56]
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393 .L34:
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282:Src/stm32g4xx_it.c **** #endif
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283:Src/stm32g4xx_it.c **** #ifdef MODALITA_BLOCCO_BASSA_POTENZA
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284:Src/stm32g4xx_it.c **** TIM2->CCR1 = adc_val >> DIVISORE_BLOCCO_BASSA_POTENZA;
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285:Src/stm32g4xx_it.c **** TIM2->CCR2 = adc_val >> DIVISORE_BLOCCO_BASSA_POTENZA;
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286:Src/stm32g4xx_it.c **** #endif
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287:Src/stm32g4xx_it.c **** } else {
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288:Src/stm32g4xx_it.c **** TIM2->CCR1 = adc_val;
|
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289:Src/stm32g4xx_it.c **** TIM2->CCR2 = adc_val; // ???
|
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290:Src/stm32g4xx_it.c **** }
|
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291:Src/stm32g4xx_it.c **** ui_volume = vu_meter(adc_val);
|
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|
394 .loc 1 291 5 is_stmt 1 view .LVU55
|
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|
395 .loc 1 291 17 is_stmt 0 view .LVU56
|
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396 0022 FFF7FEFF bl vu_meter
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397 .LVL9:
|
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|
398 .loc 1 291 15 discriminator 1 view .LVU57
|
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|
399 0026 074B ldr r3, .L36+12
|
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400 0028 1880 strh r0, [r3] @ movhi
|
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|
292:Src/stm32g4xx_it.c **** /* USER CODE END TIM2_IRQn 1 */
|
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|
293:Src/stm32g4xx_it.c **** }
|
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|
401 .loc 1 293 1 view .LVU58
|
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|
402 002a 08BD pop {r3, pc}
|
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|
403 .LVL10:
|
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|
404 .L33:
|
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|
288:Src/stm32g4xx_it.c **** TIM2->CCR2 = adc_val; // ???
|
|
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|
405 .loc 1 288 9 is_stmt 1 view .LVU59
|
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|
|
406 002c 9BB2 uxth r3, r3
|
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|
288:Src/stm32g4xx_it.c **** TIM2->CCR2 = adc_val; // ???
|
|
|
|
|
|
407 .loc 1 288 20 is_stmt 0 view .LVU60
|
|
|
|
|
|
408 002e 4FF08042 mov r2, #1073741824
|
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|
409 0032 5363 str r3, [r2, #52]
|
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|
289:Src/stm32g4xx_it.c **** }
|
|
|
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|
410 .loc 1 289 9 is_stmt 1 view .LVU61
|
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|
|
ARM GAS /tmp/cc2HfgZ9.s page 13
|
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|
289:Src/stm32g4xx_it.c **** }
|
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|
|
411 .loc 1 289 20 is_stmt 0 view .LVU62
|
|
|
|
|
|
412 0034 9363 str r3, [r2, #56]
|
|
|
|
|
|
413 0036 F4E7 b .L34
|
|
|
|
|
|
414 .L37:
|
|
|
|
|
|
415 .align 2
|
|
|
|
|
|
416 .L36:
|
|
|
|
|
|
417 0038 00000000 .word htim2
|
|
|
|
|
|
418 003c 00000000 .word hadc1
|
|
|
|
|
|
419 0040 00000000 .word blocco
|
|
|
|
|
|
420 0044 00000000 .word ui_volume
|
|
|
|
|
|
421 .cfi_endproc
|
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|
|
|
|
422 .LFE345:
|
|
|
|
|
|
424 .section .text.TIM3_IRQHandler,"ax",%progbits
|
|
|
|
|
|
425 .align 1
|
|
|
|
|
|
426 .global TIM3_IRQHandler
|
|
|
|
|
|
427 .syntax unified
|
|
|
|
|
|
428 .thumb
|
|
|
|
|
|
429 .thumb_func
|
|
|
|
|
|
431 TIM3_IRQHandler:
|
|
|
|
|
|
432 .LFB346:
|
|
|
|
|
|
294:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
295:Src/stm32g4xx_it.c **** /**
|
|
|
|
|
|
296:Src/stm32g4xx_it.c **** * @brief This function handles TIM3 global interrupt.
|
|
|
|
|
|
297:Src/stm32g4xx_it.c **** */
|
|
|
|
|
|
298:Src/stm32g4xx_it.c **** void TIM3_IRQHandler(void)
|
|
|
|
|
|
299:Src/stm32g4xx_it.c **** {
|
|
|
|
|
|
433 .loc 1 299 1 is_stmt 1 view -0
|
|
|
|
|
|
434 .cfi_startproc
|
|
|
|
|
|
435 @ args = 0, pretend = 0, frame = 0
|
|
|
|
|
|
436 @ frame_needed = 0, uses_anonymous_args = 0
|
|
|
|
|
|
437 0000 08B5 push {r3, lr}
|
|
|
|
|
|
438 .LCFI6:
|
|
|
|
|
|
439 .cfi_def_cfa_offset 8
|
|
|
|
|
|
440 .cfi_offset 3, -8
|
|
|
|
|
|
441 .cfi_offset 14, -4
|
|
|
|
|
|
300:Src/stm32g4xx_it.c **** /* USER CODE BEGIN TIM3_IRQn 0 */
|
|
|
|
|
|
301:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
302:Src/stm32g4xx_it.c **** /* USER CODE END TIM3_IRQn 0 */
|
|
|
|
|
|
303:Src/stm32g4xx_it.c **** HAL_TIM_IRQHandler(&htim3);
|
|
|
|
|
|
442 .loc 1 303 3 view .LVU64
|
|
|
|
|
|
443 0002 0348 ldr r0, .L40
|
|
|
|
|
|
444 0004 FFF7FEFF bl HAL_TIM_IRQHandler
|
|
|
|
|
|
445 .LVL11:
|
|
|
|
|
|
304:Src/stm32g4xx_it.c **** /* USER CODE BEGIN TIM3_IRQn 1 */
|
|
|
|
|
|
305:Src/stm32g4xx_it.c **** // base tempi
|
|
|
|
|
|
306:Src/stm32g4xx_it.c **** sys_tick = 1;
|
|
|
|
|
|
446 .loc 1 306 5 view .LVU65
|
|
|
|
|
|
447 .loc 1 306 14 is_stmt 0 view .LVU66
|
|
|
|
|
|
448 0008 024B ldr r3, .L40+4
|
|
|
|
|
|
449 000a 0122 movs r2, #1
|
|
|
|
|
|
450 000c 1A70 strb r2, [r3]
|
|
|
|
|
|
307:Src/stm32g4xx_it.c **** /* USER CODE END TIM3_IRQn 1 */
|
|
|
|
|
|
308:Src/stm32g4xx_it.c **** }
|
|
|
|
|
|
451 .loc 1 308 1 view .LVU67
|
|
|
|
|
|
452 000e 08BD pop {r3, pc}
|
|
|
|
|
|
453 .L41:
|
|
|
|
|
|
ARM GAS /tmp/cc2HfgZ9.s page 14
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
454 .align 2
|
|
|
|
|
|
455 .L40:
|
|
|
|
|
|
456 0010 00000000 .word htim3
|
|
|
|
|
|
457 0014 00000000 .word sys_tick
|
|
|
|
|
|
458 .cfi_endproc
|
|
|
|
|
|
459 .LFE346:
|
|
|
|
|
|
461 .section .text.USART1_IRQHandler,"ax",%progbits
|
|
|
|
|
|
462 .align 1
|
|
|
|
|
|
463 .global USART1_IRQHandler
|
|
|
|
|
|
464 .syntax unified
|
|
|
|
|
|
465 .thumb
|
|
|
|
|
|
466 .thumb_func
|
|
|
|
|
|
468 USART1_IRQHandler:
|
|
|
|
|
|
469 .LFB347:
|
2025-01-28 19:01:22 +01:00
|
|
|
|
309:Src/stm32g4xx_it.c ****
|
2025-06-28 00:58:29 +02:00
|
|
|
|
310:Src/stm32g4xx_it.c **** /**
|
|
|
|
|
|
311:Src/stm32g4xx_it.c **** * @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI li
|
|
|
|
|
|
312:Src/stm32g4xx_it.c **** */
|
|
|
|
|
|
313:Src/stm32g4xx_it.c **** void USART1_IRQHandler(void)
|
|
|
|
|
|
314:Src/stm32g4xx_it.c **** {
|
|
|
|
|
|
470 .loc 1 314 1 is_stmt 1 view -0
|
|
|
|
|
|
471 .cfi_startproc
|
|
|
|
|
|
472 @ args = 0, pretend = 0, frame = 0
|
|
|
|
|
|
473 @ frame_needed = 0, uses_anonymous_args = 0
|
|
|
|
|
|
474 0000 08B5 push {r3, lr}
|
|
|
|
|
|
475 .LCFI7:
|
|
|
|
|
|
476 .cfi_def_cfa_offset 8
|
|
|
|
|
|
477 .cfi_offset 3, -8
|
|
|
|
|
|
478 .cfi_offset 14, -4
|
|
|
|
|
|
315:Src/stm32g4xx_it.c **** /* USER CODE BEGIN USART1_IRQn 0 */
|
|
|
|
|
|
316:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
317:Src/stm32g4xx_it.c **** /* USER CODE END USART1_IRQn 0 */
|
|
|
|
|
|
318:Src/stm32g4xx_it.c **** HAL_UART_IRQHandler(&huart1);
|
|
|
|
|
|
479 .loc 1 318 3 view .LVU69
|
|
|
|
|
|
480 0002 0248 ldr r0, .L44
|
|
|
|
|
|
481 0004 FFF7FEFF bl HAL_UART_IRQHandler
|
|
|
|
|
|
482 .LVL12:
|
|
|
|
|
|
319:Src/stm32g4xx_it.c **** /* USER CODE BEGIN USART1_IRQn 1 */
|
|
|
|
|
|
320:Src/stm32g4xx_it.c ****
|
|
|
|
|
|
321:Src/stm32g4xx_it.c **** /* USER CODE END USART1_IRQn 1 */
|
|
|
|
|
|
322:Src/stm32g4xx_it.c **** }
|
|
|
|
|
|
483 .loc 1 322 1 is_stmt 0 view .LVU70
|
|
|
|
|
|
484 0008 08BD pop {r3, pc}
|
|
|
|
|
|
485 .L45:
|
|
|
|
|
|
486 000a 00BF .align 2
|
|
|
|
|
|
487 .L44:
|
|
|
|
|
|
488 000c 00000000 .word huart1
|
|
|
|
|
|
489 .cfi_endproc
|
|
|
|
|
|
490 .LFE347:
|
|
|
|
|
|
492 .text
|
|
|
|
|
|
493 .Letext0:
|
|
|
|
|
|
494 .file 2 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/mach
|
|
|
|
|
|
495 .file 3 "/home/fra/bin/arm-gnu-toolchain-14.2.rel1-x86_64-arm-none-eabi/arm-none-eabi/include/sys/
|
|
|
|
|
|
496 .file 4 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
|
|
|
|
|
|
497 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h"
|
|
|
|
|
|
498 .file 6 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
|
|
|
|
|
|
499 .file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
|
|
|
|
|
|
ARM GAS /tmp/cc2HfgZ9.s page 15
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
500 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h"
|
|
|
|
|
|
501 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h"
|
|
|
|
|
|
502 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
|
|
|
|
|
|
503 .file 11 "Inc/squeow.h"
|
|
|
|
|
|
504 .file 12 "Inc/squeow_ui.h"
|
|
|
|
|
|
505 .file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
|
|
|
|
|
|
ARM GAS /tmp/cc2HfgZ9.s page 16
|
2023-07-02 17:09:41 +02:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
DEFINED SYMBOLS
|
|
|
|
|
|
*ABS*:00000000 stm32g4xx_it.c
|
2025-06-28 00:58:29 +02:00
|
|
|
|
/tmp/cc2HfgZ9.s:21 .text.NMI_Handler:00000000 $t
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:27 .text.NMI_Handler:00000000 NMI_Handler
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:44 .text.HardFault_Handler:00000000 $t
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:50 .text.HardFault_Handler:00000000 HardFault_Handler
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:67 .text.MemManage_Handler:00000000 $t
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:73 .text.MemManage_Handler:00000000 MemManage_Handler
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:90 .text.BusFault_Handler:00000000 $t
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:96 .text.BusFault_Handler:00000000 BusFault_Handler
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:113 .text.UsageFault_Handler:00000000 $t
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:119 .text.UsageFault_Handler:00000000 UsageFault_Handler
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:136 .text.SVC_Handler:00000000 $t
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:142 .text.SVC_Handler:00000000 SVC_Handler
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:155 .text.DebugMon_Handler:00000000 $t
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:161 .text.DebugMon_Handler:00000000 DebugMon_Handler
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:174 .text.PendSV_Handler:00000000 $t
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:180 .text.PendSV_Handler:00000000 PendSV_Handler
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:193 .text.SysTick_Handler:00000000 $t
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:199 .text.SysTick_Handler:00000000 SysTick_Handler
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:219 .text.DMA1_Channel2_IRQHandler:00000000 $t
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:225 .text.DMA1_Channel2_IRQHandler:00000000 DMA1_Channel2_IRQHandler
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:245 .text.DMA1_Channel2_IRQHandler:0000000c $d
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:250 .text.DMA1_Channel3_IRQHandler:00000000 $t
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:256 .text.DMA1_Channel3_IRQHandler:00000000 DMA1_Channel3_IRQHandler
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:276 .text.DMA1_Channel3_IRQHandler:0000000c $d
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:281 .text.DMA1_Channel4_IRQHandler:00000000 $t
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:287 .text.DMA1_Channel4_IRQHandler:00000000 DMA1_Channel4_IRQHandler
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:307 .text.DMA1_Channel4_IRQHandler:0000000c $d
|
|
|
|
|
|
/tmp/cc2HfgZ9.s:312 .text.ADC1_2_IRQHandler:00000000 $t
|
|
|
|
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|
/tmp/cc2HfgZ9.s:318 .text.ADC1_2_IRQHandler:00000000 ADC1_2_IRQHandler
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/tmp/cc2HfgZ9.s:342 .text.ADC1_2_IRQHandler:00000010 $d
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/tmp/cc2HfgZ9.s:348 .text.TIM2_IRQHandler:00000000 $t
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/tmp/cc2HfgZ9.s:354 .text.TIM2_IRQHandler:00000000 TIM2_IRQHandler
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/tmp/cc2HfgZ9.s:417 .text.TIM2_IRQHandler:00000038 $d
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/tmp/cc2HfgZ9.s:425 .text.TIM3_IRQHandler:00000000 $t
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/tmp/cc2HfgZ9.s:431 .text.TIM3_IRQHandler:00000000 TIM3_IRQHandler
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/tmp/cc2HfgZ9.s:456 .text.TIM3_IRQHandler:00000010 $d
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/tmp/cc2HfgZ9.s:462 .text.USART1_IRQHandler:00000000 $t
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/tmp/cc2HfgZ9.s:468 .text.USART1_IRQHandler:00000000 USART1_IRQHandler
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/tmp/cc2HfgZ9.s:488 .text.USART1_IRQHandler:0000000c $d
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2023-07-02 17:09:41 +02:00
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UNDEFINED SYMBOLS
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HAL_IncTick
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2025-01-28 19:01:22 +01:00
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HAL_DMA_IRQHandler
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hdma_adc2
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hdma_usart1_rx
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hdma_usart1_tx
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HAL_ADC_IRQHandler
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hadc1
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hadc2
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2023-07-02 17:09:41 +02:00
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HAL_TIM_IRQHandler
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2025-01-28 19:01:22 +01:00
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HAL_ADC_GetValue
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vu_meter
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htim2
|
2025-06-28 00:58:29 +02:00
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blocco
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ui_volume
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ARM GAS /tmp/cc2HfgZ9.s page 17
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2025-01-28 19:01:22 +01:00
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2025-06-28 00:58:29 +02:00
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htim3
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2025-01-28 19:01:22 +01:00
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sys_tick
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HAL_UART_IRQHandler
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huart1
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