1982 lines
130 KiB
Plaintext
1982 lines
130 KiB
Plaintext
ARM GAS /tmp/ccF4OHvs.s page 1
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1 .cpu cortex-m4
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2 .arch armv7e-m
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3 .fpu fpv4-sp-d16
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4 .eabi_attribute 27, 1
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5 .eabi_attribute 28, 1
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6 .eabi_attribute 20, 1
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7 .eabi_attribute 21, 1
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8 .eabi_attribute 23, 3
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9 .eabi_attribute 24, 1
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10 .eabi_attribute 25, 1
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11 .eabi_attribute 26, 1
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12 .eabi_attribute 30, 1
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13 .eabi_attribute 34, 1
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14 .eabi_attribute 18, 4
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15 .file "stm32g4xx_hal_dma_ex.c"
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16 .text
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17 .Ltext0:
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18 .cfi_sections .debug_frame
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19 .file 1 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c"
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20 .section .text.HAL_DMAEx_ConfigMuxSync,"ax",%progbits
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21 .align 1
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22 .global HAL_DMAEx_ConfigMuxSync
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23 .syntax unified
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24 .thumb
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25 .thumb_func
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27 HAL_DMAEx_ConfigMuxSync:
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28 .LVL0:
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29 .LFB329:
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1:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /**
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2:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** ******************************************************************************
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3:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @file stm32g4xx_hal_dma_ex.c
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4:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @author MCD Application Team
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5:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @brief DMA Extension HAL module driver
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6:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * This file provides firmware functions to manage the following
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7:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * functionalities of the DMA Extension peripheral:
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8:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * + Extended features functions
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9:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** *
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10:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** ******************************************************************************
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11:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @attention
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12:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** *
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13:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * Copyright (c) 2019 STMicroelectronics.
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14:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * All rights reserved.
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15:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** *
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16:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * This software is licensed under terms that can be found in the LICENSE file
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17:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * in the root directory of this software component.
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18:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
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19:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** *
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20:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** ******************************************************************************
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21:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** @verbatim
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22:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** ==============================================================================
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23:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** ##### How to use this driver #####
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24:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** ==============================================================================
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25:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** [..]
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26:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** The DMA Extension HAL driver can be used as follows:
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27:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** (+) Configure the DMA_MUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function.
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29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** (+) Configure the DMA_MUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator func
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ARM GAS /tmp/ccF4OHvs.s page 2
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30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can t
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31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** to respectively enable/disable the request generator.
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32:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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33:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** (+) To handle the DMAMUX Interrupts, the function HAL_DMAEx_MUX_IRQHandler should be called fro
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34:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** the DMAMUX IRQ handler i.e DMAMUX1_OVR_IRQHandler.
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35:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** As only one interrupt line is available for all DMAMUX channels and request generators , HAL
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36:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** called with, as parameter, the appropriate DMA handle as many as used DMAs in the user proje
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37:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** (exception done if a given DMA is not using the DMAMUX SYNC block neither a request generator
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38:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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39:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** @endverbatim
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40:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** */
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41:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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42:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Includes ------------------------------------------------------------------*/
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43:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** #include "stm32g4xx_hal.h"
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44:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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45:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /** @addtogroup STM32G4xx_HAL_Driver
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46:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @{
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47:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** */
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48:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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49:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /** @defgroup DMAEx DMAEx
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50:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @brief DMA Extended HAL module driver
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51:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @{
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52:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** */
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53:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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54:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** #ifdef HAL_DMA_MODULE_ENABLED
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55:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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56:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Private typedef -----------------------------------------------------------*/
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57:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Private define ------------------------------------------------------------*/
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58:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Private macro -------------------------------------------------------------*/
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59:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Private variables ---------------------------------------------------------*/
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60:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Private Constants ---------------------------------------------------------*/
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61:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Private function prototypes -----------------------------------------------*/
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62:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Private functions ---------------------------------------------------------*/
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63:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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64:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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65:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions
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66:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @{
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67:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** */
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68:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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69:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /** @defgroup DMAEx_Exported_Functions_Group1 DMAEx Extended features functions
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70:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @brief Extended features functions
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71:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** *
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72:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** @verbatim
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73:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** ===============================================================================
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74:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** ##### Extended features functions #####
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75:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** ===============================================================================
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76:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** [..] This section provides functions allowing to:
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77:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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78:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** (+) Configure the DMAMUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function.
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79:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** (+) Configure the DMAMUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator func
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80:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can t
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81:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** to respectively enable/disable the request generator.
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82:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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83:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** @endverbatim
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84:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @{
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85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** */
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86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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ARM GAS /tmp/ccF4OHvs.s page 3
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87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /**
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89:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @brief Configure the DMAMUX synchronization parameters for a given DMA channel (instance).
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90:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
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91:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * the configuration information for the specified DMA channel.
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92:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @param pSyncConfig : pointer to HAL_DMA_MuxSyncConfigTypeDef : contains the DMAMUX synchroniza
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93:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @retval HAL status
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94:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** */
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95:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pS
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96:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
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30 .loc 1 96 1 view -0
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31 .cfi_startproc
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32 @ args = 0, pretend = 0, frame = 0
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33 @ frame_needed = 0, uses_anonymous_args = 0
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34 @ link register save eliminated.
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97:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Check the parameters */
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98:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
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35 .loc 1 98 3 view .LVU1
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99:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** assert_param(IS_DMAMUX_SYNC_SIGNAL_ID(pSyncConfig->SyncSignalID));
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36 .loc 1 100 3 view .LVU2
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101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** assert_param(IS_DMAMUX_SYNC_POLARITY(pSyncConfig-> SyncPolarity));
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37 .loc 1 102 3 view .LVU3
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103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** assert_param(IS_DMAMUX_SYNC_STATE(pSyncConfig->SyncEnable));
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38 .loc 1 103 3 view .LVU4
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104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** assert_param(IS_DMAMUX_SYNC_EVENT(pSyncConfig->EventEnable));
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39 .loc 1 104 3 view .LVU5
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105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** assert_param(IS_DMAMUX_SYNC_REQUEST_NUMBER(pSyncConfig->RequestNumber));
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40 .loc 1 105 3 view .LVU6
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106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /*Check if the DMA state is ready */
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108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** if (hdma->State == HAL_DMA_STATE_READY)
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41 .loc 1 108 3 view .LVU7
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42 .loc 1 108 11 is_stmt 0 view .LVU8
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43 0000 90F82530 ldrb r3, [r0, #37] @ zero_extendqisi2
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44 0004 DBB2 uxtb r3, r3
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45 .loc 1 108 6 view .LVU9
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46 0006 012B cmp r3, #1
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47 0008 21D1 bne .L3
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109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
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110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Process Locked */
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111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** __HAL_LOCK(hdma);
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48 .loc 1 111 5 is_stmt 1 view .LVU10
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49 .loc 1 111 5 view .LVU11
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50 000a 90F82430 ldrb r3, [r0, #36] @ zero_extendqisi2
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51 000e 012B cmp r3, #1
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52 0010 1FD0 beq .L4
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96:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Check the parameters */
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53 .loc 1 96 1 is_stmt 0 discriminator 2 view .LVU12
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54 0012 30B4 push {r4, r5}
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55 .LCFI0:
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56 .cfi_def_cfa_offset 8
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57 .cfi_offset 4, -8
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58 .cfi_offset 5, -4
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59 .loc 1 111 5 is_stmt 1 discriminator 2 view .LVU13
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60 0014 0123 movs r3, #1
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ARM GAS /tmp/ccF4OHvs.s page 4
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61 0016 80F82430 strb r3, [r0, #36]
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62 .loc 1 111 5 discriminator 2 view .LVU14
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112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Set the new synchronization parameters (and keep the request ID filled during the Init)*/
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114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** MODIFY_REG(hdma->DMAmuxChannel->CCR, \
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63 .loc 1 114 5 discriminator 2 view .LVU15
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64 001a 846C ldr r4, [r0, #72]
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65 001c 2268 ldr r2, [r4]
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66 001e D2B2 uxtb r2, r2
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67 0020 CB68 ldr r3, [r1, #12]
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68 0022 013B subs r3, r3, #1
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69 0024 DB04 lsls r3, r3, #19
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70 0026 0D68 ldr r5, [r1]
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71 0028 43EA0563 orr r3, r3, r5, lsl #24
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72 002c 4D68 ldr r5, [r1, #4]
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73 002e 2B43 orrs r3, r3, r5
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74 0030 91F808C0 ldrb ip, [r1, #8] @ zero_extendqisi2
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75 0034 43EA0C43 orr r3, r3, ip, lsl #16
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76 0038 497A ldrb r1, [r1, #9] @ zero_extendqisi2
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77 .LVL1:
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78 .loc 1 114 5 is_stmt 0 discriminator 2 view .LVU16
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79 003a 43EA4123 orr r3, r3, r1, lsl #9
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80 003e 1343 orrs r3, r3, r2
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81 0040 2360 str r3, [r4]
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115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** (~DMAMUX_CxCR_DMAREQ_ID), \
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116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** ((pSyncConfig->SyncSignalID) << DMAMUX_CxCR_SYNC_ID_Pos) | ((pSyncConfig->RequestNum
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117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** pSyncConfig->SyncPolarity | ((uint32_t)pSyncConfig->SyncEnable << DMAMUX_CxCR_SE_Pos
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118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** ((uint32_t)pSyncConfig->EventEnable << DMAMUX_CxCR_EGE_Pos));
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119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Process UnLocked */
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121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** __HAL_UNLOCK(hdma);
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82 .loc 1 121 5 is_stmt 1 discriminator 2 view .LVU17
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83 .loc 1 121 5 discriminator 2 view .LVU18
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84 0042 0023 movs r3, #0
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85 0044 80F82430 strb r3, [r0, #36]
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86 .loc 1 121 5 discriminator 2 view .LVU19
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122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
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123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** return HAL_OK;
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87 .loc 1 123 5 discriminator 2 view .LVU20
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88 .loc 1 123 12 is_stmt 0 discriminator 2 view .LVU21
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89 0048 1846 mov r0, r3
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90 .LVL2:
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124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
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125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** else
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126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /*DMA State not Ready*/
|
||
128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** return HAL_ERROR;
|
||
129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
91 .loc 1 130 1 discriminator 2 view .LVU22
|
||
92 004a 30BC pop {r4, r5}
|
||
93 .LCFI1:
|
||
94 .cfi_restore 5
|
||
95 .cfi_restore 4
|
||
96 .cfi_def_cfa_offset 0
|
||
97 004c 7047 bx lr
|
||
98 .LVL3:
|
||
ARM GAS /tmp/ccF4OHvs.s page 5
|
||
|
||
|
||
99 .L3:
|
||
128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
100 .loc 1 128 12 view .LVU23
|
||
101 004e 0120 movs r0, #1
|
||
102 .LVL4:
|
||
128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
103 .loc 1 128 12 view .LVU24
|
||
104 0050 7047 bx lr
|
||
105 .LVL5:
|
||
106 .L4:
|
||
111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
107 .loc 1 111 5 view .LVU25
|
||
108 0052 0220 movs r0, #2
|
||
109 .LVL6:
|
||
110 .loc 1 130 1 view .LVU26
|
||
111 0054 7047 bx lr
|
||
112 .cfi_endproc
|
||
113 .LFE329:
|
||
115 .section .text.HAL_DMAEx_ConfigMuxRequestGenerator,"ax",%progbits
|
||
116 .align 1
|
||
117 .global HAL_DMAEx_ConfigMuxRequestGenerator
|
||
118 .syntax unified
|
||
119 .thumb
|
||
120 .thumb_func
|
||
122 HAL_DMAEx_ConfigMuxRequestGenerator:
|
||
123 .LVL7:
|
||
124 .LFB330:
|
||
131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /**
|
||
133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @brief Configure the DMAMUX request generator block used by the given DMA channel (instance).
|
||
134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
||
135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * the configuration information for the specified DMA channel.
|
||
136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @param pRequestGeneratorConfig : pointer to HAL_DMA_MuxRequestGeneratorConfigTypeDef :
|
||
137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * contains the request generator parameters.
|
||
138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** *
|
||
139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @retval HAL status
|
||
140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** */
|
||
141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef *hdma,
|
||
142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRe
|
||
143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
125 .loc 1 143 1 is_stmt 1 view -0
|
||
126 .cfi_startproc
|
||
127 @ args = 0, pretend = 0, frame = 0
|
||
128 @ frame_needed = 0, uses_anonymous_args = 0
|
||
129 @ link register save eliminated.
|
||
130 .loc 1 143 1 is_stmt 0 view .LVU28
|
||
131 0000 0246 mov r2, r0
|
||
144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Check the parameters */
|
||
145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
|
||
132 .loc 1 145 3 is_stmt 1 view .LVU29
|
||
146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** assert_param(IS_DMAMUX_REQUEST_GEN_SIGNAL_ID(pRequestGeneratorConfig->SignalID));
|
||
133 .loc 1 147 3 view .LVU30
|
||
148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** assert_param(IS_DMAMUX_REQUEST_GEN_POLARITY(pRequestGeneratorConfig->Polarity));
|
||
134 .loc 1 149 3 view .LVU31
|
||
150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** assert_param(IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(pRequestGeneratorConfig->RequestNumber));
|
||
ARM GAS /tmp/ccF4OHvs.s page 6
|
||
|
||
|
||
135 .loc 1 150 3 view .LVU32
|
||
151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* check if the DMA state is ready
|
||
153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** and DMA is using a DMAMUX request generator block
|
||
154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** */
|
||
155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** if ((hdma->State == HAL_DMA_STATE_READY) && (hdma->DMAmuxRequestGen != 0U))
|
||
136 .loc 1 155 3 view .LVU33
|
||
137 .loc 1 155 12 is_stmt 0 view .LVU34
|
||
138 0002 90F82530 ldrb r3, [r0, #37] @ zero_extendqisi2
|
||
139 0006 D8B2 uxtb r0, r3
|
||
140 .LVL8:
|
||
141 .loc 1 155 6 view .LVU35
|
||
142 0008 0128 cmp r0, #1
|
||
143 000a 24D1 bne .L12
|
||
143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Check the parameters */
|
||
144 .loc 1 143 1 discriminator 1 view .LVU36
|
||
145 000c 10B4 push {r4}
|
||
146 .LCFI2:
|
||
147 .cfi_def_cfa_offset 4
|
||
148 .cfi_offset 4, -4
|
||
149 .loc 1 155 52 discriminator 1 view .LVU37
|
||
150 000e 546D ldr r4, [r2, #84]
|
||
151 .loc 1 155 44 discriminator 1 view .LVU38
|
||
152 0010 E4B1 cbz r4, .L10
|
||
156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Process Locked */
|
||
158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** __HAL_LOCK(hdma);
|
||
153 .loc 1 158 5 is_stmt 1 view .LVU39
|
||
154 .loc 1 158 5 view .LVU40
|
||
155 0012 92F82430 ldrb r3, [r2, #36] @ zero_extendqisi2
|
||
156 0016 012B cmp r3, #1
|
||
157 0018 1FD0 beq .L13
|
||
158 .loc 1 158 5 discriminator 2 view .LVU41
|
||
159 001a 0123 movs r3, #1
|
||
160 001c 82F82430 strb r3, [r2, #36]
|
||
161 .loc 1 158 5 discriminator 2 view .LVU42
|
||
159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Set the request generator new parameters */
|
||
161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** hdma->DMAmuxRequestGen->RGCR = pRequestGeneratorConfig->SignalID | \
|
||
162 .loc 1 161 5 discriminator 2 view .LVU43
|
||
163 .loc 1 161 59 is_stmt 0 discriminator 2 view .LVU44
|
||
164 0020 0868 ldr r0, [r1]
|
||
162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** ((pRequestGeneratorConfig->RequestNumber - 1U) << (POSITION_VAL(
|
||
165 .loc 1 162 61 discriminator 2 view .LVU45
|
||
166 0022 8B68 ldr r3, [r1, #8]
|
||
167 .loc 1 162 77 discriminator 2 view .LVU46
|
||
168 0024 03F1FF3C add ip, r3, #-1
|
||
169 .LVL9:
|
||
170 .LBB6:
|
||
171 .LBI6:
|
||
172 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
|
||
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
|
||
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
|
||
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
|
||
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0
|
||
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019
|
||
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
|
||
ARM GAS /tmp/ccF4OHvs.s page 7
|
||
|
||
|
||
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
|
||
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
||
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
|
||
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
||
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
|
||
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
|
||
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
|
||
15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
||
16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
|
||
17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
||
18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
|
||
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
|
||
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
|
||
23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
24:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
|
||
26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
|
||
27:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
|
||
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
|
||
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
|
||
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
|
||
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
|
||
35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
|
||
36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
|
||
37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
38:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
|
||
40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
|
||
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
|
||
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
|
||
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
|
||
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
|
||
47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
|
||
48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
|
||
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
|
||
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
|
||
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
|
||
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
|
||
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
|
||
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
|
||
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
|
||
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
|
||
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
|
||
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
ARM GAS /tmp/ccF4OHvs.s page 8
|
||
|
||
|
||
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
|
||
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
|
||
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
|
||
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
|
||
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
|
||
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||
75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
|
||
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||
83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
|
||
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
|
||
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
|
||
93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
|
||
95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
|
||
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
|
||
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
||
104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
||
105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
||
106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
||
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
|
||
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
|
||
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
|
||
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
|
||
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
|
||
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __COMPILER_BARRIER
|
||
117:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
|
||
118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
119:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */
|
||
ARM GAS /tmp/ccF4OHvs.s page 9
|
||
|
||
|
||
121:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START
|
||
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections
|
||
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss
|
||
127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly
|
||
128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script.
|
||
129:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
130:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
|
||
132:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
133:Drivers/CMSIS/Include/cmsis_gcc.h **** extern void _start(void) __NO_RETURN;
|
||
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
135:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct {
|
||
136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src;
|
||
137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest;
|
||
138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen;
|
||
139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t;
|
||
140:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct {
|
||
142:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest;
|
||
143:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen;
|
||
144:Drivers/CMSIS/Include/cmsis_gcc.h **** } __zero_table_t;
|
||
145:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
146:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_start__;
|
||
147:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_end__;
|
||
148:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_start__;
|
||
149:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_end__;
|
||
150:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
151:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable
|
||
152:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; i<pTable->wlen; ++i) {
|
||
153:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = pTable->src[i];
|
||
154:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
155:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
156:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable
|
||
158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; i<pTable->wlen; ++i) {
|
||
159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u;
|
||
160:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
161:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
162:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
163:Drivers/CMSIS/Include/cmsis_gcc.h **** _start();
|
||
164:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
165:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START __cmsis_start
|
||
167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
168:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP
|
||
170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP __StackTop
|
||
171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
172:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT
|
||
174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT __StackLimit
|
||
175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
176:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE
|
||
ARM GAS /tmp/ccF4OHvs.s page 10
|
||
|
||
|
||
178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors
|
||
179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
180:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE
|
||
182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors")))
|
||
183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
184:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
|
||
186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
|
||
187:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
||
188:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
|
||
189:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
190:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
191:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
192:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
|
||
193:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
|
||
194:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
|
||
195:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
|
||
197:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
198:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
|
||
199:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
200:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
201:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
202:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
203:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
|
||
204:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
||
205:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
|
||
206:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
|
||
208:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
|
||
210:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
211:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
212:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
213:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
214:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register
|
||
215:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register.
|
||
216:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value
|
||
217:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
218:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
|
||
219:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
220:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
221:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
222:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) );
|
||
223:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
224:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
225:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
226:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
227:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure)
|
||
230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode.
|
||
231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value
|
||
232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
|
||
234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
ARM GAS /tmp/ccF4OHvs.s page 11
|
||
|
||
|
||
235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
236:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
|
||
238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
240:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
241:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
242:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
243:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
244:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register
|
||
245:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register.
|
||
246:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
|
||
247:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
248:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
|
||
249:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
250:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
|
||
251:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
252:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
253:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
254:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
255:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
256:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure)
|
||
257:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state.
|
||
258:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
|
||
259:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
260:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
|
||
261:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
262:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
|
||
263:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
264:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
265:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
266:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
267:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
268:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register
|
||
269:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
|
||
270:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value
|
||
271:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
272:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
|
||
273:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
274:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
275:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
276:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
|
||
277:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
278:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
279:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
280:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
281:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
282:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register
|
||
283:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register.
|
||
284:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value
|
||
285:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
286:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
|
||
287:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
288:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
289:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
290:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) );
|
||
291:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
ARM GAS /tmp/ccF4OHvs.s page 12
|
||
|
||
|
||
292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
293:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
294:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
295:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
296:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register
|
||
297:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register.
|
||
298:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value
|
||
299:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
300:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
|
||
301:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
302:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
303:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
304:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
|
||
305:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
306:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
307:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
308:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
309:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
310:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer
|
||
311:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP).
|
||
312:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
|
||
313:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
314:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
|
||
315:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
316:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
317:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
318:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) );
|
||
319:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
320:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
321:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
322:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
323:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
324:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
325:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure)
|
||
326:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
|
||
327:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
|
||
328:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
329:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
|
||
330:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
331:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
332:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
|
||
334:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
335:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
336:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
337:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
338:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
339:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
340:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer
|
||
341:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP).
|
||
342:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
|
||
343:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
344:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
|
||
345:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
346:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
|
||
347:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
348:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
ARM GAS /tmp/ccF4OHvs.s page 13
|
||
|
||
|
||
349:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
351:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
|
||
353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
|
||
354:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
|
||
355:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
|
||
357:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
358:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
|
||
359:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
360:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
361:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
362:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
363:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
364:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer
|
||
365:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP).
|
||
366:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
|
||
367:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
368:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
|
||
369:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
370:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
371:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
|
||
373:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
374:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
375:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
376:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
377:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
378:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
379:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure)
|
||
380:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
|
||
381:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
|
||
382:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
383:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
|
||
384:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
385:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
386:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
387:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
|
||
388:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
389:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
390:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
391:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
392:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
393:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
394:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer
|
||
395:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP).
|
||
396:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
|
||
397:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
398:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
|
||
399:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
400:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
|
||
401:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
402:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
403:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
404:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
405:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
ARM GAS /tmp/ccF4OHvs.s page 14
|
||
|
||
|
||
406:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure)
|
||
407:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
|
||
408:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
|
||
409:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
410:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
|
||
411:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
412:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
|
||
413:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
414:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
415:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
416:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
417:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
418:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
419:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure)
|
||
420:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
|
||
421:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value
|
||
422:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
423:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
|
||
424:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
425:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
426:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
427:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
|
||
428:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
429:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
430:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
431:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
432:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
433:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure)
|
||
434:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
|
||
435:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set
|
||
436:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
|
||
438:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
439:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
|
||
440:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
441:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
442:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
443:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
444:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
445:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask
|
||
446:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register.
|
||
447:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
|
||
448:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
449:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
|
||
450:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
451:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
452:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
453:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
|
||
454:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
455:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
456:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
457:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
458:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
459:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
460:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure)
|
||
461:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
|
||
462:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
|
||
ARM GAS /tmp/ccF4OHvs.s page 15
|
||
|
||
|
||
463:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
464:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
|
||
465:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
466:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
467:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
468:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
|
||
469:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
470:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
471:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
472:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
473:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
474:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
475:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask
|
||
476:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register.
|
||
477:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
|
||
478:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
479:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
|
||
480:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
481:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
|
||
482:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
483:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
484:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
485:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
486:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure)
|
||
488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
|
||
489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
|
||
490:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
|
||
492:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
|
||
494:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
495:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
496:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
497:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
498:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||
499:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
||
500:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
|
||
501:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
502:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ
|
||
503:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
|
||
504:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
|
||
505:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void)
|
||
507:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory");
|
||
509:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
510:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
511:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
512:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ
|
||
514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR.
|
||
515:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
|
||
516:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
517:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
|
||
518:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
519:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory");
|
||
ARM GAS /tmp/ccF4OHvs.s page 16
|
||
|
||
|
||
520:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
521:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
522:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
523:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
524:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority
|
||
525:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register.
|
||
526:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
|
||
527:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
528:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
|
||
529:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
530:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
531:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
532:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) );
|
||
533:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
534:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
535:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
536:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
537:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
538:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
539:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure)
|
||
540:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state.
|
||
541:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
|
||
542:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
543:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
|
||
544:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
545:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
546:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
547:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
|
||
548:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
549:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
550:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
551:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
552:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
553:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
554:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority
|
||
555:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register.
|
||
556:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
|
||
557:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
558:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
|
||
559:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
560:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
|
||
561:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
562:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
563:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
564:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
565:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
566:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure)
|
||
567:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state.
|
||
568:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
|
||
569:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
570:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
|
||
571:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
572:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
|
||
573:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
574:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
575:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
576:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
ARM GAS /tmp/ccF4OHvs.s page 17
|
||
|
||
|
||
577:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
578:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition
|
||
579:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable
|
||
580:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level.
|
||
581:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
|
||
582:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
583:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
|
||
584:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
585:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
|
||
586:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
587:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
588:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
589:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
590:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask
|
||
591:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register.
|
||
592:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
|
||
593:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
594:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
|
||
595:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
596:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
597:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
598:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
|
||
599:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
600:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
601:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
602:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
603:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
604:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
605:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure)
|
||
606:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state.
|
||
607:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
|
||
608:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
609:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
|
||
610:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
611:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
612:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
613:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
|
||
614:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
615:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
616:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
617:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
618:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
619:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
620:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask
|
||
621:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register.
|
||
622:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
|
||
623:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
624:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
|
||
625:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
626:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
|
||
627:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
628:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
629:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
630:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
631:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
632:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure)
|
||
633:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state.
|
||
ARM GAS /tmp/ccF4OHvs.s page 18
|
||
|
||
|
||
634:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
|
||
635:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
636:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
|
||
637:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
638:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
|
||
639:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
640:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
641:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
642:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||
643:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
||
644:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
|
||
645:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
646:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
647:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
||
648:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
|
||
649:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
650:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit
|
||
652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
|
||
654:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
|
||
655:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
656:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
|
||
657:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
|
||
658:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
659:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
|
||
660:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
661:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||
662:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||
663:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
|
||
664:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
|
||
665:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
666:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
667:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) );
|
||
668:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
669:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
670:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
671:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
672:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
|
||
673:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
674:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure)
|
||
675:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
676:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
|
||
677:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
678:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in
|
||
679:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
|
||
680:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
681:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
|
||
682:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
683:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
|
||
684:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
|
||
685:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
|
||
686:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
687:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
688:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
|
||
689:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
690:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
ARM GAS /tmp/ccF4OHvs.s page 19
|
||
|
||
|
||
691:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
692:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
693:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
694:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
695:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
696:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit
|
||
697:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
698:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
|
||
699:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
|
||
700:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
701:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
|
||
702:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
|
||
703:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
704:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
|
||
705:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
706:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||
707:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||
708:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
|
||
709:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
|
||
710:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
711:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
|
||
712:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
713:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
714:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
715:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
716:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
717:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
718:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
|
||
719:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
720:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
|
||
721:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s
|
||
723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
|
||
724:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
|
||
726:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
|
||
728:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
|
||
729:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
|
||
730:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
|
||
732:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
733:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
734:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
735:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
736:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
737:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
738:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit
|
||
739:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
740:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
|
||
741:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
|
||
742:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
|
||
744:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
|
||
745:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
|
||
747:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
ARM GAS /tmp/ccF4OHvs.s page 20
|
||
|
||
|
||
748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||
749:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||
750:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
|
||
751:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
|
||
752:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
754:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) );
|
||
755:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
756:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
757:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
758:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
759:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
760:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure)
|
||
763:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
764:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
|
||
765:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
766:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec
|
||
767:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
|
||
768:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
769:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
|
||
770:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
771:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
|
||
772:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
|
||
773:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
|
||
774:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
775:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
776:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
|
||
777:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
778:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
779:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
781:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
782:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
783:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
784:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit
|
||
785:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
786:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
|
||
787:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
|
||
788:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
|
||
790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
|
||
791:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
|
||
793:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||
795:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||
796:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
|
||
797:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
|
||
798:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
799:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
|
||
800:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
801:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
802:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
803:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
804:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
||
ARM GAS /tmp/ccF4OHvs.s page 21
|
||
|
||
|
||
805:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
806:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure)
|
||
807:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
||
808:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
|
||
809:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
810:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu
|
||
811:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set
|
||
812:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
813:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
|
||
814:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
815:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
|
||
816:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
|
||
817:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
|
||
818:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
|
||
820:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
821:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
822:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
823:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
824:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
||
825:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
|
||
826:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
827:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
828:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
829:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR
|
||
830:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register.
|
||
831:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value
|
||
832:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
833:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
|
||
834:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
835:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||
836:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
||
837:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr)
|
||
838:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
|
||
839:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
|
||
840:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
|
||
841:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr();
|
||
842:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
843:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
844:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
845:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
|
||
846:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
||
847:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
848:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
849:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U);
|
||
850:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
851:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
852:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
853:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
854:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
855:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR
|
||
856:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register.
|
||
857:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set
|
||
858:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
859:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
|
||
860:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
861:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||
ARM GAS /tmp/ccF4OHvs.s page 22
|
||
|
||
|
||
862:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
||
863:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr)
|
||
864:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
|
||
865:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
|
||
866:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
|
||
867:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr);
|
||
868:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
869:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
|
||
870:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
871:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
872:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr;
|
||
873:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
874:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
875:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
876:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
877:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
|
||
878:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
879:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
880:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */
|
||
881:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
|
||
882:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions
|
||
883:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
|
||
884:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
885:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
886:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
|
||
887:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l"
|
||
888:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */
|
||
889:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
|
||
890:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
|
||
891:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
|
||
892:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
|
||
893:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
894:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
|
||
895:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
|
||
896:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
|
||
897:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
898:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
899:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
900:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation
|
||
901:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes.
|
||
902:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
903:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop")
|
||
904:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
905:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
906:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt
|
||
907:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
|
||
908:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
909:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi")
|
||
910:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
911:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
912:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
913:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event
|
||
914:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter
|
||
915:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs.
|
||
916:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
917:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe")
|
||
918:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
ARM GAS /tmp/ccF4OHvs.s page 23
|
||
|
||
|
||
919:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
920:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
921:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event
|
||
922:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
|
||
923:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
924:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev")
|
||
925:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
926:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
927:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
928:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier
|
||
929:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor,
|
||
930:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory,
|
||
931:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed.
|
||
932:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
933:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
|
||
934:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
935:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory");
|
||
936:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
937:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
938:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
939:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
940:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier
|
||
941:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier.
|
||
942:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete.
|
||
943:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
944:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
|
||
945:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
946:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory");
|
||
947:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
948:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
949:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
950:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
951:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier
|
||
952:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before
|
||
953:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion.
|
||
954:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
955:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
|
||
956:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
957:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory");
|
||
958:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
959:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
960:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
961:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
962:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit)
|
||
963:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
|
||
964:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
|
||
965:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
|
||
966:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
967:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
|
||
968:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
969:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
|
||
970:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value);
|
||
971:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
972:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
973:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
974:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
|
||
975:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
ARM GAS /tmp/ccF4OHvs.s page 24
|
||
|
||
|
||
976:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
977:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
978:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
979:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
980:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
981:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
|
||
982:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes
|
||
983:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
|
||
984:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
|
||
985:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
986:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
|
||
987:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
988:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
989:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
990:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
|
||
991:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
992:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
993:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
994:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
995:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
996:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
|
||
997:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
|
||
998:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
|
||
999:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
|
||
1000:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1001:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
|
||
1002:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1003:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
|
||
1004:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value);
|
||
1005:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
1006:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result;
|
||
1007:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1008:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
|
||
1009:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
1010:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
1011:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1012:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1013:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1014:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
1015:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit)
|
||
1016:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
|
||
1017:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate
|
||
1018:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate
|
||
1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value
|
||
1020:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1021:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
|
||
1022:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1023:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U;
|
||
1024:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U)
|
||
1025:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1026:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1;
|
||
1027:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1028:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2));
|
||
1029:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1030:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1031:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1032:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
ARM GAS /tmp/ccF4OHvs.s page 25
|
||
|
||
|
||
1033:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint
|
||
1034:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state.
|
||
1035:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula
|
||
1036:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor.
|
||
1037:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break
|
||
1038:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1039:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value)
|
||
1040:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1041:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1042:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value
|
||
1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value.
|
||
1045:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
|
||
1046:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
|
||
1047:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1048:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
|
||
173 .loc 2 1048 31 is_stmt 1 discriminator 2 view .LVU47
|
||
174 .LBB7:
|
||
1049:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1050:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
||
175 .loc 2 1050 3 discriminator 2 view .LVU48
|
||
1051:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||
1053:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
||
1054:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
|
||
1055:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
||
176 .loc 2 1055 4 discriminator 2 view .LVU49
|
||
177 0028 4FF47803 mov r3, #16252928
|
||
178 .syntax unified
|
||
179 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
||
180 002c 93FAA3F3 rbit r3, r3
|
||
181 @ 0 "" 2
|
||
182 .LVL10:
|
||
1056:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
||
1057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
|
||
1058:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1059:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */
|
||
1060:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U)
|
||
1061:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1062:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U;
|
||
1063:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U;
|
||
1064:Drivers/CMSIS/Include/cmsis_gcc.h **** s--;
|
||
1065:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1066:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */
|
||
1067:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
||
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
||
183 .loc 2 1068 3 discriminator 2 view .LVU50
|
||
184 .loc 2 1068 3 is_stmt 0 discriminator 2 view .LVU51
|
||
185 .thumb
|
||
186 .syntax unified
|
||
187 .LBE7:
|
||
188 .LBE6:
|
||
189 .LBB8:
|
||
190 .LBI8:
|
||
1069:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
1071:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
||
ARM GAS /tmp/ccF4OHvs.s page 26
|
||
|
||
|
||
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
||
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros
|
||
1074:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value.
|
||
1075:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros
|
||
1076:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value
|
||
1077:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1078:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
|
||
191 .loc 2 1078 30 is_stmt 1 discriminator 2 view .LVU52
|
||
192 .LBB9:
|
||
1079:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1080:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
|
||
1081:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_clz(0) is undefined behaviour, so handle this case specially.
|
||
1082:Drivers/CMSIS/Include/cmsis_gcc.h **** This guarantees ARM-compatible results if happening to compile on a non-ARM
|
||
1083:Drivers/CMSIS/Include/cmsis_gcc.h **** target, and ensures the compiler doesn't decide to activate any
|
||
1084:Drivers/CMSIS/Include/cmsis_gcc.h **** optimisations using the logic "value was passed to __builtin_clz, so it
|
||
1085:Drivers/CMSIS/Include/cmsis_gcc.h **** is non-zero".
|
||
1086:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
|
||
1087:Drivers/CMSIS/Include/cmsis_gcc.h **** single CLZ instruction.
|
||
1088:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
||
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** if (value == 0U)
|
||
193 .loc 2 1089 3 discriminator 2 view .LVU53
|
||
194 .loc 2 1089 6 is_stmt 0 discriminator 2 view .LVU54
|
||
195 0030 7BB1 cbz r3, .L14
|
||
1090:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
||
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** return 32U;
|
||
1092:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
1093:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_clz(value);
|
||
196 .loc 2 1093 3 is_stmt 1 view .LVU55
|
||
197 .loc 2 1093 10 is_stmt 0 view .LVU56
|
||
198 0032 B3FA83F3 clz r3, r3
|
||
199 .LVL11:
|
||
200 .L11:
|
||
201 .loc 2 1093 10 view .LVU57
|
||
202 .LBE9:
|
||
203 .LBE8:
|
||
204 .loc 1 162 121 view .LVU58
|
||
205 0036 03F01F03 and r3, r3, #31
|
||
206 .loc 1 162 83 view .LVU59
|
||
207 003a 0CFA03F3 lsl r3, ip, r3
|
||
161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** ((pRequestGeneratorConfig->RequestNumber - 1U) << (POSITION_VAL(
|
||
208 .loc 1 161 70 view .LVU60
|
||
209 003e 0343 orrs r3, r3, r0
|
||
163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** pRequestGeneratorConfig->Polarity;
|
||
210 .loc 1 163 59 view .LVU61
|
||
211 0040 4968 ldr r1, [r1, #4]
|
||
212 .LVL12:
|
||
162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** pRequestGeneratorConfig->Polarity;
|
||
213 .loc 1 162 131 view .LVU62
|
||
214 0042 0B43 orrs r3, r3, r1
|
||
161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** ((pRequestGeneratorConfig->RequestNumber - 1U) << (POSITION_VAL(
|
||
215 .loc 1 161 34 view .LVU63
|
||
216 0044 2360 str r3, [r4]
|
||
164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Process UnLocked */
|
||
165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** __HAL_UNLOCK(hdma);
|
||
217 .loc 1 165 5 is_stmt 1 view .LVU64
|
||
218 .loc 1 165 5 view .LVU65
|
||
219 0046 0020 movs r0, #0
|
||
ARM GAS /tmp/ccF4OHvs.s page 27
|
||
|
||
|
||
220 0048 82F82400 strb r0, [r2, #36]
|
||
221 .loc 1 165 5 view .LVU66
|
||
166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** return HAL_OK;
|
||
222 .loc 1 167 5 view .LVU67
|
||
223 .L10:
|
||
168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** else
|
||
170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** return HAL_ERROR;
|
||
172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
224 .loc 1 173 1 is_stmt 0 view .LVU68
|
||
225 004c 5DF8044B ldr r4, [sp], #4
|
||
226 .LCFI3:
|
||
227 .cfi_remember_state
|
||
228 .cfi_restore 4
|
||
229 .cfi_def_cfa_offset 0
|
||
230 0050 7047 bx lr
|
||
231 .LVL13:
|
||
232 .L14:
|
||
233 .LCFI4:
|
||
234 .cfi_restore_state
|
||
235 .LBB11:
|
||
236 .LBB10:
|
||
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
237 .loc 2 1091 12 view .LVU69
|
||
238 0052 2023 movs r3, #32
|
||
239 .LVL14:
|
||
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
240 .loc 2 1091 12 view .LVU70
|
||
241 0054 EFE7 b .L11
|
||
242 .LVL15:
|
||
243 .L12:
|
||
244 .LCFI5:
|
||
245 .cfi_def_cfa_offset 0
|
||
246 .cfi_restore 4
|
||
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
||
247 .loc 2 1091 12 view .LVU71
|
||
248 .LBE10:
|
||
249 .LBE11:
|
||
171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
250 .loc 1 171 12 view .LVU72
|
||
251 0056 0120 movs r0, #1
|
||
252 .loc 1 173 1 view .LVU73
|
||
253 0058 7047 bx lr
|
||
254 .L13:
|
||
255 .LCFI6:
|
||
256 .cfi_def_cfa_offset 4
|
||
257 .cfi_offset 4, -4
|
||
158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
258 .loc 1 158 5 view .LVU74
|
||
259 005a 0220 movs r0, #2
|
||
260 005c F6E7 b .L10
|
||
261 .cfi_endproc
|
||
262 .LFE330:
|
||
264 .section .text.HAL_DMAEx_EnableMuxRequestGenerator,"ax",%progbits
|
||
ARM GAS /tmp/ccF4OHvs.s page 28
|
||
|
||
|
||
265 .align 1
|
||
266 .global HAL_DMAEx_EnableMuxRequestGenerator
|
||
267 .syntax unified
|
||
268 .thumb
|
||
269 .thumb_func
|
||
271 HAL_DMAEx_EnableMuxRequestGenerator:
|
||
272 .LVL16:
|
||
273 .LFB331:
|
||
174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /**
|
||
176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @brief Enable the DMAMUX request generator block used by the given DMA channel (instance).
|
||
177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
||
178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * the configuration information for the specified DMA channel.
|
||
179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @retval HAL status
|
||
180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** */
|
||
181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator(DMA_HandleTypeDef *hdma)
|
||
182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
274 .loc 1 182 1 is_stmt 1 view -0
|
||
275 .cfi_startproc
|
||
276 @ args = 0, pretend = 0, frame = 0
|
||
277 @ frame_needed = 0, uses_anonymous_args = 0
|
||
278 @ link register save eliminated.
|
||
183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Check the parameters */
|
||
184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
|
||
279 .loc 1 184 3 view .LVU76
|
||
185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* check if the DMA state is ready
|
||
187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** and DMA is using a DMAMUX request generator block
|
||
188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** */
|
||
189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** if ((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0))
|
||
280 .loc 1 189 3 view .LVU77
|
||
281 .loc 1 189 12 is_stmt 0 view .LVU78
|
||
282 0000 90F82530 ldrb r3, [r0, #37] @ zero_extendqisi2
|
||
283 .loc 1 189 6 view .LVU79
|
||
284 0004 3BB1 cbz r3, .L21
|
||
285 .loc 1 189 52 discriminator 1 view .LVU80
|
||
286 0006 436D ldr r3, [r0, #84]
|
||
287 .loc 1 189 44 discriminator 1 view .LVU81
|
||
288 0008 3BB1 cbz r3, .L22
|
||
190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Enable the request generator*/
|
||
193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_GE;
|
||
289 .loc 1 193 5 is_stmt 1 view .LVU82
|
||
290 .loc 1 193 27 is_stmt 0 view .LVU83
|
||
291 000a 1A68 ldr r2, [r3]
|
||
292 .loc 1 193 34 view .LVU84
|
||
293 000c 42F48032 orr r2, r2, #65536
|
||
294 0010 1A60 str r2, [r3]
|
||
194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** return HAL_OK;
|
||
295 .loc 1 195 5 is_stmt 1 view .LVU85
|
||
296 .loc 1 195 12 is_stmt 0 view .LVU86
|
||
297 0012 0020 movs r0, #0
|
||
298 .LVL17:
|
||
299 .loc 1 195 12 view .LVU87
|
||
300 0014 7047 bx lr
|
||
ARM GAS /tmp/ccF4OHvs.s page 29
|
||
|
||
|
||
301 .LVL18:
|
||
302 .L21:
|
||
196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** else
|
||
198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** return HAL_ERROR;
|
||
303 .loc 1 199 12 view .LVU88
|
||
304 0016 0120 movs r0, #1
|
||
305 .LVL19:
|
||
306 .loc 1 199 12 view .LVU89
|
||
307 0018 7047 bx lr
|
||
308 .LVL20:
|
||
309 .L22:
|
||
310 .loc 1 199 12 view .LVU90
|
||
311 001a 0120 movs r0, #1
|
||
312 .LVL21:
|
||
200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
313 .loc 1 201 1 view .LVU91
|
||
314 001c 7047 bx lr
|
||
315 .cfi_endproc
|
||
316 .LFE331:
|
||
318 .section .text.HAL_DMAEx_DisableMuxRequestGenerator,"ax",%progbits
|
||
319 .align 1
|
||
320 .global HAL_DMAEx_DisableMuxRequestGenerator
|
||
321 .syntax unified
|
||
322 .thumb
|
||
323 .thumb_func
|
||
325 HAL_DMAEx_DisableMuxRequestGenerator:
|
||
326 .LVL22:
|
||
327 .LFB332:
|
||
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /**
|
||
204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @brief Disable the DMAMUX request generator block used by the given DMA channel (instance).
|
||
205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
||
206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * the configuration information for the specified DMA channel.
|
||
207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @retval HAL status
|
||
208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** */
|
||
209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator(DMA_HandleTypeDef *hdma)
|
||
210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
328 .loc 1 210 1 is_stmt 1 view -0
|
||
329 .cfi_startproc
|
||
330 @ args = 0, pretend = 0, frame = 0
|
||
331 @ frame_needed = 0, uses_anonymous_args = 0
|
||
332 @ link register save eliminated.
|
||
211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Check the parameters */
|
||
212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
|
||
333 .loc 1 212 3 view .LVU93
|
||
213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* check if the DMA state is ready
|
||
215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** and DMA is using a DMAMUX request generator block
|
||
216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** */
|
||
217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** if ((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0))
|
||
334 .loc 1 217 3 view .LVU94
|
||
335 .loc 1 217 12 is_stmt 0 view .LVU95
|
||
336 0000 90F82530 ldrb r3, [r0, #37] @ zero_extendqisi2
|
||
337 .loc 1 217 6 view .LVU96
|
||
ARM GAS /tmp/ccF4OHvs.s page 30
|
||
|
||
|
||
338 0004 3BB1 cbz r3, .L25
|
||
339 .loc 1 217 52 discriminator 1 view .LVU97
|
||
340 0006 436D ldr r3, [r0, #84]
|
||
341 .loc 1 217 44 discriminator 1 view .LVU98
|
||
342 0008 3BB1 cbz r3, .L26
|
||
218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Disable the request generator*/
|
||
221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_GE;
|
||
343 .loc 1 221 5 is_stmt 1 view .LVU99
|
||
344 .loc 1 221 27 is_stmt 0 view .LVU100
|
||
345 000a 1A68 ldr r2, [r3]
|
||
346 .loc 1 221 34 view .LVU101
|
||
347 000c 22F48032 bic r2, r2, #65536
|
||
348 0010 1A60 str r2, [r3]
|
||
222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** return HAL_OK;
|
||
349 .loc 1 223 5 is_stmt 1 view .LVU102
|
||
350 .loc 1 223 12 is_stmt 0 view .LVU103
|
||
351 0012 0020 movs r0, #0
|
||
352 .LVL23:
|
||
353 .loc 1 223 12 view .LVU104
|
||
354 0014 7047 bx lr
|
||
355 .LVL24:
|
||
356 .L25:
|
||
224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** else
|
||
226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** return HAL_ERROR;
|
||
357 .loc 1 227 12 view .LVU105
|
||
358 0016 0120 movs r0, #1
|
||
359 .LVL25:
|
||
360 .loc 1 227 12 view .LVU106
|
||
361 0018 7047 bx lr
|
||
362 .LVL26:
|
||
363 .L26:
|
||
364 .loc 1 227 12 view .LVU107
|
||
365 001a 0120 movs r0, #1
|
||
366 .LVL27:
|
||
228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
367 .loc 1 229 1 view .LVU108
|
||
368 001c 7047 bx lr
|
||
369 .cfi_endproc
|
||
370 .LFE332:
|
||
372 .section .text.HAL_DMAEx_MUX_IRQHandler,"ax",%progbits
|
||
373 .align 1
|
||
374 .global HAL_DMAEx_MUX_IRQHandler
|
||
375 .syntax unified
|
||
376 .thumb
|
||
377 .thumb_func
|
||
379 HAL_DMAEx_MUX_IRQHandler:
|
||
380 .LVL28:
|
||
381 .LFB333:
|
||
230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /**
|
||
232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @brief Handles DMAMUX interrupt request.
|
||
ARM GAS /tmp/ccF4OHvs.s page 31
|
||
|
||
|
||
233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
||
234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * the configuration information for the specified DMA channel.
|
||
235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** * @retval None
|
||
236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** */
|
||
237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma)
|
||
238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
382 .loc 1 238 1 is_stmt 1 view -0
|
||
383 .cfi_startproc
|
||
384 @ args = 0, pretend = 0, frame = 0
|
||
385 @ frame_needed = 0, uses_anonymous_args = 0
|
||
386 .loc 1 238 1 is_stmt 0 view .LVU110
|
||
387 0000 10B5 push {r4, lr}
|
||
388 .LCFI7:
|
||
389 .cfi_def_cfa_offset 8
|
||
390 .cfi_offset 4, -8
|
||
391 .cfi_offset 14, -4
|
||
392 0002 0446 mov r4, r0
|
||
239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Check for DMAMUX Synchronization overrun */
|
||
240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** if ((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U)
|
||
393 .loc 1 240 3 is_stmt 1 view .LVU111
|
||
394 .loc 1 240 12 is_stmt 0 view .LVU112
|
||
395 0004 C36C ldr r3, [r0, #76]
|
||
396 .loc 1 240 33 view .LVU113
|
||
397 0006 1A68 ldr r2, [r3]
|
||
398 .loc 1 240 45 view .LVU114
|
||
399 0008 036D ldr r3, [r0, #80]
|
||
400 .loc 1 240 6 view .LVU115
|
||
401 000a 1A42 tst r2, r3
|
||
402 000c 0ED0 beq .L28
|
||
241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Disable the synchro overrun interrupt */
|
||
243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
|
||
403 .loc 1 243 5 is_stmt 1 view .LVU116
|
||
404 .loc 1 243 9 is_stmt 0 view .LVU117
|
||
405 000e 826C ldr r2, [r0, #72]
|
||
406 .loc 1 243 24 view .LVU118
|
||
407 0010 1368 ldr r3, [r2]
|
||
408 .loc 1 243 30 view .LVU119
|
||
409 0012 23F48073 bic r3, r3, #256
|
||
410 0016 1360 str r3, [r2]
|
||
244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Clear the DMAMUX synchro overrun flag */
|
||
246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
|
||
411 .loc 1 246 5 is_stmt 1 view .LVU120
|
||
412 .loc 1 246 9 is_stmt 0 view .LVU121
|
||
413 0018 C36C ldr r3, [r0, #76]
|
||
414 .loc 1 246 42 view .LVU122
|
||
415 001a 026D ldr r2, [r0, #80]
|
||
416 .loc 1 246 36 view .LVU123
|
||
417 001c 5A60 str r2, [r3, #4]
|
||
247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Update error code */
|
||
249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** hdma->ErrorCode |= HAL_DMA_ERROR_SYNC;
|
||
418 .loc 1 249 5 is_stmt 1 view .LVU124
|
||
419 .loc 1 249 9 is_stmt 0 view .LVU125
|
||
420 001e C36B ldr r3, [r0, #60]
|
||
421 .loc 1 249 21 view .LVU126
|
||
ARM GAS /tmp/ccF4OHvs.s page 32
|
||
|
||
|
||
422 0020 43F40073 orr r3, r3, #512
|
||
423 0024 C363 str r3, [r0, #60]
|
||
250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** if (hdma->XferErrorCallback != NULL)
|
||
424 .loc 1 251 5 is_stmt 1 view .LVU127
|
||
425 .loc 1 251 13 is_stmt 0 view .LVU128
|
||
426 0026 436B ldr r3, [r0, #52]
|
||
427 .loc 1 251 8 view .LVU129
|
||
428 0028 03B1 cbz r3, .L28
|
||
252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Transfer error callback */
|
||
254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** hdma->XferErrorCallback(hdma);
|
||
429 .loc 1 254 7 is_stmt 1 view .LVU130
|
||
430 002a 9847 blx r3
|
||
431 .LVL29:
|
||
432 .L28:
|
||
255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** if (hdma->DMAmuxRequestGen != 0)
|
||
433 .loc 1 258 3 view .LVU131
|
||
434 .loc 1 258 11 is_stmt 0 view .LVU132
|
||
435 002c 636D ldr r3, [r4, #84]
|
||
436 .loc 1 258 6 view .LVU133
|
||
437 002e 9BB1 cbz r3, .L27
|
||
259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* if using a DMAMUX request generator block Check for DMAMUX request generator overrun */
|
||
261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** if ((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U)
|
||
438 .loc 1 261 5 is_stmt 1 view .LVU134
|
||
439 .loc 1 261 14 is_stmt 0 view .LVU135
|
||
440 0030 A26D ldr r2, [r4, #88]
|
||
441 .loc 1 261 38 view .LVU136
|
||
442 0032 1168 ldr r1, [r2]
|
||
443 .loc 1 261 51 view .LVU137
|
||
444 0034 E26D ldr r2, [r4, #92]
|
||
445 .loc 1 261 8 view .LVU138
|
||
446 0036 1142 tst r1, r2
|
||
447 0038 0ED0 beq .L27
|
||
262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Disable the request gen overrun interrupt */
|
||
264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
|
||
448 .loc 1 264 7 is_stmt 1 view .LVU139
|
||
449 .loc 1 264 29 is_stmt 0 view .LVU140
|
||
450 003a 1A68 ldr r2, [r3]
|
||
451 .loc 1 264 36 view .LVU141
|
||
452 003c 22F48072 bic r2, r2, #256
|
||
453 0040 1A60 str r2, [r3]
|
||
265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Clear the DMAMUX request generator overrun flag */
|
||
267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
|
||
454 .loc 1 267 7 is_stmt 1 view .LVU142
|
||
455 .loc 1 267 11 is_stmt 0 view .LVU143
|
||
456 0042 A36D ldr r3, [r4, #88]
|
||
457 .loc 1 267 49 view .LVU144
|
||
458 0044 E26D ldr r2, [r4, #92]
|
||
459 .loc 1 267 43 view .LVU145
|
||
460 0046 5A60 str r2, [r3, #4]
|
||
ARM GAS /tmp/ccF4OHvs.s page 33
|
||
|
||
|
||
268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Update error code */
|
||
270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN;
|
||
461 .loc 1 270 7 is_stmt 1 view .LVU146
|
||
462 .loc 1 270 11 is_stmt 0 view .LVU147
|
||
463 0048 E36B ldr r3, [r4, #60]
|
||
464 .loc 1 270 23 view .LVU148
|
||
465 004a 43F48063 orr r3, r3, #1024
|
||
466 004e E363 str r3, [r4, #60]
|
||
271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c ****
|
||
272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** if (hdma->XferErrorCallback != NULL)
|
||
467 .loc 1 272 7 is_stmt 1 view .LVU149
|
||
468 .loc 1 272 15 is_stmt 0 view .LVU150
|
||
469 0050 636B ldr r3, [r4, #52]
|
||
470 .loc 1 272 10 view .LVU151
|
||
471 0052 0BB1 cbz r3, .L27
|
||
273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** {
|
||
274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** /* Transfer error callback */
|
||
275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** hdma->XferErrorCallback(hdma);
|
||
472 .loc 1 275 9 is_stmt 1 view .LVU152
|
||
473 0054 2046 mov r0, r4
|
||
474 0056 9847 blx r3
|
||
475 .LVL30:
|
||
476 .L27:
|
||
276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c **** }
|
||
477 .loc 1 279 1 is_stmt 0 view .LVU153
|
||
478 0058 10BD pop {r4, pc}
|
||
479 .loc 1 279 1 view .LVU154
|
||
480 .cfi_endproc
|
||
481 .LFE333:
|
||
483 .text
|
||
484 .Letext0:
|
||
485 .file 3 "/usr/lib/gcc/arm-none-eabi/12.2.1/include/stdint.h"
|
||
486 .file 4 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
|
||
487 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h"
|
||
488 .file 6 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
|
||
489 .file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
|
||
490 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h"
|
||
ARM GAS /tmp/ccF4OHvs.s page 34
|
||
|
||
|
||
DEFINED SYMBOLS
|
||
*ABS*:00000000 stm32g4xx_hal_dma_ex.c
|
||
/tmp/ccF4OHvs.s:21 .text.HAL_DMAEx_ConfigMuxSync:00000000 $t
|
||
/tmp/ccF4OHvs.s:27 .text.HAL_DMAEx_ConfigMuxSync:00000000 HAL_DMAEx_ConfigMuxSync
|
||
/tmp/ccF4OHvs.s:116 .text.HAL_DMAEx_ConfigMuxRequestGenerator:00000000 $t
|
||
/tmp/ccF4OHvs.s:122 .text.HAL_DMAEx_ConfigMuxRequestGenerator:00000000 HAL_DMAEx_ConfigMuxRequestGenerator
|
||
/tmp/ccF4OHvs.s:265 .text.HAL_DMAEx_EnableMuxRequestGenerator:00000000 $t
|
||
/tmp/ccF4OHvs.s:271 .text.HAL_DMAEx_EnableMuxRequestGenerator:00000000 HAL_DMAEx_EnableMuxRequestGenerator
|
||
/tmp/ccF4OHvs.s:319 .text.HAL_DMAEx_DisableMuxRequestGenerator:00000000 $t
|
||
/tmp/ccF4OHvs.s:325 .text.HAL_DMAEx_DisableMuxRequestGenerator:00000000 HAL_DMAEx_DisableMuxRequestGenerator
|
||
/tmp/ccF4OHvs.s:373 .text.HAL_DMAEx_MUX_IRQHandler:00000000 $t
|
||
/tmp/ccF4OHvs.s:379 .text.HAL_DMAEx_MUX_IRQHandler:00000000 HAL_DMAEx_MUX_IRQHandler
|
||
|
||
NO UNDEFINED SYMBOLS
|